1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
2
3; Test that SIMD shifts can be lowered correctly even with shift
4; values that are more complex than plain splats.
5
6target triple = "wasm32-unknown-unknown"
7
8;; TODO: Optimize this further by scalarizing the add
9
10; CHECK-LABEL: shl_add:
11; CHECK-NEXT: .functype shl_add (v128, i32, i32) -> (v128)
12; CHECK-NEXT: i8x16.splat $push1=, $1
13; CHECK-NEXT: i8x16.splat $push0=, $2
14; CHECK-NEXT: i8x16.add $push2=, $pop1, $pop0
15; CHECK-NEXT: i8x16.extract_lane_u $push3=, $pop2, 0
16; CHECK-NEXT: i8x16.shl $push4=, $0, $pop3
17; CHECK-NEXT: return $pop4
18define <16 x i8> @shl_add(<16 x i8> %v, i8 %a, i8 %b) {
19  %t1 = insertelement <16 x i8> undef, i8 %a, i32 0
20  %va = shufflevector <16 x i8> %t1, <16 x i8> undef, <16 x i32> zeroinitializer
21  %t2 = insertelement <16 x i8> undef, i8 %b, i32 0
22  %vb = shufflevector <16 x i8> %t2, <16 x i8> undef, <16 x i32> zeroinitializer
23  %shift = add <16 x i8> %va, %vb
24  %r = shl <16 x i8> %v, %shift
25  ret <16 x i8> %r
26}
27
28; CHECK-LABEL: shl_abs:
29; CHECK-NEXT: .functype shl_abs (v128, i32) -> (v128)
30; CHECK-NEXT: i8x16.splat $push0=, $1
31; CHECK-NEXT: i8x16.abs $push1=, $pop0
32; CHECK-NEXT: i8x16.extract_lane_u $push2=, $pop1, 0
33; CHECK-NEXT: i8x16.shl $push3=, $0, $pop2
34; CHECK-NEXT: return $pop3
35define <16 x i8> @shl_abs(<16 x i8> %v, i8 %a) {
36  %t1 = insertelement <16 x i8> undef, i8 %a, i32 0
37  %va = shufflevector <16 x i8> %t1, <16 x i8> undef, <16 x i32> zeroinitializer
38  %nva = sub <16 x i8> zeroinitializer, %va
39  %c = icmp sgt <16 x i8> %va, zeroinitializer
40  %shift = select <16 x i1> %c, <16 x i8> %va, <16 x i8> %nva
41  %r = shl <16 x i8> %v, %shift
42  ret <16 x i8> %r
43}
44
45; CHECK-LABEL: shl_abs_add:
46; CHECK-NEXT: .functype shl_abs_add (v128, i32, i32) -> (v128)
47; CHECK-NEXT: i8x16.splat $push1=, $1
48; CHECK-NEXT: i8x16.splat $push0=, $2
49; CHECK-NEXT: i8x16.add $push2=, $pop1, $pop0
50; CHECK-NEXT: i8x16.shuffle $push3=, $pop2, $0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
51; CHECK-NEXT: i8x16.abs $push4=, $pop3
52; CHECK-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0
53; CHECK-NEXT: i8x16.shl $push6=, $0, $pop5
54; CHECK-NEXT: return $pop6
55define <16 x i8> @shl_abs_add(<16 x i8> %v, i8 %a, i8 %b) {
56  %t1 = insertelement <16 x i8> undef, i8 %a, i32 0
57  %va = shufflevector <16 x i8> %t1, <16 x i8> undef, <16 x i32> zeroinitializer
58  %t2 = insertelement <16 x i8> undef, i8 %b, i32 0
59  %vb = shufflevector <16 x i8> %t2, <16 x i8> undef, <16 x i32> zeroinitializer
60  %vadd = add <16 x i8> %va, %vb
61  %nvadd = sub <16 x i8> zeroinitializer, %vadd
62  %c = icmp sgt <16 x i8> %vadd, zeroinitializer
63  %shift = select <16 x i1> %c, <16 x i8> %vadd, <16 x i8> %nvadd
64  %r = shl <16 x i8> %v, %shift
65  ret <16 x i8> %r
66}
67