1; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
2
3
4;;; <256 x i64>
5
6define fastcc <256 x i64> @insert_rr_v256i64(i32 signext %idx, i64 %s) {
7; CHECK-LABEL: insert_rr_v256i64:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    lsv %v0(%s0), %s1
10; CHECK-NEXT:    b.l.t (, %s10)
11  %ret = insertelement <256 x i64> undef, i64 %s, i32 %idx
12  ret <256 x i64> %ret
13}
14
15define fastcc <256 x i64> @insert_ri7_v256i64(i64 %s) {
16; CHECK-LABEL: insert_ri7_v256i64:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    lsv %v0(127), %s0
19; CHECK-NEXT:    b.l.t (, %s10)
20  %ret = insertelement <256 x i64> undef, i64 %s, i32 127
21  ret <256 x i64> %ret
22}
23
24define fastcc <256 x i64> @insert_ri8_v256i64(i64 %s) {
25; CHECK-LABEL: insert_ri8_v256i64:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    lea %s1, 128
28; CHECK-NEXT:    lsv %v0(%s1), %s0
29; CHECK-NEXT:    b.l.t (, %s10)
30  %ret = insertelement <256 x i64> undef, i64 %s, i32 128
31  ret <256 x i64> %ret
32}
33
34define fastcc <512 x i64> @insert_ri_v512i64(i64 %s) {
35; CHECK-LABEL: insert_ri_v512i64:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    lsv %v1(116), %s0
38; CHECK-NEXT:    b.l.t (, %s10)
39  %ret = insertelement <512 x i64> undef, i64 %s, i32 372
40  ret <512 x i64> %ret
41}
42
43;;; <256 x i32>
44
45define fastcc <256 x i32> @insert_rr_v256i32(i32 signext %idx, i32 signext %s) {
46; CHECK-LABEL: insert_rr_v256i32:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    and %s1, %s1, (32)0
49; CHECK-NEXT:    lsv %v0(%s0), %s1
50; CHECK-NEXT:    b.l.t (, %s10)
51  %ret = insertelement <256 x i32> undef, i32 %s, i32 %idx
52  ret <256 x i32> %ret
53}
54
55define fastcc <256 x i32> @insert_ri7_v256i32(i32 signext %s) {
56; CHECK-LABEL: insert_ri7_v256i32:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    and %s0, %s0, (32)0
59; CHECK-NEXT:    lsv %v0(127), %s0
60; CHECK-NEXT:    b.l.t (, %s10)
61  %ret = insertelement <256 x i32> undef, i32 %s, i32 127
62  ret <256 x i32> %ret
63}
64
65define fastcc <256 x i32> @insert_ri8_v256i32(i32 signext %s) {
66; CHECK-LABEL: insert_ri8_v256i32:
67; CHECK:       # %bb.0:
68; CHECK-NEXT:    and %s0, %s0, (32)0
69; CHECK-NEXT:    lea %s1, 128
70; CHECK-NEXT:    lsv %v0(%s1), %s0
71; CHECK-NEXT:    b.l.t (, %s10)
72  %ret = insertelement <256 x i32> undef, i32 %s, i32 128
73  ret <256 x i32> %ret
74}
75
76define fastcc <512 x i32> @insert_ri_v512i32(i32 signext %s) {
77; CHECK-LABEL: insert_ri_v512i32:
78; CHECK:       # %bb.0:
79; CHECK-NEXT:    lea %s1, 186
80; CHECK-NEXT:    lvs %s2, %v0(%s1)
81; CHECK-NEXT:    and %s2, %s2, (32)0
82; CHECK-NEXT:    sll %s0, %s0, 32
83; CHECK-NEXT:    or %s0, %s2, %s0
84; CHECK-NEXT:    lsv %v0(%s1), %s0
85; CHECK-NEXT:    b.l.t (, %s10)
86  %ret = insertelement <512 x i32> undef, i32 %s, i32 372
87  ret <512 x i32> %ret
88}
89
90define fastcc <512 x i32> @insert_rr_v512i32(i32 signext %idx, i32 signext %s) {
91; CHECK-LABEL: insert_rr_v512i32:
92; CHECK:       # %bb.0:
93; CHECK-NEXT:    and %s1, %s1, (32)0
94; CHECK-NEXT:    nnd %s2, %s0, (63)0
95; CHECK-NEXT:    sla.w.sx %s2, %s2, 5
96; CHECK-NEXT:    sll %s1, %s1, %s2
97; CHECK-NEXT:    srl %s0, %s0, 1
98; CHECK-NEXT:    lvs %s3, %v0(%s0)
99; CHECK-NEXT:    srl %s2, (32)1, %s2
100; CHECK-NEXT:    and %s2, %s3, %s2
101; CHECK-NEXT:    or %s1, %s2, %s1
102; CHECK-NEXT:    lsv %v0(%s0), %s1
103; CHECK-NEXT:    b.l.t (, %s10)
104  %ret = insertelement <512 x i32> undef, i32 %s, i32 %idx
105  ret <512 x i32> %ret
106}
107
108;;; <256 x double>
109
110define fastcc <256 x double> @insert_rr_v256f64(i32 signext %idx, double %s) {
111; CHECK-LABEL: insert_rr_v256f64:
112; CHECK:       # %bb.0:
113; CHECK-NEXT:    lsv %v0(%s0), %s1
114; CHECK-NEXT:    b.l.t (, %s10)
115  %ret = insertelement <256 x double> undef, double %s, i32 %idx
116  ret <256 x double> %ret
117}
118
119define fastcc <256 x double> @insert_ri7_v256f64(double %s) {
120; CHECK-LABEL: insert_ri7_v256f64:
121; CHECK:       # %bb.0:
122; CHECK-NEXT:    lsv %v0(127), %s0
123; CHECK-NEXT:    b.l.t (, %s10)
124  %ret = insertelement <256 x double> undef, double %s, i32 127
125  ret <256 x double> %ret
126}
127
128define fastcc <256 x double> @insert_ri8_v256f64(double %s) {
129; CHECK-LABEL: insert_ri8_v256f64:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    lea %s1, 128
132; CHECK-NEXT:    lsv %v0(%s1), %s0
133; CHECK-NEXT:    b.l.t (, %s10)
134  %ret = insertelement <256 x double> undef, double %s, i32 128
135  ret <256 x double> %ret
136}
137
138define fastcc <512 x double> @insert_ri_v512f64(double %s) {
139; CHECK-LABEL: insert_ri_v512f64:
140; CHECK:       # %bb.0:
141; CHECK-NEXT:    lsv %v1(116), %s0
142; CHECK-NEXT:    b.l.t (, %s10)
143  %ret = insertelement <512 x double> undef, double %s, i32 372
144  ret <512 x double> %ret
145}
146
147;;; <256 x float>
148
149define fastcc <256 x float> @insert_rr_v256f32(i32 signext %idx, float %s) {
150; CHECK-LABEL: insert_rr_v256f32:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    lsv %v0(%s0), %s1
153; CHECK-NEXT:    b.l.t (, %s10)
154  %ret = insertelement <256 x float> undef, float %s, i32 %idx
155  ret <256 x float> %ret
156}
157
158define fastcc <256 x float> @insert_ri7_v256f32(float %s) {
159; CHECK-LABEL: insert_ri7_v256f32:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    lsv %v0(127), %s0
162; CHECK-NEXT:    b.l.t (, %s10)
163  %ret = insertelement <256 x float> undef, float %s, i32 127
164  ret <256 x float> %ret
165}
166
167define fastcc <256 x float> @insert_ri8_v256f32(float %s) {
168; CHECK-LABEL: insert_ri8_v256f32:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    lea %s1, 128
171; CHECK-NEXT:    lsv %v0(%s1), %s0
172; CHECK-NEXT:    b.l.t (, %s10)
173  %ret = insertelement <256 x float> undef, float %s, i32 128
174  ret <256 x float> %ret
175}
176
177define fastcc <512 x float> @insert_ri_v512f32(float %s) {
178; CHECK-LABEL: insert_ri_v512f32:
179; CHECK:       # %bb.0:
180; CHECK-NEXT:    sra.l %s0, %s0, 32
181; CHECK-NEXT:    lea %s1, 186
182; CHECK-NEXT:    lvs %s2, %v0(%s1)
183; CHECK-NEXT:    and %s2, %s2, (32)0
184; CHECK-NEXT:    sll %s0, %s0, 32
185; CHECK-NEXT:    or %s0, %s2, %s0
186; CHECK-NEXT:    lsv %v0(%s1), %s0
187; CHECK-NEXT:    b.l.t (, %s10)
188  %ret = insertelement <512 x float> undef, float %s, i32 372
189  ret <512 x float> %ret
190}
191
192define fastcc <512 x float> @insert_rr_v512f32(i32 signext %idx, float %s) {
193; CHECK-LABEL: insert_rr_v512f32:
194; CHECK:       # %bb.0:
195; CHECK-NEXT:    sra.l %s1, %s1, 32
196; CHECK-NEXT:    srl %s2, %s0, 1
197; CHECK-NEXT:    lvs %s3, %v0(%s2)
198; CHECK-NEXT:    nnd %s0, %s0, (63)0
199; CHECK-NEXT:    sla.w.sx %s0, %s0, 5
200; CHECK-NEXT:    srl %s4, (32)1, %s0
201; CHECK-NEXT:    and %s3, %s3, %s4
202; CHECK-NEXT:    adds.w.zx %s1, %s1, (0)1
203; CHECK-NEXT:    sll %s0, %s1, %s0
204; CHECK-NEXT:    or %s0, %s3, %s0
205; CHECK-NEXT:    lsv %v0(%s2), %s0
206; CHECK-NEXT:    b.l.t (, %s10)
207  %ret = insertelement <512 x float> undef, float %s, i32 %idx
208  ret <512 x float> %ret
209}
210