1; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
2
3
4;;; <256 x i64>
5
6define fastcc i64 @extract_rr_v256i64(i32 signext %idx, <256 x i64> %v) {
7; CHECK-LABEL: extract_rr_v256i64:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    lvs %s0, %v0(%s0)
10; CHECK-NEXT:    b.l.t (, %s10)
11  %ret = extractelement <256 x i64> %v, i32 %idx
12  ret i64 %ret
13}
14
15define fastcc i64 @extract_ri7_v256i64(<256 x i64> %v) {
16; CHECK-LABEL: extract_ri7_v256i64:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    lvs %s0, %v0(127)
19; CHECK-NEXT:    b.l.t (, %s10)
20  %ret = extractelement <256 x i64> %v, i32 127
21  ret i64 %ret
22}
23
24define fastcc i64 @extract_ri8_v256i64(<256 x i64> %v) {
25; CHECK-LABEL: extract_ri8_v256i64:
26; CHECK:       # %bb.0:
27; CHECK-NEXT:    lea %s0, 128
28; CHECK-NEXT:    lvs %s0, %v0(%s0)
29; CHECK-NEXT:    b.l.t (, %s10)
30  %ret = extractelement <256 x i64> %v, i32 128
31  ret i64 %ret
32}
33
34define fastcc i64 @extract_ri_v512i64(<512 x i64> %v) {
35; CHECK-LABEL: extract_ri_v512i64:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    lvs %s0, %v1(116)
38; CHECK-NEXT:    b.l.t (, %s10)
39  %ret = extractelement <512 x i64> %v, i32 372
40  ret i64 %ret
41}
42
43;;; <256 x i32>
44
45define fastcc i32 @extract_rr_v256i32(i32 signext %idx, <256 x i32> %v) {
46; CHECK-LABEL: extract_rr_v256i32:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    lvs %s0, %v0(%s0)
49; CHECK-NEXT:    b.l.t (, %s10)
50  %ret = extractelement <256 x i32> %v, i32 %idx
51  ret i32 %ret
52}
53
54define fastcc i32 @extract_ri7_v256i32(<256 x i32> %v) {
55; CHECK-LABEL: extract_ri7_v256i32:
56; CHECK:       # %bb.0:
57; CHECK-NEXT:    lvs %s0, %v0(127)
58; CHECK-NEXT:    b.l.t (, %s10)
59  %ret = extractelement <256 x i32> %v, i32 127
60  ret i32 %ret
61}
62
63define fastcc i32 @extract_ri8_v256i32(<256 x i32> %v) {
64; CHECK-LABEL: extract_ri8_v256i32:
65; CHECK:       # %bb.0:
66; CHECK-NEXT:    lea %s0, 128
67; CHECK-NEXT:    lvs %s0, %v0(%s0)
68; CHECK-NEXT:    b.l.t (, %s10)
69  %ret = extractelement <256 x i32> %v, i32 128
70  ret i32 %ret
71}
72
73define fastcc i32 @extract_ri_v512i32(<512 x i32> %v) {
74; CHECK-LABEL: extract_ri_v512i32:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    lea %s0, 186
77; CHECK-NEXT:    lvs %s0, %v0(%s0)
78; CHECK-NEXT:    srl %s0, %s0, 32
79; CHECK-NEXT:    b.l.t (, %s10)
80  %ret = extractelement <512 x i32> %v, i32 372
81  ret i32 %ret
82}
83
84define fastcc i32 @extract_rr_v512i32(<512 x i32> %v, i32 signext %idx) {
85; CHECK-LABEL: extract_rr_v512i32:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    srl %s1, %s0, 1
88; CHECK-NEXT:    lvs %s1, %v0(%s1)
89; CHECK-NEXT:    nnd %s0, %s0, (63)0
90; CHECK-NEXT:    sla.w.sx %s0, %s0, 5
91; CHECK-NEXT:    srl %s0, %s1, %s0
92; CHECK-NEXT:    and %s0, %s0, (32)0
93; CHECK-NEXT:    b.l.t (, %s10)
94  %ret = extractelement <512 x i32> %v, i32 %idx
95  ret i32 %ret
96}
97
98;;; <256 x double>
99
100define fastcc double @extract_rr_v256f64(i32 signext %idx, <256 x double> %v) {
101; CHECK-LABEL: extract_rr_v256f64:
102; CHECK:       # %bb.0:
103; CHECK-NEXT:    lvs %s0, %v0(%s0)
104; CHECK-NEXT:    b.l.t (, %s10)
105  %ret = extractelement <256 x double> %v, i32 %idx
106  ret double %ret
107}
108
109define fastcc double @extract_ri7_v256f64(<256 x double> %v) {
110; CHECK-LABEL: extract_ri7_v256f64:
111; CHECK:       # %bb.0:
112; CHECK-NEXT:    lvs %s0, %v0(127)
113; CHECK-NEXT:    b.l.t (, %s10)
114  %ret = extractelement <256 x double> %v, i32 127
115  ret double %ret
116}
117
118define fastcc double @extract_ri8_v256f64(<256 x double> %v) {
119; CHECK-LABEL: extract_ri8_v256f64:
120; CHECK:       # %bb.0:
121; CHECK-NEXT:    lea %s0, 128
122; CHECK-NEXT:    lvs %s0, %v0(%s0)
123; CHECK-NEXT:    b.l.t (, %s10)
124  %ret = extractelement <256 x double> %v, i32 128
125  ret double %ret
126}
127
128define fastcc double @extract_ri_v512f64(<512 x double> %v) {
129; CHECK-LABEL: extract_ri_v512f64:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    lvs %s0, %v1(116)
132; CHECK-NEXT:    b.l.t (, %s10)
133  %ret = extractelement <512 x double> %v, i32 372
134  ret double %ret
135}
136
137;;; <256 x float>
138
139define fastcc float @extract_rr_v256f32(i32 signext %idx, <256 x float> %v) {
140; CHECK-LABEL: extract_rr_v256f32:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    lvs %s0, %v0(%s0)
143; CHECK-NEXT:    b.l.t (, %s10)
144  %ret = extractelement <256 x float> %v, i32 %idx
145  ret float %ret
146}
147
148define fastcc float @extract_ri7_v256f32(<256 x float> %v) {
149; CHECK-LABEL: extract_ri7_v256f32:
150; CHECK:       # %bb.0:
151; CHECK-NEXT:    lvs %s0, %v0(127)
152; CHECK-NEXT:    b.l.t (, %s10)
153  %ret = extractelement <256 x float> %v, i32 127
154  ret float %ret
155}
156
157define fastcc float @extract_ri8_v256f32(<256 x float> %v) {
158; CHECK-LABEL: extract_ri8_v256f32:
159; CHECK:       # %bb.0:
160; CHECK-NEXT:    lea %s0, 128
161; CHECK-NEXT:    lvs %s0, %v0(%s0)
162; CHECK-NEXT:    b.l.t (, %s10)
163  %ret = extractelement <256 x float> %v, i32 128
164  ret float %ret
165}
166
167define fastcc float @extract_ri_v512f32(<512 x float> %v) {
168; CHECK-LABEL: extract_ri_v512f32:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    lea %s0, 186
171; CHECK-NEXT:    lvs %s0, %v0(%s0)
172; CHECK-NEXT:    srl %s0, %s0, 32
173; CHECK-NEXT:    sll %s0, %s0, 32
174; CHECK-NEXT:    b.l.t (, %s10)
175  %ret = extractelement <512 x float> %v, i32 372
176  ret float %ret
177}
178
179define fastcc float @extract_rr_v512f32(<512 x float> %v, i32 signext %idx) {
180; CHECK-LABEL: extract_rr_v512f32:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    srl %s1, %s0, 1
183; CHECK-NEXT:    lvs %s1, %v0(%s1)
184; CHECK-NEXT:    nnd %s0, %s0, (63)0
185; CHECK-NEXT:    sla.w.sx %s0, %s0, 5
186; CHECK-NEXT:    srl %s0, %s1, %s0
187; CHECK-NEXT:    and %s0, %s0, (32)0
188; CHECK-NEXT:    sll %s0, %s0, 32
189; CHECK-NEXT:    b.l.t (, %s10)
190  %ret = extractelement <512 x float> %v, i32 %idx
191  ret float %ret
192}
193