1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=THUMB
3; RUN: llc < %s -mtriple=arm-linux-androideabi -mcpu=arm1156t2-s -verify-machineinstrs | FileCheck %s -check-prefix=ARM
4
5
6; Just to prevent the alloca from being optimized away
7declare void @dummy_use(i32*, i32)
8
9define void @test_basic() #0 {
10; THUMB-LABEL: test_basic:
11; THUMB:       @ %bb.0:
12; THUMB-NEXT:    push {r4, r5}
13; THUMB-NEXT:    mrc p15, #0, r4, c13, c0, #3
14; THUMB-NEXT:    mov r5, sp
15; THUMB-NEXT:    ldr.w r4, [r4, #252]
16; THUMB-NEXT:    cmp r4, r5
17; THUMB-NEXT:    blo .LBB0_2
18; THUMB-NEXT:  @ %bb.1:
19; THUMB-NEXT:    mov r4, #48
20; THUMB-NEXT:    mov r5, #0
21; THUMB-NEXT:    push {lr}
22; THUMB-NEXT:    bl __morestack
23; THUMB-NEXT:    ldr lr, [sp], #4
24; THUMB-NEXT:    pop {r4, r5}
25; THUMB-NEXT:    bx lr
26; THUMB-NEXT:  .LBB0_2:
27; THUMB-NEXT:    pop {r4, r5}
28; THUMB-NEXT:    .save {r7, lr}
29; THUMB-NEXT:    push {r7, lr}
30; THUMB-NEXT:    .pad #40
31; THUMB-NEXT:    sub sp, #40
32; THUMB-NEXT:    mov r0, sp
33; THUMB-NEXT:    movs r1, #10
34; THUMB-NEXT:    bl dummy_use
35; THUMB-NEXT:    add sp, #40
36; THUMB-NEXT:    pop {r7, pc}
37;
38; ARM-LABEL: test_basic:
39; ARM:       @ %bb.0:
40; ARM-NEXT:    push {r4, r5}
41; ARM-NEXT:    mrc p15, #0, r4, c13, c0, #3
42; ARM-NEXT:    mov r5, sp
43; ARM-NEXT:    ldr r4, [r4, #252]
44; ARM-NEXT:    cmp r4, r5
45; ARM-NEXT:    blo .LBB0_2
46; ARM-NEXT:  @ %bb.1:
47; ARM-NEXT:    mov r4, #48
48; ARM-NEXT:    mov r5, #0
49; ARM-NEXT:    stmdb sp!, {lr}
50; ARM-NEXT:    bl __morestack
51; ARM-NEXT:    ldm sp!, {lr}
52; ARM-NEXT:    pop {r4, r5}
53; ARM-NEXT:    bx lr
54; ARM-NEXT:  .LBB0_2:
55; ARM-NEXT:    pop {r4, r5}
56; ARM-NEXT:    .save {r11, lr}
57; ARM-NEXT:    push {r11, lr}
58; ARM-NEXT:    .pad #40
59; ARM-NEXT:    sub sp, sp, #40
60; ARM-NEXT:    mov r0, sp
61; ARM-NEXT:    mov r1, #10
62; ARM-NEXT:    bl dummy_use
63; ARM-NEXT:    add sp, sp, #40
64; ARM-NEXT:    pop {r11, pc}
65  %mem = alloca i32, i32 10
66  call void @dummy_use (i32* %mem, i32 10)
67  ret void
68}
69
70define void @test_large() #0 {
71        %mem = alloca i32, i32 10000
72        call void @dummy_use (i32* %mem, i32 0)
73        ret void
74
75; THUMB-LABEL:   test_large:
76
77; THUMB:         push    {r4, r5}
78; THUMB-NEXT:    movw    r4, #40192
79; THUMB-NEXT:    mov     r5, sp
80; THUMB-NEXT:    movt    r4, #0
81; THUMB-NEXT:    sub     r5, r5, r4
82; THUMB-NEXT:    mrc     p15, #0, r4, c13, c0, #3
83; THUMB-NEXT:    ldr.w   r4, [r4, #252]
84; THUMB-NEXT:    cmp     r4, r5
85; THUMB-NEXT:    blo     .LBB1_2
86
87; THUMB:         movw    r4, #40192
88; THUMB-NEXT:    movt    r4, #0
89; THUMB-NEXT:    mov     r5, #0
90; THUMB-NEXT:    push    {lr}
91; THUMB-NEXT:    bl      __morestack
92; THUMB-NEXT:    ldr     lr, [sp], #4
93; THUMB-NEXT:    pop     {r4, r5}
94; THUMB-NEXT:    bx      lr
95
96; THUMB:         pop     {r4, r5}
97
98
99; ARM-LABEL:   test_large:
100
101; ARM:         push    {r4, r5}
102; ARM-NEXT:    ldr     r4, .LCPI1_0
103; ARM-NEXT:    sub     r5, sp, r4
104; ARM-NEXT:    mrc     p15, #0, r4, c13, c0, #3
105; ARM-NEXT:    ldr     r4, [r4, #252]
106; ARM-NEXT:    cmp     r4, r5
107; ARM-NEXT:    blo     .LBB1_2
108
109; ARM:         ldr     r4, .LCPI1_0
110; ARM-NEXT:    mov     r5, #0
111; ARM-NEXT:    stmdb   sp!, {lr}
112; ARM-NEXT:    bl      __morestack
113; ARM-NEXT:    ldm     sp!, {lr}
114; ARM-NEXT:    pop     {r4, r5}
115; ARM-NEXT:    bx      lr
116
117; ARM:         pop     {r4, r5}
118
119; ARM:         .LCPI1_0:
120; ARM-NEXT:    .long   40192
121
122}
123
124define fastcc void @test_fastcc_large() #0 {
125        %mem = alloca i32, i32 10000
126        call void @dummy_use (i32* %mem, i32 0)
127        ret void
128
129; THUMB-LABEL:   test_fastcc_large:
130
131; THUMB:         push    {r4, r5}
132; THUMB-NEXT:    movw    r4, #40192
133; THUMB-NEXT:    mov     r5, sp
134; THUMB-NEXT:    movt    r4, #0
135; THUMB-NEXT:    sub     r5, r5, r4
136; THUMB-NEXT:    mrc     p15, #0, r4, c13, c0, #3
137; THUMB-NEXT:    ldr.w   r4, [r4, #252]
138; THUMB-NEXT:    cmp     r4, r5
139; THUMB-NEXT:    blo     .LBB2_2
140
141; THUMB:         movw    r4, #40192
142; THUMB-NEXT:    movt    r4, #0
143; THUMB-NEXT:    mov     r5, #0
144; THUMB-NEXT:    push    {lr}
145; THUMB-NEXT:    bl      __morestack
146; THUMB-NEXT:    ldr     lr, [sp], #4
147; THUMB-NEXT:    pop     {r4, r5}
148; THUMB-NEXT:    bx      lr
149
150; THUMB:         pop     {r4, r5}
151
152; ARM-LABEL:   test_fastcc_large:
153
154; ARM:         push    {r4, r5}
155; ARM-NEXT:    ldr     r4, .LCPI2_0
156; ARM-NEXT:    sub     r5, sp, r4
157; ARM-NEXT:    mrc     p15, #0, r4, c13, c0, #3
158; ARM-NEXT:    ldr     r4, [r4, #252]
159; ARM-NEXT:    cmp     r4, r5
160; ARM-NEXT:    blo     .LBB2_2
161
162; ARM:         ldr     r4, .LCPI2_0
163; ARM-NEXT:    mov     r5, #0
164; ARM-NEXT:    stmdb   sp!, {lr}
165; ARM-NEXT:    bl      __morestack
166; ARM-NEXT:    ldm     sp!, {lr}
167; ARM-NEXT:    pop     {r4, r5}
168; ARM-NEXT:    bx      lr
169
170; ARM:         .LCPI2_0:
171; ARM-NEXT:    .long   40192
172}
173
174
175declare void @panic() unnamed_addr
176
177; We used to crash while compiling the following function.
178; THUMB-LABEL: build_should_not_segfault:
179; ARM-LABEL: build_should_not_segfault:
180define void @build_should_not_segfault(i8 %x) unnamed_addr #0 {
181start:
182  %_0 = icmp ult i8 %x, 16
183  %or.cond = select i1 undef, i1 true, i1 %_0
184  br i1 %or.cond, label %bb1, label %bb2
185
186bb1:
187  ret void
188
189bb2:
190  call void @panic()
191  unreachable
192}
193
194attributes #0 = { "split-stack" }
195