1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
4
5define <vscale x 1 x i8> @vxor_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb) {
6; CHECK-LABEL: vxor_vv_nxv1i8:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
9; CHECK-NEXT:    vxor.vv v8, v8, v9
10; CHECK-NEXT:    ret
11  %vc = xor <vscale x 1 x i8> %va, %vb
12  ret <vscale x 1 x i8> %vc
13}
14
15define <vscale x 1 x i8> @vxor_vx_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b) {
16; CHECK-LABEL: vxor_vx_nxv1i8:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
19; CHECK-NEXT:    vxor.vx v8, v8, a0
20; CHECK-NEXT:    ret
21  %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
22  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
23  %vc = xor <vscale x 1 x i8> %va, %splat
24  ret <vscale x 1 x i8> %vc
25}
26
27define <vscale x 1 x i8> @vxor_vi_nxv1i8_0(<vscale x 1 x i8> %va) {
28; CHECK-LABEL: vxor_vi_nxv1i8_0:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
31; CHECK-NEXT:    vnot.v v8, v8
32; CHECK-NEXT:    ret
33  %head = insertelement <vscale x 1 x i8> poison, i8 -1, i32 0
34  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
35  %vc = xor <vscale x 1 x i8> %va, %splat
36  ret <vscale x 1 x i8> %vc
37}
38
39define <vscale x 1 x i8> @vxor_vi_nxv1i8_1(<vscale x 1 x i8> %va) {
40; CHECK-LABEL: vxor_vi_nxv1i8_1:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
43; CHECK-NEXT:    vxor.vi v8, v8, 8
44; CHECK-NEXT:    ret
45  %head = insertelement <vscale x 1 x i8> poison, i8 8, i32 0
46  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
47  %vc = xor <vscale x 1 x i8> %va, %splat
48  ret <vscale x 1 x i8> %vc
49}
50
51define <vscale x 1 x i8> @vxor_vi_nxv1i8_2(<vscale x 1 x i8> %va) {
52; CHECK-LABEL: vxor_vi_nxv1i8_2:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    li a0, 16
55; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
56; CHECK-NEXT:    vxor.vx v8, v8, a0
57; CHECK-NEXT:    ret
58  %head = insertelement <vscale x 1 x i8> poison, i8 16, i32 0
59  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
60  %vc = xor <vscale x 1 x i8> %va, %splat
61  ret <vscale x 1 x i8> %vc
62}
63
64define <vscale x 2 x i8> @vxor_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb) {
65; CHECK-LABEL: vxor_vv_nxv2i8:
66; CHECK:       # %bb.0:
67; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
68; CHECK-NEXT:    vxor.vv v8, v8, v9
69; CHECK-NEXT:    ret
70  %vc = xor <vscale x 2 x i8> %va, %vb
71  ret <vscale x 2 x i8> %vc
72}
73
74define <vscale x 2 x i8> @vxor_vx_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b) {
75; CHECK-LABEL: vxor_vx_nxv2i8:
76; CHECK:       # %bb.0:
77; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
78; CHECK-NEXT:    vxor.vx v8, v8, a0
79; CHECK-NEXT:    ret
80  %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0
81  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
82  %vc = xor <vscale x 2 x i8> %va, %splat
83  ret <vscale x 2 x i8> %vc
84}
85
86define <vscale x 2 x i8> @vxor_vi_nxv2i8_0(<vscale x 2 x i8> %va) {
87; CHECK-LABEL: vxor_vi_nxv2i8_0:
88; CHECK:       # %bb.0:
89; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
90; CHECK-NEXT:    vnot.v v8, v8
91; CHECK-NEXT:    ret
92  %head = insertelement <vscale x 2 x i8> poison, i8 -1, i32 0
93  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
94  %vc = xor <vscale x 2 x i8> %va, %splat
95  ret <vscale x 2 x i8> %vc
96}
97
98define <vscale x 2 x i8> @vxor_vi_nxv2i8_1(<vscale x 2 x i8> %va) {
99; CHECK-LABEL: vxor_vi_nxv2i8_1:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
102; CHECK-NEXT:    vxor.vi v8, v8, 8
103; CHECK-NEXT:    ret
104  %head = insertelement <vscale x 2 x i8> poison, i8 8, i32 0
105  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
106  %vc = xor <vscale x 2 x i8> %va, %splat
107  ret <vscale x 2 x i8> %vc
108}
109
110define <vscale x 2 x i8> @vxor_vi_nxv2i8_2(<vscale x 2 x i8> %va) {
111; CHECK-LABEL: vxor_vi_nxv2i8_2:
112; CHECK:       # %bb.0:
113; CHECK-NEXT:    li a0, 16
114; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
115; CHECK-NEXT:    vxor.vx v8, v8, a0
116; CHECK-NEXT:    ret
117  %head = insertelement <vscale x 2 x i8> poison, i8 16, i32 0
118  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
119  %vc = xor <vscale x 2 x i8> %va, %splat
120  ret <vscale x 2 x i8> %vc
121}
122
123define <vscale x 4 x i8> @vxor_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb) {
124; CHECK-LABEL: vxor_vv_nxv4i8:
125; CHECK:       # %bb.0:
126; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
127; CHECK-NEXT:    vxor.vv v8, v8, v9
128; CHECK-NEXT:    ret
129  %vc = xor <vscale x 4 x i8> %va, %vb
130  ret <vscale x 4 x i8> %vc
131}
132
133define <vscale x 4 x i8> @vxor_vx_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b) {
134; CHECK-LABEL: vxor_vx_nxv4i8:
135; CHECK:       # %bb.0:
136; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
137; CHECK-NEXT:    vxor.vx v8, v8, a0
138; CHECK-NEXT:    ret
139  %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0
140  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
141  %vc = xor <vscale x 4 x i8> %va, %splat
142  ret <vscale x 4 x i8> %vc
143}
144
145define <vscale x 4 x i8> @vxor_vi_nxv4i8_0(<vscale x 4 x i8> %va) {
146; CHECK-LABEL: vxor_vi_nxv4i8_0:
147; CHECK:       # %bb.0:
148; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
149; CHECK-NEXT:    vnot.v v8, v8
150; CHECK-NEXT:    ret
151  %head = insertelement <vscale x 4 x i8> poison, i8 -1, i32 0
152  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
153  %vc = xor <vscale x 4 x i8> %va, %splat
154  ret <vscale x 4 x i8> %vc
155}
156
157define <vscale x 4 x i8> @vxor_vi_nxv4i8_1(<vscale x 4 x i8> %va) {
158; CHECK-LABEL: vxor_vi_nxv4i8_1:
159; CHECK:       # %bb.0:
160; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
161; CHECK-NEXT:    vxor.vi v8, v8, 8
162; CHECK-NEXT:    ret
163  %head = insertelement <vscale x 4 x i8> poison, i8 8, i32 0
164  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
165  %vc = xor <vscale x 4 x i8> %va, %splat
166  ret <vscale x 4 x i8> %vc
167}
168
169define <vscale x 4 x i8> @vxor_vi_nxv4i8_2(<vscale x 4 x i8> %va) {
170; CHECK-LABEL: vxor_vi_nxv4i8_2:
171; CHECK:       # %bb.0:
172; CHECK-NEXT:    li a0, 16
173; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
174; CHECK-NEXT:    vxor.vx v8, v8, a0
175; CHECK-NEXT:    ret
176  %head = insertelement <vscale x 4 x i8> poison, i8 16, i32 0
177  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
178  %vc = xor <vscale x 4 x i8> %va, %splat
179  ret <vscale x 4 x i8> %vc
180}
181
182define <vscale x 8 x i8> @vxor_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb) {
183; CHECK-LABEL: vxor_vv_nxv8i8:
184; CHECK:       # %bb.0:
185; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
186; CHECK-NEXT:    vxor.vv v8, v8, v9
187; CHECK-NEXT:    ret
188  %vc = xor <vscale x 8 x i8> %va, %vb
189  ret <vscale x 8 x i8> %vc
190}
191
192define <vscale x 8 x i8> @vxor_vx_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b) {
193; CHECK-LABEL: vxor_vx_nxv8i8:
194; CHECK:       # %bb.0:
195; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
196; CHECK-NEXT:    vxor.vx v8, v8, a0
197; CHECK-NEXT:    ret
198  %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
199  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
200  %vc = xor <vscale x 8 x i8> %va, %splat
201  ret <vscale x 8 x i8> %vc
202}
203
204define <vscale x 8 x i8> @vxor_vi_nxv8i8_0(<vscale x 8 x i8> %va) {
205; CHECK-LABEL: vxor_vi_nxv8i8_0:
206; CHECK:       # %bb.0:
207; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
208; CHECK-NEXT:    vnot.v v8, v8
209; CHECK-NEXT:    ret
210  %head = insertelement <vscale x 8 x i8> poison, i8 -1, i32 0
211  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
212  %vc = xor <vscale x 8 x i8> %va, %splat
213  ret <vscale x 8 x i8> %vc
214}
215
216define <vscale x 8 x i8> @vxor_vi_nxv8i8_1(<vscale x 8 x i8> %va) {
217; CHECK-LABEL: vxor_vi_nxv8i8_1:
218; CHECK:       # %bb.0:
219; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
220; CHECK-NEXT:    vxor.vi v8, v8, 8
221; CHECK-NEXT:    ret
222  %head = insertelement <vscale x 8 x i8> poison, i8 8, i32 0
223  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
224  %vc = xor <vscale x 8 x i8> %va, %splat
225  ret <vscale x 8 x i8> %vc
226}
227
228define <vscale x 8 x i8> @vxor_vi_nxv8i8_2(<vscale x 8 x i8> %va) {
229; CHECK-LABEL: vxor_vi_nxv8i8_2:
230; CHECK:       # %bb.0:
231; CHECK-NEXT:    li a0, 16
232; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
233; CHECK-NEXT:    vxor.vx v8, v8, a0
234; CHECK-NEXT:    ret
235  %head = insertelement <vscale x 8 x i8> poison, i8 16, i32 0
236  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
237  %vc = xor <vscale x 8 x i8> %va, %splat
238  ret <vscale x 8 x i8> %vc
239}
240
241define <vscale x 16 x i8> @vxor_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb) {
242; CHECK-LABEL: vxor_vv_nxv16i8:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
245; CHECK-NEXT:    vxor.vv v8, v8, v10
246; CHECK-NEXT:    ret
247  %vc = xor <vscale x 16 x i8> %va, %vb
248  ret <vscale x 16 x i8> %vc
249}
250
251define <vscale x 16 x i8> @vxor_vx_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b) {
252; CHECK-LABEL: vxor_vx_nxv16i8:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
255; CHECK-NEXT:    vxor.vx v8, v8, a0
256; CHECK-NEXT:    ret
257  %head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0
258  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
259  %vc = xor <vscale x 16 x i8> %va, %splat
260  ret <vscale x 16 x i8> %vc
261}
262
263define <vscale x 16 x i8> @vxor_vi_nxv16i8_0(<vscale x 16 x i8> %va) {
264; CHECK-LABEL: vxor_vi_nxv16i8_0:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
267; CHECK-NEXT:    vnot.v v8, v8
268; CHECK-NEXT:    ret
269  %head = insertelement <vscale x 16 x i8> poison, i8 -1, i32 0
270  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
271  %vc = xor <vscale x 16 x i8> %va, %splat
272  ret <vscale x 16 x i8> %vc
273}
274
275define <vscale x 16 x i8> @vxor_vi_nxv16i8_1(<vscale x 16 x i8> %va) {
276; CHECK-LABEL: vxor_vi_nxv16i8_1:
277; CHECK:       # %bb.0:
278; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
279; CHECK-NEXT:    vxor.vi v8, v8, 8
280; CHECK-NEXT:    ret
281  %head = insertelement <vscale x 16 x i8> poison, i8 8, i32 0
282  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
283  %vc = xor <vscale x 16 x i8> %va, %splat
284  ret <vscale x 16 x i8> %vc
285}
286
287define <vscale x 16 x i8> @vxor_vi_nxv16i8_2(<vscale x 16 x i8> %va) {
288; CHECK-LABEL: vxor_vi_nxv16i8_2:
289; CHECK:       # %bb.0:
290; CHECK-NEXT:    li a0, 16
291; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
292; CHECK-NEXT:    vxor.vx v8, v8, a0
293; CHECK-NEXT:    ret
294  %head = insertelement <vscale x 16 x i8> poison, i8 16, i32 0
295  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
296  %vc = xor <vscale x 16 x i8> %va, %splat
297  ret <vscale x 16 x i8> %vc
298}
299
300define <vscale x 32 x i8> @vxor_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb) {
301; CHECK-LABEL: vxor_vv_nxv32i8:
302; CHECK:       # %bb.0:
303; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
304; CHECK-NEXT:    vxor.vv v8, v8, v12
305; CHECK-NEXT:    ret
306  %vc = xor <vscale x 32 x i8> %va, %vb
307  ret <vscale x 32 x i8> %vc
308}
309
310define <vscale x 32 x i8> @vxor_vx_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b) {
311; CHECK-LABEL: vxor_vx_nxv32i8:
312; CHECK:       # %bb.0:
313; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
314; CHECK-NEXT:    vxor.vx v8, v8, a0
315; CHECK-NEXT:    ret
316  %head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0
317  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
318  %vc = xor <vscale x 32 x i8> %va, %splat
319  ret <vscale x 32 x i8> %vc
320}
321
322define <vscale x 32 x i8> @vxor_vi_nxv32i8_0(<vscale x 32 x i8> %va) {
323; CHECK-LABEL: vxor_vi_nxv32i8_0:
324; CHECK:       # %bb.0:
325; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
326; CHECK-NEXT:    vnot.v v8, v8
327; CHECK-NEXT:    ret
328  %head = insertelement <vscale x 32 x i8> poison, i8 -1, i32 0
329  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
330  %vc = xor <vscale x 32 x i8> %va, %splat
331  ret <vscale x 32 x i8> %vc
332}
333
334define <vscale x 32 x i8> @vxor_vi_nxv32i8_1(<vscale x 32 x i8> %va) {
335; CHECK-LABEL: vxor_vi_nxv32i8_1:
336; CHECK:       # %bb.0:
337; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
338; CHECK-NEXT:    vxor.vi v8, v8, 8
339; CHECK-NEXT:    ret
340  %head = insertelement <vscale x 32 x i8> poison, i8 8, i32 0
341  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
342  %vc = xor <vscale x 32 x i8> %va, %splat
343  ret <vscale x 32 x i8> %vc
344}
345
346define <vscale x 32 x i8> @vxor_vi_nxv32i8_2(<vscale x 32 x i8> %va) {
347; CHECK-LABEL: vxor_vi_nxv32i8_2:
348; CHECK:       # %bb.0:
349; CHECK-NEXT:    li a0, 16
350; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
351; CHECK-NEXT:    vxor.vx v8, v8, a0
352; CHECK-NEXT:    ret
353  %head = insertelement <vscale x 32 x i8> poison, i8 16, i32 0
354  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
355  %vc = xor <vscale x 32 x i8> %va, %splat
356  ret <vscale x 32 x i8> %vc
357}
358
359define <vscale x 64 x i8> @vxor_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb) {
360; CHECK-LABEL: vxor_vv_nxv64i8:
361; CHECK:       # %bb.0:
362; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
363; CHECK-NEXT:    vxor.vv v8, v8, v16
364; CHECK-NEXT:    ret
365  %vc = xor <vscale x 64 x i8> %va, %vb
366  ret <vscale x 64 x i8> %vc
367}
368
369define <vscale x 64 x i8> @vxor_vx_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b) {
370; CHECK-LABEL: vxor_vx_nxv64i8:
371; CHECK:       # %bb.0:
372; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
373; CHECK-NEXT:    vxor.vx v8, v8, a0
374; CHECK-NEXT:    ret
375  %head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0
376  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
377  %vc = xor <vscale x 64 x i8> %va, %splat
378  ret <vscale x 64 x i8> %vc
379}
380
381define <vscale x 64 x i8> @vxor_vi_nxv64i8_0(<vscale x 64 x i8> %va) {
382; CHECK-LABEL: vxor_vi_nxv64i8_0:
383; CHECK:       # %bb.0:
384; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
385; CHECK-NEXT:    vnot.v v8, v8
386; CHECK-NEXT:    ret
387  %head = insertelement <vscale x 64 x i8> poison, i8 -1, i32 0
388  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
389  %vc = xor <vscale x 64 x i8> %va, %splat
390  ret <vscale x 64 x i8> %vc
391}
392
393define <vscale x 64 x i8> @vxor_vi_nxv64i8_1(<vscale x 64 x i8> %va) {
394; CHECK-LABEL: vxor_vi_nxv64i8_1:
395; CHECK:       # %bb.0:
396; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
397; CHECK-NEXT:    vxor.vi v8, v8, 8
398; CHECK-NEXT:    ret
399  %head = insertelement <vscale x 64 x i8> poison, i8 8, i32 0
400  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
401  %vc = xor <vscale x 64 x i8> %va, %splat
402  ret <vscale x 64 x i8> %vc
403}
404
405define <vscale x 64 x i8> @vxor_vi_nxv64i8_2(<vscale x 64 x i8> %va) {
406; CHECK-LABEL: vxor_vi_nxv64i8_2:
407; CHECK:       # %bb.0:
408; CHECK-NEXT:    li a0, 16
409; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
410; CHECK-NEXT:    vxor.vx v8, v8, a0
411; CHECK-NEXT:    ret
412  %head = insertelement <vscale x 64 x i8> poison, i8 16, i32 0
413  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
414  %vc = xor <vscale x 64 x i8> %va, %splat
415  ret <vscale x 64 x i8> %vc
416}
417
418define <vscale x 1 x i16> @vxor_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb) {
419; CHECK-LABEL: vxor_vv_nxv1i16:
420; CHECK:       # %bb.0:
421; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
422; CHECK-NEXT:    vxor.vv v8, v8, v9
423; CHECK-NEXT:    ret
424  %vc = xor <vscale x 1 x i16> %va, %vb
425  ret <vscale x 1 x i16> %vc
426}
427
428define <vscale x 1 x i16> @vxor_vx_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b) {
429; CHECK-LABEL: vxor_vx_nxv1i16:
430; CHECK:       # %bb.0:
431; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
432; CHECK-NEXT:    vxor.vx v8, v8, a0
433; CHECK-NEXT:    ret
434  %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
435  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
436  %vc = xor <vscale x 1 x i16> %va, %splat
437  ret <vscale x 1 x i16> %vc
438}
439
440define <vscale x 1 x i16> @vxor_vi_nxv1i16_0(<vscale x 1 x i16> %va) {
441; CHECK-LABEL: vxor_vi_nxv1i16_0:
442; CHECK:       # %bb.0:
443; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
444; CHECK-NEXT:    vnot.v v8, v8
445; CHECK-NEXT:    ret
446  %head = insertelement <vscale x 1 x i16> poison, i16 -1, i32 0
447  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
448  %vc = xor <vscale x 1 x i16> %va, %splat
449  ret <vscale x 1 x i16> %vc
450}
451
452define <vscale x 1 x i16> @vxor_vi_nxv1i16_1(<vscale x 1 x i16> %va) {
453; CHECK-LABEL: vxor_vi_nxv1i16_1:
454; CHECK:       # %bb.0:
455; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
456; CHECK-NEXT:    vxor.vi v8, v8, 8
457; CHECK-NEXT:    ret
458  %head = insertelement <vscale x 1 x i16> poison, i16 8, i32 0
459  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
460  %vc = xor <vscale x 1 x i16> %va, %splat
461  ret <vscale x 1 x i16> %vc
462}
463
464define <vscale x 1 x i16> @vxor_vi_nxv1i16_2(<vscale x 1 x i16> %va) {
465; CHECK-LABEL: vxor_vi_nxv1i16_2:
466; CHECK:       # %bb.0:
467; CHECK-NEXT:    li a0, 16
468; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
469; CHECK-NEXT:    vxor.vx v8, v8, a0
470; CHECK-NEXT:    ret
471  %head = insertelement <vscale x 1 x i16> poison, i16 16, i32 0
472  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
473  %vc = xor <vscale x 1 x i16> %va, %splat
474  ret <vscale x 1 x i16> %vc
475}
476
477define <vscale x 2 x i16> @vxor_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb) {
478; CHECK-LABEL: vxor_vv_nxv2i16:
479; CHECK:       # %bb.0:
480; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
481; CHECK-NEXT:    vxor.vv v8, v8, v9
482; CHECK-NEXT:    ret
483  %vc = xor <vscale x 2 x i16> %va, %vb
484  ret <vscale x 2 x i16> %vc
485}
486
487define <vscale x 2 x i16> @vxor_vx_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b) {
488; CHECK-LABEL: vxor_vx_nxv2i16:
489; CHECK:       # %bb.0:
490; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
491; CHECK-NEXT:    vxor.vx v8, v8, a0
492; CHECK-NEXT:    ret
493  %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0
494  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
495  %vc = xor <vscale x 2 x i16> %va, %splat
496  ret <vscale x 2 x i16> %vc
497}
498
499define <vscale x 2 x i16> @vxor_vi_nxv2i16_0(<vscale x 2 x i16> %va) {
500; CHECK-LABEL: vxor_vi_nxv2i16_0:
501; CHECK:       # %bb.0:
502; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
503; CHECK-NEXT:    vnot.v v8, v8
504; CHECK-NEXT:    ret
505  %head = insertelement <vscale x 2 x i16> poison, i16 -1, i32 0
506  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
507  %vc = xor <vscale x 2 x i16> %va, %splat
508  ret <vscale x 2 x i16> %vc
509}
510
511define <vscale x 2 x i16> @vxor_vi_nxv2i16_1(<vscale x 2 x i16> %va) {
512; CHECK-LABEL: vxor_vi_nxv2i16_1:
513; CHECK:       # %bb.0:
514; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
515; CHECK-NEXT:    vxor.vi v8, v8, 8
516; CHECK-NEXT:    ret
517  %head = insertelement <vscale x 2 x i16> poison, i16 8, i32 0
518  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
519  %vc = xor <vscale x 2 x i16> %va, %splat
520  ret <vscale x 2 x i16> %vc
521}
522
523define <vscale x 2 x i16> @vxor_vi_nxv2i16_2(<vscale x 2 x i16> %va) {
524; CHECK-LABEL: vxor_vi_nxv2i16_2:
525; CHECK:       # %bb.0:
526; CHECK-NEXT:    li a0, 16
527; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
528; CHECK-NEXT:    vxor.vx v8, v8, a0
529; CHECK-NEXT:    ret
530  %head = insertelement <vscale x 2 x i16> poison, i16 16, i32 0
531  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
532  %vc = xor <vscale x 2 x i16> %va, %splat
533  ret <vscale x 2 x i16> %vc
534}
535
536define <vscale x 4 x i16> @vxor_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb) {
537; CHECK-LABEL: vxor_vv_nxv4i16:
538; CHECK:       # %bb.0:
539; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
540; CHECK-NEXT:    vxor.vv v8, v8, v9
541; CHECK-NEXT:    ret
542  %vc = xor <vscale x 4 x i16> %va, %vb
543  ret <vscale x 4 x i16> %vc
544}
545
546define <vscale x 4 x i16> @vxor_vx_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b) {
547; CHECK-LABEL: vxor_vx_nxv4i16:
548; CHECK:       # %bb.0:
549; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
550; CHECK-NEXT:    vxor.vx v8, v8, a0
551; CHECK-NEXT:    ret
552  %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0
553  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
554  %vc = xor <vscale x 4 x i16> %va, %splat
555  ret <vscale x 4 x i16> %vc
556}
557
558define <vscale x 4 x i16> @vxor_vi_nxv4i16_0(<vscale x 4 x i16> %va) {
559; CHECK-LABEL: vxor_vi_nxv4i16_0:
560; CHECK:       # %bb.0:
561; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
562; CHECK-NEXT:    vnot.v v8, v8
563; CHECK-NEXT:    ret
564  %head = insertelement <vscale x 4 x i16> poison, i16 -1, i32 0
565  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
566  %vc = xor <vscale x 4 x i16> %va, %splat
567  ret <vscale x 4 x i16> %vc
568}
569
570define <vscale x 4 x i16> @vxor_vi_nxv4i16_1(<vscale x 4 x i16> %va) {
571; CHECK-LABEL: vxor_vi_nxv4i16_1:
572; CHECK:       # %bb.0:
573; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
574; CHECK-NEXT:    vxor.vi v8, v8, 8
575; CHECK-NEXT:    ret
576  %head = insertelement <vscale x 4 x i16> poison, i16 8, i32 0
577  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
578  %vc = xor <vscale x 4 x i16> %va, %splat
579  ret <vscale x 4 x i16> %vc
580}
581
582define <vscale x 4 x i16> @vxor_vi_nxv4i16_2(<vscale x 4 x i16> %va) {
583; CHECK-LABEL: vxor_vi_nxv4i16_2:
584; CHECK:       # %bb.0:
585; CHECK-NEXT:    li a0, 16
586; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
587; CHECK-NEXT:    vxor.vx v8, v8, a0
588; CHECK-NEXT:    ret
589  %head = insertelement <vscale x 4 x i16> poison, i16 16, i32 0
590  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
591  %vc = xor <vscale x 4 x i16> %va, %splat
592  ret <vscale x 4 x i16> %vc
593}
594
595define <vscale x 8 x i16> @vxor_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb) {
596; CHECK-LABEL: vxor_vv_nxv8i16:
597; CHECK:       # %bb.0:
598; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
599; CHECK-NEXT:    vxor.vv v8, v8, v10
600; CHECK-NEXT:    ret
601  %vc = xor <vscale x 8 x i16> %va, %vb
602  ret <vscale x 8 x i16> %vc
603}
604
605define <vscale x 8 x i16> @vxor_vx_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b) {
606; CHECK-LABEL: vxor_vx_nxv8i16:
607; CHECK:       # %bb.0:
608; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
609; CHECK-NEXT:    vxor.vx v8, v8, a0
610; CHECK-NEXT:    ret
611  %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0
612  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
613  %vc = xor <vscale x 8 x i16> %va, %splat
614  ret <vscale x 8 x i16> %vc
615}
616
617define <vscale x 8 x i16> @vxor_vi_nxv8i16_0(<vscale x 8 x i16> %va) {
618; CHECK-LABEL: vxor_vi_nxv8i16_0:
619; CHECK:       # %bb.0:
620; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
621; CHECK-NEXT:    vnot.v v8, v8
622; CHECK-NEXT:    ret
623  %head = insertelement <vscale x 8 x i16> poison, i16 -1, i32 0
624  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
625  %vc = xor <vscale x 8 x i16> %va, %splat
626  ret <vscale x 8 x i16> %vc
627}
628
629define <vscale x 8 x i16> @vxor_vi_nxv8i16_1(<vscale x 8 x i16> %va) {
630; CHECK-LABEL: vxor_vi_nxv8i16_1:
631; CHECK:       # %bb.0:
632; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
633; CHECK-NEXT:    vxor.vi v8, v8, 8
634; CHECK-NEXT:    ret
635  %head = insertelement <vscale x 8 x i16> poison, i16 8, i32 0
636  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
637  %vc = xor <vscale x 8 x i16> %va, %splat
638  ret <vscale x 8 x i16> %vc
639}
640
641define <vscale x 8 x i16> @vxor_vi_nxv8i16_2(<vscale x 8 x i16> %va) {
642; CHECK-LABEL: vxor_vi_nxv8i16_2:
643; CHECK:       # %bb.0:
644; CHECK-NEXT:    li a0, 16
645; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
646; CHECK-NEXT:    vxor.vx v8, v8, a0
647; CHECK-NEXT:    ret
648  %head = insertelement <vscale x 8 x i16> poison, i16 16, i32 0
649  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
650  %vc = xor <vscale x 8 x i16> %va, %splat
651  ret <vscale x 8 x i16> %vc
652}
653
654define <vscale x 16 x i16> @vxor_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb) {
655; CHECK-LABEL: vxor_vv_nxv16i16:
656; CHECK:       # %bb.0:
657; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
658; CHECK-NEXT:    vxor.vv v8, v8, v12
659; CHECK-NEXT:    ret
660  %vc = xor <vscale x 16 x i16> %va, %vb
661  ret <vscale x 16 x i16> %vc
662}
663
664define <vscale x 16 x i16> @vxor_vx_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b) {
665; CHECK-LABEL: vxor_vx_nxv16i16:
666; CHECK:       # %bb.0:
667; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
668; CHECK-NEXT:    vxor.vx v8, v8, a0
669; CHECK-NEXT:    ret
670  %head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0
671  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
672  %vc = xor <vscale x 16 x i16> %va, %splat
673  ret <vscale x 16 x i16> %vc
674}
675
676define <vscale x 16 x i16> @vxor_vi_nxv16i16_0(<vscale x 16 x i16> %va) {
677; CHECK-LABEL: vxor_vi_nxv16i16_0:
678; CHECK:       # %bb.0:
679; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
680; CHECK-NEXT:    vnot.v v8, v8
681; CHECK-NEXT:    ret
682  %head = insertelement <vscale x 16 x i16> poison, i16 -1, i32 0
683  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
684  %vc = xor <vscale x 16 x i16> %va, %splat
685  ret <vscale x 16 x i16> %vc
686}
687
688define <vscale x 16 x i16> @vxor_vi_nxv16i16_1(<vscale x 16 x i16> %va) {
689; CHECK-LABEL: vxor_vi_nxv16i16_1:
690; CHECK:       # %bb.0:
691; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
692; CHECK-NEXT:    vxor.vi v8, v8, 8
693; CHECK-NEXT:    ret
694  %head = insertelement <vscale x 16 x i16> poison, i16 8, i32 0
695  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
696  %vc = xor <vscale x 16 x i16> %va, %splat
697  ret <vscale x 16 x i16> %vc
698}
699
700define <vscale x 16 x i16> @vxor_vi_nxv16i16_2(<vscale x 16 x i16> %va) {
701; CHECK-LABEL: vxor_vi_nxv16i16_2:
702; CHECK:       # %bb.0:
703; CHECK-NEXT:    li a0, 16
704; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
705; CHECK-NEXT:    vxor.vx v8, v8, a0
706; CHECK-NEXT:    ret
707  %head = insertelement <vscale x 16 x i16> poison, i16 16, i32 0
708  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
709  %vc = xor <vscale x 16 x i16> %va, %splat
710  ret <vscale x 16 x i16> %vc
711}
712
713define <vscale x 32 x i16> @vxor_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb) {
714; CHECK-LABEL: vxor_vv_nxv32i16:
715; CHECK:       # %bb.0:
716; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
717; CHECK-NEXT:    vxor.vv v8, v8, v16
718; CHECK-NEXT:    ret
719  %vc = xor <vscale x 32 x i16> %va, %vb
720  ret <vscale x 32 x i16> %vc
721}
722
723define <vscale x 32 x i16> @vxor_vx_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b) {
724; CHECK-LABEL: vxor_vx_nxv32i16:
725; CHECK:       # %bb.0:
726; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
727; CHECK-NEXT:    vxor.vx v8, v8, a0
728; CHECK-NEXT:    ret
729  %head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0
730  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
731  %vc = xor <vscale x 32 x i16> %va, %splat
732  ret <vscale x 32 x i16> %vc
733}
734
735define <vscale x 32 x i16> @vxor_vi_nxv32i16_0(<vscale x 32 x i16> %va) {
736; CHECK-LABEL: vxor_vi_nxv32i16_0:
737; CHECK:       # %bb.0:
738; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
739; CHECK-NEXT:    vnot.v v8, v8
740; CHECK-NEXT:    ret
741  %head = insertelement <vscale x 32 x i16> poison, i16 -1, i32 0
742  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
743  %vc = xor <vscale x 32 x i16> %va, %splat
744  ret <vscale x 32 x i16> %vc
745}
746
747define <vscale x 32 x i16> @vxor_vi_nxv32i16_1(<vscale x 32 x i16> %va) {
748; CHECK-LABEL: vxor_vi_nxv32i16_1:
749; CHECK:       # %bb.0:
750; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
751; CHECK-NEXT:    vxor.vi v8, v8, 8
752; CHECK-NEXT:    ret
753  %head = insertelement <vscale x 32 x i16> poison, i16 8, i32 0
754  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
755  %vc = xor <vscale x 32 x i16> %va, %splat
756  ret <vscale x 32 x i16> %vc
757}
758
759define <vscale x 32 x i16> @vxor_vi_nxv32i16_2(<vscale x 32 x i16> %va) {
760; CHECK-LABEL: vxor_vi_nxv32i16_2:
761; CHECK:       # %bb.0:
762; CHECK-NEXT:    li a0, 16
763; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
764; CHECK-NEXT:    vxor.vx v8, v8, a0
765; CHECK-NEXT:    ret
766  %head = insertelement <vscale x 32 x i16> poison, i16 16, i32 0
767  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
768  %vc = xor <vscale x 32 x i16> %va, %splat
769  ret <vscale x 32 x i16> %vc
770}
771
772define <vscale x 1 x i32> @vxor_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb) {
773; CHECK-LABEL: vxor_vv_nxv1i32:
774; CHECK:       # %bb.0:
775; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
776; CHECK-NEXT:    vxor.vv v8, v8, v9
777; CHECK-NEXT:    ret
778  %vc = xor <vscale x 1 x i32> %va, %vb
779  ret <vscale x 1 x i32> %vc
780}
781
782define <vscale x 1 x i32> @vxor_vx_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b) {
783; CHECK-LABEL: vxor_vx_nxv1i32:
784; CHECK:       # %bb.0:
785; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
786; CHECK-NEXT:    vxor.vx v8, v8, a0
787; CHECK-NEXT:    ret
788  %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
789  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
790  %vc = xor <vscale x 1 x i32> %va, %splat
791  ret <vscale x 1 x i32> %vc
792}
793
794define <vscale x 1 x i32> @vxor_vi_nxv1i32_0(<vscale x 1 x i32> %va) {
795; CHECK-LABEL: vxor_vi_nxv1i32_0:
796; CHECK:       # %bb.0:
797; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
798; CHECK-NEXT:    vnot.v v8, v8
799; CHECK-NEXT:    ret
800  %head = insertelement <vscale x 1 x i32> poison, i32 -1, i32 0
801  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
802  %vc = xor <vscale x 1 x i32> %va, %splat
803  ret <vscale x 1 x i32> %vc
804}
805
806define <vscale x 1 x i32> @vxor_vi_nxv1i32_1(<vscale x 1 x i32> %va) {
807; CHECK-LABEL: vxor_vi_nxv1i32_1:
808; CHECK:       # %bb.0:
809; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
810; CHECK-NEXT:    vxor.vi v8, v8, 8
811; CHECK-NEXT:    ret
812  %head = insertelement <vscale x 1 x i32> poison, i32 8, i32 0
813  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
814  %vc = xor <vscale x 1 x i32> %va, %splat
815  ret <vscale x 1 x i32> %vc
816}
817
818define <vscale x 1 x i32> @vxor_vi_nxv1i32_2(<vscale x 1 x i32> %va) {
819; CHECK-LABEL: vxor_vi_nxv1i32_2:
820; CHECK:       # %bb.0:
821; CHECK-NEXT:    li a0, 16
822; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
823; CHECK-NEXT:    vxor.vx v8, v8, a0
824; CHECK-NEXT:    ret
825  %head = insertelement <vscale x 1 x i32> poison, i32 16, i32 0
826  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
827  %vc = xor <vscale x 1 x i32> %va, %splat
828  ret <vscale x 1 x i32> %vc
829}
830
831define <vscale x 2 x i32> @vxor_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb) {
832; CHECK-LABEL: vxor_vv_nxv2i32:
833; CHECK:       # %bb.0:
834; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
835; CHECK-NEXT:    vxor.vv v8, v8, v9
836; CHECK-NEXT:    ret
837  %vc = xor <vscale x 2 x i32> %va, %vb
838  ret <vscale x 2 x i32> %vc
839}
840
841define <vscale x 2 x i32> @vxor_vx_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b) {
842; CHECK-LABEL: vxor_vx_nxv2i32:
843; CHECK:       # %bb.0:
844; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
845; CHECK-NEXT:    vxor.vx v8, v8, a0
846; CHECK-NEXT:    ret
847  %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0
848  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
849  %vc = xor <vscale x 2 x i32> %va, %splat
850  ret <vscale x 2 x i32> %vc
851}
852
853define <vscale x 2 x i32> @vxor_vi_nxv2i32_0(<vscale x 2 x i32> %va) {
854; CHECK-LABEL: vxor_vi_nxv2i32_0:
855; CHECK:       # %bb.0:
856; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
857; CHECK-NEXT:    vnot.v v8, v8
858; CHECK-NEXT:    ret
859  %head = insertelement <vscale x 2 x i32> poison, i32 -1, i32 0
860  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
861  %vc = xor <vscale x 2 x i32> %va, %splat
862  ret <vscale x 2 x i32> %vc
863}
864
865define <vscale x 2 x i32> @vxor_vi_nxv2i32_1(<vscale x 2 x i32> %va) {
866; CHECK-LABEL: vxor_vi_nxv2i32_1:
867; CHECK:       # %bb.0:
868; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
869; CHECK-NEXT:    vxor.vi v8, v8, 8
870; CHECK-NEXT:    ret
871  %head = insertelement <vscale x 2 x i32> poison, i32 8, i32 0
872  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
873  %vc = xor <vscale x 2 x i32> %va, %splat
874  ret <vscale x 2 x i32> %vc
875}
876
877define <vscale x 2 x i32> @vxor_vi_nxv2i32_2(<vscale x 2 x i32> %va) {
878; CHECK-LABEL: vxor_vi_nxv2i32_2:
879; CHECK:       # %bb.0:
880; CHECK-NEXT:    li a0, 16
881; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
882; CHECK-NEXT:    vxor.vx v8, v8, a0
883; CHECK-NEXT:    ret
884  %head = insertelement <vscale x 2 x i32> poison, i32 16, i32 0
885  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
886  %vc = xor <vscale x 2 x i32> %va, %splat
887  ret <vscale x 2 x i32> %vc
888}
889
890define <vscale x 4 x i32> @vxor_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb) {
891; CHECK-LABEL: vxor_vv_nxv4i32:
892; CHECK:       # %bb.0:
893; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
894; CHECK-NEXT:    vxor.vv v8, v8, v10
895; CHECK-NEXT:    ret
896  %vc = xor <vscale x 4 x i32> %va, %vb
897  ret <vscale x 4 x i32> %vc
898}
899
900define <vscale x 4 x i32> @vxor_vx_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b) {
901; CHECK-LABEL: vxor_vx_nxv4i32:
902; CHECK:       # %bb.0:
903; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
904; CHECK-NEXT:    vxor.vx v8, v8, a0
905; CHECK-NEXT:    ret
906  %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0
907  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
908  %vc = xor <vscale x 4 x i32> %va, %splat
909  ret <vscale x 4 x i32> %vc
910}
911
912define <vscale x 4 x i32> @vxor_vi_nxv4i32_0(<vscale x 4 x i32> %va) {
913; CHECK-LABEL: vxor_vi_nxv4i32_0:
914; CHECK:       # %bb.0:
915; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
916; CHECK-NEXT:    vnot.v v8, v8
917; CHECK-NEXT:    ret
918  %head = insertelement <vscale x 4 x i32> poison, i32 -1, i32 0
919  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
920  %vc = xor <vscale x 4 x i32> %va, %splat
921  ret <vscale x 4 x i32> %vc
922}
923
924define <vscale x 4 x i32> @vxor_vi_nxv4i32_1(<vscale x 4 x i32> %va) {
925; CHECK-LABEL: vxor_vi_nxv4i32_1:
926; CHECK:       # %bb.0:
927; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
928; CHECK-NEXT:    vxor.vi v8, v8, 8
929; CHECK-NEXT:    ret
930  %head = insertelement <vscale x 4 x i32> poison, i32 8, i32 0
931  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
932  %vc = xor <vscale x 4 x i32> %va, %splat
933  ret <vscale x 4 x i32> %vc
934}
935
936define <vscale x 4 x i32> @vxor_vi_nxv4i32_2(<vscale x 4 x i32> %va) {
937; CHECK-LABEL: vxor_vi_nxv4i32_2:
938; CHECK:       # %bb.0:
939; CHECK-NEXT:    li a0, 16
940; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
941; CHECK-NEXT:    vxor.vx v8, v8, a0
942; CHECK-NEXT:    ret
943  %head = insertelement <vscale x 4 x i32> poison, i32 16, i32 0
944  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
945  %vc = xor <vscale x 4 x i32> %va, %splat
946  ret <vscale x 4 x i32> %vc
947}
948
949define <vscale x 8 x i32> @vxor_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb) {
950; CHECK-LABEL: vxor_vv_nxv8i32:
951; CHECK:       # %bb.0:
952; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
953; CHECK-NEXT:    vxor.vv v8, v8, v12
954; CHECK-NEXT:    ret
955  %vc = xor <vscale x 8 x i32> %va, %vb
956  ret <vscale x 8 x i32> %vc
957}
958
959define <vscale x 8 x i32> @vxor_vx_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b) {
960; CHECK-LABEL: vxor_vx_nxv8i32:
961; CHECK:       # %bb.0:
962; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
963; CHECK-NEXT:    vxor.vx v8, v8, a0
964; CHECK-NEXT:    ret
965  %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
966  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
967  %vc = xor <vscale x 8 x i32> %va, %splat
968  ret <vscale x 8 x i32> %vc
969}
970
971define <vscale x 8 x i32> @vxor_vi_nxv8i32_0(<vscale x 8 x i32> %va) {
972; CHECK-LABEL: vxor_vi_nxv8i32_0:
973; CHECK:       # %bb.0:
974; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
975; CHECK-NEXT:    vnot.v v8, v8
976; CHECK-NEXT:    ret
977  %head = insertelement <vscale x 8 x i32> poison, i32 -1, i32 0
978  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
979  %vc = xor <vscale x 8 x i32> %va, %splat
980  ret <vscale x 8 x i32> %vc
981}
982
983define <vscale x 8 x i32> @vxor_vi_nxv8i32_1(<vscale x 8 x i32> %va) {
984; CHECK-LABEL: vxor_vi_nxv8i32_1:
985; CHECK:       # %bb.0:
986; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
987; CHECK-NEXT:    vxor.vi v8, v8, 8
988; CHECK-NEXT:    ret
989  %head = insertelement <vscale x 8 x i32> poison, i32 8, i32 0
990  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
991  %vc = xor <vscale x 8 x i32> %va, %splat
992  ret <vscale x 8 x i32> %vc
993}
994
995define <vscale x 8 x i32> @vxor_vi_nxv8i32_2(<vscale x 8 x i32> %va) {
996; CHECK-LABEL: vxor_vi_nxv8i32_2:
997; CHECK:       # %bb.0:
998; CHECK-NEXT:    li a0, 16
999; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1000; CHECK-NEXT:    vxor.vx v8, v8, a0
1001; CHECK-NEXT:    ret
1002  %head = insertelement <vscale x 8 x i32> poison, i32 16, i32 0
1003  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
1004  %vc = xor <vscale x 8 x i32> %va, %splat
1005  ret <vscale x 8 x i32> %vc
1006}
1007
1008define <vscale x 16 x i32> @vxor_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb) {
1009; CHECK-LABEL: vxor_vv_nxv16i32:
1010; CHECK:       # %bb.0:
1011; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
1012; CHECK-NEXT:    vxor.vv v8, v8, v16
1013; CHECK-NEXT:    ret
1014  %vc = xor <vscale x 16 x i32> %va, %vb
1015  ret <vscale x 16 x i32> %vc
1016}
1017
1018define <vscale x 16 x i32> @vxor_vx_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b) {
1019; CHECK-LABEL: vxor_vx_nxv16i32:
1020; CHECK:       # %bb.0:
1021; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
1022; CHECK-NEXT:    vxor.vx v8, v8, a0
1023; CHECK-NEXT:    ret
1024  %head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0
1025  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
1026  %vc = xor <vscale x 16 x i32> %va, %splat
1027  ret <vscale x 16 x i32> %vc
1028}
1029
1030define <vscale x 16 x i32> @vxor_vi_nxv16i32_0(<vscale x 16 x i32> %va) {
1031; CHECK-LABEL: vxor_vi_nxv16i32_0:
1032; CHECK:       # %bb.0:
1033; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
1034; CHECK-NEXT:    vnot.v v8, v8
1035; CHECK-NEXT:    ret
1036  %head = insertelement <vscale x 16 x i32> poison, i32 -1, i32 0
1037  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
1038  %vc = xor <vscale x 16 x i32> %va, %splat
1039  ret <vscale x 16 x i32> %vc
1040}
1041
1042define <vscale x 16 x i32> @vxor_vi_nxv16i32_1(<vscale x 16 x i32> %va) {
1043; CHECK-LABEL: vxor_vi_nxv16i32_1:
1044; CHECK:       # %bb.0:
1045; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
1046; CHECK-NEXT:    vxor.vi v8, v8, 8
1047; CHECK-NEXT:    ret
1048  %head = insertelement <vscale x 16 x i32> poison, i32 8, i32 0
1049  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
1050  %vc = xor <vscale x 16 x i32> %va, %splat
1051  ret <vscale x 16 x i32> %vc
1052}
1053
1054define <vscale x 16 x i32> @vxor_vi_nxv16i32_2(<vscale x 16 x i32> %va) {
1055; CHECK-LABEL: vxor_vi_nxv16i32_2:
1056; CHECK:       # %bb.0:
1057; CHECK-NEXT:    li a0, 16
1058; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
1059; CHECK-NEXT:    vxor.vx v8, v8, a0
1060; CHECK-NEXT:    ret
1061  %head = insertelement <vscale x 16 x i32> poison, i32 16, i32 0
1062  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
1063  %vc = xor <vscale x 16 x i32> %va, %splat
1064  ret <vscale x 16 x i32> %vc
1065}
1066
1067define <vscale x 1 x i64> @vxor_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb) {
1068; CHECK-LABEL: vxor_vv_nxv1i64:
1069; CHECK:       # %bb.0:
1070; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1071; CHECK-NEXT:    vxor.vv v8, v8, v9
1072; CHECK-NEXT:    ret
1073  %vc = xor <vscale x 1 x i64> %va, %vb
1074  ret <vscale x 1 x i64> %vc
1075}
1076
1077define <vscale x 1 x i64> @vxor_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b) {
1078; RV32-LABEL: vxor_vx_nxv1i64:
1079; RV32:       # %bb.0:
1080; RV32-NEXT:    addi sp, sp, -16
1081; RV32-NEXT:    .cfi_def_cfa_offset 16
1082; RV32-NEXT:    sw a1, 12(sp)
1083; RV32-NEXT:    sw a0, 8(sp)
1084; RV32-NEXT:    addi a0, sp, 8
1085; RV32-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
1086; RV32-NEXT:    vlse64.v v9, (a0), zero
1087; RV32-NEXT:    vxor.vv v8, v8, v9
1088; RV32-NEXT:    addi sp, sp, 16
1089; RV32-NEXT:    ret
1090;
1091; RV64-LABEL: vxor_vx_nxv1i64:
1092; RV64:       # %bb.0:
1093; RV64-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
1094; RV64-NEXT:    vxor.vx v8, v8, a0
1095; RV64-NEXT:    ret
1096  %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
1097  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
1098  %vc = xor <vscale x 1 x i64> %va, %splat
1099  ret <vscale x 1 x i64> %vc
1100}
1101
1102define <vscale x 1 x i64> @vxor_vi_nxv1i64_0(<vscale x 1 x i64> %va) {
1103; CHECK-LABEL: vxor_vi_nxv1i64_0:
1104; CHECK:       # %bb.0:
1105; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1106; CHECK-NEXT:    vnot.v v8, v8
1107; CHECK-NEXT:    ret
1108  %head = insertelement <vscale x 1 x i64> poison, i64 -1, i32 0
1109  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
1110  %vc = xor <vscale x 1 x i64> %va, %splat
1111  ret <vscale x 1 x i64> %vc
1112}
1113
1114define <vscale x 1 x i64> @vxor_vi_nxv1i64_1(<vscale x 1 x i64> %va) {
1115; CHECK-LABEL: vxor_vi_nxv1i64_1:
1116; CHECK:       # %bb.0:
1117; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1118; CHECK-NEXT:    vxor.vi v8, v8, 8
1119; CHECK-NEXT:    ret
1120  %head = insertelement <vscale x 1 x i64> poison, i64 8, i32 0
1121  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
1122  %vc = xor <vscale x 1 x i64> %va, %splat
1123  ret <vscale x 1 x i64> %vc
1124}
1125
1126define <vscale x 1 x i64> @vxor_vi_nxv1i64_2(<vscale x 1 x i64> %va) {
1127; CHECK-LABEL: vxor_vi_nxv1i64_2:
1128; CHECK:       # %bb.0:
1129; CHECK-NEXT:    li a0, 16
1130; CHECK-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
1131; CHECK-NEXT:    vxor.vx v8, v8, a0
1132; CHECK-NEXT:    ret
1133  %head = insertelement <vscale x 1 x i64> poison, i64 16, i32 0
1134  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
1135  %vc = xor <vscale x 1 x i64> %va, %splat
1136  ret <vscale x 1 x i64> %vc
1137}
1138
1139define <vscale x 2 x i64> @vxor_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb) {
1140; CHECK-LABEL: vxor_vv_nxv2i64:
1141; CHECK:       # %bb.0:
1142; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1143; CHECK-NEXT:    vxor.vv v8, v8, v10
1144; CHECK-NEXT:    ret
1145  %vc = xor <vscale x 2 x i64> %va, %vb
1146  ret <vscale x 2 x i64> %vc
1147}
1148
1149define <vscale x 2 x i64> @vxor_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b) {
1150; RV32-LABEL: vxor_vx_nxv2i64:
1151; RV32:       # %bb.0:
1152; RV32-NEXT:    addi sp, sp, -16
1153; RV32-NEXT:    .cfi_def_cfa_offset 16
1154; RV32-NEXT:    sw a1, 12(sp)
1155; RV32-NEXT:    sw a0, 8(sp)
1156; RV32-NEXT:    addi a0, sp, 8
1157; RV32-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
1158; RV32-NEXT:    vlse64.v v10, (a0), zero
1159; RV32-NEXT:    vxor.vv v8, v8, v10
1160; RV32-NEXT:    addi sp, sp, 16
1161; RV32-NEXT:    ret
1162;
1163; RV64-LABEL: vxor_vx_nxv2i64:
1164; RV64:       # %bb.0:
1165; RV64-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
1166; RV64-NEXT:    vxor.vx v8, v8, a0
1167; RV64-NEXT:    ret
1168  %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0
1169  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1170  %vc = xor <vscale x 2 x i64> %va, %splat
1171  ret <vscale x 2 x i64> %vc
1172}
1173
1174define <vscale x 2 x i64> @vxor_vi_nxv2i64_0(<vscale x 2 x i64> %va) {
1175; CHECK-LABEL: vxor_vi_nxv2i64_0:
1176; CHECK:       # %bb.0:
1177; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1178; CHECK-NEXT:    vnot.v v8, v8
1179; CHECK-NEXT:    ret
1180  %head = insertelement <vscale x 2 x i64> poison, i64 -1, i32 0
1181  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1182  %vc = xor <vscale x 2 x i64> %va, %splat
1183  ret <vscale x 2 x i64> %vc
1184}
1185
1186define <vscale x 2 x i64> @vxor_vi_nxv2i64_1(<vscale x 2 x i64> %va) {
1187; CHECK-LABEL: vxor_vi_nxv2i64_1:
1188; CHECK:       # %bb.0:
1189; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1190; CHECK-NEXT:    vxor.vi v8, v8, 8
1191; CHECK-NEXT:    ret
1192  %head = insertelement <vscale x 2 x i64> poison, i64 8, i32 0
1193  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1194  %vc = xor <vscale x 2 x i64> %va, %splat
1195  ret <vscale x 2 x i64> %vc
1196}
1197
1198define <vscale x 2 x i64> @vxor_vi_nxv2i64_2(<vscale x 2 x i64> %va) {
1199; CHECK-LABEL: vxor_vi_nxv2i64_2:
1200; CHECK:       # %bb.0:
1201; CHECK-NEXT:    li a0, 16
1202; CHECK-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
1203; CHECK-NEXT:    vxor.vx v8, v8, a0
1204; CHECK-NEXT:    ret
1205  %head = insertelement <vscale x 2 x i64> poison, i64 16, i32 0
1206  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1207  %vc = xor <vscale x 2 x i64> %va, %splat
1208  ret <vscale x 2 x i64> %vc
1209}
1210
1211define <vscale x 4 x i64> @vxor_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb) {
1212; CHECK-LABEL: vxor_vv_nxv4i64:
1213; CHECK:       # %bb.0:
1214; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1215; CHECK-NEXT:    vxor.vv v8, v8, v12
1216; CHECK-NEXT:    ret
1217  %vc = xor <vscale x 4 x i64> %va, %vb
1218  ret <vscale x 4 x i64> %vc
1219}
1220
1221define <vscale x 4 x i64> @vxor_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b) {
1222; RV32-LABEL: vxor_vx_nxv4i64:
1223; RV32:       # %bb.0:
1224; RV32-NEXT:    addi sp, sp, -16
1225; RV32-NEXT:    .cfi_def_cfa_offset 16
1226; RV32-NEXT:    sw a1, 12(sp)
1227; RV32-NEXT:    sw a0, 8(sp)
1228; RV32-NEXT:    addi a0, sp, 8
1229; RV32-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
1230; RV32-NEXT:    vlse64.v v12, (a0), zero
1231; RV32-NEXT:    vxor.vv v8, v8, v12
1232; RV32-NEXT:    addi sp, sp, 16
1233; RV32-NEXT:    ret
1234;
1235; RV64-LABEL: vxor_vx_nxv4i64:
1236; RV64:       # %bb.0:
1237; RV64-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
1238; RV64-NEXT:    vxor.vx v8, v8, a0
1239; RV64-NEXT:    ret
1240  %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0
1241  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1242  %vc = xor <vscale x 4 x i64> %va, %splat
1243  ret <vscale x 4 x i64> %vc
1244}
1245
1246define <vscale x 4 x i64> @vxor_vi_nxv4i64_0(<vscale x 4 x i64> %va) {
1247; CHECK-LABEL: vxor_vi_nxv4i64_0:
1248; CHECK:       # %bb.0:
1249; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1250; CHECK-NEXT:    vnot.v v8, v8
1251; CHECK-NEXT:    ret
1252  %head = insertelement <vscale x 4 x i64> poison, i64 -1, i32 0
1253  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1254  %vc = xor <vscale x 4 x i64> %va, %splat
1255  ret <vscale x 4 x i64> %vc
1256}
1257
1258define <vscale x 4 x i64> @vxor_vi_nxv4i64_1(<vscale x 4 x i64> %va) {
1259; CHECK-LABEL: vxor_vi_nxv4i64_1:
1260; CHECK:       # %bb.0:
1261; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1262; CHECK-NEXT:    vxor.vi v8, v8, 8
1263; CHECK-NEXT:    ret
1264  %head = insertelement <vscale x 4 x i64> poison, i64 8, i32 0
1265  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1266  %vc = xor <vscale x 4 x i64> %va, %splat
1267  ret <vscale x 4 x i64> %vc
1268}
1269
1270define <vscale x 4 x i64> @vxor_vi_nxv4i64_2(<vscale x 4 x i64> %va) {
1271; CHECK-LABEL: vxor_vi_nxv4i64_2:
1272; CHECK:       # %bb.0:
1273; CHECK-NEXT:    li a0, 16
1274; CHECK-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
1275; CHECK-NEXT:    vxor.vx v8, v8, a0
1276; CHECK-NEXT:    ret
1277  %head = insertelement <vscale x 4 x i64> poison, i64 16, i32 0
1278  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1279  %vc = xor <vscale x 4 x i64> %va, %splat
1280  ret <vscale x 4 x i64> %vc
1281}
1282
1283define <vscale x 8 x i64> @vxor_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb) {
1284; CHECK-LABEL: vxor_vv_nxv8i64:
1285; CHECK:       # %bb.0:
1286; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1287; CHECK-NEXT:    vxor.vv v8, v8, v16
1288; CHECK-NEXT:    ret
1289  %vc = xor <vscale x 8 x i64> %va, %vb
1290  ret <vscale x 8 x i64> %vc
1291}
1292
1293define <vscale x 8 x i64> @vxor_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b) {
1294; RV32-LABEL: vxor_vx_nxv8i64:
1295; RV32:       # %bb.0:
1296; RV32-NEXT:    addi sp, sp, -16
1297; RV32-NEXT:    .cfi_def_cfa_offset 16
1298; RV32-NEXT:    sw a1, 12(sp)
1299; RV32-NEXT:    sw a0, 8(sp)
1300; RV32-NEXT:    addi a0, sp, 8
1301; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1302; RV32-NEXT:    vlse64.v v16, (a0), zero
1303; RV32-NEXT:    vxor.vv v8, v8, v16
1304; RV32-NEXT:    addi sp, sp, 16
1305; RV32-NEXT:    ret
1306;
1307; RV64-LABEL: vxor_vx_nxv8i64:
1308; RV64:       # %bb.0:
1309; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1310; RV64-NEXT:    vxor.vx v8, v8, a0
1311; RV64-NEXT:    ret
1312  %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
1313  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1314  %vc = xor <vscale x 8 x i64> %va, %splat
1315  ret <vscale x 8 x i64> %vc
1316}
1317
1318define <vscale x 8 x i64> @vxor_vi_nxv8i64_0(<vscale x 8 x i64> %va) {
1319; CHECK-LABEL: vxor_vi_nxv8i64_0:
1320; CHECK:       # %bb.0:
1321; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1322; CHECK-NEXT:    vnot.v v8, v8
1323; CHECK-NEXT:    ret
1324  %head = insertelement <vscale x 8 x i64> poison, i64 -1, i32 0
1325  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1326  %vc = xor <vscale x 8 x i64> %va, %splat
1327  ret <vscale x 8 x i64> %vc
1328}
1329
1330define <vscale x 8 x i64> @vxor_vi_nxv8i64_1(<vscale x 8 x i64> %va) {
1331; CHECK-LABEL: vxor_vi_nxv8i64_1:
1332; CHECK:       # %bb.0:
1333; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1334; CHECK-NEXT:    vxor.vi v8, v8, 8
1335; CHECK-NEXT:    ret
1336  %head = insertelement <vscale x 8 x i64> poison, i64 8, i32 0
1337  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1338  %vc = xor <vscale x 8 x i64> %va, %splat
1339  ret <vscale x 8 x i64> %vc
1340}
1341
1342define <vscale x 8 x i64> @vxor_vi_nxv8i64_2(<vscale x 8 x i64> %va) {
1343; CHECK-LABEL: vxor_vi_nxv8i64_2:
1344; CHECK:       # %bb.0:
1345; CHECK-NEXT:    li a0, 16
1346; CHECK-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1347; CHECK-NEXT:    vxor.vx v8, v8, a0
1348; CHECK-NEXT:    ret
1349  %head = insertelement <vscale x 8 x i64> poison, i64 16, i32 0
1350  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1351  %vc = xor <vscale x 8 x i64> %va, %splat
1352  ret <vscale x 8 x i64> %vc
1353}
1354
1355define <vscale x 8 x i64> @vxor_xx_nxv8i64(i64 %a, i64 %b) nounwind {
1356; RV32-LABEL: vxor_xx_nxv8i64:
1357; RV32:       # %bb.0:
1358; RV32-NEXT:    addi sp, sp, -16
1359; RV32-NEXT:    sw a1, 12(sp)
1360; RV32-NEXT:    sw a0, 8(sp)
1361; RV32-NEXT:    addi a0, sp, 8
1362; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1363; RV32-NEXT:    vlse64.v v8, (a0), zero
1364; RV32-NEXT:    sw a3, 12(sp)
1365; RV32-NEXT:    sw a2, 8(sp)
1366; RV32-NEXT:    vlse64.v v16, (a0), zero
1367; RV32-NEXT:    vxor.vv v8, v8, v16
1368; RV32-NEXT:    addi sp, sp, 16
1369; RV32-NEXT:    ret
1370;
1371; RV64-LABEL: vxor_xx_nxv8i64:
1372; RV64:       # %bb.0:
1373; RV64-NEXT:    xor a0, a0, a1
1374; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1375; RV64-NEXT:    vmv.v.x v8, a0
1376; RV64-NEXT:    ret
1377  %head1 = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
1378  %splat1 = shufflevector <vscale x 8 x i64> %head1, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1379  %head2 = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
1380  %splat2 = shufflevector <vscale x 8 x i64> %head2, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1381  %v = xor <vscale x 8 x i64> %splat1, %splat2
1382  ret <vscale x 8 x i64> %v
1383}
1384