1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7declare <vscale x 1 x i8> @llvm.ssub.sat.nxv1i8(<vscale x 1 x i8>, <vscale x 1 x i8>)
8
9define <vscale x 1 x i8> @ssub_nxv1i8_vv(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b) {
10; CHECK-LABEL: ssub_nxv1i8_vv:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
13; CHECK-NEXT:    vssub.vv v8, v8, v9
14; CHECK-NEXT:    ret
15  %v = call <vscale x 1 x i8> @llvm.ssub.sat.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %b)
16  ret <vscale x 1 x i8> %v
17}
18
19define <vscale x 1 x i8> @ssub_nxv1i8_vx(<vscale x 1 x i8> %va, i8 %b) {
20; CHECK-LABEL: ssub_nxv1i8_vx:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
23; CHECK-NEXT:    vssub.vx v8, v8, a0
24; CHECK-NEXT:    ret
25  %elt.head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
26  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
27  %v = call <vscale x 1 x i8> @llvm.ssub.sat.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb)
28  ret <vscale x 1 x i8> %v
29}
30
31define <vscale x 1 x i8> @ssub_nxv1i8_vi(<vscale x 1 x i8> %va) {
32; CHECK-LABEL: ssub_nxv1i8_vi:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    li a0, 1
35; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
36; CHECK-NEXT:    vssub.vx v8, v8, a0
37; CHECK-NEXT:    ret
38  %elt.head = insertelement <vscale x 1 x i8> poison, i8 1, i32 0
39  %vb = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
40  %v = call <vscale x 1 x i8> @llvm.ssub.sat.nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb)
41  ret <vscale x 1 x i8> %v
42}
43
44declare <vscale x 2 x i8> @llvm.ssub.sat.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8>)
45
46define <vscale x 2 x i8> @ssub_nxv2i8_vv(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b) {
47; CHECK-LABEL: ssub_nxv2i8_vv:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
50; CHECK-NEXT:    vssub.vv v8, v8, v9
51; CHECK-NEXT:    ret
52  %v = call <vscale x 2 x i8> @llvm.ssub.sat.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %b)
53  ret <vscale x 2 x i8> %v
54}
55
56define <vscale x 2 x i8> @ssub_nxv2i8_vx(<vscale x 2 x i8> %va, i8 %b) {
57; CHECK-LABEL: ssub_nxv2i8_vx:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
60; CHECK-NEXT:    vssub.vx v8, v8, a0
61; CHECK-NEXT:    ret
62  %elt.head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0
63  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
64  %v = call <vscale x 2 x i8> @llvm.ssub.sat.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb)
65  ret <vscale x 2 x i8> %v
66}
67
68define <vscale x 2 x i8> @ssub_nxv2i8_vi(<vscale x 2 x i8> %va) {
69; CHECK-LABEL: ssub_nxv2i8_vi:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    li a0, 1
72; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
73; CHECK-NEXT:    vssub.vx v8, v8, a0
74; CHECK-NEXT:    ret
75  %elt.head = insertelement <vscale x 2 x i8> poison, i8 1, i32 0
76  %vb = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
77  %v = call <vscale x 2 x i8> @llvm.ssub.sat.nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb)
78  ret <vscale x 2 x i8> %v
79}
80
81declare <vscale x 4 x i8> @llvm.ssub.sat.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i8>)
82
83define <vscale x 4 x i8> @ssub_nxv4i8_vv(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b) {
84; CHECK-LABEL: ssub_nxv4i8_vv:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
87; CHECK-NEXT:    vssub.vv v8, v8, v9
88; CHECK-NEXT:    ret
89  %v = call <vscale x 4 x i8> @llvm.ssub.sat.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %b)
90  ret <vscale x 4 x i8> %v
91}
92
93define <vscale x 4 x i8> @ssub_nxv4i8_vx(<vscale x 4 x i8> %va, i8 %b) {
94; CHECK-LABEL: ssub_nxv4i8_vx:
95; CHECK:       # %bb.0:
96; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
97; CHECK-NEXT:    vssub.vx v8, v8, a0
98; CHECK-NEXT:    ret
99  %elt.head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0
100  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
101  %v = call <vscale x 4 x i8> @llvm.ssub.sat.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb)
102  ret <vscale x 4 x i8> %v
103}
104
105define <vscale x 4 x i8> @ssub_nxv4i8_vi(<vscale x 4 x i8> %va) {
106; CHECK-LABEL: ssub_nxv4i8_vi:
107; CHECK:       # %bb.0:
108; CHECK-NEXT:    li a0, 1
109; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
110; CHECK-NEXT:    vssub.vx v8, v8, a0
111; CHECK-NEXT:    ret
112  %elt.head = insertelement <vscale x 4 x i8> poison, i8 1, i32 0
113  %vb = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
114  %v = call <vscale x 4 x i8> @llvm.ssub.sat.nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb)
115  ret <vscale x 4 x i8> %v
116}
117
118declare <vscale x 8 x i8> @llvm.ssub.sat.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i8>)
119
120define <vscale x 8 x i8> @ssub_nxv8i8_vv(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b) {
121; CHECK-LABEL: ssub_nxv8i8_vv:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
124; CHECK-NEXT:    vssub.vv v8, v8, v9
125; CHECK-NEXT:    ret
126  %v = call <vscale x 8 x i8> @llvm.ssub.sat.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %b)
127  ret <vscale x 8 x i8> %v
128}
129
130define <vscale x 8 x i8> @ssub_nxv8i8_vx(<vscale x 8 x i8> %va, i8 %b) {
131; CHECK-LABEL: ssub_nxv8i8_vx:
132; CHECK:       # %bb.0:
133; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
134; CHECK-NEXT:    vssub.vx v8, v8, a0
135; CHECK-NEXT:    ret
136  %elt.head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
137  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
138  %v = call <vscale x 8 x i8> @llvm.ssub.sat.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb)
139  ret <vscale x 8 x i8> %v
140}
141
142define <vscale x 8 x i8> @ssub_nxv8i8_vi(<vscale x 8 x i8> %va) {
143; CHECK-LABEL: ssub_nxv8i8_vi:
144; CHECK:       # %bb.0:
145; CHECK-NEXT:    li a0, 1
146; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
147; CHECK-NEXT:    vssub.vx v8, v8, a0
148; CHECK-NEXT:    ret
149  %elt.head = insertelement <vscale x 8 x i8> poison, i8 1, i32 0
150  %vb = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
151  %v = call <vscale x 8 x i8> @llvm.ssub.sat.nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb)
152  ret <vscale x 8 x i8> %v
153}
154
155declare <vscale x 16 x i8> @llvm.ssub.sat.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>)
156
157define <vscale x 16 x i8> @ssub_nxv16i8_vv(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b) {
158; CHECK-LABEL: ssub_nxv16i8_vv:
159; CHECK:       # %bb.0:
160; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
161; CHECK-NEXT:    vssub.vv v8, v8, v10
162; CHECK-NEXT:    ret
163  %v = call <vscale x 16 x i8> @llvm.ssub.sat.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %b)
164  ret <vscale x 16 x i8> %v
165}
166
167define <vscale x 16 x i8> @ssub_nxv16i8_vx(<vscale x 16 x i8> %va, i8 %b) {
168; CHECK-LABEL: ssub_nxv16i8_vx:
169; CHECK:       # %bb.0:
170; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
171; CHECK-NEXT:    vssub.vx v8, v8, a0
172; CHECK-NEXT:    ret
173  %elt.head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0
174  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
175  %v = call <vscale x 16 x i8> @llvm.ssub.sat.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb)
176  ret <vscale x 16 x i8> %v
177}
178
179define <vscale x 16 x i8> @ssub_nxv16i8_vi(<vscale x 16 x i8> %va) {
180; CHECK-LABEL: ssub_nxv16i8_vi:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    li a0, 1
183; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
184; CHECK-NEXT:    vssub.vx v8, v8, a0
185; CHECK-NEXT:    ret
186  %elt.head = insertelement <vscale x 16 x i8> poison, i8 1, i32 0
187  %vb = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
188  %v = call <vscale x 16 x i8> @llvm.ssub.sat.nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb)
189  ret <vscale x 16 x i8> %v
190}
191
192declare <vscale x 32 x i8> @llvm.ssub.sat.nxv32i8(<vscale x 32 x i8>, <vscale x 32 x i8>)
193
194define <vscale x 32 x i8> @ssub_nxv32i8_vv(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b) {
195; CHECK-LABEL: ssub_nxv32i8_vv:
196; CHECK:       # %bb.0:
197; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
198; CHECK-NEXT:    vssub.vv v8, v8, v12
199; CHECK-NEXT:    ret
200  %v = call <vscale x 32 x i8> @llvm.ssub.sat.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %b)
201  ret <vscale x 32 x i8> %v
202}
203
204define <vscale x 32 x i8> @ssub_nxv32i8_vx(<vscale x 32 x i8> %va, i8 %b) {
205; CHECK-LABEL: ssub_nxv32i8_vx:
206; CHECK:       # %bb.0:
207; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
208; CHECK-NEXT:    vssub.vx v8, v8, a0
209; CHECK-NEXT:    ret
210  %elt.head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0
211  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
212  %v = call <vscale x 32 x i8> @llvm.ssub.sat.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb)
213  ret <vscale x 32 x i8> %v
214}
215
216define <vscale x 32 x i8> @ssub_nxv32i8_vi(<vscale x 32 x i8> %va) {
217; CHECK-LABEL: ssub_nxv32i8_vi:
218; CHECK:       # %bb.0:
219; CHECK-NEXT:    li a0, 1
220; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
221; CHECK-NEXT:    vssub.vx v8, v8, a0
222; CHECK-NEXT:    ret
223  %elt.head = insertelement <vscale x 32 x i8> poison, i8 1, i32 0
224  %vb = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
225  %v = call <vscale x 32 x i8> @llvm.ssub.sat.nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb)
226  ret <vscale x 32 x i8> %v
227}
228
229declare <vscale x 64 x i8> @llvm.ssub.sat.nxv64i8(<vscale x 64 x i8>, <vscale x 64 x i8>)
230
231define <vscale x 64 x i8> @ssub_nxv64i8_vv(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b) {
232; CHECK-LABEL: ssub_nxv64i8_vv:
233; CHECK:       # %bb.0:
234; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
235; CHECK-NEXT:    vssub.vv v8, v8, v16
236; CHECK-NEXT:    ret
237  %v = call <vscale x 64 x i8> @llvm.ssub.sat.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %b)
238  ret <vscale x 64 x i8> %v
239}
240
241define <vscale x 64 x i8> @ssub_nxv64i8_vx(<vscale x 64 x i8> %va, i8 %b) {
242; CHECK-LABEL: ssub_nxv64i8_vx:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
245; CHECK-NEXT:    vssub.vx v8, v8, a0
246; CHECK-NEXT:    ret
247  %elt.head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0
248  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
249  %v = call <vscale x 64 x i8> @llvm.ssub.sat.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb)
250  ret <vscale x 64 x i8> %v
251}
252
253define <vscale x 64 x i8> @ssub_nxv64i8_vi(<vscale x 64 x i8> %va) {
254; CHECK-LABEL: ssub_nxv64i8_vi:
255; CHECK:       # %bb.0:
256; CHECK-NEXT:    li a0, 1
257; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
258; CHECK-NEXT:    vssub.vx v8, v8, a0
259; CHECK-NEXT:    ret
260  %elt.head = insertelement <vscale x 64 x i8> poison, i8 1, i32 0
261  %vb = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
262  %v = call <vscale x 64 x i8> @llvm.ssub.sat.nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb)
263  ret <vscale x 64 x i8> %v
264}
265
266declare <vscale x 1 x i16> @llvm.ssub.sat.nxv1i16(<vscale x 1 x i16>, <vscale x 1 x i16>)
267
268define <vscale x 1 x i16> @ssub_nxv1i16_vv(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b) {
269; CHECK-LABEL: ssub_nxv1i16_vv:
270; CHECK:       # %bb.0:
271; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
272; CHECK-NEXT:    vssub.vv v8, v8, v9
273; CHECK-NEXT:    ret
274  %v = call <vscale x 1 x i16> @llvm.ssub.sat.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %b)
275  ret <vscale x 1 x i16> %v
276}
277
278define <vscale x 1 x i16> @ssub_nxv1i16_vx(<vscale x 1 x i16> %va, i16 %b) {
279; CHECK-LABEL: ssub_nxv1i16_vx:
280; CHECK:       # %bb.0:
281; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
282; CHECK-NEXT:    vssub.vx v8, v8, a0
283; CHECK-NEXT:    ret
284  %elt.head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
285  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
286  %v = call <vscale x 1 x i16> @llvm.ssub.sat.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb)
287  ret <vscale x 1 x i16> %v
288}
289
290define <vscale x 1 x i16> @ssub_nxv1i16_vi(<vscale x 1 x i16> %va) {
291; CHECK-LABEL: ssub_nxv1i16_vi:
292; CHECK:       # %bb.0:
293; CHECK-NEXT:    li a0, 1
294; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
295; CHECK-NEXT:    vssub.vx v8, v8, a0
296; CHECK-NEXT:    ret
297  %elt.head = insertelement <vscale x 1 x i16> poison, i16 1, i32 0
298  %vb = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
299  %v = call <vscale x 1 x i16> @llvm.ssub.sat.nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb)
300  ret <vscale x 1 x i16> %v
301}
302
303declare <vscale x 2 x i16> @llvm.ssub.sat.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16>)
304
305define <vscale x 2 x i16> @ssub_nxv2i16_vv(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b) {
306; CHECK-LABEL: ssub_nxv2i16_vv:
307; CHECK:       # %bb.0:
308; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
309; CHECK-NEXT:    vssub.vv v8, v8, v9
310; CHECK-NEXT:    ret
311  %v = call <vscale x 2 x i16> @llvm.ssub.sat.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %b)
312  ret <vscale x 2 x i16> %v
313}
314
315define <vscale x 2 x i16> @ssub_nxv2i16_vx(<vscale x 2 x i16> %va, i16 %b) {
316; CHECK-LABEL: ssub_nxv2i16_vx:
317; CHECK:       # %bb.0:
318; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
319; CHECK-NEXT:    vssub.vx v8, v8, a0
320; CHECK-NEXT:    ret
321  %elt.head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0
322  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
323  %v = call <vscale x 2 x i16> @llvm.ssub.sat.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb)
324  ret <vscale x 2 x i16> %v
325}
326
327define <vscale x 2 x i16> @ssub_nxv2i16_vi(<vscale x 2 x i16> %va) {
328; CHECK-LABEL: ssub_nxv2i16_vi:
329; CHECK:       # %bb.0:
330; CHECK-NEXT:    li a0, 1
331; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
332; CHECK-NEXT:    vssub.vx v8, v8, a0
333; CHECK-NEXT:    ret
334  %elt.head = insertelement <vscale x 2 x i16> poison, i16 1, i32 0
335  %vb = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
336  %v = call <vscale x 2 x i16> @llvm.ssub.sat.nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb)
337  ret <vscale x 2 x i16> %v
338}
339
340declare <vscale x 4 x i16> @llvm.ssub.sat.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i16>)
341
342define <vscale x 4 x i16> @ssub_nxv4i16_vv(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b) {
343; CHECK-LABEL: ssub_nxv4i16_vv:
344; CHECK:       # %bb.0:
345; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
346; CHECK-NEXT:    vssub.vv v8, v8, v9
347; CHECK-NEXT:    ret
348  %v = call <vscale x 4 x i16> @llvm.ssub.sat.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %b)
349  ret <vscale x 4 x i16> %v
350}
351
352define <vscale x 4 x i16> @ssub_nxv4i16_vx(<vscale x 4 x i16> %va, i16 %b) {
353; CHECK-LABEL: ssub_nxv4i16_vx:
354; CHECK:       # %bb.0:
355; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
356; CHECK-NEXT:    vssub.vx v8, v8, a0
357; CHECK-NEXT:    ret
358  %elt.head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0
359  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
360  %v = call <vscale x 4 x i16> @llvm.ssub.sat.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb)
361  ret <vscale x 4 x i16> %v
362}
363
364define <vscale x 4 x i16> @ssub_nxv4i16_vi(<vscale x 4 x i16> %va) {
365; CHECK-LABEL: ssub_nxv4i16_vi:
366; CHECK:       # %bb.0:
367; CHECK-NEXT:    li a0, 1
368; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
369; CHECK-NEXT:    vssub.vx v8, v8, a0
370; CHECK-NEXT:    ret
371  %elt.head = insertelement <vscale x 4 x i16> poison, i16 1, i32 0
372  %vb = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
373  %v = call <vscale x 4 x i16> @llvm.ssub.sat.nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb)
374  ret <vscale x 4 x i16> %v
375}
376
377declare <vscale x 8 x i16> @llvm.ssub.sat.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>)
378
379define <vscale x 8 x i16> @ssub_nxv8i16_vv(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b) {
380; CHECK-LABEL: ssub_nxv8i16_vv:
381; CHECK:       # %bb.0:
382; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
383; CHECK-NEXT:    vssub.vv v8, v8, v10
384; CHECK-NEXT:    ret
385  %v = call <vscale x 8 x i16> @llvm.ssub.sat.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %b)
386  ret <vscale x 8 x i16> %v
387}
388
389define <vscale x 8 x i16> @ssub_nxv8i16_vx(<vscale x 8 x i16> %va, i16 %b) {
390; CHECK-LABEL: ssub_nxv8i16_vx:
391; CHECK:       # %bb.0:
392; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
393; CHECK-NEXT:    vssub.vx v8, v8, a0
394; CHECK-NEXT:    ret
395  %elt.head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0
396  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
397  %v = call <vscale x 8 x i16> @llvm.ssub.sat.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb)
398  ret <vscale x 8 x i16> %v
399}
400
401define <vscale x 8 x i16> @ssub_nxv8i16_vi(<vscale x 8 x i16> %va) {
402; CHECK-LABEL: ssub_nxv8i16_vi:
403; CHECK:       # %bb.0:
404; CHECK-NEXT:    li a0, 1
405; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
406; CHECK-NEXT:    vssub.vx v8, v8, a0
407; CHECK-NEXT:    ret
408  %elt.head = insertelement <vscale x 8 x i16> poison, i16 1, i32 0
409  %vb = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
410  %v = call <vscale x 8 x i16> @llvm.ssub.sat.nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb)
411  ret <vscale x 8 x i16> %v
412}
413
414declare <vscale x 16 x i16> @llvm.ssub.sat.nxv16i16(<vscale x 16 x i16>, <vscale x 16 x i16>)
415
416define <vscale x 16 x i16> @ssub_nxv16i16_vv(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b) {
417; CHECK-LABEL: ssub_nxv16i16_vv:
418; CHECK:       # %bb.0:
419; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
420; CHECK-NEXT:    vssub.vv v8, v8, v12
421; CHECK-NEXT:    ret
422  %v = call <vscale x 16 x i16> @llvm.ssub.sat.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %b)
423  ret <vscale x 16 x i16> %v
424}
425
426define <vscale x 16 x i16> @ssub_nxv16i16_vx(<vscale x 16 x i16> %va, i16 %b) {
427; CHECK-LABEL: ssub_nxv16i16_vx:
428; CHECK:       # %bb.0:
429; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
430; CHECK-NEXT:    vssub.vx v8, v8, a0
431; CHECK-NEXT:    ret
432  %elt.head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0
433  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
434  %v = call <vscale x 16 x i16> @llvm.ssub.sat.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb)
435  ret <vscale x 16 x i16> %v
436}
437
438define <vscale x 16 x i16> @ssub_nxv16i16_vi(<vscale x 16 x i16> %va) {
439; CHECK-LABEL: ssub_nxv16i16_vi:
440; CHECK:       # %bb.0:
441; CHECK-NEXT:    li a0, 1
442; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
443; CHECK-NEXT:    vssub.vx v8, v8, a0
444; CHECK-NEXT:    ret
445  %elt.head = insertelement <vscale x 16 x i16> poison, i16 1, i32 0
446  %vb = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
447  %v = call <vscale x 16 x i16> @llvm.ssub.sat.nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb)
448  ret <vscale x 16 x i16> %v
449}
450
451declare <vscale x 32 x i16> @llvm.ssub.sat.nxv32i16(<vscale x 32 x i16>, <vscale x 32 x i16>)
452
453define <vscale x 32 x i16> @ssub_nxv32i16_vv(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b) {
454; CHECK-LABEL: ssub_nxv32i16_vv:
455; CHECK:       # %bb.0:
456; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
457; CHECK-NEXT:    vssub.vv v8, v8, v16
458; CHECK-NEXT:    ret
459  %v = call <vscale x 32 x i16> @llvm.ssub.sat.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %b)
460  ret <vscale x 32 x i16> %v
461}
462
463define <vscale x 32 x i16> @ssub_nxv32i16_vx(<vscale x 32 x i16> %va, i16 %b) {
464; CHECK-LABEL: ssub_nxv32i16_vx:
465; CHECK:       # %bb.0:
466; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
467; CHECK-NEXT:    vssub.vx v8, v8, a0
468; CHECK-NEXT:    ret
469  %elt.head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0
470  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
471  %v = call <vscale x 32 x i16> @llvm.ssub.sat.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb)
472  ret <vscale x 32 x i16> %v
473}
474
475define <vscale x 32 x i16> @ssub_nxv32i16_vi(<vscale x 32 x i16> %va) {
476; CHECK-LABEL: ssub_nxv32i16_vi:
477; CHECK:       # %bb.0:
478; CHECK-NEXT:    li a0, 1
479; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
480; CHECK-NEXT:    vssub.vx v8, v8, a0
481; CHECK-NEXT:    ret
482  %elt.head = insertelement <vscale x 32 x i16> poison, i16 1, i32 0
483  %vb = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
484  %v = call <vscale x 32 x i16> @llvm.ssub.sat.nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb)
485  ret <vscale x 32 x i16> %v
486}
487
488declare <vscale x 1 x i32> @llvm.ssub.sat.nxv1i32(<vscale x 1 x i32>, <vscale x 1 x i32>)
489
490define <vscale x 1 x i32> @ssub_nxv1i32_vv(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b) {
491; CHECK-LABEL: ssub_nxv1i32_vv:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
494; CHECK-NEXT:    vssub.vv v8, v8, v9
495; CHECK-NEXT:    ret
496  %v = call <vscale x 1 x i32> @llvm.ssub.sat.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %b)
497  ret <vscale x 1 x i32> %v
498}
499
500define <vscale x 1 x i32> @ssub_nxv1i32_vx(<vscale x 1 x i32> %va, i32 %b) {
501; CHECK-LABEL: ssub_nxv1i32_vx:
502; CHECK:       # %bb.0:
503; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
504; CHECK-NEXT:    vssub.vx v8, v8, a0
505; CHECK-NEXT:    ret
506  %elt.head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
507  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
508  %v = call <vscale x 1 x i32> @llvm.ssub.sat.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb)
509  ret <vscale x 1 x i32> %v
510}
511
512define <vscale x 1 x i32> @ssub_nxv1i32_vi(<vscale x 1 x i32> %va) {
513; CHECK-LABEL: ssub_nxv1i32_vi:
514; CHECK:       # %bb.0:
515; CHECK-NEXT:    li a0, 1
516; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
517; CHECK-NEXT:    vssub.vx v8, v8, a0
518; CHECK-NEXT:    ret
519  %elt.head = insertelement <vscale x 1 x i32> poison, i32 1, i32 0
520  %vb = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
521  %v = call <vscale x 1 x i32> @llvm.ssub.sat.nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb)
522  ret <vscale x 1 x i32> %v
523}
524
525declare <vscale x 2 x i32> @llvm.ssub.sat.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>)
526
527define <vscale x 2 x i32> @ssub_nxv2i32_vv(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b) {
528; CHECK-LABEL: ssub_nxv2i32_vv:
529; CHECK:       # %bb.0:
530; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
531; CHECK-NEXT:    vssub.vv v8, v8, v9
532; CHECK-NEXT:    ret
533  %v = call <vscale x 2 x i32> @llvm.ssub.sat.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %b)
534  ret <vscale x 2 x i32> %v
535}
536
537define <vscale x 2 x i32> @ssub_nxv2i32_vx(<vscale x 2 x i32> %va, i32 %b) {
538; CHECK-LABEL: ssub_nxv2i32_vx:
539; CHECK:       # %bb.0:
540; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
541; CHECK-NEXT:    vssub.vx v8, v8, a0
542; CHECK-NEXT:    ret
543  %elt.head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0
544  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
545  %v = call <vscale x 2 x i32> @llvm.ssub.sat.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb)
546  ret <vscale x 2 x i32> %v
547}
548
549define <vscale x 2 x i32> @ssub_nxv2i32_vi(<vscale x 2 x i32> %va) {
550; CHECK-LABEL: ssub_nxv2i32_vi:
551; CHECK:       # %bb.0:
552; CHECK-NEXT:    li a0, 1
553; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
554; CHECK-NEXT:    vssub.vx v8, v8, a0
555; CHECK-NEXT:    ret
556  %elt.head = insertelement <vscale x 2 x i32> poison, i32 1, i32 0
557  %vb = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
558  %v = call <vscale x 2 x i32> @llvm.ssub.sat.nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb)
559  ret <vscale x 2 x i32> %v
560}
561
562declare <vscale x 4 x i32> @llvm.ssub.sat.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>)
563
564define <vscale x 4 x i32> @ssub_nxv4i32_vv(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b) {
565; CHECK-LABEL: ssub_nxv4i32_vv:
566; CHECK:       # %bb.0:
567; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
568; CHECK-NEXT:    vssub.vv v8, v8, v10
569; CHECK-NEXT:    ret
570  %v = call <vscale x 4 x i32> @llvm.ssub.sat.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %b)
571  ret <vscale x 4 x i32> %v
572}
573
574define <vscale x 4 x i32> @ssub_nxv4i32_vx(<vscale x 4 x i32> %va, i32 %b) {
575; CHECK-LABEL: ssub_nxv4i32_vx:
576; CHECK:       # %bb.0:
577; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
578; CHECK-NEXT:    vssub.vx v8, v8, a0
579; CHECK-NEXT:    ret
580  %elt.head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0
581  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
582  %v = call <vscale x 4 x i32> @llvm.ssub.sat.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb)
583  ret <vscale x 4 x i32> %v
584}
585
586define <vscale x 4 x i32> @ssub_nxv4i32_vi(<vscale x 4 x i32> %va) {
587; CHECK-LABEL: ssub_nxv4i32_vi:
588; CHECK:       # %bb.0:
589; CHECK-NEXT:    li a0, 1
590; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
591; CHECK-NEXT:    vssub.vx v8, v8, a0
592; CHECK-NEXT:    ret
593  %elt.head = insertelement <vscale x 4 x i32> poison, i32 1, i32 0
594  %vb = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
595  %v = call <vscale x 4 x i32> @llvm.ssub.sat.nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb)
596  ret <vscale x 4 x i32> %v
597}
598
599declare <vscale x 8 x i32> @llvm.ssub.sat.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32>)
600
601define <vscale x 8 x i32> @ssub_nxv8i32_vv(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b) {
602; CHECK-LABEL: ssub_nxv8i32_vv:
603; CHECK:       # %bb.0:
604; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
605; CHECK-NEXT:    vssub.vv v8, v8, v12
606; CHECK-NEXT:    ret
607  %v = call <vscale x 8 x i32> @llvm.ssub.sat.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %b)
608  ret <vscale x 8 x i32> %v
609}
610
611define <vscale x 8 x i32> @ssub_nxv8i32_vx(<vscale x 8 x i32> %va, i32 %b) {
612; CHECK-LABEL: ssub_nxv8i32_vx:
613; CHECK:       # %bb.0:
614; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
615; CHECK-NEXT:    vssub.vx v8, v8, a0
616; CHECK-NEXT:    ret
617  %elt.head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
618  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
619  %v = call <vscale x 8 x i32> @llvm.ssub.sat.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb)
620  ret <vscale x 8 x i32> %v
621}
622
623define <vscale x 8 x i32> @ssub_nxv8i32_vi(<vscale x 8 x i32> %va) {
624; CHECK-LABEL: ssub_nxv8i32_vi:
625; CHECK:       # %bb.0:
626; CHECK-NEXT:    li a0, 1
627; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
628; CHECK-NEXT:    vssub.vx v8, v8, a0
629; CHECK-NEXT:    ret
630  %elt.head = insertelement <vscale x 8 x i32> poison, i32 1, i32 0
631  %vb = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
632  %v = call <vscale x 8 x i32> @llvm.ssub.sat.nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb)
633  ret <vscale x 8 x i32> %v
634}
635
636declare <vscale x 16 x i32> @llvm.ssub.sat.nxv16i32(<vscale x 16 x i32>, <vscale x 16 x i32>)
637
638define <vscale x 16 x i32> @ssub_nxv16i32_vv(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b) {
639; CHECK-LABEL: ssub_nxv16i32_vv:
640; CHECK:       # %bb.0:
641; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
642; CHECK-NEXT:    vssub.vv v8, v8, v16
643; CHECK-NEXT:    ret
644  %v = call <vscale x 16 x i32> @llvm.ssub.sat.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %b)
645  ret <vscale x 16 x i32> %v
646}
647
648define <vscale x 16 x i32> @ssub_nxv16i32_vx(<vscale x 16 x i32> %va, i32 %b) {
649; CHECK-LABEL: ssub_nxv16i32_vx:
650; CHECK:       # %bb.0:
651; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
652; CHECK-NEXT:    vssub.vx v8, v8, a0
653; CHECK-NEXT:    ret
654  %elt.head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0
655  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
656  %v = call <vscale x 16 x i32> @llvm.ssub.sat.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb)
657  ret <vscale x 16 x i32> %v
658}
659
660define <vscale x 16 x i32> @ssub_nxv16i32_vi(<vscale x 16 x i32> %va) {
661; CHECK-LABEL: ssub_nxv16i32_vi:
662; CHECK:       # %bb.0:
663; CHECK-NEXT:    li a0, 1
664; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
665; CHECK-NEXT:    vssub.vx v8, v8, a0
666; CHECK-NEXT:    ret
667  %elt.head = insertelement <vscale x 16 x i32> poison, i32 1, i32 0
668  %vb = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
669  %v = call <vscale x 16 x i32> @llvm.ssub.sat.nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb)
670  ret <vscale x 16 x i32> %v
671}
672
673declare <vscale x 1 x i64> @llvm.ssub.sat.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64>)
674
675define <vscale x 1 x i64> @ssub_nxv1i64_vv(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b) {
676; CHECK-LABEL: ssub_nxv1i64_vv:
677; CHECK:       # %bb.0:
678; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
679; CHECK-NEXT:    vssub.vv v8, v8, v9
680; CHECK-NEXT:    ret
681  %v = call <vscale x 1 x i64> @llvm.ssub.sat.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %b)
682  ret <vscale x 1 x i64> %v
683}
684
685define <vscale x 1 x i64> @ssub_nxv1i64_vx(<vscale x 1 x i64> %va, i64 %b) {
686; RV32-LABEL: ssub_nxv1i64_vx:
687; RV32:       # %bb.0:
688; RV32-NEXT:    addi sp, sp, -16
689; RV32-NEXT:    .cfi_def_cfa_offset 16
690; RV32-NEXT:    sw a1, 12(sp)
691; RV32-NEXT:    sw a0, 8(sp)
692; RV32-NEXT:    addi a0, sp, 8
693; RV32-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
694; RV32-NEXT:    vlse64.v v9, (a0), zero
695; RV32-NEXT:    vssub.vv v8, v8, v9
696; RV32-NEXT:    addi sp, sp, 16
697; RV32-NEXT:    ret
698;
699; RV64-LABEL: ssub_nxv1i64_vx:
700; RV64:       # %bb.0:
701; RV64-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
702; RV64-NEXT:    vssub.vx v8, v8, a0
703; RV64-NEXT:    ret
704  %elt.head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
705  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
706  %v = call <vscale x 1 x i64> @llvm.ssub.sat.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb)
707  ret <vscale x 1 x i64> %v
708}
709
710define <vscale x 1 x i64> @ssub_nxv1i64_vi(<vscale x 1 x i64> %va) {
711; CHECK-LABEL: ssub_nxv1i64_vi:
712; CHECK:       # %bb.0:
713; CHECK-NEXT:    li a0, 1
714; CHECK-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
715; CHECK-NEXT:    vssub.vx v8, v8, a0
716; CHECK-NEXT:    ret
717  %elt.head = insertelement <vscale x 1 x i64> poison, i64 1, i32 0
718  %vb = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
719  %v = call <vscale x 1 x i64> @llvm.ssub.sat.nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb)
720  ret <vscale x 1 x i64> %v
721}
722
723declare <vscale x 2 x i64> @llvm.ssub.sat.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>)
724
725define <vscale x 2 x i64> @ssub_nxv2i64_vv(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b) {
726; CHECK-LABEL: ssub_nxv2i64_vv:
727; CHECK:       # %bb.0:
728; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
729; CHECK-NEXT:    vssub.vv v8, v8, v10
730; CHECK-NEXT:    ret
731  %v = call <vscale x 2 x i64> @llvm.ssub.sat.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %b)
732  ret <vscale x 2 x i64> %v
733}
734
735define <vscale x 2 x i64> @ssub_nxv2i64_vx(<vscale x 2 x i64> %va, i64 %b) {
736; RV32-LABEL: ssub_nxv2i64_vx:
737; RV32:       # %bb.0:
738; RV32-NEXT:    addi sp, sp, -16
739; RV32-NEXT:    .cfi_def_cfa_offset 16
740; RV32-NEXT:    sw a1, 12(sp)
741; RV32-NEXT:    sw a0, 8(sp)
742; RV32-NEXT:    addi a0, sp, 8
743; RV32-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
744; RV32-NEXT:    vlse64.v v10, (a0), zero
745; RV32-NEXT:    vssub.vv v8, v8, v10
746; RV32-NEXT:    addi sp, sp, 16
747; RV32-NEXT:    ret
748;
749; RV64-LABEL: ssub_nxv2i64_vx:
750; RV64:       # %bb.0:
751; RV64-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
752; RV64-NEXT:    vssub.vx v8, v8, a0
753; RV64-NEXT:    ret
754  %elt.head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0
755  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
756  %v = call <vscale x 2 x i64> @llvm.ssub.sat.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb)
757  ret <vscale x 2 x i64> %v
758}
759
760define <vscale x 2 x i64> @ssub_nxv2i64_vi(<vscale x 2 x i64> %va) {
761; CHECK-LABEL: ssub_nxv2i64_vi:
762; CHECK:       # %bb.0:
763; CHECK-NEXT:    li a0, 1
764; CHECK-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
765; CHECK-NEXT:    vssub.vx v8, v8, a0
766; CHECK-NEXT:    ret
767  %elt.head = insertelement <vscale x 2 x i64> poison, i64 1, i32 0
768  %vb = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
769  %v = call <vscale x 2 x i64> @llvm.ssub.sat.nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb)
770  ret <vscale x 2 x i64> %v
771}
772
773declare <vscale x 4 x i64> @llvm.ssub.sat.nxv4i64(<vscale x 4 x i64>, <vscale x 4 x i64>)
774
775define <vscale x 4 x i64> @ssub_nxv4i64_vv(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b) {
776; CHECK-LABEL: ssub_nxv4i64_vv:
777; CHECK:       # %bb.0:
778; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
779; CHECK-NEXT:    vssub.vv v8, v8, v12
780; CHECK-NEXT:    ret
781  %v = call <vscale x 4 x i64> @llvm.ssub.sat.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %b)
782  ret <vscale x 4 x i64> %v
783}
784
785define <vscale x 4 x i64> @ssub_nxv4i64_vx(<vscale x 4 x i64> %va, i64 %b) {
786; RV32-LABEL: ssub_nxv4i64_vx:
787; RV32:       # %bb.0:
788; RV32-NEXT:    addi sp, sp, -16
789; RV32-NEXT:    .cfi_def_cfa_offset 16
790; RV32-NEXT:    sw a1, 12(sp)
791; RV32-NEXT:    sw a0, 8(sp)
792; RV32-NEXT:    addi a0, sp, 8
793; RV32-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
794; RV32-NEXT:    vlse64.v v12, (a0), zero
795; RV32-NEXT:    vssub.vv v8, v8, v12
796; RV32-NEXT:    addi sp, sp, 16
797; RV32-NEXT:    ret
798;
799; RV64-LABEL: ssub_nxv4i64_vx:
800; RV64:       # %bb.0:
801; RV64-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
802; RV64-NEXT:    vssub.vx v8, v8, a0
803; RV64-NEXT:    ret
804  %elt.head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0
805  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
806  %v = call <vscale x 4 x i64> @llvm.ssub.sat.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb)
807  ret <vscale x 4 x i64> %v
808}
809
810define <vscale x 4 x i64> @ssub_nxv4i64_vi(<vscale x 4 x i64> %va) {
811; CHECK-LABEL: ssub_nxv4i64_vi:
812; CHECK:       # %bb.0:
813; CHECK-NEXT:    li a0, 1
814; CHECK-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
815; CHECK-NEXT:    vssub.vx v8, v8, a0
816; CHECK-NEXT:    ret
817  %elt.head = insertelement <vscale x 4 x i64> poison, i64 1, i32 0
818  %vb = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
819  %v = call <vscale x 4 x i64> @llvm.ssub.sat.nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb)
820  ret <vscale x 4 x i64> %v
821}
822
823declare <vscale x 8 x i64> @llvm.ssub.sat.nxv8i64(<vscale x 8 x i64>, <vscale x 8 x i64>)
824
825define <vscale x 8 x i64> @ssub_nxv8i64_vv(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b) {
826; CHECK-LABEL: ssub_nxv8i64_vv:
827; CHECK:       # %bb.0:
828; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
829; CHECK-NEXT:    vssub.vv v8, v8, v16
830; CHECK-NEXT:    ret
831  %v = call <vscale x 8 x i64> @llvm.ssub.sat.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %b)
832  ret <vscale x 8 x i64> %v
833}
834
835define <vscale x 8 x i64> @ssub_nxv8i64_vx(<vscale x 8 x i64> %va, i64 %b) {
836; RV32-LABEL: ssub_nxv8i64_vx:
837; RV32:       # %bb.0:
838; RV32-NEXT:    addi sp, sp, -16
839; RV32-NEXT:    .cfi_def_cfa_offset 16
840; RV32-NEXT:    sw a1, 12(sp)
841; RV32-NEXT:    sw a0, 8(sp)
842; RV32-NEXT:    addi a0, sp, 8
843; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
844; RV32-NEXT:    vlse64.v v16, (a0), zero
845; RV32-NEXT:    vssub.vv v8, v8, v16
846; RV32-NEXT:    addi sp, sp, 16
847; RV32-NEXT:    ret
848;
849; RV64-LABEL: ssub_nxv8i64_vx:
850; RV64:       # %bb.0:
851; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
852; RV64-NEXT:    vssub.vx v8, v8, a0
853; RV64-NEXT:    ret
854  %elt.head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
855  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
856  %v = call <vscale x 8 x i64> @llvm.ssub.sat.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb)
857  ret <vscale x 8 x i64> %v
858}
859
860define <vscale x 8 x i64> @ssub_nxv8i64_vi(<vscale x 8 x i64> %va) {
861; CHECK-LABEL: ssub_nxv8i64_vi:
862; CHECK:       # %bb.0:
863; CHECK-NEXT:    li a0, 1
864; CHECK-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
865; CHECK-NEXT:    vssub.vx v8, v8, a0
866; CHECK-NEXT:    ret
867  %elt.head = insertelement <vscale x 8 x i64> poison, i64 1, i32 0
868  %vb = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
869  %v = call <vscale x 8 x i64> @llvm.ssub.sat.nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb)
870  ret <vscale x 8 x i64> %v
871}
872