1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
4
5define <vscale x 1 x i8> @vrsub_vx_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b) {
6; CHECK-LABEL: vrsub_vx_nxv1i8:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
9; CHECK-NEXT:    vrsub.vx v8, v8, a0
10; CHECK-NEXT:    ret
11  %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
12  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
13  %vc = sub <vscale x 1 x i8> %splat, %va
14  ret <vscale x 1 x i8> %vc
15}
16
17define <vscale x 1 x i8> @vrsub_vi_nxv1i8_0(<vscale x 1 x i8> %va) {
18; CHECK-LABEL: vrsub_vi_nxv1i8_0:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
21; CHECK-NEXT:    vrsub.vi v8, v8, -4
22; CHECK-NEXT:    ret
23  %head = insertelement <vscale x 1 x i8> poison, i8 -4, i32 0
24  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
25  %vc = sub <vscale x 1 x i8> %splat, %va
26  ret <vscale x 1 x i8> %vc
27}
28
29define <vscale x 2 x i8> @vrsub_vx_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b) {
30; CHECK-LABEL: vrsub_vx_nxv2i8:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
33; CHECK-NEXT:    vrsub.vx v8, v8, a0
34; CHECK-NEXT:    ret
35  %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0
36  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
37  %vc = sub <vscale x 2 x i8> %splat, %va
38  ret <vscale x 2 x i8> %vc
39}
40
41define <vscale x 2 x i8> @vrsub_vi_nxv2i8_0(<vscale x 2 x i8> %va) {
42; CHECK-LABEL: vrsub_vi_nxv2i8_0:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
45; CHECK-NEXT:    vrsub.vi v8, v8, -4
46; CHECK-NEXT:    ret
47  %head = insertelement <vscale x 2 x i8> poison, i8 -4, i32 0
48  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
49  %vc = sub <vscale x 2 x i8> %splat, %va
50  ret <vscale x 2 x i8> %vc
51}
52
53define <vscale x 4 x i8> @vrsub_vx_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b) {
54; CHECK-LABEL: vrsub_vx_nxv4i8:
55; CHECK:       # %bb.0:
56; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
57; CHECK-NEXT:    vrsub.vx v8, v8, a0
58; CHECK-NEXT:    ret
59  %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0
60  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
61  %vc = sub <vscale x 4 x i8> %splat, %va
62  ret <vscale x 4 x i8> %vc
63}
64
65define <vscale x 4 x i8> @vrsub_vi_nxv4i8_0(<vscale x 4 x i8> %va) {
66; CHECK-LABEL: vrsub_vi_nxv4i8_0:
67; CHECK:       # %bb.0:
68; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
69; CHECK-NEXT:    vrsub.vi v8, v8, -4
70; CHECK-NEXT:    ret
71  %head = insertelement <vscale x 4 x i8> poison, i8 -4, i32 0
72  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
73  %vc = sub <vscale x 4 x i8> %splat, %va
74  ret <vscale x 4 x i8> %vc
75}
76
77define <vscale x 8 x i8> @vrsub_vx_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b) {
78; CHECK-LABEL: vrsub_vx_nxv8i8:
79; CHECK:       # %bb.0:
80; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
81; CHECK-NEXT:    vrsub.vx v8, v8, a0
82; CHECK-NEXT:    ret
83  %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
84  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
85  %vc = sub <vscale x 8 x i8> %splat, %va
86  ret <vscale x 8 x i8> %vc
87}
88
89define <vscale x 8 x i8> @vrsub_vi_nxv8i8_0(<vscale x 8 x i8> %va) {
90; CHECK-LABEL: vrsub_vi_nxv8i8_0:
91; CHECK:       # %bb.0:
92; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
93; CHECK-NEXT:    vrsub.vi v8, v8, -4
94; CHECK-NEXT:    ret
95  %head = insertelement <vscale x 8 x i8> poison, i8 -4, i32 0
96  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
97  %vc = sub <vscale x 8 x i8> %splat, %va
98  ret <vscale x 8 x i8> %vc
99}
100
101define <vscale x 16 x i8> @vrsub_vx_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b) {
102; CHECK-LABEL: vrsub_vx_nxv16i8:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
105; CHECK-NEXT:    vrsub.vx v8, v8, a0
106; CHECK-NEXT:    ret
107  %head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0
108  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
109  %vc = sub <vscale x 16 x i8> %splat, %va
110  ret <vscale x 16 x i8> %vc
111}
112
113define <vscale x 16 x i8> @vrsub_vi_nxv16i8_0(<vscale x 16 x i8> %va) {
114; CHECK-LABEL: vrsub_vi_nxv16i8_0:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
117; CHECK-NEXT:    vrsub.vi v8, v8, -4
118; CHECK-NEXT:    ret
119  %head = insertelement <vscale x 16 x i8> poison, i8 -4, i32 0
120  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
121  %vc = sub <vscale x 16 x i8> %splat, %va
122  ret <vscale x 16 x i8> %vc
123}
124
125define <vscale x 32 x i8> @vrsub_vx_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b) {
126; CHECK-LABEL: vrsub_vx_nxv32i8:
127; CHECK:       # %bb.0:
128; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
129; CHECK-NEXT:    vrsub.vx v8, v8, a0
130; CHECK-NEXT:    ret
131  %head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0
132  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
133  %vc = sub <vscale x 32 x i8> %splat, %va
134  ret <vscale x 32 x i8> %vc
135}
136
137define <vscale x 32 x i8> @vrsub_vi_nxv32i8_0(<vscale x 32 x i8> %va) {
138; CHECK-LABEL: vrsub_vi_nxv32i8_0:
139; CHECK:       # %bb.0:
140; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
141; CHECK-NEXT:    vrsub.vi v8, v8, -4
142; CHECK-NEXT:    ret
143  %head = insertelement <vscale x 32 x i8> poison, i8 -4, i32 0
144  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
145  %vc = sub <vscale x 32 x i8> %splat, %va
146  ret <vscale x 32 x i8> %vc
147}
148
149define <vscale x 64 x i8> @vrsub_vx_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b) {
150; CHECK-LABEL: vrsub_vx_nxv64i8:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
153; CHECK-NEXT:    vrsub.vx v8, v8, a0
154; CHECK-NEXT:    ret
155  %head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0
156  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
157  %vc = sub <vscale x 64 x i8> %splat, %va
158  ret <vscale x 64 x i8> %vc
159}
160
161define <vscale x 64 x i8> @vrsub_vi_nxv64i8_0(<vscale x 64 x i8> %va) {
162; CHECK-LABEL: vrsub_vi_nxv64i8_0:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
165; CHECK-NEXT:    vrsub.vi v8, v8, -4
166; CHECK-NEXT:    ret
167  %head = insertelement <vscale x 64 x i8> poison, i8 -4, i32 0
168  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
169  %vc = sub <vscale x 64 x i8> %splat, %va
170  ret <vscale x 64 x i8> %vc
171}
172
173define <vscale x 1 x i16> @vrsub_vx_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b) {
174; CHECK-LABEL: vrsub_vx_nxv1i16:
175; CHECK:       # %bb.0:
176; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
177; CHECK-NEXT:    vrsub.vx v8, v8, a0
178; CHECK-NEXT:    ret
179  %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
180  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
181  %vc = sub <vscale x 1 x i16> %splat, %va
182  ret <vscale x 1 x i16> %vc
183}
184
185define <vscale x 1 x i16> @vrsub_vi_nxv1i16_0(<vscale x 1 x i16> %va) {
186; CHECK-LABEL: vrsub_vi_nxv1i16_0:
187; CHECK:       # %bb.0:
188; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
189; CHECK-NEXT:    vrsub.vi v8, v8, -4
190; CHECK-NEXT:    ret
191  %head = insertelement <vscale x 1 x i16> poison, i16 -4, i32 0
192  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
193  %vc = sub <vscale x 1 x i16> %splat, %va
194  ret <vscale x 1 x i16> %vc
195}
196
197define <vscale x 2 x i16> @vrsub_vx_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b) {
198; CHECK-LABEL: vrsub_vx_nxv2i16:
199; CHECK:       # %bb.0:
200; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
201; CHECK-NEXT:    vrsub.vx v8, v8, a0
202; CHECK-NEXT:    ret
203  %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0
204  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
205  %vc = sub <vscale x 2 x i16> %splat, %va
206  ret <vscale x 2 x i16> %vc
207}
208
209define <vscale x 2 x i16> @vrsub_vi_nxv2i16_0(<vscale x 2 x i16> %va) {
210; CHECK-LABEL: vrsub_vi_nxv2i16_0:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
213; CHECK-NEXT:    vrsub.vi v8, v8, -4
214; CHECK-NEXT:    ret
215  %head = insertelement <vscale x 2 x i16> poison, i16 -4, i32 0
216  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
217  %vc = sub <vscale x 2 x i16> %splat, %va
218  ret <vscale x 2 x i16> %vc
219}
220
221define <vscale x 4 x i16> @vrsub_vx_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b) {
222; CHECK-LABEL: vrsub_vx_nxv4i16:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
225; CHECK-NEXT:    vrsub.vx v8, v8, a0
226; CHECK-NEXT:    ret
227  %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0
228  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
229  %vc = sub <vscale x 4 x i16> %splat, %va
230  ret <vscale x 4 x i16> %vc
231}
232
233define <vscale x 4 x i16> @vrsub_vi_nxv4i16_0(<vscale x 4 x i16> %va) {
234; CHECK-LABEL: vrsub_vi_nxv4i16_0:
235; CHECK:       # %bb.0:
236; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
237; CHECK-NEXT:    vrsub.vi v8, v8, -4
238; CHECK-NEXT:    ret
239  %head = insertelement <vscale x 4 x i16> poison, i16 -4, i32 0
240  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
241  %vc = sub <vscale x 4 x i16> %splat, %va
242  ret <vscale x 4 x i16> %vc
243}
244
245define <vscale x 8 x i16> @vrsub_vx_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b) {
246; CHECK-LABEL: vrsub_vx_nxv8i16:
247; CHECK:       # %bb.0:
248; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
249; CHECK-NEXT:    vrsub.vx v8, v8, a0
250; CHECK-NEXT:    ret
251  %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0
252  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
253  %vc = sub <vscale x 8 x i16> %splat, %va
254  ret <vscale x 8 x i16> %vc
255}
256
257define <vscale x 8 x i16> @vrsub_vi_nxv8i16_0(<vscale x 8 x i16> %va) {
258; CHECK-LABEL: vrsub_vi_nxv8i16_0:
259; CHECK:       # %bb.0:
260; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
261; CHECK-NEXT:    vrsub.vi v8, v8, -4
262; CHECK-NEXT:    ret
263  %head = insertelement <vscale x 8 x i16> poison, i16 -4, i32 0
264  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
265  %vc = sub <vscale x 8 x i16> %splat, %va
266  ret <vscale x 8 x i16> %vc
267}
268
269define <vscale x 16 x i16> @vrsub_vx_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b) {
270; CHECK-LABEL: vrsub_vx_nxv16i16:
271; CHECK:       # %bb.0:
272; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
273; CHECK-NEXT:    vrsub.vx v8, v8, a0
274; CHECK-NEXT:    ret
275  %head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0
276  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
277  %vc = sub <vscale x 16 x i16> %splat, %va
278  ret <vscale x 16 x i16> %vc
279}
280
281define <vscale x 16 x i16> @vrsub_vi_nxv16i16_0(<vscale x 16 x i16> %va) {
282; CHECK-LABEL: vrsub_vi_nxv16i16_0:
283; CHECK:       # %bb.0:
284; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
285; CHECK-NEXT:    vrsub.vi v8, v8, -4
286; CHECK-NEXT:    ret
287  %head = insertelement <vscale x 16 x i16> poison, i16 -4, i32 0
288  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
289  %vc = sub <vscale x 16 x i16> %splat, %va
290  ret <vscale x 16 x i16> %vc
291}
292
293define <vscale x 32 x i16> @vrsub_vx_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b) {
294; CHECK-LABEL: vrsub_vx_nxv32i16:
295; CHECK:       # %bb.0:
296; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
297; CHECK-NEXT:    vrsub.vx v8, v8, a0
298; CHECK-NEXT:    ret
299  %head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0
300  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
301  %vc = sub <vscale x 32 x i16> %splat, %va
302  ret <vscale x 32 x i16> %vc
303}
304
305define <vscale x 32 x i16> @vrsub_vi_nxv32i16_0(<vscale x 32 x i16> %va) {
306; CHECK-LABEL: vrsub_vi_nxv32i16_0:
307; CHECK:       # %bb.0:
308; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
309; CHECK-NEXT:    vrsub.vi v8, v8, -4
310; CHECK-NEXT:    ret
311  %head = insertelement <vscale x 32 x i16> poison, i16 -4, i32 0
312  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
313  %vc = sub <vscale x 32 x i16> %splat, %va
314  ret <vscale x 32 x i16> %vc
315}
316
317define <vscale x 1 x i32> @vrsub_vx_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b) {
318; CHECK-LABEL: vrsub_vx_nxv1i32:
319; CHECK:       # %bb.0:
320; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
321; CHECK-NEXT:    vrsub.vx v8, v8, a0
322; CHECK-NEXT:    ret
323  %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
324  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
325  %vc = sub <vscale x 1 x i32> %splat, %va
326  ret <vscale x 1 x i32> %vc
327}
328
329define <vscale x 1 x i32> @vrsub_vi_nxv1i32_0(<vscale x 1 x i32> %va) {
330; CHECK-LABEL: vrsub_vi_nxv1i32_0:
331; CHECK:       # %bb.0:
332; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
333; CHECK-NEXT:    vrsub.vi v8, v8, -4
334; CHECK-NEXT:    ret
335  %head = insertelement <vscale x 1 x i32> poison, i32 -4, i32 0
336  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
337  %vc = sub <vscale x 1 x i32> %splat, %va
338  ret <vscale x 1 x i32> %vc
339}
340
341define <vscale x 2 x i32> @vrsub_vx_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b) {
342; CHECK-LABEL: vrsub_vx_nxv2i32:
343; CHECK:       # %bb.0:
344; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
345; CHECK-NEXT:    vrsub.vx v8, v8, a0
346; CHECK-NEXT:    ret
347  %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0
348  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
349  %vc = sub <vscale x 2 x i32> %splat, %va
350  ret <vscale x 2 x i32> %vc
351}
352
353define <vscale x 2 x i32> @vrsub_vi_nxv2i32_0(<vscale x 2 x i32> %va) {
354; CHECK-LABEL: vrsub_vi_nxv2i32_0:
355; CHECK:       # %bb.0:
356; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
357; CHECK-NEXT:    vrsub.vi v8, v8, -4
358; CHECK-NEXT:    ret
359  %head = insertelement <vscale x 2 x i32> poison, i32 -4, i32 0
360  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
361  %vc = sub <vscale x 2 x i32> %splat, %va
362  ret <vscale x 2 x i32> %vc
363}
364
365define <vscale x 4 x i32> @vrsub_vx_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b) {
366; CHECK-LABEL: vrsub_vx_nxv4i32:
367; CHECK:       # %bb.0:
368; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
369; CHECK-NEXT:    vrsub.vx v8, v8, a0
370; CHECK-NEXT:    ret
371  %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0
372  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
373  %vc = sub <vscale x 4 x i32> %splat, %va
374  ret <vscale x 4 x i32> %vc
375}
376
377define <vscale x 4 x i32> @vrsub_vi_nxv4i32_0(<vscale x 4 x i32> %va) {
378; CHECK-LABEL: vrsub_vi_nxv4i32_0:
379; CHECK:       # %bb.0:
380; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
381; CHECK-NEXT:    vrsub.vi v8, v8, -4
382; CHECK-NEXT:    ret
383  %head = insertelement <vscale x 4 x i32> poison, i32 -4, i32 0
384  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
385  %vc = sub <vscale x 4 x i32> %splat, %va
386  ret <vscale x 4 x i32> %vc
387}
388
389define <vscale x 8 x i32> @vrsub_vx_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b) {
390; CHECK-LABEL: vrsub_vx_nxv8i32:
391; CHECK:       # %bb.0:
392; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
393; CHECK-NEXT:    vrsub.vx v8, v8, a0
394; CHECK-NEXT:    ret
395  %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
396  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
397  %vc = sub <vscale x 8 x i32> %splat, %va
398  ret <vscale x 8 x i32> %vc
399}
400
401define <vscale x 8 x i32> @vrsub_vi_nxv8i32_0(<vscale x 8 x i32> %va) {
402; CHECK-LABEL: vrsub_vi_nxv8i32_0:
403; CHECK:       # %bb.0:
404; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
405; CHECK-NEXT:    vrsub.vi v8, v8, -4
406; CHECK-NEXT:    ret
407  %head = insertelement <vscale x 8 x i32> poison, i32 -4, i32 0
408  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
409  %vc = sub <vscale x 8 x i32> %splat, %va
410  ret <vscale x 8 x i32> %vc
411}
412
413define <vscale x 16 x i32> @vrsub_vx_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b) {
414; CHECK-LABEL: vrsub_vx_nxv16i32:
415; CHECK:       # %bb.0:
416; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
417; CHECK-NEXT:    vrsub.vx v8, v8, a0
418; CHECK-NEXT:    ret
419  %head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0
420  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
421  %vc = sub <vscale x 16 x i32> %splat, %va
422  ret <vscale x 16 x i32> %vc
423}
424
425define <vscale x 16 x i32> @vrsub_vi_nxv16i32_0(<vscale x 16 x i32> %va) {
426; CHECK-LABEL: vrsub_vi_nxv16i32_0:
427; CHECK:       # %bb.0:
428; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
429; CHECK-NEXT:    vrsub.vi v8, v8, -4
430; CHECK-NEXT:    ret
431  %head = insertelement <vscale x 16 x i32> poison, i32 -4, i32 0
432  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
433  %vc = sub <vscale x 16 x i32> %splat, %va
434  ret <vscale x 16 x i32> %vc
435}
436
437define <vscale x 1 x i64> @vrsub_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b) {
438; RV32-LABEL: vrsub_vx_nxv1i64:
439; RV32:       # %bb.0:
440; RV32-NEXT:    addi sp, sp, -16
441; RV32-NEXT:    .cfi_def_cfa_offset 16
442; RV32-NEXT:    sw a1, 12(sp)
443; RV32-NEXT:    sw a0, 8(sp)
444; RV32-NEXT:    addi a0, sp, 8
445; RV32-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
446; RV32-NEXT:    vlse64.v v9, (a0), zero
447; RV32-NEXT:    vsub.vv v8, v9, v8
448; RV32-NEXT:    addi sp, sp, 16
449; RV32-NEXT:    ret
450;
451; RV64-LABEL: vrsub_vx_nxv1i64:
452; RV64:       # %bb.0:
453; RV64-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
454; RV64-NEXT:    vrsub.vx v8, v8, a0
455; RV64-NEXT:    ret
456  %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
457  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
458  %vc = sub <vscale x 1 x i64> %splat, %va
459  ret <vscale x 1 x i64> %vc
460}
461
462define <vscale x 1 x i64> @vrsub_vi_nxv1i64_0(<vscale x 1 x i64> %va) {
463; CHECK-LABEL: vrsub_vi_nxv1i64_0:
464; CHECK:       # %bb.0:
465; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
466; CHECK-NEXT:    vrsub.vi v8, v8, -4
467; CHECK-NEXT:    ret
468  %head = insertelement <vscale x 1 x i64> poison, i64 -4, i32 0
469  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
470  %vc = sub <vscale x 1 x i64> %splat, %va
471  ret <vscale x 1 x i64> %vc
472}
473
474define <vscale x 2 x i64> @vrsub_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b) {
475; RV32-LABEL: vrsub_vx_nxv2i64:
476; RV32:       # %bb.0:
477; RV32-NEXT:    addi sp, sp, -16
478; RV32-NEXT:    .cfi_def_cfa_offset 16
479; RV32-NEXT:    sw a1, 12(sp)
480; RV32-NEXT:    sw a0, 8(sp)
481; RV32-NEXT:    addi a0, sp, 8
482; RV32-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
483; RV32-NEXT:    vlse64.v v10, (a0), zero
484; RV32-NEXT:    vsub.vv v8, v10, v8
485; RV32-NEXT:    addi sp, sp, 16
486; RV32-NEXT:    ret
487;
488; RV64-LABEL: vrsub_vx_nxv2i64:
489; RV64:       # %bb.0:
490; RV64-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
491; RV64-NEXT:    vrsub.vx v8, v8, a0
492; RV64-NEXT:    ret
493  %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0
494  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
495  %vc = sub <vscale x 2 x i64> %splat, %va
496  ret <vscale x 2 x i64> %vc
497}
498
499define <vscale x 2 x i64> @vrsub_vi_nxv2i64_0(<vscale x 2 x i64> %va) {
500; CHECK-LABEL: vrsub_vi_nxv2i64_0:
501; CHECK:       # %bb.0:
502; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
503; CHECK-NEXT:    vrsub.vi v8, v8, -4
504; CHECK-NEXT:    ret
505  %head = insertelement <vscale x 2 x i64> poison, i64 -4, i32 0
506  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
507  %vc = sub <vscale x 2 x i64> %splat, %va
508  ret <vscale x 2 x i64> %vc
509}
510
511define <vscale x 4 x i64> @vrsub_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b) {
512; RV32-LABEL: vrsub_vx_nxv4i64:
513; RV32:       # %bb.0:
514; RV32-NEXT:    addi sp, sp, -16
515; RV32-NEXT:    .cfi_def_cfa_offset 16
516; RV32-NEXT:    sw a1, 12(sp)
517; RV32-NEXT:    sw a0, 8(sp)
518; RV32-NEXT:    addi a0, sp, 8
519; RV32-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
520; RV32-NEXT:    vlse64.v v12, (a0), zero
521; RV32-NEXT:    vsub.vv v8, v12, v8
522; RV32-NEXT:    addi sp, sp, 16
523; RV32-NEXT:    ret
524;
525; RV64-LABEL: vrsub_vx_nxv4i64:
526; RV64:       # %bb.0:
527; RV64-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
528; RV64-NEXT:    vrsub.vx v8, v8, a0
529; RV64-NEXT:    ret
530  %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0
531  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
532  %vc = sub <vscale x 4 x i64> %splat, %va
533  ret <vscale x 4 x i64> %vc
534}
535
536define <vscale x 4 x i64> @vrsub_vi_nxv4i64_0(<vscale x 4 x i64> %va) {
537; CHECK-LABEL: vrsub_vi_nxv4i64_0:
538; CHECK:       # %bb.0:
539; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
540; CHECK-NEXT:    vrsub.vi v8, v8, -4
541; CHECK-NEXT:    ret
542  %head = insertelement <vscale x 4 x i64> poison, i64 -4, i32 0
543  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
544  %vc = sub <vscale x 4 x i64> %splat, %va
545  ret <vscale x 4 x i64> %vc
546}
547
548define <vscale x 8 x i64> @vrsub_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b) {
549; RV32-LABEL: vrsub_vx_nxv8i64:
550; RV32:       # %bb.0:
551; RV32-NEXT:    addi sp, sp, -16
552; RV32-NEXT:    .cfi_def_cfa_offset 16
553; RV32-NEXT:    sw a1, 12(sp)
554; RV32-NEXT:    sw a0, 8(sp)
555; RV32-NEXT:    addi a0, sp, 8
556; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
557; RV32-NEXT:    vlse64.v v16, (a0), zero
558; RV32-NEXT:    vsub.vv v8, v16, v8
559; RV32-NEXT:    addi sp, sp, 16
560; RV32-NEXT:    ret
561;
562; RV64-LABEL: vrsub_vx_nxv8i64:
563; RV64:       # %bb.0:
564; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
565; RV64-NEXT:    vrsub.vx v8, v8, a0
566; RV64-NEXT:    ret
567  %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
568  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
569  %vc = sub <vscale x 8 x i64> %splat, %va
570  ret <vscale x 8 x i64> %vc
571}
572
573define <vscale x 8 x i64> @vrsub_vi_nxv8i64_0(<vscale x 8 x i64> %va) {
574; CHECK-LABEL: vrsub_vi_nxv8i64_0:
575; CHECK:       # %bb.0:
576; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
577; CHECK-NEXT:    vrsub.vi v8, v8, -4
578; CHECK-NEXT:    ret
579  %head = insertelement <vscale x 8 x i64> poison, i64 -4, i32 0
580  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
581  %vc = sub <vscale x 8 x i64> %splat, %va
582  ret <vscale x 8 x i64> %vc
583}
584
585