1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s 4; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s 6 7declare half @llvm.vector.reduce.fadd.nxv1f16(half, <vscale x 1 x half>) 8 9define half @vreduce_fadd_nxv1f16(<vscale x 1 x half> %v, half %s) { 10; CHECK-LABEL: vreduce_fadd_nxv1f16: 11; CHECK: # %bb.0: 12; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu 13; CHECK-NEXT: vmv.v.i v25, 0 14; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu 15; CHECK-NEXT: vfredsum.vs v25, v8, v25 16; CHECK-NEXT: vsetvli zero, zero, e16,m1,ta,mu 17; CHECK-NEXT: vfmv.f.s ft0, v25 18; CHECK-NEXT: fadd.h fa0, fa0, ft0 19; CHECK-NEXT: ret 20 %red = call reassoc half @llvm.vector.reduce.fadd.nxv1f16(half %s, <vscale x 1 x half> %v) 21 ret half %red 22} 23 24define half @vreduce_ord_fadd_nxv1f16(<vscale x 1 x half> %v, half %s) { 25; CHECK-LABEL: vreduce_ord_fadd_nxv1f16: 26; CHECK: # %bb.0: 27; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu 28; CHECK-NEXT: vfmv.v.f v25, fa0 29; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu 30; CHECK-NEXT: vfredosum.vs v25, v8, v25 31; CHECK-NEXT: vsetvli zero, zero, e16,m1,ta,mu 32; CHECK-NEXT: vfmv.f.s fa0, v25 33; CHECK-NEXT: ret 34 %red = call half @llvm.vector.reduce.fadd.nxv1f16(half %s, <vscale x 1 x half> %v) 35 ret half %red 36} 37 38declare half @llvm.vector.reduce.fadd.nxv2f16(half, <vscale x 2 x half>) 39 40define half @vreduce_fadd_nxv2f16(<vscale x 2 x half> %v, half %s) { 41; CHECK-LABEL: vreduce_fadd_nxv2f16: 42; CHECK: # %bb.0: 43; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu 44; CHECK-NEXT: vmv.v.i v25, 0 45; CHECK-NEXT: vsetvli a0, zero, e16,mf2,ta,mu 46; CHECK-NEXT: vfredsum.vs v25, v8, v25 47; CHECK-NEXT: vsetvli zero, zero, e16,m1,ta,mu 48; CHECK-NEXT: vfmv.f.s ft0, v25 49; CHECK-NEXT: fadd.h fa0, fa0, ft0 50; CHECK-NEXT: ret 51 %red = call reassoc half @llvm.vector.reduce.fadd.nxv2f16(half %s, <vscale x 2 x half> %v) 52 ret half %red 53} 54 55define half @vreduce_ord_fadd_nxv2f16(<vscale x 2 x half> %v, half %s) { 56; CHECK-LABEL: vreduce_ord_fadd_nxv2f16: 57; CHECK: # %bb.0: 58; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu 59; CHECK-NEXT: vfmv.v.f v25, fa0 60; CHECK-NEXT: vsetvli a0, zero, e16,mf2,ta,mu 61; CHECK-NEXT: vfredosum.vs v25, v8, v25 62; CHECK-NEXT: vsetvli zero, zero, e16,m1,ta,mu 63; CHECK-NEXT: vfmv.f.s fa0, v25 64; CHECK-NEXT: ret 65 %red = call half @llvm.vector.reduce.fadd.nxv2f16(half %s, <vscale x 2 x half> %v) 66 ret half %red 67} 68 69declare half @llvm.vector.reduce.fadd.nxv4f16(half, <vscale x 4 x half>) 70 71define half @vreduce_fadd_nxv4f16(<vscale x 4 x half> %v, half %s) { 72; CHECK-LABEL: vreduce_fadd_nxv4f16: 73; CHECK: # %bb.0: 74; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu 75; CHECK-NEXT: vmv.v.i v25, 0 76; CHECK-NEXT: vfredsum.vs v25, v8, v25 77; CHECK-NEXT: vfmv.f.s ft0, v25 78; CHECK-NEXT: fadd.h fa0, fa0, ft0 79; CHECK-NEXT: ret 80 %red = call reassoc half @llvm.vector.reduce.fadd.nxv4f16(half %s, <vscale x 4 x half> %v) 81 ret half %red 82} 83 84define half @vreduce_ord_fadd_nxv4f16(<vscale x 4 x half> %v, half %s) { 85; CHECK-LABEL: vreduce_ord_fadd_nxv4f16: 86; CHECK: # %bb.0: 87; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu 88; CHECK-NEXT: vfmv.v.f v25, fa0 89; CHECK-NEXT: vfredosum.vs v25, v8, v25 90; CHECK-NEXT: vfmv.f.s fa0, v25 91; CHECK-NEXT: ret 92 %red = call half @llvm.vector.reduce.fadd.nxv4f16(half %s, <vscale x 4 x half> %v) 93 ret half %red 94} 95 96declare float @llvm.vector.reduce.fadd.nxv1f32(float, <vscale x 1 x float>) 97 98define float @vreduce_fadd_nxv1f32(<vscale x 1 x float> %v, float %s) { 99; CHECK-LABEL: vreduce_fadd_nxv1f32: 100; CHECK: # %bb.0: 101; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu 102; CHECK-NEXT: vmv.v.i v25, 0 103; CHECK-NEXT: vsetvli a0, zero, e32,mf2,ta,mu 104; CHECK-NEXT: vfredsum.vs v25, v8, v25 105; CHECK-NEXT: vsetvli zero, zero, e32,m1,ta,mu 106; CHECK-NEXT: vfmv.f.s ft0, v25 107; CHECK-NEXT: fadd.s fa0, fa0, ft0 108; CHECK-NEXT: ret 109 %red = call reassoc float @llvm.vector.reduce.fadd.nxv1f32(float %s, <vscale x 1 x float> %v) 110 ret float %red 111} 112 113define float @vreduce_ord_fadd_nxv1f32(<vscale x 1 x float> %v, float %s) { 114; CHECK-LABEL: vreduce_ord_fadd_nxv1f32: 115; CHECK: # %bb.0: 116; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu 117; CHECK-NEXT: vfmv.v.f v25, fa0 118; CHECK-NEXT: vsetvli a0, zero, e32,mf2,ta,mu 119; CHECK-NEXT: vfredosum.vs v25, v8, v25 120; CHECK-NEXT: vsetvli zero, zero, e32,m1,ta,mu 121; CHECK-NEXT: vfmv.f.s fa0, v25 122; CHECK-NEXT: ret 123 %red = call float @llvm.vector.reduce.fadd.nxv1f32(float %s, <vscale x 1 x float> %v) 124 ret float %red 125} 126 127declare float @llvm.vector.reduce.fadd.nxv2f32(float, <vscale x 2 x float>) 128 129define float @vreduce_fadd_nxv2f32(<vscale x 2 x float> %v, float %s) { 130; CHECK-LABEL: vreduce_fadd_nxv2f32: 131; CHECK: # %bb.0: 132; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu 133; CHECK-NEXT: vmv.v.i v25, 0 134; CHECK-NEXT: vfredsum.vs v25, v8, v25 135; CHECK-NEXT: vfmv.f.s ft0, v25 136; CHECK-NEXT: fadd.s fa0, fa0, ft0 137; CHECK-NEXT: ret 138 %red = call reassoc float @llvm.vector.reduce.fadd.nxv2f32(float %s, <vscale x 2 x float> %v) 139 ret float %red 140} 141 142define float @vreduce_ord_fadd_nxv2f32(<vscale x 2 x float> %v, float %s) { 143; CHECK-LABEL: vreduce_ord_fadd_nxv2f32: 144; CHECK: # %bb.0: 145; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu 146; CHECK-NEXT: vfmv.v.f v25, fa0 147; CHECK-NEXT: vfredosum.vs v25, v8, v25 148; CHECK-NEXT: vfmv.f.s fa0, v25 149; CHECK-NEXT: ret 150 %red = call float @llvm.vector.reduce.fadd.nxv2f32(float %s, <vscale x 2 x float> %v) 151 ret float %red 152} 153 154declare float @llvm.vector.reduce.fadd.nxv4f32(float, <vscale x 4 x float>) 155 156define float @vreduce_fadd_nxv4f32(<vscale x 4 x float> %v, float %s) { 157; CHECK-LABEL: vreduce_fadd_nxv4f32: 158; CHECK: # %bb.0: 159; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu 160; CHECK-NEXT: vmv.v.i v25, 0 161; CHECK-NEXT: vsetvli a0, zero, e32,m2,ta,mu 162; CHECK-NEXT: vfredsum.vs v25, v8, v25 163; CHECK-NEXT: vsetvli zero, zero, e32,m1,ta,mu 164; CHECK-NEXT: vfmv.f.s ft0, v25 165; CHECK-NEXT: fadd.s fa0, fa0, ft0 166; CHECK-NEXT: ret 167 %red = call reassoc float @llvm.vector.reduce.fadd.nxv4f32(float %s, <vscale x 4 x float> %v) 168 ret float %red 169} 170 171define float @vreduce_ord_fadd_nxv4f32(<vscale x 4 x float> %v, float %s) { 172; CHECK-LABEL: vreduce_ord_fadd_nxv4f32: 173; CHECK: # %bb.0: 174; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu 175; CHECK-NEXT: vfmv.v.f v25, fa0 176; CHECK-NEXT: vsetvli a0, zero, e32,m2,ta,mu 177; CHECK-NEXT: vfredosum.vs v25, v8, v25 178; CHECK-NEXT: vsetvli zero, zero, e32,m1,ta,mu 179; CHECK-NEXT: vfmv.f.s fa0, v25 180; CHECK-NEXT: ret 181 %red = call float @llvm.vector.reduce.fadd.nxv4f32(float %s, <vscale x 4 x float> %v) 182 ret float %red 183} 184 185declare double @llvm.vector.reduce.fadd.nxv1f64(double, <vscale x 1 x double>) 186 187define double @vreduce_fadd_nxv1f64(<vscale x 1 x double> %v, double %s) { 188; CHECK-LABEL: vreduce_fadd_nxv1f64: 189; CHECK: # %bb.0: 190; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu 191; CHECK-NEXT: vmv.v.i v25, 0 192; CHECK-NEXT: vfredsum.vs v25, v8, v25 193; CHECK-NEXT: vfmv.f.s ft0, v25 194; CHECK-NEXT: fadd.d fa0, fa0, ft0 195; CHECK-NEXT: ret 196 %red = call reassoc double @llvm.vector.reduce.fadd.nxv1f64(double %s, <vscale x 1 x double> %v) 197 ret double %red 198} 199 200define double @vreduce_ord_fadd_nxv1f64(<vscale x 1 x double> %v, double %s) { 201; CHECK-LABEL: vreduce_ord_fadd_nxv1f64: 202; CHECK: # %bb.0: 203; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu 204; CHECK-NEXT: vfmv.v.f v25, fa0 205; CHECK-NEXT: vfredosum.vs v25, v8, v25 206; CHECK-NEXT: vfmv.f.s fa0, v25 207; CHECK-NEXT: ret 208 %red = call double @llvm.vector.reduce.fadd.nxv1f64(double %s, <vscale x 1 x double> %v) 209 ret double %red 210} 211 212declare double @llvm.vector.reduce.fadd.nxv2f64(double, <vscale x 2 x double>) 213 214define double @vreduce_fadd_nxv2f64(<vscale x 2 x double> %v, double %s) { 215; CHECK-LABEL: vreduce_fadd_nxv2f64: 216; CHECK: # %bb.0: 217; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu 218; CHECK-NEXT: vmv.v.i v25, 0 219; CHECK-NEXT: vsetvli a0, zero, e64,m2,ta,mu 220; CHECK-NEXT: vfredsum.vs v25, v8, v25 221; CHECK-NEXT: vsetvli zero, zero, e64,m1,ta,mu 222; CHECK-NEXT: vfmv.f.s ft0, v25 223; CHECK-NEXT: fadd.d fa0, fa0, ft0 224; CHECK-NEXT: ret 225 %red = call reassoc double @llvm.vector.reduce.fadd.nxv2f64(double %s, <vscale x 2 x double> %v) 226 ret double %red 227} 228 229define double @vreduce_ord_fadd_nxv2f64(<vscale x 2 x double> %v, double %s) { 230; CHECK-LABEL: vreduce_ord_fadd_nxv2f64: 231; CHECK: # %bb.0: 232; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu 233; CHECK-NEXT: vfmv.v.f v25, fa0 234; CHECK-NEXT: vsetvli a0, zero, e64,m2,ta,mu 235; CHECK-NEXT: vfredosum.vs v25, v8, v25 236; CHECK-NEXT: vsetvli zero, zero, e64,m1,ta,mu 237; CHECK-NEXT: vfmv.f.s fa0, v25 238; CHECK-NEXT: ret 239 %red = call double @llvm.vector.reduce.fadd.nxv2f64(double %s, <vscale x 2 x double> %v) 240 ret double %red 241} 242 243declare double @llvm.vector.reduce.fadd.nxv4f64(double, <vscale x 4 x double>) 244 245define double @vreduce_fadd_nxv4f64(<vscale x 4 x double> %v, double %s) { 246; CHECK-LABEL: vreduce_fadd_nxv4f64: 247; CHECK: # %bb.0: 248; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu 249; CHECK-NEXT: vmv.v.i v25, 0 250; CHECK-NEXT: vsetvli a0, zero, e64,m4,ta,mu 251; CHECK-NEXT: vfredsum.vs v25, v8, v25 252; CHECK-NEXT: vsetvli zero, zero, e64,m1,ta,mu 253; CHECK-NEXT: vfmv.f.s ft0, v25 254; CHECK-NEXT: fadd.d fa0, fa0, ft0 255; CHECK-NEXT: ret 256 %red = call reassoc double @llvm.vector.reduce.fadd.nxv4f64(double %s, <vscale x 4 x double> %v) 257 ret double %red 258} 259 260define double @vreduce_ord_fadd_nxv4f64(<vscale x 4 x double> %v, double %s) { 261; CHECK-LABEL: vreduce_ord_fadd_nxv4f64: 262; CHECK: # %bb.0: 263; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu 264; CHECK-NEXT: vfmv.v.f v25, fa0 265; CHECK-NEXT: vsetvli a0, zero, e64,m4,ta,mu 266; CHECK-NEXT: vfredosum.vs v25, v8, v25 267; CHECK-NEXT: vsetvli zero, zero, e64,m1,ta,mu 268; CHECK-NEXT: vfmv.f.s fa0, v25 269; CHECK-NEXT: ret 270 %red = call double @llvm.vector.reduce.fadd.nxv4f64(double %s, <vscale x 4 x double> %v) 271 ret double %red 272} 273