1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
4
5define <vscale x 1 x i8> @vor_vx_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b) {
6; CHECK-LABEL: vor_vx_nxv1i8:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
9; CHECK-NEXT:    vor.vx v8, v8, a0
10; CHECK-NEXT:    ret
11  %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
12  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
13  %vc = or <vscale x 1 x i8> %va, %splat
14  ret <vscale x 1 x i8> %vc
15}
16
17define <vscale x 1 x i8> @vor_vx_nxv1i8_0(<vscale x 1 x i8> %va) {
18; CHECK-LABEL: vor_vx_nxv1i8_0:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
21; CHECK-NEXT:    vor.vi v8, v8, -12
22; CHECK-NEXT:    ret
23  %head = insertelement <vscale x 1 x i8> poison, i8 -12, i32 0
24  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
25  %vc = or <vscale x 1 x i8> %va, %splat
26  ret <vscale x 1 x i8> %vc
27}
28
29define <vscale x 1 x i8> @vor_vx_nxv1i8_1(<vscale x 1 x i8> %va) {
30; CHECK-LABEL: vor_vx_nxv1i8_1:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
33; CHECK-NEXT:    vor.vi v8, v8, 15
34; CHECK-NEXT:    ret
35  %head = insertelement <vscale x 1 x i8> poison, i8 15, i32 0
36  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
37  %vc = or <vscale x 1 x i8> %va, %splat
38  ret <vscale x 1 x i8> %vc
39}
40
41define <vscale x 1 x i8> @vor_vx_nxv1i8_2(<vscale x 1 x i8> %va) {
42; CHECK-LABEL: vor_vx_nxv1i8_2:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    li a0, 16
45; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
46; CHECK-NEXT:    vor.vx v8, v8, a0
47; CHECK-NEXT:    ret
48  %head = insertelement <vscale x 1 x i8> poison, i8 16, i32 0
49  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
50  %vc = or <vscale x 1 x i8> %va, %splat
51  ret <vscale x 1 x i8> %vc
52}
53
54define <vscale x 2 x i8> @vor_vx_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b) {
55; CHECK-LABEL: vor_vx_nxv2i8:
56; CHECK:       # %bb.0:
57; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
58; CHECK-NEXT:    vor.vx v8, v8, a0
59; CHECK-NEXT:    ret
60  %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0
61  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
62  %vc = or <vscale x 2 x i8> %va, %splat
63  ret <vscale x 2 x i8> %vc
64}
65
66define <vscale x 2 x i8> @vor_vx_nxv2i8_0(<vscale x 2 x i8> %va) {
67; CHECK-LABEL: vor_vx_nxv2i8_0:
68; CHECK:       # %bb.0:
69; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
70; CHECK-NEXT:    vor.vi v8, v8, -12
71; CHECK-NEXT:    ret
72  %head = insertelement <vscale x 2 x i8> poison, i8 -12, i32 0
73  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
74  %vc = or <vscale x 2 x i8> %va, %splat
75  ret <vscale x 2 x i8> %vc
76}
77
78define <vscale x 2 x i8> @vor_vx_nxv2i8_1(<vscale x 2 x i8> %va) {
79; CHECK-LABEL: vor_vx_nxv2i8_1:
80; CHECK:       # %bb.0:
81; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
82; CHECK-NEXT:    vor.vi v8, v8, 15
83; CHECK-NEXT:    ret
84  %head = insertelement <vscale x 2 x i8> poison, i8 15, i32 0
85  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
86  %vc = or <vscale x 2 x i8> %va, %splat
87  ret <vscale x 2 x i8> %vc
88}
89
90define <vscale x 2 x i8> @vor_vx_nxv2i8_2(<vscale x 2 x i8> %va) {
91; CHECK-LABEL: vor_vx_nxv2i8_2:
92; CHECK:       # %bb.0:
93; CHECK-NEXT:    li a0, 16
94; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
95; CHECK-NEXT:    vor.vx v8, v8, a0
96; CHECK-NEXT:    ret
97  %head = insertelement <vscale x 2 x i8> poison, i8 16, i32 0
98  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
99  %vc = or <vscale x 2 x i8> %va, %splat
100  ret <vscale x 2 x i8> %vc
101}
102
103define <vscale x 4 x i8> @vor_vx_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b) {
104; CHECK-LABEL: vor_vx_nxv4i8:
105; CHECK:       # %bb.0:
106; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
107; CHECK-NEXT:    vor.vx v8, v8, a0
108; CHECK-NEXT:    ret
109  %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0
110  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
111  %vc = or <vscale x 4 x i8> %va, %splat
112  ret <vscale x 4 x i8> %vc
113}
114
115define <vscale x 4 x i8> @vor_vx_nxv4i8_0(<vscale x 4 x i8> %va) {
116; CHECK-LABEL: vor_vx_nxv4i8_0:
117; CHECK:       # %bb.0:
118; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
119; CHECK-NEXT:    vor.vi v8, v8, -12
120; CHECK-NEXT:    ret
121  %head = insertelement <vscale x 4 x i8> poison, i8 -12, i32 0
122  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
123  %vc = or <vscale x 4 x i8> %va, %splat
124  ret <vscale x 4 x i8> %vc
125}
126
127define <vscale x 4 x i8> @vor_vx_nxv4i8_1(<vscale x 4 x i8> %va) {
128; CHECK-LABEL: vor_vx_nxv4i8_1:
129; CHECK:       # %bb.0:
130; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
131; CHECK-NEXT:    vor.vi v8, v8, 15
132; CHECK-NEXT:    ret
133  %head = insertelement <vscale x 4 x i8> poison, i8 15, i32 0
134  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
135  %vc = or <vscale x 4 x i8> %va, %splat
136  ret <vscale x 4 x i8> %vc
137}
138
139define <vscale x 4 x i8> @vor_vx_nxv4i8_2(<vscale x 4 x i8> %va) {
140; CHECK-LABEL: vor_vx_nxv4i8_2:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    li a0, 16
143; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
144; CHECK-NEXT:    vor.vx v8, v8, a0
145; CHECK-NEXT:    ret
146  %head = insertelement <vscale x 4 x i8> poison, i8 16, i32 0
147  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
148  %vc = or <vscale x 4 x i8> %va, %splat
149  ret <vscale x 4 x i8> %vc
150}
151
152define <vscale x 8 x i8> @vor_vx_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b) {
153; CHECK-LABEL: vor_vx_nxv8i8:
154; CHECK:       # %bb.0:
155; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
156; CHECK-NEXT:    vor.vx v8, v8, a0
157; CHECK-NEXT:    ret
158  %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
159  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
160  %vc = or <vscale x 8 x i8> %va, %splat
161  ret <vscale x 8 x i8> %vc
162}
163
164define <vscale x 8 x i8> @vor_vx_nxv8i8_0(<vscale x 8 x i8> %va) {
165; CHECK-LABEL: vor_vx_nxv8i8_0:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
168; CHECK-NEXT:    vor.vi v8, v8, -12
169; CHECK-NEXT:    ret
170  %head = insertelement <vscale x 8 x i8> poison, i8 -12, i32 0
171  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
172  %vc = or <vscale x 8 x i8> %va, %splat
173  ret <vscale x 8 x i8> %vc
174}
175
176define <vscale x 8 x i8> @vor_vx_nxv8i8_1(<vscale x 8 x i8> %va) {
177; CHECK-LABEL: vor_vx_nxv8i8_1:
178; CHECK:       # %bb.0:
179; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
180; CHECK-NEXT:    vor.vi v8, v8, 15
181; CHECK-NEXT:    ret
182  %head = insertelement <vscale x 8 x i8> poison, i8 15, i32 0
183  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
184  %vc = or <vscale x 8 x i8> %va, %splat
185  ret <vscale x 8 x i8> %vc
186}
187
188define <vscale x 8 x i8> @vor_vx_nxv8i8_2(<vscale x 8 x i8> %va) {
189; CHECK-LABEL: vor_vx_nxv8i8_2:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    li a0, 16
192; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
193; CHECK-NEXT:    vor.vx v8, v8, a0
194; CHECK-NEXT:    ret
195  %head = insertelement <vscale x 8 x i8> poison, i8 16, i32 0
196  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
197  %vc = or <vscale x 8 x i8> %va, %splat
198  ret <vscale x 8 x i8> %vc
199}
200
201define <vscale x 16 x i8> @vor_vx_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b) {
202; CHECK-LABEL: vor_vx_nxv16i8:
203; CHECK:       # %bb.0:
204; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
205; CHECK-NEXT:    vor.vx v8, v8, a0
206; CHECK-NEXT:    ret
207  %head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0
208  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
209  %vc = or <vscale x 16 x i8> %va, %splat
210  ret <vscale x 16 x i8> %vc
211}
212
213define <vscale x 16 x i8> @vor_vx_nxv16i8_0(<vscale x 16 x i8> %va) {
214; CHECK-LABEL: vor_vx_nxv16i8_0:
215; CHECK:       # %bb.0:
216; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
217; CHECK-NEXT:    vor.vi v8, v8, -12
218; CHECK-NEXT:    ret
219  %head = insertelement <vscale x 16 x i8> poison, i8 -12, i32 0
220  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
221  %vc = or <vscale x 16 x i8> %va, %splat
222  ret <vscale x 16 x i8> %vc
223}
224
225define <vscale x 16 x i8> @vor_vx_nxv16i8_1(<vscale x 16 x i8> %va) {
226; CHECK-LABEL: vor_vx_nxv16i8_1:
227; CHECK:       # %bb.0:
228; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
229; CHECK-NEXT:    vor.vi v8, v8, 15
230; CHECK-NEXT:    ret
231  %head = insertelement <vscale x 16 x i8> poison, i8 15, i32 0
232  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
233  %vc = or <vscale x 16 x i8> %va, %splat
234  ret <vscale x 16 x i8> %vc
235}
236
237define <vscale x 16 x i8> @vor_vx_nxv16i8_2(<vscale x 16 x i8> %va) {
238; CHECK-LABEL: vor_vx_nxv16i8_2:
239; CHECK:       # %bb.0:
240; CHECK-NEXT:    li a0, 16
241; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
242; CHECK-NEXT:    vor.vx v8, v8, a0
243; CHECK-NEXT:    ret
244  %head = insertelement <vscale x 16 x i8> poison, i8 16, i32 0
245  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
246  %vc = or <vscale x 16 x i8> %va, %splat
247  ret <vscale x 16 x i8> %vc
248}
249
250define <vscale x 32 x i8> @vor_vx_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b) {
251; CHECK-LABEL: vor_vx_nxv32i8:
252; CHECK:       # %bb.0:
253; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
254; CHECK-NEXT:    vor.vx v8, v8, a0
255; CHECK-NEXT:    ret
256  %head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0
257  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
258  %vc = or <vscale x 32 x i8> %va, %splat
259  ret <vscale x 32 x i8> %vc
260}
261
262define <vscale x 32 x i8> @vor_vx_nxv32i8_0(<vscale x 32 x i8> %va) {
263; CHECK-LABEL: vor_vx_nxv32i8_0:
264; CHECK:       # %bb.0:
265; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
266; CHECK-NEXT:    vor.vi v8, v8, -12
267; CHECK-NEXT:    ret
268  %head = insertelement <vscale x 32 x i8> poison, i8 -12, i32 0
269  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
270  %vc = or <vscale x 32 x i8> %va, %splat
271  ret <vscale x 32 x i8> %vc
272}
273
274define <vscale x 32 x i8> @vor_vx_nxv32i8_1(<vscale x 32 x i8> %va) {
275; CHECK-LABEL: vor_vx_nxv32i8_1:
276; CHECK:       # %bb.0:
277; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
278; CHECK-NEXT:    vor.vi v8, v8, 15
279; CHECK-NEXT:    ret
280  %head = insertelement <vscale x 32 x i8> poison, i8 15, i32 0
281  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
282  %vc = or <vscale x 32 x i8> %va, %splat
283  ret <vscale x 32 x i8> %vc
284}
285
286define <vscale x 32 x i8> @vor_vx_nxv32i8_2(<vscale x 32 x i8> %va) {
287; CHECK-LABEL: vor_vx_nxv32i8_2:
288; CHECK:       # %bb.0:
289; CHECK-NEXT:    li a0, 16
290; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
291; CHECK-NEXT:    vor.vx v8, v8, a0
292; CHECK-NEXT:    ret
293  %head = insertelement <vscale x 32 x i8> poison, i8 16, i32 0
294  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
295  %vc = or <vscale x 32 x i8> %va, %splat
296  ret <vscale x 32 x i8> %vc
297}
298
299define <vscale x 64 x i8> @vor_vx_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b) {
300; CHECK-LABEL: vor_vx_nxv64i8:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
303; CHECK-NEXT:    vor.vx v8, v8, a0
304; CHECK-NEXT:    ret
305  %head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0
306  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
307  %vc = or <vscale x 64 x i8> %va, %splat
308  ret <vscale x 64 x i8> %vc
309}
310
311define <vscale x 64 x i8> @vor_vx_nxv64i8_0(<vscale x 64 x i8> %va) {
312; CHECK-LABEL: vor_vx_nxv64i8_0:
313; CHECK:       # %bb.0:
314; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
315; CHECK-NEXT:    vor.vi v8, v8, -12
316; CHECK-NEXT:    ret
317  %head = insertelement <vscale x 64 x i8> poison, i8 -12, i32 0
318  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
319  %vc = or <vscale x 64 x i8> %va, %splat
320  ret <vscale x 64 x i8> %vc
321}
322
323define <vscale x 64 x i8> @vor_vx_nxv64i8_1(<vscale x 64 x i8> %va) {
324; CHECK-LABEL: vor_vx_nxv64i8_1:
325; CHECK:       # %bb.0:
326; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
327; CHECK-NEXT:    vor.vi v8, v8, 15
328; CHECK-NEXT:    ret
329  %head = insertelement <vscale x 64 x i8> poison, i8 15, i32 0
330  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
331  %vc = or <vscale x 64 x i8> %va, %splat
332  ret <vscale x 64 x i8> %vc
333}
334
335define <vscale x 64 x i8> @vor_vx_nxv64i8_2(<vscale x 64 x i8> %va) {
336; CHECK-LABEL: vor_vx_nxv64i8_2:
337; CHECK:       # %bb.0:
338; CHECK-NEXT:    li a0, 16
339; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
340; CHECK-NEXT:    vor.vx v8, v8, a0
341; CHECK-NEXT:    ret
342  %head = insertelement <vscale x 64 x i8> poison, i8 16, i32 0
343  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
344  %vc = or <vscale x 64 x i8> %va, %splat
345  ret <vscale x 64 x i8> %vc
346}
347
348define <vscale x 1 x i16> @vor_vx_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b) {
349; CHECK-LABEL: vor_vx_nxv1i16:
350; CHECK:       # %bb.0:
351; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
352; CHECK-NEXT:    vor.vx v8, v8, a0
353; CHECK-NEXT:    ret
354  %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
355  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
356  %vc = or <vscale x 1 x i16> %va, %splat
357  ret <vscale x 1 x i16> %vc
358}
359
360define <vscale x 1 x i16> @vor_vx_nxv1i16_0(<vscale x 1 x i16> %va) {
361; CHECK-LABEL: vor_vx_nxv1i16_0:
362; CHECK:       # %bb.0:
363; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
364; CHECK-NEXT:    vor.vi v8, v8, -12
365; CHECK-NEXT:    ret
366  %head = insertelement <vscale x 1 x i16> poison, i16 -12, i32 0
367  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
368  %vc = or <vscale x 1 x i16> %va, %splat
369  ret <vscale x 1 x i16> %vc
370}
371
372define <vscale x 1 x i16> @vor_vx_nxv1i16_1(<vscale x 1 x i16> %va) {
373; CHECK-LABEL: vor_vx_nxv1i16_1:
374; CHECK:       # %bb.0:
375; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
376; CHECK-NEXT:    vor.vi v8, v8, 15
377; CHECK-NEXT:    ret
378  %head = insertelement <vscale x 1 x i16> poison, i16 15, i32 0
379  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
380  %vc = or <vscale x 1 x i16> %va, %splat
381  ret <vscale x 1 x i16> %vc
382}
383
384define <vscale x 1 x i16> @vor_vx_nxv1i16_2(<vscale x 1 x i16> %va) {
385; CHECK-LABEL: vor_vx_nxv1i16_2:
386; CHECK:       # %bb.0:
387; CHECK-NEXT:    li a0, 16
388; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
389; CHECK-NEXT:    vor.vx v8, v8, a0
390; CHECK-NEXT:    ret
391  %head = insertelement <vscale x 1 x i16> poison, i16 16, i32 0
392  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
393  %vc = or <vscale x 1 x i16> %va, %splat
394  ret <vscale x 1 x i16> %vc
395}
396
397define <vscale x 2 x i16> @vor_vx_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b) {
398; CHECK-LABEL: vor_vx_nxv2i16:
399; CHECK:       # %bb.0:
400; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
401; CHECK-NEXT:    vor.vx v8, v8, a0
402; CHECK-NEXT:    ret
403  %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0
404  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
405  %vc = or <vscale x 2 x i16> %va, %splat
406  ret <vscale x 2 x i16> %vc
407}
408
409define <vscale x 2 x i16> @vor_vx_nxv2i16_0(<vscale x 2 x i16> %va) {
410; CHECK-LABEL: vor_vx_nxv2i16_0:
411; CHECK:       # %bb.0:
412; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
413; CHECK-NEXT:    vor.vi v8, v8, -12
414; CHECK-NEXT:    ret
415  %head = insertelement <vscale x 2 x i16> poison, i16 -12, i32 0
416  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
417  %vc = or <vscale x 2 x i16> %va, %splat
418  ret <vscale x 2 x i16> %vc
419}
420
421define <vscale x 2 x i16> @vor_vx_nxv2i16_1(<vscale x 2 x i16> %va) {
422; CHECK-LABEL: vor_vx_nxv2i16_1:
423; CHECK:       # %bb.0:
424; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
425; CHECK-NEXT:    vor.vi v8, v8, 15
426; CHECK-NEXT:    ret
427  %head = insertelement <vscale x 2 x i16> poison, i16 15, i32 0
428  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
429  %vc = or <vscale x 2 x i16> %va, %splat
430  ret <vscale x 2 x i16> %vc
431}
432
433define <vscale x 2 x i16> @vor_vx_nxv2i16_2(<vscale x 2 x i16> %va) {
434; CHECK-LABEL: vor_vx_nxv2i16_2:
435; CHECK:       # %bb.0:
436; CHECK-NEXT:    li a0, 16
437; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
438; CHECK-NEXT:    vor.vx v8, v8, a0
439; CHECK-NEXT:    ret
440  %head = insertelement <vscale x 2 x i16> poison, i16 16, i32 0
441  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
442  %vc = or <vscale x 2 x i16> %va, %splat
443  ret <vscale x 2 x i16> %vc
444}
445
446define <vscale x 4 x i16> @vor_vx_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b) {
447; CHECK-LABEL: vor_vx_nxv4i16:
448; CHECK:       # %bb.0:
449; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
450; CHECK-NEXT:    vor.vx v8, v8, a0
451; CHECK-NEXT:    ret
452  %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0
453  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
454  %vc = or <vscale x 4 x i16> %va, %splat
455  ret <vscale x 4 x i16> %vc
456}
457
458define <vscale x 4 x i16> @vor_vx_nxv4i16_0(<vscale x 4 x i16> %va) {
459; CHECK-LABEL: vor_vx_nxv4i16_0:
460; CHECK:       # %bb.0:
461; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
462; CHECK-NEXT:    vor.vi v8, v8, -12
463; CHECK-NEXT:    ret
464  %head = insertelement <vscale x 4 x i16> poison, i16 -12, i32 0
465  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
466  %vc = or <vscale x 4 x i16> %va, %splat
467  ret <vscale x 4 x i16> %vc
468}
469
470define <vscale x 4 x i16> @vor_vx_nxv4i16_1(<vscale x 4 x i16> %va) {
471; CHECK-LABEL: vor_vx_nxv4i16_1:
472; CHECK:       # %bb.0:
473; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
474; CHECK-NEXT:    vor.vi v8, v8, 15
475; CHECK-NEXT:    ret
476  %head = insertelement <vscale x 4 x i16> poison, i16 15, i32 0
477  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
478  %vc = or <vscale x 4 x i16> %va, %splat
479  ret <vscale x 4 x i16> %vc
480}
481
482define <vscale x 4 x i16> @vor_vx_nxv4i16_2(<vscale x 4 x i16> %va) {
483; CHECK-LABEL: vor_vx_nxv4i16_2:
484; CHECK:       # %bb.0:
485; CHECK-NEXT:    li a0, 16
486; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
487; CHECK-NEXT:    vor.vx v8, v8, a0
488; CHECK-NEXT:    ret
489  %head = insertelement <vscale x 4 x i16> poison, i16 16, i32 0
490  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
491  %vc = or <vscale x 4 x i16> %va, %splat
492  ret <vscale x 4 x i16> %vc
493}
494
495define <vscale x 8 x i16> @vor_vx_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b) {
496; CHECK-LABEL: vor_vx_nxv8i16:
497; CHECK:       # %bb.0:
498; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
499; CHECK-NEXT:    vor.vx v8, v8, a0
500; CHECK-NEXT:    ret
501  %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0
502  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
503  %vc = or <vscale x 8 x i16> %va, %splat
504  ret <vscale x 8 x i16> %vc
505}
506
507define <vscale x 8 x i16> @vor_vx_nxv8i16_0(<vscale x 8 x i16> %va) {
508; CHECK-LABEL: vor_vx_nxv8i16_0:
509; CHECK:       # %bb.0:
510; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
511; CHECK-NEXT:    vor.vi v8, v8, -12
512; CHECK-NEXT:    ret
513  %head = insertelement <vscale x 8 x i16> poison, i16 -12, i32 0
514  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
515  %vc = or <vscale x 8 x i16> %va, %splat
516  ret <vscale x 8 x i16> %vc
517}
518
519define <vscale x 8 x i16> @vor_vx_nxv8i16_1(<vscale x 8 x i16> %va) {
520; CHECK-LABEL: vor_vx_nxv8i16_1:
521; CHECK:       # %bb.0:
522; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
523; CHECK-NEXT:    vor.vi v8, v8, 15
524; CHECK-NEXT:    ret
525  %head = insertelement <vscale x 8 x i16> poison, i16 15, i32 0
526  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
527  %vc = or <vscale x 8 x i16> %va, %splat
528  ret <vscale x 8 x i16> %vc
529}
530
531define <vscale x 8 x i16> @vor_vx_nxv8i16_2(<vscale x 8 x i16> %va) {
532; CHECK-LABEL: vor_vx_nxv8i16_2:
533; CHECK:       # %bb.0:
534; CHECK-NEXT:    li a0, 16
535; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
536; CHECK-NEXT:    vor.vx v8, v8, a0
537; CHECK-NEXT:    ret
538  %head = insertelement <vscale x 8 x i16> poison, i16 16, i32 0
539  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
540  %vc = or <vscale x 8 x i16> %va, %splat
541  ret <vscale x 8 x i16> %vc
542}
543
544define <vscale x 16 x i16> @vor_vx_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b) {
545; CHECK-LABEL: vor_vx_nxv16i16:
546; CHECK:       # %bb.0:
547; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
548; CHECK-NEXT:    vor.vx v8, v8, a0
549; CHECK-NEXT:    ret
550  %head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0
551  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
552  %vc = or <vscale x 16 x i16> %va, %splat
553  ret <vscale x 16 x i16> %vc
554}
555
556define <vscale x 16 x i16> @vor_vx_nxv16i16_0(<vscale x 16 x i16> %va) {
557; CHECK-LABEL: vor_vx_nxv16i16_0:
558; CHECK:       # %bb.0:
559; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
560; CHECK-NEXT:    vor.vi v8, v8, -12
561; CHECK-NEXT:    ret
562  %head = insertelement <vscale x 16 x i16> poison, i16 -12, i32 0
563  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
564  %vc = or <vscale x 16 x i16> %va, %splat
565  ret <vscale x 16 x i16> %vc
566}
567
568define <vscale x 16 x i16> @vor_vx_nxv16i16_1(<vscale x 16 x i16> %va) {
569; CHECK-LABEL: vor_vx_nxv16i16_1:
570; CHECK:       # %bb.0:
571; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
572; CHECK-NEXT:    vor.vi v8, v8, 15
573; CHECK-NEXT:    ret
574  %head = insertelement <vscale x 16 x i16> poison, i16 15, i32 0
575  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
576  %vc = or <vscale x 16 x i16> %va, %splat
577  ret <vscale x 16 x i16> %vc
578}
579
580define <vscale x 16 x i16> @vor_vx_nxv16i16_2(<vscale x 16 x i16> %va) {
581; CHECK-LABEL: vor_vx_nxv16i16_2:
582; CHECK:       # %bb.0:
583; CHECK-NEXT:    li a0, 16
584; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
585; CHECK-NEXT:    vor.vx v8, v8, a0
586; CHECK-NEXT:    ret
587  %head = insertelement <vscale x 16 x i16> poison, i16 16, i32 0
588  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
589  %vc = or <vscale x 16 x i16> %va, %splat
590  ret <vscale x 16 x i16> %vc
591}
592
593define <vscale x 32 x i16> @vor_vx_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b) {
594; CHECK-LABEL: vor_vx_nxv32i16:
595; CHECK:       # %bb.0:
596; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
597; CHECK-NEXT:    vor.vx v8, v8, a0
598; CHECK-NEXT:    ret
599  %head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0
600  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
601  %vc = or <vscale x 32 x i16> %va, %splat
602  ret <vscale x 32 x i16> %vc
603}
604
605define <vscale x 32 x i16> @vor_vx_nxv32i16_0(<vscale x 32 x i16> %va) {
606; CHECK-LABEL: vor_vx_nxv32i16_0:
607; CHECK:       # %bb.0:
608; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
609; CHECK-NEXT:    vor.vi v8, v8, -12
610; CHECK-NEXT:    ret
611  %head = insertelement <vscale x 32 x i16> poison, i16 -12, i32 0
612  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
613  %vc = or <vscale x 32 x i16> %va, %splat
614  ret <vscale x 32 x i16> %vc
615}
616
617define <vscale x 32 x i16> @vor_vx_nxv32i16_1(<vscale x 32 x i16> %va) {
618; CHECK-LABEL: vor_vx_nxv32i16_1:
619; CHECK:       # %bb.0:
620; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
621; CHECK-NEXT:    vor.vi v8, v8, 15
622; CHECK-NEXT:    ret
623  %head = insertelement <vscale x 32 x i16> poison, i16 15, i32 0
624  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
625  %vc = or <vscale x 32 x i16> %va, %splat
626  ret <vscale x 32 x i16> %vc
627}
628
629define <vscale x 32 x i16> @vor_vx_nxv32i16_2(<vscale x 32 x i16> %va) {
630; CHECK-LABEL: vor_vx_nxv32i16_2:
631; CHECK:       # %bb.0:
632; CHECK-NEXT:    li a0, 16
633; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
634; CHECK-NEXT:    vor.vx v8, v8, a0
635; CHECK-NEXT:    ret
636  %head = insertelement <vscale x 32 x i16> poison, i16 16, i32 0
637  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
638  %vc = or <vscale x 32 x i16> %va, %splat
639  ret <vscale x 32 x i16> %vc
640}
641
642define <vscale x 1 x i32> @vor_vx_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b) {
643; CHECK-LABEL: vor_vx_nxv1i32:
644; CHECK:       # %bb.0:
645; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
646; CHECK-NEXT:    vor.vx v8, v8, a0
647; CHECK-NEXT:    ret
648  %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
649  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
650  %vc = or <vscale x 1 x i32> %va, %splat
651  ret <vscale x 1 x i32> %vc
652}
653
654define <vscale x 1 x i32> @vor_vx_nxv1i32_0(<vscale x 1 x i32> %va) {
655; CHECK-LABEL: vor_vx_nxv1i32_0:
656; CHECK:       # %bb.0:
657; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
658; CHECK-NEXT:    vor.vi v8, v8, -12
659; CHECK-NEXT:    ret
660  %head = insertelement <vscale x 1 x i32> poison, i32 -12, i32 0
661  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
662  %vc = or <vscale x 1 x i32> %va, %splat
663  ret <vscale x 1 x i32> %vc
664}
665
666define <vscale x 1 x i32> @vor_vx_nxv1i32_1(<vscale x 1 x i32> %va) {
667; CHECK-LABEL: vor_vx_nxv1i32_1:
668; CHECK:       # %bb.0:
669; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
670; CHECK-NEXT:    vor.vi v8, v8, 15
671; CHECK-NEXT:    ret
672  %head = insertelement <vscale x 1 x i32> poison, i32 15, i32 0
673  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
674  %vc = or <vscale x 1 x i32> %va, %splat
675  ret <vscale x 1 x i32> %vc
676}
677
678define <vscale x 1 x i32> @vor_vx_nxv1i32_2(<vscale x 1 x i32> %va) {
679; CHECK-LABEL: vor_vx_nxv1i32_2:
680; CHECK:       # %bb.0:
681; CHECK-NEXT:    li a0, 16
682; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
683; CHECK-NEXT:    vor.vx v8, v8, a0
684; CHECK-NEXT:    ret
685  %head = insertelement <vscale x 1 x i32> poison, i32 16, i32 0
686  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
687  %vc = or <vscale x 1 x i32> %va, %splat
688  ret <vscale x 1 x i32> %vc
689}
690
691define <vscale x 2 x i32> @vor_vx_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b) {
692; CHECK-LABEL: vor_vx_nxv2i32:
693; CHECK:       # %bb.0:
694; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
695; CHECK-NEXT:    vor.vx v8, v8, a0
696; CHECK-NEXT:    ret
697  %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0
698  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
699  %vc = or <vscale x 2 x i32> %va, %splat
700  ret <vscale x 2 x i32> %vc
701}
702
703define <vscale x 2 x i32> @vor_vx_nxv2i32_0(<vscale x 2 x i32> %va) {
704; CHECK-LABEL: vor_vx_nxv2i32_0:
705; CHECK:       # %bb.0:
706; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
707; CHECK-NEXT:    vor.vi v8, v8, -12
708; CHECK-NEXT:    ret
709  %head = insertelement <vscale x 2 x i32> poison, i32 -12, i32 0
710  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
711  %vc = or <vscale x 2 x i32> %va, %splat
712  ret <vscale x 2 x i32> %vc
713}
714
715define <vscale x 2 x i32> @vor_vx_nxv2i32_1(<vscale x 2 x i32> %va) {
716; CHECK-LABEL: vor_vx_nxv2i32_1:
717; CHECK:       # %bb.0:
718; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
719; CHECK-NEXT:    vor.vi v8, v8, 15
720; CHECK-NEXT:    ret
721  %head = insertelement <vscale x 2 x i32> poison, i32 15, i32 0
722  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
723  %vc = or <vscale x 2 x i32> %va, %splat
724  ret <vscale x 2 x i32> %vc
725}
726
727define <vscale x 2 x i32> @vor_vx_nxv2i32_2(<vscale x 2 x i32> %va) {
728; CHECK-LABEL: vor_vx_nxv2i32_2:
729; CHECK:       # %bb.0:
730; CHECK-NEXT:    li a0, 16
731; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
732; CHECK-NEXT:    vor.vx v8, v8, a0
733; CHECK-NEXT:    ret
734  %head = insertelement <vscale x 2 x i32> poison, i32 16, i32 0
735  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
736  %vc = or <vscale x 2 x i32> %va, %splat
737  ret <vscale x 2 x i32> %vc
738}
739
740define <vscale x 4 x i32> @vor_vx_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b) {
741; CHECK-LABEL: vor_vx_nxv4i32:
742; CHECK:       # %bb.0:
743; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
744; CHECK-NEXT:    vor.vx v8, v8, a0
745; CHECK-NEXT:    ret
746  %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0
747  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
748  %vc = or <vscale x 4 x i32> %va, %splat
749  ret <vscale x 4 x i32> %vc
750}
751
752define <vscale x 4 x i32> @vor_vx_nxv4i32_0(<vscale x 4 x i32> %va) {
753; CHECK-LABEL: vor_vx_nxv4i32_0:
754; CHECK:       # %bb.0:
755; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
756; CHECK-NEXT:    vor.vi v8, v8, -12
757; CHECK-NEXT:    ret
758  %head = insertelement <vscale x 4 x i32> poison, i32 -12, i32 0
759  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
760  %vc = or <vscale x 4 x i32> %va, %splat
761  ret <vscale x 4 x i32> %vc
762}
763
764define <vscale x 4 x i32> @vor_vx_nxv4i32_1(<vscale x 4 x i32> %va) {
765; CHECK-LABEL: vor_vx_nxv4i32_1:
766; CHECK:       # %bb.0:
767; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
768; CHECK-NEXT:    vor.vi v8, v8, 15
769; CHECK-NEXT:    ret
770  %head = insertelement <vscale x 4 x i32> poison, i32 15, i32 0
771  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
772  %vc = or <vscale x 4 x i32> %va, %splat
773  ret <vscale x 4 x i32> %vc
774}
775
776define <vscale x 4 x i32> @vor_vx_nxv4i32_2(<vscale x 4 x i32> %va) {
777; CHECK-LABEL: vor_vx_nxv4i32_2:
778; CHECK:       # %bb.0:
779; CHECK-NEXT:    li a0, 16
780; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
781; CHECK-NEXT:    vor.vx v8, v8, a0
782; CHECK-NEXT:    ret
783  %head = insertelement <vscale x 4 x i32> poison, i32 16, i32 0
784  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
785  %vc = or <vscale x 4 x i32> %va, %splat
786  ret <vscale x 4 x i32> %vc
787}
788
789define <vscale x 8 x i32> @vor_vx_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b) {
790; CHECK-LABEL: vor_vx_nxv8i32:
791; CHECK:       # %bb.0:
792; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
793; CHECK-NEXT:    vor.vx v8, v8, a0
794; CHECK-NEXT:    ret
795  %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
796  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
797  %vc = or <vscale x 8 x i32> %va, %splat
798  ret <vscale x 8 x i32> %vc
799}
800
801define <vscale x 8 x i32> @vor_vx_nxv8i32_0(<vscale x 8 x i32> %va) {
802; CHECK-LABEL: vor_vx_nxv8i32_0:
803; CHECK:       # %bb.0:
804; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
805; CHECK-NEXT:    vor.vi v8, v8, -12
806; CHECK-NEXT:    ret
807  %head = insertelement <vscale x 8 x i32> poison, i32 -12, i32 0
808  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
809  %vc = or <vscale x 8 x i32> %va, %splat
810  ret <vscale x 8 x i32> %vc
811}
812
813define <vscale x 8 x i32> @vor_vx_nxv8i32_1(<vscale x 8 x i32> %va) {
814; CHECK-LABEL: vor_vx_nxv8i32_1:
815; CHECK:       # %bb.0:
816; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
817; CHECK-NEXT:    vor.vi v8, v8, 15
818; CHECK-NEXT:    ret
819  %head = insertelement <vscale x 8 x i32> poison, i32 15, i32 0
820  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
821  %vc = or <vscale x 8 x i32> %va, %splat
822  ret <vscale x 8 x i32> %vc
823}
824
825define <vscale x 8 x i32> @vor_vx_nxv8i32_2(<vscale x 8 x i32> %va) {
826; CHECK-LABEL: vor_vx_nxv8i32_2:
827; CHECK:       # %bb.0:
828; CHECK-NEXT:    li a0, 16
829; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
830; CHECK-NEXT:    vor.vx v8, v8, a0
831; CHECK-NEXT:    ret
832  %head = insertelement <vscale x 8 x i32> poison, i32 16, i32 0
833  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
834  %vc = or <vscale x 8 x i32> %va, %splat
835  ret <vscale x 8 x i32> %vc
836}
837
838define <vscale x 16 x i32> @vor_vx_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b) {
839; CHECK-LABEL: vor_vx_nxv16i32:
840; CHECK:       # %bb.0:
841; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
842; CHECK-NEXT:    vor.vx v8, v8, a0
843; CHECK-NEXT:    ret
844  %head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0
845  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
846  %vc = or <vscale x 16 x i32> %va, %splat
847  ret <vscale x 16 x i32> %vc
848}
849
850define <vscale x 16 x i32> @vor_vx_nxv16i32_0(<vscale x 16 x i32> %va) {
851; CHECK-LABEL: vor_vx_nxv16i32_0:
852; CHECK:       # %bb.0:
853; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
854; CHECK-NEXT:    vor.vi v8, v8, -12
855; CHECK-NEXT:    ret
856  %head = insertelement <vscale x 16 x i32> poison, i32 -12, i32 0
857  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
858  %vc = or <vscale x 16 x i32> %va, %splat
859  ret <vscale x 16 x i32> %vc
860}
861
862define <vscale x 16 x i32> @vor_vx_nxv16i32_1(<vscale x 16 x i32> %va) {
863; CHECK-LABEL: vor_vx_nxv16i32_1:
864; CHECK:       # %bb.0:
865; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
866; CHECK-NEXT:    vor.vi v8, v8, 15
867; CHECK-NEXT:    ret
868  %head = insertelement <vscale x 16 x i32> poison, i32 15, i32 0
869  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
870  %vc = or <vscale x 16 x i32> %va, %splat
871  ret <vscale x 16 x i32> %vc
872}
873
874define <vscale x 16 x i32> @vor_vx_nxv16i32_2(<vscale x 16 x i32> %va) {
875; CHECK-LABEL: vor_vx_nxv16i32_2:
876; CHECK:       # %bb.0:
877; CHECK-NEXT:    li a0, 16
878; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
879; CHECK-NEXT:    vor.vx v8, v8, a0
880; CHECK-NEXT:    ret
881  %head = insertelement <vscale x 16 x i32> poison, i32 16, i32 0
882  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
883  %vc = or <vscale x 16 x i32> %va, %splat
884  ret <vscale x 16 x i32> %vc
885}
886
887define <vscale x 1 x i64> @vor_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b) {
888; RV32-LABEL: vor_vx_nxv1i64:
889; RV32:       # %bb.0:
890; RV32-NEXT:    addi sp, sp, -16
891; RV32-NEXT:    .cfi_def_cfa_offset 16
892; RV32-NEXT:    sw a1, 12(sp)
893; RV32-NEXT:    sw a0, 8(sp)
894; RV32-NEXT:    addi a0, sp, 8
895; RV32-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
896; RV32-NEXT:    vlse64.v v9, (a0), zero
897; RV32-NEXT:    vor.vv v8, v8, v9
898; RV32-NEXT:    addi sp, sp, 16
899; RV32-NEXT:    ret
900;
901; RV64-LABEL: vor_vx_nxv1i64:
902; RV64:       # %bb.0:
903; RV64-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
904; RV64-NEXT:    vor.vx v8, v8, a0
905; RV64-NEXT:    ret
906  %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
907  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
908  %vc = or <vscale x 1 x i64> %va, %splat
909  ret <vscale x 1 x i64> %vc
910}
911
912define <vscale x 1 x i64> @vor_vx_nxv1i64_0(<vscale x 1 x i64> %va) {
913; CHECK-LABEL: vor_vx_nxv1i64_0:
914; CHECK:       # %bb.0:
915; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
916; CHECK-NEXT:    vor.vi v8, v8, -12
917; CHECK-NEXT:    ret
918  %head = insertelement <vscale x 1 x i64> poison, i64 -12, i32 0
919  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
920  %vc = or <vscale x 1 x i64> %va, %splat
921  ret <vscale x 1 x i64> %vc
922}
923
924define <vscale x 1 x i64> @vor_vx_nxv1i64_1(<vscale x 1 x i64> %va) {
925; CHECK-LABEL: vor_vx_nxv1i64_1:
926; CHECK:       # %bb.0:
927; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
928; CHECK-NEXT:    vor.vi v8, v8, 15
929; CHECK-NEXT:    ret
930  %head = insertelement <vscale x 1 x i64> poison, i64 15, i32 0
931  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
932  %vc = or <vscale x 1 x i64> %va, %splat
933  ret <vscale x 1 x i64> %vc
934}
935
936define <vscale x 1 x i64> @vor_vx_nxv1i64_2(<vscale x 1 x i64> %va) {
937; CHECK-LABEL: vor_vx_nxv1i64_2:
938; CHECK:       # %bb.0:
939; CHECK-NEXT:    li a0, 16
940; CHECK-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
941; CHECK-NEXT:    vor.vx v8, v8, a0
942; CHECK-NEXT:    ret
943  %head = insertelement <vscale x 1 x i64> poison, i64 16, i32 0
944  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
945  %vc = or <vscale x 1 x i64> %va, %splat
946  ret <vscale x 1 x i64> %vc
947}
948
949define <vscale x 2 x i64> @vor_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b) {
950; RV32-LABEL: vor_vx_nxv2i64:
951; RV32:       # %bb.0:
952; RV32-NEXT:    addi sp, sp, -16
953; RV32-NEXT:    .cfi_def_cfa_offset 16
954; RV32-NEXT:    sw a1, 12(sp)
955; RV32-NEXT:    sw a0, 8(sp)
956; RV32-NEXT:    addi a0, sp, 8
957; RV32-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
958; RV32-NEXT:    vlse64.v v10, (a0), zero
959; RV32-NEXT:    vor.vv v8, v8, v10
960; RV32-NEXT:    addi sp, sp, 16
961; RV32-NEXT:    ret
962;
963; RV64-LABEL: vor_vx_nxv2i64:
964; RV64:       # %bb.0:
965; RV64-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
966; RV64-NEXT:    vor.vx v8, v8, a0
967; RV64-NEXT:    ret
968  %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0
969  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
970  %vc = or <vscale x 2 x i64> %va, %splat
971  ret <vscale x 2 x i64> %vc
972}
973
974define <vscale x 2 x i64> @vor_vx_nxv2i64_0(<vscale x 2 x i64> %va) {
975; CHECK-LABEL: vor_vx_nxv2i64_0:
976; CHECK:       # %bb.0:
977; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
978; CHECK-NEXT:    vor.vi v8, v8, -12
979; CHECK-NEXT:    ret
980  %head = insertelement <vscale x 2 x i64> poison, i64 -12, i32 0
981  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
982  %vc = or <vscale x 2 x i64> %va, %splat
983  ret <vscale x 2 x i64> %vc
984}
985
986define <vscale x 2 x i64> @vor_vx_nxv2i64_1(<vscale x 2 x i64> %va) {
987; CHECK-LABEL: vor_vx_nxv2i64_1:
988; CHECK:       # %bb.0:
989; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
990; CHECK-NEXT:    vor.vi v8, v8, 15
991; CHECK-NEXT:    ret
992  %head = insertelement <vscale x 2 x i64> poison, i64 15, i32 0
993  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
994  %vc = or <vscale x 2 x i64> %va, %splat
995  ret <vscale x 2 x i64> %vc
996}
997
998define <vscale x 2 x i64> @vor_vx_nxv2i64_2(<vscale x 2 x i64> %va) {
999; CHECK-LABEL: vor_vx_nxv2i64_2:
1000; CHECK:       # %bb.0:
1001; CHECK-NEXT:    li a0, 16
1002; CHECK-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
1003; CHECK-NEXT:    vor.vx v8, v8, a0
1004; CHECK-NEXT:    ret
1005  %head = insertelement <vscale x 2 x i64> poison, i64 16, i32 0
1006  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
1007  %vc = or <vscale x 2 x i64> %va, %splat
1008  ret <vscale x 2 x i64> %vc
1009}
1010
1011define <vscale x 4 x i64> @vor_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b) {
1012; RV32-LABEL: vor_vx_nxv4i64:
1013; RV32:       # %bb.0:
1014; RV32-NEXT:    addi sp, sp, -16
1015; RV32-NEXT:    .cfi_def_cfa_offset 16
1016; RV32-NEXT:    sw a1, 12(sp)
1017; RV32-NEXT:    sw a0, 8(sp)
1018; RV32-NEXT:    addi a0, sp, 8
1019; RV32-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
1020; RV32-NEXT:    vlse64.v v12, (a0), zero
1021; RV32-NEXT:    vor.vv v8, v8, v12
1022; RV32-NEXT:    addi sp, sp, 16
1023; RV32-NEXT:    ret
1024;
1025; RV64-LABEL: vor_vx_nxv4i64:
1026; RV64:       # %bb.0:
1027; RV64-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
1028; RV64-NEXT:    vor.vx v8, v8, a0
1029; RV64-NEXT:    ret
1030  %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0
1031  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1032  %vc = or <vscale x 4 x i64> %va, %splat
1033  ret <vscale x 4 x i64> %vc
1034}
1035
1036define <vscale x 4 x i64> @vor_vx_nxv4i64_0(<vscale x 4 x i64> %va) {
1037; CHECK-LABEL: vor_vx_nxv4i64_0:
1038; CHECK:       # %bb.0:
1039; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1040; CHECK-NEXT:    vor.vi v8, v8, -12
1041; CHECK-NEXT:    ret
1042  %head = insertelement <vscale x 4 x i64> poison, i64 -12, i32 0
1043  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1044  %vc = or <vscale x 4 x i64> %va, %splat
1045  ret <vscale x 4 x i64> %vc
1046}
1047
1048define <vscale x 4 x i64> @vor_vx_nxv4i64_1(<vscale x 4 x i64> %va) {
1049; CHECK-LABEL: vor_vx_nxv4i64_1:
1050; CHECK:       # %bb.0:
1051; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1052; CHECK-NEXT:    vor.vi v8, v8, 15
1053; CHECK-NEXT:    ret
1054  %head = insertelement <vscale x 4 x i64> poison, i64 15, i32 0
1055  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1056  %vc = or <vscale x 4 x i64> %va, %splat
1057  ret <vscale x 4 x i64> %vc
1058}
1059
1060define <vscale x 4 x i64> @vor_vx_nxv4i64_2(<vscale x 4 x i64> %va) {
1061; CHECK-LABEL: vor_vx_nxv4i64_2:
1062; CHECK:       # %bb.0:
1063; CHECK-NEXT:    li a0, 16
1064; CHECK-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
1065; CHECK-NEXT:    vor.vx v8, v8, a0
1066; CHECK-NEXT:    ret
1067  %head = insertelement <vscale x 4 x i64> poison, i64 16, i32 0
1068  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
1069  %vc = or <vscale x 4 x i64> %va, %splat
1070  ret <vscale x 4 x i64> %vc
1071}
1072
1073define <vscale x 8 x i64> @vor_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b) {
1074; RV32-LABEL: vor_vx_nxv8i64:
1075; RV32:       # %bb.0:
1076; RV32-NEXT:    addi sp, sp, -16
1077; RV32-NEXT:    .cfi_def_cfa_offset 16
1078; RV32-NEXT:    sw a1, 12(sp)
1079; RV32-NEXT:    sw a0, 8(sp)
1080; RV32-NEXT:    addi a0, sp, 8
1081; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1082; RV32-NEXT:    vlse64.v v16, (a0), zero
1083; RV32-NEXT:    vor.vv v8, v8, v16
1084; RV32-NEXT:    addi sp, sp, 16
1085; RV32-NEXT:    ret
1086;
1087; RV64-LABEL: vor_vx_nxv8i64:
1088; RV64:       # %bb.0:
1089; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1090; RV64-NEXT:    vor.vx v8, v8, a0
1091; RV64-NEXT:    ret
1092  %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
1093  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1094  %vc = or <vscale x 8 x i64> %va, %splat
1095  ret <vscale x 8 x i64> %vc
1096}
1097
1098define <vscale x 8 x i64> @vor_vx_nxv8i64_0(<vscale x 8 x i64> %va) {
1099; CHECK-LABEL: vor_vx_nxv8i64_0:
1100; CHECK:       # %bb.0:
1101; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1102; CHECK-NEXT:    vor.vi v8, v8, -12
1103; CHECK-NEXT:    ret
1104  %head = insertelement <vscale x 8 x i64> poison, i64 -12, i32 0
1105  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1106  %vc = or <vscale x 8 x i64> %va, %splat
1107  ret <vscale x 8 x i64> %vc
1108}
1109
1110define <vscale x 8 x i64> @vor_vx_nxv8i64_1(<vscale x 8 x i64> %va) {
1111; CHECK-LABEL: vor_vx_nxv8i64_1:
1112; CHECK:       # %bb.0:
1113; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1114; CHECK-NEXT:    vor.vi v8, v8, 15
1115; CHECK-NEXT:    ret
1116  %head = insertelement <vscale x 8 x i64> poison, i64 15, i32 0
1117  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1118  %vc = or <vscale x 8 x i64> %va, %splat
1119  ret <vscale x 8 x i64> %vc
1120}
1121
1122define <vscale x 8 x i64> @vor_vx_nxv8i64_2(<vscale x 8 x i64> %va) {
1123; CHECK-LABEL: vor_vx_nxv8i64_2:
1124; CHECK:       # %bb.0:
1125; CHECK-NEXT:    li a0, 16
1126; CHECK-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1127; CHECK-NEXT:    vor.vx v8, v8, a0
1128; CHECK-NEXT:    ret
1129  %head = insertelement <vscale x 8 x i64> poison, i64 16, i32 0
1130  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1131  %vc = or <vscale x 8 x i64> %va, %splat
1132  ret <vscale x 8 x i64> %vc
1133}
1134
1135
1136define <vscale x 8 x i64> @vor_vx_nxv8i64_3(<vscale x 8 x i64> %va) {
1137; CHECK-LABEL: vor_vx_nxv8i64_3:
1138; CHECK:       # %bb.0:
1139; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1140; CHECK-NEXT:    vmv.v.i v8, -1
1141; CHECK-NEXT:    ret
1142  %head = insertelement <vscale x 8 x i64> poison, i64 -1, i32 0
1143  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1144  %vc = or <vscale x 8 x i64> %va, %splat
1145  ret <vscale x 8 x i64> %vc
1146}
1147
1148define <vscale x 8 x i64> @vor_xx_nxv8i64(i64 %a, i64 %b) nounwind {
1149; RV32-LABEL: vor_xx_nxv8i64:
1150; RV32:       # %bb.0:
1151; RV32-NEXT:    addi sp, sp, -16
1152; RV32-NEXT:    sw a1, 12(sp)
1153; RV32-NEXT:    sw a0, 8(sp)
1154; RV32-NEXT:    addi a0, sp, 8
1155; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1156; RV32-NEXT:    vlse64.v v8, (a0), zero
1157; RV32-NEXT:    sw a3, 12(sp)
1158; RV32-NEXT:    sw a2, 8(sp)
1159; RV32-NEXT:    vlse64.v v16, (a0), zero
1160; RV32-NEXT:    vor.vv v8, v8, v16
1161; RV32-NEXT:    addi sp, sp, 16
1162; RV32-NEXT:    ret
1163;
1164; RV64-LABEL: vor_xx_nxv8i64:
1165; RV64:       # %bb.0:
1166; RV64-NEXT:    or a0, a0, a1
1167; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1168; RV64-NEXT:    vmv.v.x v8, a0
1169; RV64-NEXT:    ret
1170  %head1 = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
1171  %splat1 = shufflevector <vscale x 8 x i64> %head1, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1172  %head2 = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
1173  %splat2 = shufflevector <vscale x 8 x i64> %head2, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1174  %v = or <vscale x 8 x i64> %splat1, %splat2
1175  ret <vscale x 8 x i64> %v
1176}
1177