1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
3; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
4
5define <vscale x 1 x i8> @vadd_vx_nxv1i8(<vscale x 1 x i8> %va, i8 signext %b) {
6; CHECK-LABEL: vadd_vx_nxv1i8:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, mu
9; CHECK-NEXT:    vadd.vx v8, v8, a0
10; CHECK-NEXT:    ret
11  %head = insertelement <vscale x 1 x i8> poison, i8 %b, i32 0
12  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
13  %vc = add <vscale x 1 x i8> %va, %splat
14  ret <vscale x 1 x i8> %vc
15}
16
17define <vscale x 1 x i8> @vadd_vx_nxv1i8_0(<vscale x 1 x i8> %va) {
18; CHECK-LABEL: vadd_vx_nxv1i8_0:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
21; CHECK-NEXT:    vadd.vi v8, v8, -1
22; CHECK-NEXT:    ret
23  %head = insertelement <vscale x 1 x i8> poison, i8 -1, i32 0
24  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
25  %vc = add <vscale x 1 x i8> %va, %splat
26  ret <vscale x 1 x i8> %vc
27}
28
29define <vscale x 1 x i8> @vadd_vx_nxv1i8_1(<vscale x 1 x i8> %va) {
30; CHECK-LABEL: vadd_vx_nxv1i8_1:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
33; CHECK-NEXT:    vadd.vi v8, v8, 2
34; CHECK-NEXT:    ret
35  %head = insertelement <vscale x 1 x i8> poison, i8 2, i32 0
36  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
37  %vc = add <vscale x 1 x i8> %va, %splat
38  ret <vscale x 1 x i8> %vc
39}
40
41; Test constant adds to see if we can optimize them away for scalable vectors.
42define <vscale x 1 x i8> @vadd_ii_nxv1i8_1() {
43; CHECK-LABEL: vadd_ii_nxv1i8_1:
44; CHECK:       # %bb.0:
45; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
46; CHECK-NEXT:    vmv.v.i v8, 5
47; CHECK-NEXT:    ret
48  %heada = insertelement <vscale x 1 x i8> poison, i8 2, i32 0
49  %splata = shufflevector <vscale x 1 x i8> %heada, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
50  %headb = insertelement <vscale x 1 x i8> poison, i8 3, i32 0
51  %splatb = shufflevector <vscale x 1 x i8> %headb, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
52  %vc = add <vscale x 1 x i8> %splata, %splatb
53  ret <vscale x 1 x i8> %vc
54}
55
56define <vscale x 2 x i8> @vadd_vx_nxv2i8(<vscale x 2 x i8> %va, i8 signext %b) {
57; CHECK-LABEL: vadd_vx_nxv2i8:
58; CHECK:       # %bb.0:
59; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
60; CHECK-NEXT:    vadd.vx v8, v8, a0
61; CHECK-NEXT:    ret
62  %head = insertelement <vscale x 2 x i8> poison, i8 %b, i32 0
63  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
64  %vc = add <vscale x 2 x i8> %va, %splat
65  ret <vscale x 2 x i8> %vc
66}
67
68define <vscale x 2 x i8> @vadd_vx_nxv2i8_0(<vscale x 2 x i8> %va) {
69; CHECK-LABEL: vadd_vx_nxv2i8_0:
70; CHECK:       # %bb.0:
71; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
72; CHECK-NEXT:    vadd.vi v8, v8, -1
73; CHECK-NEXT:    ret
74  %head = insertelement <vscale x 2 x i8> poison, i8 -1, i32 0
75  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
76  %vc = add <vscale x 2 x i8> %va, %splat
77  ret <vscale x 2 x i8> %vc
78}
79
80define <vscale x 2 x i8> @vadd_vx_nxv2i8_1(<vscale x 2 x i8> %va) {
81; CHECK-LABEL: vadd_vx_nxv2i8_1:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
84; CHECK-NEXT:    vadd.vi v8, v8, 2
85; CHECK-NEXT:    ret
86  %head = insertelement <vscale x 2 x i8> poison, i8 2, i32 0
87  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
88  %vc = add <vscale x 2 x i8> %va, %splat
89  ret <vscale x 2 x i8> %vc
90}
91
92define <vscale x 4 x i8> @vadd_vx_nxv4i8(<vscale x 4 x i8> %va, i8 signext %b) {
93; CHECK-LABEL: vadd_vx_nxv4i8:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, mu
96; CHECK-NEXT:    vadd.vx v8, v8, a0
97; CHECK-NEXT:    ret
98  %head = insertelement <vscale x 4 x i8> poison, i8 %b, i32 0
99  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
100  %vc = add <vscale x 4 x i8> %va, %splat
101  ret <vscale x 4 x i8> %vc
102}
103
104define <vscale x 4 x i8> @vadd_vx_nxv4i8_0(<vscale x 4 x i8> %va) {
105; CHECK-LABEL: vadd_vx_nxv4i8_0:
106; CHECK:       # %bb.0:
107; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
108; CHECK-NEXT:    vadd.vi v8, v8, -1
109; CHECK-NEXT:    ret
110  %head = insertelement <vscale x 4 x i8> poison, i8 -1, i32 0
111  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
112  %vc = add <vscale x 4 x i8> %va, %splat
113  ret <vscale x 4 x i8> %vc
114}
115
116define <vscale x 4 x i8> @vadd_vx_nxv4i8_1(<vscale x 4 x i8> %va) {
117; CHECK-LABEL: vadd_vx_nxv4i8_1:
118; CHECK:       # %bb.0:
119; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
120; CHECK-NEXT:    vadd.vi v8, v8, 2
121; CHECK-NEXT:    ret
122  %head = insertelement <vscale x 4 x i8> poison, i8 2, i32 0
123  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
124  %vc = add <vscale x 4 x i8> %va, %splat
125  ret <vscale x 4 x i8> %vc
126}
127
128define <vscale x 8 x i8> @vadd_vx_nxv8i8(<vscale x 8 x i8> %va, i8 signext %b) {
129; CHECK-LABEL: vadd_vx_nxv8i8:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, mu
132; CHECK-NEXT:    vadd.vx v8, v8, a0
133; CHECK-NEXT:    ret
134  %head = insertelement <vscale x 8 x i8> poison, i8 %b, i32 0
135  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
136  %vc = add <vscale x 8 x i8> %va, %splat
137  ret <vscale x 8 x i8> %vc
138}
139
140define <vscale x 8 x i8> @vadd_vx_nxv8i8_0(<vscale x 8 x i8> %va) {
141; CHECK-LABEL: vadd_vx_nxv8i8_0:
142; CHECK:       # %bb.0:
143; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
144; CHECK-NEXT:    vadd.vi v8, v8, -1
145; CHECK-NEXT:    ret
146  %head = insertelement <vscale x 8 x i8> poison, i8 -1, i32 0
147  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
148  %vc = add <vscale x 8 x i8> %va, %splat
149  ret <vscale x 8 x i8> %vc
150}
151
152define <vscale x 8 x i8> @vadd_vx_nxv8i8_1(<vscale x 8 x i8> %va) {
153; CHECK-LABEL: vadd_vx_nxv8i8_1:
154; CHECK:       # %bb.0:
155; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
156; CHECK-NEXT:    vadd.vi v8, v8, 2
157; CHECK-NEXT:    ret
158  %head = insertelement <vscale x 8 x i8> poison, i8 2, i32 0
159  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
160  %vc = add <vscale x 8 x i8> %va, %splat
161  ret <vscale x 8 x i8> %vc
162}
163
164define <vscale x 16 x i8> @vadd_vx_nxv16i8(<vscale x 16 x i8> %va, i8 signext %b) {
165; CHECK-LABEL: vadd_vx_nxv16i8:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, mu
168; CHECK-NEXT:    vadd.vx v8, v8, a0
169; CHECK-NEXT:    ret
170  %head = insertelement <vscale x 16 x i8> poison, i8 %b, i32 0
171  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
172  %vc = add <vscale x 16 x i8> %va, %splat
173  ret <vscale x 16 x i8> %vc
174}
175
176define <vscale x 16 x i8> @vadd_vx_nxv16i8_0(<vscale x 16 x i8> %va) {
177; CHECK-LABEL: vadd_vx_nxv16i8_0:
178; CHECK:       # %bb.0:
179; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
180; CHECK-NEXT:    vadd.vi v8, v8, -1
181; CHECK-NEXT:    ret
182  %head = insertelement <vscale x 16 x i8> poison, i8 -1, i32 0
183  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
184  %vc = add <vscale x 16 x i8> %va, %splat
185  ret <vscale x 16 x i8> %vc
186}
187
188define <vscale x 16 x i8> @vadd_vx_nxv16i8_1(<vscale x 16 x i8> %va) {
189; CHECK-LABEL: vadd_vx_nxv16i8_1:
190; CHECK:       # %bb.0:
191; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, mu
192; CHECK-NEXT:    vadd.vi v8, v8, 2
193; CHECK-NEXT:    ret
194  %head = insertelement <vscale x 16 x i8> poison, i8 2, i32 0
195  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
196  %vc = add <vscale x 16 x i8> %va, %splat
197  ret <vscale x 16 x i8> %vc
198}
199
200define <vscale x 32 x i8> @vadd_vx_nxv32i8(<vscale x 32 x i8> %va, i8 signext %b) {
201; CHECK-LABEL: vadd_vx_nxv32i8:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, mu
204; CHECK-NEXT:    vadd.vx v8, v8, a0
205; CHECK-NEXT:    ret
206  %head = insertelement <vscale x 32 x i8> poison, i8 %b, i32 0
207  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
208  %vc = add <vscale x 32 x i8> %va, %splat
209  ret <vscale x 32 x i8> %vc
210}
211
212define <vscale x 32 x i8> @vadd_vx_nxv32i8_0(<vscale x 32 x i8> %va) {
213; CHECK-LABEL: vadd_vx_nxv32i8_0:
214; CHECK:       # %bb.0:
215; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
216; CHECK-NEXT:    vadd.vi v8, v8, -1
217; CHECK-NEXT:    ret
218  %head = insertelement <vscale x 32 x i8> poison, i8 -1, i32 0
219  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
220  %vc = add <vscale x 32 x i8> %va, %splat
221  ret <vscale x 32 x i8> %vc
222}
223
224define <vscale x 32 x i8> @vadd_vx_nxv32i8_1(<vscale x 32 x i8> %va) {
225; CHECK-LABEL: vadd_vx_nxv32i8_1:
226; CHECK:       # %bb.0:
227; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, mu
228; CHECK-NEXT:    vadd.vi v8, v8, 2
229; CHECK-NEXT:    ret
230  %head = insertelement <vscale x 32 x i8> poison, i8 2, i32 0
231  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
232  %vc = add <vscale x 32 x i8> %va, %splat
233  ret <vscale x 32 x i8> %vc
234}
235
236define <vscale x 64 x i8> @vadd_vx_nxv64i8(<vscale x 64 x i8> %va, i8 signext %b) {
237; CHECK-LABEL: vadd_vx_nxv64i8:
238; CHECK:       # %bb.0:
239; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, mu
240; CHECK-NEXT:    vadd.vx v8, v8, a0
241; CHECK-NEXT:    ret
242  %head = insertelement <vscale x 64 x i8> poison, i8 %b, i32 0
243  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
244  %vc = add <vscale x 64 x i8> %va, %splat
245  ret <vscale x 64 x i8> %vc
246}
247
248define <vscale x 64 x i8> @vadd_vx_nxv64i8_0(<vscale x 64 x i8> %va) {
249; CHECK-LABEL: vadd_vx_nxv64i8_0:
250; CHECK:       # %bb.0:
251; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
252; CHECK-NEXT:    vadd.vi v8, v8, -1
253; CHECK-NEXT:    ret
254  %head = insertelement <vscale x 64 x i8> poison, i8 -1, i32 0
255  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
256  %vc = add <vscale x 64 x i8> %va, %splat
257  ret <vscale x 64 x i8> %vc
258}
259
260define <vscale x 64 x i8> @vadd_vx_nxv64i8_1(<vscale x 64 x i8> %va) {
261; CHECK-LABEL: vadd_vx_nxv64i8_1:
262; CHECK:       # %bb.0:
263; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, mu
264; CHECK-NEXT:    vadd.vi v8, v8, 2
265; CHECK-NEXT:    ret
266  %head = insertelement <vscale x 64 x i8> poison, i8 2, i32 0
267  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
268  %vc = add <vscale x 64 x i8> %va, %splat
269  ret <vscale x 64 x i8> %vc
270}
271
272define <vscale x 1 x i16> @vadd_vx_nxv1i16(<vscale x 1 x i16> %va, i16 signext %b) {
273; CHECK-LABEL: vadd_vx_nxv1i16:
274; CHECK:       # %bb.0:
275; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, mu
276; CHECK-NEXT:    vadd.vx v8, v8, a0
277; CHECK-NEXT:    ret
278  %head = insertelement <vscale x 1 x i16> poison, i16 %b, i32 0
279  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
280  %vc = add <vscale x 1 x i16> %va, %splat
281  ret <vscale x 1 x i16> %vc
282}
283
284define <vscale x 1 x i16> @vadd_vx_nxv1i16_0(<vscale x 1 x i16> %va) {
285; CHECK-LABEL: vadd_vx_nxv1i16_0:
286; CHECK:       # %bb.0:
287; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
288; CHECK-NEXT:    vadd.vi v8, v8, -1
289; CHECK-NEXT:    ret
290  %head = insertelement <vscale x 1 x i16> poison, i16 -1, i32 0
291  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
292  %vc = add <vscale x 1 x i16> %va, %splat
293  ret <vscale x 1 x i16> %vc
294}
295
296define <vscale x 1 x i16> @vadd_vx_nxv1i16_1(<vscale x 1 x i16> %va) {
297; CHECK-LABEL: vadd_vx_nxv1i16_1:
298; CHECK:       # %bb.0:
299; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
300; CHECK-NEXT:    vadd.vi v8, v8, 2
301; CHECK-NEXT:    ret
302  %head = insertelement <vscale x 1 x i16> poison, i16 2, i32 0
303  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
304  %vc = add <vscale x 1 x i16> %va, %splat
305  ret <vscale x 1 x i16> %vc
306}
307
308define <vscale x 2 x i16> @vadd_vx_nxv2i16(<vscale x 2 x i16> %va, i16 signext %b) {
309; CHECK-LABEL: vadd_vx_nxv2i16:
310; CHECK:       # %bb.0:
311; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
312; CHECK-NEXT:    vadd.vx v8, v8, a0
313; CHECK-NEXT:    ret
314  %head = insertelement <vscale x 2 x i16> poison, i16 %b, i32 0
315  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
316  %vc = add <vscale x 2 x i16> %va, %splat
317  ret <vscale x 2 x i16> %vc
318}
319
320define <vscale x 2 x i16> @vadd_vx_nxv2i16_0(<vscale x 2 x i16> %va) {
321; CHECK-LABEL: vadd_vx_nxv2i16_0:
322; CHECK:       # %bb.0:
323; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
324; CHECK-NEXT:    vadd.vi v8, v8, -1
325; CHECK-NEXT:    ret
326  %head = insertelement <vscale x 2 x i16> poison, i16 -1, i32 0
327  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
328  %vc = add <vscale x 2 x i16> %va, %splat
329  ret <vscale x 2 x i16> %vc
330}
331
332define <vscale x 2 x i16> @vadd_vx_nxv2i16_1(<vscale x 2 x i16> %va) {
333; CHECK-LABEL: vadd_vx_nxv2i16_1:
334; CHECK:       # %bb.0:
335; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
336; CHECK-NEXT:    vadd.vi v8, v8, 2
337; CHECK-NEXT:    ret
338  %head = insertelement <vscale x 2 x i16> poison, i16 2, i32 0
339  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
340  %vc = add <vscale x 2 x i16> %va, %splat
341  ret <vscale x 2 x i16> %vc
342}
343
344define <vscale x 4 x i16> @vadd_vx_nxv4i16(<vscale x 4 x i16> %va, i16 signext %b) {
345; CHECK-LABEL: vadd_vx_nxv4i16:
346; CHECK:       # %bb.0:
347; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, mu
348; CHECK-NEXT:    vadd.vx v8, v8, a0
349; CHECK-NEXT:    ret
350  %head = insertelement <vscale x 4 x i16> poison, i16 %b, i32 0
351  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
352  %vc = add <vscale x 4 x i16> %va, %splat
353  ret <vscale x 4 x i16> %vc
354}
355
356define <vscale x 4 x i16> @vadd_vx_nxv4i16_0(<vscale x 4 x i16> %va) {
357; CHECK-LABEL: vadd_vx_nxv4i16_0:
358; CHECK:       # %bb.0:
359; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
360; CHECK-NEXT:    vadd.vi v8, v8, -1
361; CHECK-NEXT:    ret
362  %head = insertelement <vscale x 4 x i16> poison, i16 -1, i32 0
363  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
364  %vc = add <vscale x 4 x i16> %va, %splat
365  ret <vscale x 4 x i16> %vc
366}
367
368define <vscale x 4 x i16> @vadd_vx_nxv4i16_1(<vscale x 4 x i16> %va) {
369; CHECK-LABEL: vadd_vx_nxv4i16_1:
370; CHECK:       # %bb.0:
371; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
372; CHECK-NEXT:    vadd.vi v8, v8, 2
373; CHECK-NEXT:    ret
374  %head = insertelement <vscale x 4 x i16> poison, i16 2, i32 0
375  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
376  %vc = add <vscale x 4 x i16> %va, %splat
377  ret <vscale x 4 x i16> %vc
378}
379
380define <vscale x 8 x i16> @vadd_vx_nxv8i16(<vscale x 8 x i16> %va, i16 signext %b) {
381; CHECK-LABEL: vadd_vx_nxv8i16:
382; CHECK:       # %bb.0:
383; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, mu
384; CHECK-NEXT:    vadd.vx v8, v8, a0
385; CHECK-NEXT:    ret
386  %head = insertelement <vscale x 8 x i16> poison, i16 %b, i32 0
387  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
388  %vc = add <vscale x 8 x i16> %va, %splat
389  ret <vscale x 8 x i16> %vc
390}
391
392define <vscale x 8 x i16> @vadd_vx_nxv8i16_0(<vscale x 8 x i16> %va) {
393; CHECK-LABEL: vadd_vx_nxv8i16_0:
394; CHECK:       # %bb.0:
395; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
396; CHECK-NEXT:    vadd.vi v8, v8, -1
397; CHECK-NEXT:    ret
398  %head = insertelement <vscale x 8 x i16> poison, i16 -1, i32 0
399  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
400  %vc = add <vscale x 8 x i16> %va, %splat
401  ret <vscale x 8 x i16> %vc
402}
403
404define <vscale x 8 x i16> @vadd_vx_nxv8i16_1(<vscale x 8 x i16> %va) {
405; CHECK-LABEL: vadd_vx_nxv8i16_1:
406; CHECK:       # %bb.0:
407; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
408; CHECK-NEXT:    vadd.vi v8, v8, 2
409; CHECK-NEXT:    ret
410  %head = insertelement <vscale x 8 x i16> poison, i16 2, i32 0
411  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
412  %vc = add <vscale x 8 x i16> %va, %splat
413  ret <vscale x 8 x i16> %vc
414}
415
416define <vscale x 16 x i16> @vadd_vx_nxv16i16(<vscale x 16 x i16> %va, i16 signext %b) {
417; CHECK-LABEL: vadd_vx_nxv16i16:
418; CHECK:       # %bb.0:
419; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, mu
420; CHECK-NEXT:    vadd.vx v8, v8, a0
421; CHECK-NEXT:    ret
422  %head = insertelement <vscale x 16 x i16> poison, i16 %b, i32 0
423  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
424  %vc = add <vscale x 16 x i16> %va, %splat
425  ret <vscale x 16 x i16> %vc
426}
427
428define <vscale x 16 x i16> @vadd_vx_nxv16i16_0(<vscale x 16 x i16> %va) {
429; CHECK-LABEL: vadd_vx_nxv16i16_0:
430; CHECK:       # %bb.0:
431; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
432; CHECK-NEXT:    vadd.vi v8, v8, -1
433; CHECK-NEXT:    ret
434  %head = insertelement <vscale x 16 x i16> poison, i16 -1, i32 0
435  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
436  %vc = add <vscale x 16 x i16> %va, %splat
437  ret <vscale x 16 x i16> %vc
438}
439
440define <vscale x 16 x i16> @vadd_vx_nxv16i16_1(<vscale x 16 x i16> %va) {
441; CHECK-LABEL: vadd_vx_nxv16i16_1:
442; CHECK:       # %bb.0:
443; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, mu
444; CHECK-NEXT:    vadd.vi v8, v8, 2
445; CHECK-NEXT:    ret
446  %head = insertelement <vscale x 16 x i16> poison, i16 2, i32 0
447  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
448  %vc = add <vscale x 16 x i16> %va, %splat
449  ret <vscale x 16 x i16> %vc
450}
451
452define <vscale x 32 x i16> @vadd_vx_nxv32i16(<vscale x 32 x i16> %va, i16 signext %b) {
453; CHECK-LABEL: vadd_vx_nxv32i16:
454; CHECK:       # %bb.0:
455; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, mu
456; CHECK-NEXT:    vadd.vx v8, v8, a0
457; CHECK-NEXT:    ret
458  %head = insertelement <vscale x 32 x i16> poison, i16 %b, i32 0
459  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
460  %vc = add <vscale x 32 x i16> %va, %splat
461  ret <vscale x 32 x i16> %vc
462}
463
464define <vscale x 32 x i16> @vadd_vx_nxv32i16_0(<vscale x 32 x i16> %va) {
465; CHECK-LABEL: vadd_vx_nxv32i16_0:
466; CHECK:       # %bb.0:
467; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
468; CHECK-NEXT:    vadd.vi v8, v8, -1
469; CHECK-NEXT:    ret
470  %head = insertelement <vscale x 32 x i16> poison, i16 -1, i32 0
471  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
472  %vc = add <vscale x 32 x i16> %va, %splat
473  ret <vscale x 32 x i16> %vc
474}
475
476define <vscale x 32 x i16> @vadd_vx_nxv32i16_1(<vscale x 32 x i16> %va) {
477; CHECK-LABEL: vadd_vx_nxv32i16_1:
478; CHECK:       # %bb.0:
479; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, mu
480; CHECK-NEXT:    vadd.vi v8, v8, 2
481; CHECK-NEXT:    ret
482  %head = insertelement <vscale x 32 x i16> poison, i16 2, i32 0
483  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
484  %vc = add <vscale x 32 x i16> %va, %splat
485  ret <vscale x 32 x i16> %vc
486}
487
488define <vscale x 1 x i32> @vadd_vx_nxv1i32(<vscale x 1 x i32> %va, i32 signext %b) {
489; CHECK-LABEL: vadd_vx_nxv1i32:
490; CHECK:       # %bb.0:
491; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, mu
492; CHECK-NEXT:    vadd.vx v8, v8, a0
493; CHECK-NEXT:    ret
494  %head = insertelement <vscale x 1 x i32> poison, i32 %b, i32 0
495  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
496  %vc = add <vscale x 1 x i32> %va, %splat
497  ret <vscale x 1 x i32> %vc
498}
499
500define <vscale x 1 x i32> @vadd_vx_nxv1i32_0(<vscale x 1 x i32> %va) {
501; CHECK-LABEL: vadd_vx_nxv1i32_0:
502; CHECK:       # %bb.0:
503; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
504; CHECK-NEXT:    vadd.vi v8, v8, -1
505; CHECK-NEXT:    ret
506  %head = insertelement <vscale x 1 x i32> poison, i32 -1, i32 0
507  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
508  %vc = add <vscale x 1 x i32> %va, %splat
509  ret <vscale x 1 x i32> %vc
510}
511
512define <vscale x 1 x i32> @vadd_vx_nxv1i32_1(<vscale x 1 x i32> %va) {
513; CHECK-LABEL: vadd_vx_nxv1i32_1:
514; CHECK:       # %bb.0:
515; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
516; CHECK-NEXT:    vadd.vi v8, v8, 2
517; CHECK-NEXT:    ret
518  %head = insertelement <vscale x 1 x i32> poison, i32 2, i32 0
519  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
520  %vc = add <vscale x 1 x i32> %va, %splat
521  ret <vscale x 1 x i32> %vc
522}
523
524define <vscale x 2 x i32> @vadd_vx_nxv2i32(<vscale x 2 x i32> %va, i32 signext %b) {
525; CHECK-LABEL: vadd_vx_nxv2i32:
526; CHECK:       # %bb.0:
527; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
528; CHECK-NEXT:    vadd.vx v8, v8, a0
529; CHECK-NEXT:    ret
530  %head = insertelement <vscale x 2 x i32> poison, i32 %b, i32 0
531  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
532  %vc = add <vscale x 2 x i32> %va, %splat
533  ret <vscale x 2 x i32> %vc
534}
535
536define <vscale x 2 x i32> @vadd_vx_nxv2i32_0(<vscale x 2 x i32> %va) {
537; CHECK-LABEL: vadd_vx_nxv2i32_0:
538; CHECK:       # %bb.0:
539; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
540; CHECK-NEXT:    vadd.vi v8, v8, -1
541; CHECK-NEXT:    ret
542  %head = insertelement <vscale x 2 x i32> poison, i32 -1, i32 0
543  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
544  %vc = add <vscale x 2 x i32> %va, %splat
545  ret <vscale x 2 x i32> %vc
546}
547
548define <vscale x 2 x i32> @vadd_vx_nxv2i32_1(<vscale x 2 x i32> %va) {
549; CHECK-LABEL: vadd_vx_nxv2i32_1:
550; CHECK:       # %bb.0:
551; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
552; CHECK-NEXT:    vadd.vi v8, v8, 2
553; CHECK-NEXT:    ret
554  %head = insertelement <vscale x 2 x i32> poison, i32 2, i32 0
555  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
556  %vc = add <vscale x 2 x i32> %va, %splat
557  ret <vscale x 2 x i32> %vc
558}
559
560define <vscale x 4 x i32> @vadd_vx_nxv4i32(<vscale x 4 x i32> %va, i32 signext %b) {
561; CHECK-LABEL: vadd_vx_nxv4i32:
562; CHECK:       # %bb.0:
563; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, mu
564; CHECK-NEXT:    vadd.vx v8, v8, a0
565; CHECK-NEXT:    ret
566  %head = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0
567  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
568  %vc = add <vscale x 4 x i32> %va, %splat
569  ret <vscale x 4 x i32> %vc
570}
571
572define <vscale x 4 x i32> @vadd_vx_nxv4i32_0(<vscale x 4 x i32> %va) {
573; CHECK-LABEL: vadd_vx_nxv4i32_0:
574; CHECK:       # %bb.0:
575; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
576; CHECK-NEXT:    vadd.vi v8, v8, -1
577; CHECK-NEXT:    ret
578  %head = insertelement <vscale x 4 x i32> poison, i32 -1, i32 0
579  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
580  %vc = add <vscale x 4 x i32> %va, %splat
581  ret <vscale x 4 x i32> %vc
582}
583
584define <vscale x 4 x i32> @vadd_vx_nxv4i32_1(<vscale x 4 x i32> %va) {
585; CHECK-LABEL: vadd_vx_nxv4i32_1:
586; CHECK:       # %bb.0:
587; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
588; CHECK-NEXT:    vadd.vi v8, v8, 2
589; CHECK-NEXT:    ret
590  %head = insertelement <vscale x 4 x i32> poison, i32 2, i32 0
591  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
592  %vc = add <vscale x 4 x i32> %va, %splat
593  ret <vscale x 4 x i32> %vc
594}
595
596define <vscale x 8 x i32> @vadd_vx_nxv8i32(<vscale x 8 x i32> %va, i32 signext %b) {
597; CHECK-LABEL: vadd_vx_nxv8i32:
598; CHECK:       # %bb.0:
599; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
600; CHECK-NEXT:    vadd.vx v8, v8, a0
601; CHECK-NEXT:    ret
602  %head = insertelement <vscale x 8 x i32> poison, i32 %b, i32 0
603  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
604  %vc = add <vscale x 8 x i32> %va, %splat
605  ret <vscale x 8 x i32> %vc
606}
607
608define <vscale x 8 x i32> @vadd_vx_nxv8i32_0(<vscale x 8 x i32> %va) {
609; CHECK-LABEL: vadd_vx_nxv8i32_0:
610; CHECK:       # %bb.0:
611; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
612; CHECK-NEXT:    vadd.vi v8, v8, -1
613; CHECK-NEXT:    ret
614  %head = insertelement <vscale x 8 x i32> poison, i32 -1, i32 0
615  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
616  %vc = add <vscale x 8 x i32> %va, %splat
617  ret <vscale x 8 x i32> %vc
618}
619
620define <vscale x 8 x i32> @vadd_vx_nxv8i32_1(<vscale x 8 x i32> %va) {
621; CHECK-LABEL: vadd_vx_nxv8i32_1:
622; CHECK:       # %bb.0:
623; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
624; CHECK-NEXT:    vadd.vi v8, v8, 2
625; CHECK-NEXT:    ret
626  %head = insertelement <vscale x 8 x i32> poison, i32 2, i32 0
627  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
628  %vc = add <vscale x 8 x i32> %va, %splat
629  ret <vscale x 8 x i32> %vc
630}
631
632define <vscale x 16 x i32> @vadd_vx_nxv16i32(<vscale x 16 x i32> %va, i32 signext %b) {
633; CHECK-LABEL: vadd_vx_nxv16i32:
634; CHECK:       # %bb.0:
635; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
636; CHECK-NEXT:    vadd.vx v8, v8, a0
637; CHECK-NEXT:    ret
638  %head = insertelement <vscale x 16 x i32> poison, i32 %b, i32 0
639  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
640  %vc = add <vscale x 16 x i32> %va, %splat
641  ret <vscale x 16 x i32> %vc
642}
643
644define <vscale x 16 x i32> @vadd_vx_nxv16i32_0(<vscale x 16 x i32> %va) {
645; CHECK-LABEL: vadd_vx_nxv16i32_0:
646; CHECK:       # %bb.0:
647; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
648; CHECK-NEXT:    vadd.vi v8, v8, -1
649; CHECK-NEXT:    ret
650  %head = insertelement <vscale x 16 x i32> poison, i32 -1, i32 0
651  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
652  %vc = add <vscale x 16 x i32> %va, %splat
653  ret <vscale x 16 x i32> %vc
654}
655
656define <vscale x 16 x i32> @vadd_vx_nxv16i32_1(<vscale x 16 x i32> %va) {
657; CHECK-LABEL: vadd_vx_nxv16i32_1:
658; CHECK:       # %bb.0:
659; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, mu
660; CHECK-NEXT:    vadd.vi v8, v8, 2
661; CHECK-NEXT:    ret
662  %head = insertelement <vscale x 16 x i32> poison, i32 2, i32 0
663  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
664  %vc = add <vscale x 16 x i32> %va, %splat
665  ret <vscale x 16 x i32> %vc
666}
667
668define <vscale x 1 x i64> @vadd_vx_nxv1i64(<vscale x 1 x i64> %va, i64 %b) {
669; RV32-LABEL: vadd_vx_nxv1i64:
670; RV32:       # %bb.0:
671; RV32-NEXT:    addi sp, sp, -16
672; RV32-NEXT:    .cfi_def_cfa_offset 16
673; RV32-NEXT:    sw a1, 12(sp)
674; RV32-NEXT:    sw a0, 8(sp)
675; RV32-NEXT:    addi a0, sp, 8
676; RV32-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
677; RV32-NEXT:    vlse64.v v9, (a0), zero
678; RV32-NEXT:    vadd.vv v8, v8, v9
679; RV32-NEXT:    addi sp, sp, 16
680; RV32-NEXT:    ret
681;
682; RV64-LABEL: vadd_vx_nxv1i64:
683; RV64:       # %bb.0:
684; RV64-NEXT:    vsetvli a1, zero, e64, m1, ta, mu
685; RV64-NEXT:    vadd.vx v8, v8, a0
686; RV64-NEXT:    ret
687  %head = insertelement <vscale x 1 x i64> poison, i64 %b, i32 0
688  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
689  %vc = add <vscale x 1 x i64> %va, %splat
690  ret <vscale x 1 x i64> %vc
691}
692
693define <vscale x 1 x i64> @vadd_vx_nxv1i64_0(<vscale x 1 x i64> %va) {
694; CHECK-LABEL: vadd_vx_nxv1i64_0:
695; CHECK:       # %bb.0:
696; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
697; CHECK-NEXT:    vadd.vi v8, v8, -1
698; CHECK-NEXT:    ret
699  %head = insertelement <vscale x 1 x i64> poison, i64 -1, i32 0
700  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
701  %vc = add <vscale x 1 x i64> %va, %splat
702  ret <vscale x 1 x i64> %vc
703}
704
705define <vscale x 1 x i64> @vadd_vx_nxv1i64_1(<vscale x 1 x i64> %va) {
706; CHECK-LABEL: vadd_vx_nxv1i64_1:
707; CHECK:       # %bb.0:
708; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
709; CHECK-NEXT:    vadd.vi v8, v8, 2
710; CHECK-NEXT:    ret
711  %head = insertelement <vscale x 1 x i64> poison, i64 2, i32 0
712  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
713  %vc = add <vscale x 1 x i64> %va, %splat
714  ret <vscale x 1 x i64> %vc
715}
716
717define <vscale x 2 x i64> @vadd_vx_nxv2i64(<vscale x 2 x i64> %va, i64 %b) {
718; RV32-LABEL: vadd_vx_nxv2i64:
719; RV32:       # %bb.0:
720; RV32-NEXT:    addi sp, sp, -16
721; RV32-NEXT:    .cfi_def_cfa_offset 16
722; RV32-NEXT:    sw a1, 12(sp)
723; RV32-NEXT:    sw a0, 8(sp)
724; RV32-NEXT:    addi a0, sp, 8
725; RV32-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
726; RV32-NEXT:    vlse64.v v10, (a0), zero
727; RV32-NEXT:    vadd.vv v8, v8, v10
728; RV32-NEXT:    addi sp, sp, 16
729; RV32-NEXT:    ret
730;
731; RV64-LABEL: vadd_vx_nxv2i64:
732; RV64:       # %bb.0:
733; RV64-NEXT:    vsetvli a1, zero, e64, m2, ta, mu
734; RV64-NEXT:    vadd.vx v8, v8, a0
735; RV64-NEXT:    ret
736  %head = insertelement <vscale x 2 x i64> poison, i64 %b, i32 0
737  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
738  %vc = add <vscale x 2 x i64> %va, %splat
739  ret <vscale x 2 x i64> %vc
740}
741
742define <vscale x 2 x i64> @vadd_vx_nxv2i64_0(<vscale x 2 x i64> %va) {
743; CHECK-LABEL: vadd_vx_nxv2i64_0:
744; CHECK:       # %bb.0:
745; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
746; CHECK-NEXT:    vadd.vi v8, v8, -1
747; CHECK-NEXT:    ret
748  %head = insertelement <vscale x 2 x i64> poison, i64 -1, i32 0
749  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
750  %vc = add <vscale x 2 x i64> %va, %splat
751  ret <vscale x 2 x i64> %vc
752}
753
754define <vscale x 2 x i64> @vadd_vx_nxv2i64_1(<vscale x 2 x i64> %va) {
755; CHECK-LABEL: vadd_vx_nxv2i64_1:
756; CHECK:       # %bb.0:
757; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
758; CHECK-NEXT:    vadd.vi v8, v8, 2
759; CHECK-NEXT:    ret
760  %head = insertelement <vscale x 2 x i64> poison, i64 2, i32 0
761  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
762  %vc = add <vscale x 2 x i64> %va, %splat
763  ret <vscale x 2 x i64> %vc
764}
765
766define <vscale x 4 x i64> @vadd_vx_nxv4i64(<vscale x 4 x i64> %va, i64 %b) {
767; RV32-LABEL: vadd_vx_nxv4i64:
768; RV32:       # %bb.0:
769; RV32-NEXT:    addi sp, sp, -16
770; RV32-NEXT:    .cfi_def_cfa_offset 16
771; RV32-NEXT:    sw a1, 12(sp)
772; RV32-NEXT:    sw a0, 8(sp)
773; RV32-NEXT:    addi a0, sp, 8
774; RV32-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
775; RV32-NEXT:    vlse64.v v12, (a0), zero
776; RV32-NEXT:    vadd.vv v8, v8, v12
777; RV32-NEXT:    addi sp, sp, 16
778; RV32-NEXT:    ret
779;
780; RV64-LABEL: vadd_vx_nxv4i64:
781; RV64:       # %bb.0:
782; RV64-NEXT:    vsetvli a1, zero, e64, m4, ta, mu
783; RV64-NEXT:    vadd.vx v8, v8, a0
784; RV64-NEXT:    ret
785  %head = insertelement <vscale x 4 x i64> poison, i64 %b, i32 0
786  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
787  %vc = add <vscale x 4 x i64> %va, %splat
788  ret <vscale x 4 x i64> %vc
789}
790
791define <vscale x 4 x i64> @vadd_vx_nxv4i64_0(<vscale x 4 x i64> %va) {
792; CHECK-LABEL: vadd_vx_nxv4i64_0:
793; CHECK:       # %bb.0:
794; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
795; CHECK-NEXT:    vadd.vi v8, v8, -1
796; CHECK-NEXT:    ret
797  %head = insertelement <vscale x 4 x i64> poison, i64 -1, i32 0
798  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
799  %vc = add <vscale x 4 x i64> %va, %splat
800  ret <vscale x 4 x i64> %vc
801}
802
803define <vscale x 4 x i64> @vadd_vx_nxv4i64_1(<vscale x 4 x i64> %va) {
804; CHECK-LABEL: vadd_vx_nxv4i64_1:
805; CHECK:       # %bb.0:
806; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
807; CHECK-NEXT:    vadd.vi v8, v8, 2
808; CHECK-NEXT:    ret
809  %head = insertelement <vscale x 4 x i64> poison, i64 2, i32 0
810  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
811  %vc = add <vscale x 4 x i64> %va, %splat
812  ret <vscale x 4 x i64> %vc
813}
814
815define <vscale x 8 x i64> @vadd_vx_nxv8i64(<vscale x 8 x i64> %va, i64 %b) {
816; RV32-LABEL: vadd_vx_nxv8i64:
817; RV32:       # %bb.0:
818; RV32-NEXT:    addi sp, sp, -16
819; RV32-NEXT:    .cfi_def_cfa_offset 16
820; RV32-NEXT:    sw a1, 12(sp)
821; RV32-NEXT:    sw a0, 8(sp)
822; RV32-NEXT:    addi a0, sp, 8
823; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
824; RV32-NEXT:    vlse64.v v16, (a0), zero
825; RV32-NEXT:    vadd.vv v8, v8, v16
826; RV32-NEXT:    addi sp, sp, 16
827; RV32-NEXT:    ret
828;
829; RV64-LABEL: vadd_vx_nxv8i64:
830; RV64:       # %bb.0:
831; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
832; RV64-NEXT:    vadd.vx v8, v8, a0
833; RV64-NEXT:    ret
834  %head = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
835  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
836  %vc = add <vscale x 8 x i64> %va, %splat
837  ret <vscale x 8 x i64> %vc
838}
839
840define <vscale x 8 x i64> @vadd_vx_nxv8i64_0(<vscale x 8 x i64> %va) {
841; CHECK-LABEL: vadd_vx_nxv8i64_0:
842; CHECK:       # %bb.0:
843; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
844; CHECK-NEXT:    vadd.vi v8, v8, -1
845; CHECK-NEXT:    ret
846  %head = insertelement <vscale x 8 x i64> poison, i64 -1, i32 0
847  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
848  %vc = add <vscale x 8 x i64> %va, %splat
849  ret <vscale x 8 x i64> %vc
850}
851
852define <vscale x 8 x i64> @vadd_vx_nxv8i64_1(<vscale x 8 x i64> %va) {
853; CHECK-LABEL: vadd_vx_nxv8i64_1:
854; CHECK:       # %bb.0:
855; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
856; CHECK-NEXT:    vadd.vi v8, v8, 2
857; CHECK-NEXT:    ret
858  %head = insertelement <vscale x 8 x i64> poison, i64 2, i32 0
859  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
860  %vc = add <vscale x 8 x i64> %va, %splat
861  ret <vscale x 8 x i64> %vc
862}
863
864define <vscale x 8 x i64> @vadd_xx_nxv8i64(i64 %a, i64 %b) nounwind {
865; RV32-LABEL: vadd_xx_nxv8i64:
866; RV32:       # %bb.0:
867; RV32-NEXT:    addi sp, sp, -16
868; RV32-NEXT:    sw a1, 12(sp)
869; RV32-NEXT:    sw a0, 8(sp)
870; RV32-NEXT:    addi a0, sp, 8
871; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
872; RV32-NEXT:    vlse64.v v8, (a0), zero
873; RV32-NEXT:    sw a3, 12(sp)
874; RV32-NEXT:    sw a2, 8(sp)
875; RV32-NEXT:    vlse64.v v16, (a0), zero
876; RV32-NEXT:    vadd.vv v8, v8, v16
877; RV32-NEXT:    addi sp, sp, 16
878; RV32-NEXT:    ret
879;
880; RV64-LABEL: vadd_xx_nxv8i64:
881; RV64:       # %bb.0:
882; RV64-NEXT:    add a0, a0, a1
883; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
884; RV64-NEXT:    vmv.v.x v8, a0
885; RV64-NEXT:    ret
886  %head1 = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
887  %splat1 = shufflevector <vscale x 8 x i64> %head1, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
888  %head2 = insertelement <vscale x 8 x i64> poison, i64 %b, i32 0
889  %splat2 = shufflevector <vscale x 8 x i64> %head2, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
890  %v = add <vscale x 8 x i64> %splat1, %splat2
891  ret <vscale x 8 x i64> %v
892}
893