1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v -verify-machineinstrs < %s | FileCheck %s
3; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -verify-machineinstrs < %s | FileCheck %s
4
5declare <vscale x 1 x i8> @llvm.experimental.stepvector.nxv1i8()
6
7define <vscale x 1 x i8> @stepvector_nxv1i8() {
8; CHECK-LABEL: stepvector_nxv1i8:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli a0, zero, e8,mf8,ta,mu
11; CHECK-NEXT:    vid.v v8
12; CHECK-NEXT:    ret
13  %v = call <vscale x 1 x i8> @llvm.experimental.stepvector.nxv1i8()
14  ret <vscale x 1 x i8> %v
15}
16
17declare <vscale x 2 x i8> @llvm.experimental.stepvector.nxv2i8()
18
19define <vscale x 2 x i8> @stepvector_nxv2i8() {
20; CHECK-LABEL: stepvector_nxv2i8:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
23; CHECK-NEXT:    vid.v v8
24; CHECK-NEXT:    ret
25  %v = call <vscale x 2 x i8> @llvm.experimental.stepvector.nxv2i8()
26  ret <vscale x 2 x i8> %v
27}
28
29declare <vscale x 4 x i8> @llvm.experimental.stepvector.nxv4i8()
30
31define <vscale x 4 x i8> @stepvector_nxv4i8() {
32; CHECK-LABEL: stepvector_nxv4i8:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    vsetvli a0, zero, e8,mf2,ta,mu
35; CHECK-NEXT:    vid.v v8
36; CHECK-NEXT:    ret
37  %v = call <vscale x 4 x i8> @llvm.experimental.stepvector.nxv4i8()
38  ret <vscale x 4 x i8> %v
39}
40
41declare <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
42
43define <vscale x 8 x i8> @stepvector_nxv8i8() {
44; CHECK-LABEL: stepvector_nxv8i8:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    vsetvli a0, zero, e8,m1,ta,mu
47; CHECK-NEXT:    vid.v v8
48; CHECK-NEXT:    ret
49  %v = call <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
50  ret <vscale x 8 x i8> %v
51}
52
53define <vscale x 8 x i8> @add_stepvector_nxv8i8() {
54; CHECK-LABEL: add_stepvector_nxv8i8:
55; CHECK:       # %bb.0: # %entry
56; CHECK-NEXT:    vsetvli a0, zero, e8,m1,ta,mu
57; CHECK-NEXT:    vid.v v25
58; CHECK-NEXT:    vsll.vi v8, v25, 1
59; CHECK-NEXT:    ret
60entry:
61  %0 = call <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
62  %1 = call <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
63  %2 = add <vscale x 8 x i8> %0, %1
64  ret <vscale x 8 x i8> %2
65}
66
67define <vscale x 8 x i8> @mul_stepvector_nxv8i8() {
68; CHECK-LABEL: mul_stepvector_nxv8i8:
69; CHECK:       # %bb.0: # %entry
70; CHECK-NEXT:    vsetvli a0, zero, e8,m1,ta,mu
71; CHECK-NEXT:    vid.v v25
72; CHECK-NEXT:    addi a0, zero, 3
73; CHECK-NEXT:    vmul.vx v8, v25, a0
74; CHECK-NEXT:    ret
75entry:
76  %0 = insertelement <vscale x 8 x i8> poison, i8 3, i32 0
77  %1 = shufflevector <vscale x 8 x i8> %0, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
78  %2 = call <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
79  %3 = mul <vscale x 8 x i8> %2, %1
80  ret <vscale x 8 x i8> %3
81}
82
83define <vscale x 8 x i8> @shl_stepvector_nxv8i8() {
84; CHECK-LABEL: shl_stepvector_nxv8i8:
85; CHECK:       # %bb.0: # %entry
86; CHECK-NEXT:    vsetvli a0, zero, e8,m1,ta,mu
87; CHECK-NEXT:    vid.v v25
88; CHECK-NEXT:    vsll.vi v8, v25, 2
89; CHECK-NEXT:    ret
90entry:
91  %0 = insertelement <vscale x 8 x i8> poison, i8 2, i32 0
92  %1 = shufflevector <vscale x 8 x i8> %0, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
93  %2 = call <vscale x 8 x i8> @llvm.experimental.stepvector.nxv8i8()
94  %3 = shl <vscale x 8 x i8> %2, %1
95  ret <vscale x 8 x i8> %3
96}
97
98declare <vscale x 16 x i8> @llvm.experimental.stepvector.nxv16i8()
99
100define <vscale x 16 x i8> @stepvector_nxv16i8() {
101; CHECK-LABEL: stepvector_nxv16i8:
102; CHECK:       # %bb.0:
103; CHECK-NEXT:    vsetvli a0, zero, e8,m2,ta,mu
104; CHECK-NEXT:    vid.v v8
105; CHECK-NEXT:    ret
106  %v = call <vscale x 16 x i8> @llvm.experimental.stepvector.nxv16i8()
107  ret <vscale x 16 x i8> %v
108}
109
110declare <vscale x 32 x i8> @llvm.experimental.stepvector.nxv32i8()
111
112define <vscale x 32 x i8> @stepvector_nxv32i8() {
113; CHECK-LABEL: stepvector_nxv32i8:
114; CHECK:       # %bb.0:
115; CHECK-NEXT:    vsetvli a0, zero, e8,m4,ta,mu
116; CHECK-NEXT:    vid.v v8
117; CHECK-NEXT:    ret
118  %v = call <vscale x 32 x i8> @llvm.experimental.stepvector.nxv32i8()
119  ret <vscale x 32 x i8> %v
120}
121
122declare <vscale x 64 x i8> @llvm.experimental.stepvector.nxv64i8()
123
124define <vscale x 64 x i8> @stepvector_nxv64i8() {
125; CHECK-LABEL: stepvector_nxv64i8:
126; CHECK:       # %bb.0:
127; CHECK-NEXT:    vsetvli a0, zero, e8,m8,ta,mu
128; CHECK-NEXT:    vid.v v8
129; CHECK-NEXT:    ret
130  %v = call <vscale x 64 x i8> @llvm.experimental.stepvector.nxv64i8()
131  ret <vscale x 64 x i8> %v
132}
133
134declare <vscale x 1 x i16> @llvm.experimental.stepvector.nxv1i16()
135
136define <vscale x 1 x i16> @stepvector_nxv1i16() {
137; CHECK-LABEL: stepvector_nxv1i16:
138; CHECK:       # %bb.0:
139; CHECK-NEXT:    vsetvli a0, zero, e16,mf4,ta,mu
140; CHECK-NEXT:    vid.v v8
141; CHECK-NEXT:    ret
142  %v = call <vscale x 1 x i16> @llvm.experimental.stepvector.nxv1i16()
143  ret <vscale x 1 x i16> %v
144}
145
146declare <vscale x 2 x i16> @llvm.experimental.stepvector.nxv2i16()
147
148define <vscale x 2 x i16> @stepvector_nxv2i16() {
149; CHECK-LABEL: stepvector_nxv2i16:
150; CHECK:       # %bb.0:
151; CHECK-NEXT:    vsetvli a0, zero, e16,mf2,ta,mu
152; CHECK-NEXT:    vid.v v8
153; CHECK-NEXT:    ret
154  %v = call <vscale x 2 x i16> @llvm.experimental.stepvector.nxv2i16()
155  ret <vscale x 2 x i16> %v
156}
157
158declare <vscale x 4 x i16> @llvm.experimental.stepvector.nxv4i16()
159
160define <vscale x 4 x i16> @stepvector_nxv4i16() {
161; CHECK-LABEL: stepvector_nxv4i16:
162; CHECK:       # %bb.0:
163; CHECK-NEXT:    vsetvli a0, zero, e16,m1,ta,mu
164; CHECK-NEXT:    vid.v v8
165; CHECK-NEXT:    ret
166  %v = call <vscale x 4 x i16> @llvm.experimental.stepvector.nxv4i16()
167  ret <vscale x 4 x i16> %v
168}
169
170declare <vscale x 8 x i16> @llvm.experimental.stepvector.nxv8i16()
171
172define <vscale x 8 x i16> @stepvector_nxv8i16() {
173; CHECK-LABEL: stepvector_nxv8i16:
174; CHECK:       # %bb.0:
175; CHECK-NEXT:    vsetvli a0, zero, e16,m2,ta,mu
176; CHECK-NEXT:    vid.v v8
177; CHECK-NEXT:    ret
178  %v = call <vscale x 8 x i16> @llvm.experimental.stepvector.nxv8i16()
179  ret <vscale x 8 x i16> %v
180}
181
182declare <vscale x 16 x i16> @llvm.experimental.stepvector.nxv16i16()
183
184define <vscale x 16 x i16> @stepvector_nxv16i16() {
185; CHECK-LABEL: stepvector_nxv16i16:
186; CHECK:       # %bb.0:
187; CHECK-NEXT:    vsetvli a0, zero, e16,m4,ta,mu
188; CHECK-NEXT:    vid.v v8
189; CHECK-NEXT:    ret
190  %v = call <vscale x 16 x i16> @llvm.experimental.stepvector.nxv16i16()
191  ret <vscale x 16 x i16> %v
192}
193
194define <vscale x 16 x i16> @add_stepvector_nxv16i16() {
195; CHECK-LABEL: add_stepvector_nxv16i16:
196; CHECK:       # %bb.0: # %entry
197; CHECK-NEXT:    vsetvli a0, zero, e16,m4,ta,mu
198; CHECK-NEXT:    vid.v v28
199; CHECK-NEXT:    vsll.vi v8, v28, 1
200; CHECK-NEXT:    ret
201entry:
202  %0 = call <vscale x 16 x i16> @llvm.experimental.stepvector.nxv16i16()
203  %1 = call <vscale x 16 x i16> @llvm.experimental.stepvector.nxv16i16()
204  %2 = add <vscale x 16 x i16> %0, %1
205  ret <vscale x 16 x i16> %2
206}
207
208define <vscale x 16 x i16> @mul_stepvector_nxv16i16() {
209; CHECK-LABEL: mul_stepvector_nxv16i16:
210; CHECK:       # %bb.0: # %entry
211; CHECK-NEXT:    vsetvli a0, zero, e16,m4,ta,mu
212; CHECK-NEXT:    vid.v v28
213; CHECK-NEXT:    addi a0, zero, 3
214; CHECK-NEXT:    vmul.vx v8, v28, a0
215; CHECK-NEXT:    ret
216entry:
217  %0 = insertelement <vscale x 16 x i16> poison, i16 3, i32 0
218  %1 = shufflevector <vscale x 16 x i16> %0, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
219  %2 = call <vscale x 16 x i16> @llvm.experimental.stepvector.nxv16i16()
220  %3 = mul <vscale x 16 x i16> %2, %1
221  ret <vscale x 16 x i16> %3
222}
223
224define <vscale x 16 x i16> @shl_stepvector_nxv16i16() {
225; CHECK-LABEL: shl_stepvector_nxv16i16:
226; CHECK:       # %bb.0: # %entry
227; CHECK-NEXT:    vsetvli a0, zero, e16,m4,ta,mu
228; CHECK-NEXT:    vid.v v28
229; CHECK-NEXT:    vsll.vi v8, v28, 2
230; CHECK-NEXT:    ret
231entry:
232  %0 = insertelement <vscale x 16 x i16> poison, i16 2, i32 0
233  %1 = shufflevector <vscale x 16 x i16> %0, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
234  %2 = call <vscale x 16 x i16> @llvm.experimental.stepvector.nxv16i16()
235  %3 = shl <vscale x 16 x i16> %2, %1
236  ret <vscale x 16 x i16> %3
237}
238
239declare <vscale x 32 x i16> @llvm.experimental.stepvector.nxv32i16()
240
241define <vscale x 32 x i16> @stepvector_nxv32i16() {
242; CHECK-LABEL: stepvector_nxv32i16:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    vsetvli a0, zero, e16,m8,ta,mu
245; CHECK-NEXT:    vid.v v8
246; CHECK-NEXT:    ret
247  %v = call <vscale x 32 x i16> @llvm.experimental.stepvector.nxv32i16()
248  ret <vscale x 32 x i16> %v
249}
250
251declare <vscale x 1 x i32> @llvm.experimental.stepvector.nxv1i32()
252
253define <vscale x 1 x i32> @stepvector_nxv1i32() {
254; CHECK-LABEL: stepvector_nxv1i32:
255; CHECK:       # %bb.0:
256; CHECK-NEXT:    vsetvli a0, zero, e32,mf2,ta,mu
257; CHECK-NEXT:    vid.v v8
258; CHECK-NEXT:    ret
259  %v = call <vscale x 1 x i32> @llvm.experimental.stepvector.nxv1i32()
260  ret <vscale x 1 x i32> %v
261}
262
263declare <vscale x 2 x i32> @llvm.experimental.stepvector.nxv2i32()
264
265define <vscale x 2 x i32> @stepvector_nxv2i32() {
266; CHECK-LABEL: stepvector_nxv2i32:
267; CHECK:       # %bb.0:
268; CHECK-NEXT:    vsetvli a0, zero, e32,m1,ta,mu
269; CHECK-NEXT:    vid.v v8
270; CHECK-NEXT:    ret
271  %v = call <vscale x 2 x i32> @llvm.experimental.stepvector.nxv2i32()
272  ret <vscale x 2 x i32> %v
273}
274
275declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
276
277define <vscale x 4 x i32> @stepvector_nxv4i32() {
278; CHECK-LABEL: stepvector_nxv4i32:
279; CHECK:       # %bb.0:
280; CHECK-NEXT:    vsetvli a0, zero, e32,m2,ta,mu
281; CHECK-NEXT:    vid.v v8
282; CHECK-NEXT:    ret
283  %v = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
284  ret <vscale x 4 x i32> %v
285}
286
287declare <vscale x 8 x i32> @llvm.experimental.stepvector.nxv8i32()
288
289define <vscale x 8 x i32> @stepvector_nxv8i32() {
290; CHECK-LABEL: stepvector_nxv8i32:
291; CHECK:       # %bb.0:
292; CHECK-NEXT:    vsetvli a0, zero, e32,m4,ta,mu
293; CHECK-NEXT:    vid.v v8
294; CHECK-NEXT:    ret
295  %v = call <vscale x 8 x i32> @llvm.experimental.stepvector.nxv8i32()
296  ret <vscale x 8 x i32> %v
297}
298
299declare <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
300
301define <vscale x 16 x i32> @stepvector_nxv16i32() {
302; CHECK-LABEL: stepvector_nxv16i32:
303; CHECK:       # %bb.0:
304; CHECK-NEXT:    vsetvli a0, zero, e32,m8,ta,mu
305; CHECK-NEXT:    vid.v v8
306; CHECK-NEXT:    ret
307  %v = call <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
308  ret <vscale x 16 x i32> %v
309}
310
311define <vscale x 16 x i32> @add_stepvector_nxv16i32() {
312; CHECK-LABEL: add_stepvector_nxv16i32:
313; CHECK:       # %bb.0: # %entry
314; CHECK-NEXT:    vsetvli a0, zero, e32,m8,ta,mu
315; CHECK-NEXT:    vid.v v8
316; CHECK-NEXT:    vsll.vi v8, v8, 1
317; CHECK-NEXT:    ret
318entry:
319  %0 = call <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
320  %1 = call <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
321  %2 = add <vscale x 16 x i32> %0, %1
322  ret <vscale x 16 x i32> %2
323}
324
325define <vscale x 16 x i32> @mul_stepvector_nxv16i32() {
326; CHECK-LABEL: mul_stepvector_nxv16i32:
327; CHECK:       # %bb.0: # %entry
328; CHECK-NEXT:    vsetvli a0, zero, e32,m8,ta,mu
329; CHECK-NEXT:    vid.v v8
330; CHECK-NEXT:    addi a0, zero, 3
331; CHECK-NEXT:    vmul.vx v8, v8, a0
332; CHECK-NEXT:    ret
333entry:
334  %0 = insertelement <vscale x 16 x i32> poison, i32 3, i32 0
335  %1 = shufflevector <vscale x 16 x i32> %0, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
336  %2 = call <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
337  %3 = mul <vscale x 16 x i32> %2, %1
338  ret <vscale x 16 x i32> %3
339}
340
341define <vscale x 16 x i32> @shl_stepvector_nxv16i32() {
342; CHECK-LABEL: shl_stepvector_nxv16i32:
343; CHECK:       # %bb.0: # %entry
344; CHECK-NEXT:    vsetvli a0, zero, e32,m8,ta,mu
345; CHECK-NEXT:    vid.v v8
346; CHECK-NEXT:    vsll.vi v8, v8, 2
347; CHECK-NEXT:    ret
348entry:
349  %0 = insertelement <vscale x 16 x i32> poison, i32 2, i32 0
350  %1 = shufflevector <vscale x 16 x i32> %0, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
351  %2 = call <vscale x 16 x i32> @llvm.experimental.stepvector.nxv16i32()
352  %3 = shl <vscale x 16 x i32> %2, %1
353  ret <vscale x 16 x i32> %3
354}
355
356declare <vscale x 1 x i64> @llvm.experimental.stepvector.nxv1i64()
357
358define <vscale x 1 x i64> @stepvector_nxv1i64() {
359; CHECK-LABEL: stepvector_nxv1i64:
360; CHECK:       # %bb.0:
361; CHECK-NEXT:    vsetvli a0, zero, e64,m1,ta,mu
362; CHECK-NEXT:    vid.v v8
363; CHECK-NEXT:    ret
364  %v = call <vscale x 1 x i64> @llvm.experimental.stepvector.nxv1i64()
365  ret <vscale x 1 x i64> %v
366}
367
368declare <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
369
370define <vscale x 2 x i64> @stepvector_nxv2i64() {
371; CHECK-LABEL: stepvector_nxv2i64:
372; CHECK:       # %bb.0:
373; CHECK-NEXT:    vsetvli a0, zero, e64,m2,ta,mu
374; CHECK-NEXT:    vid.v v8
375; CHECK-NEXT:    ret
376  %v = call <vscale x 2 x i64> @llvm.experimental.stepvector.nxv2i64()
377  ret <vscale x 2 x i64> %v
378}
379
380declare <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
381
382define <vscale x 4 x i64> @stepvector_nxv4i64() {
383; CHECK-LABEL: stepvector_nxv4i64:
384; CHECK:       # %bb.0:
385; CHECK-NEXT:    vsetvli a0, zero, e64,m4,ta,mu
386; CHECK-NEXT:    vid.v v8
387; CHECK-NEXT:    ret
388  %v = call <vscale x 4 x i64> @llvm.experimental.stepvector.nxv4i64()
389  ret <vscale x 4 x i64> %v
390}
391
392declare <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64()
393
394define <vscale x 8 x i64> @stepvector_nxv8i64() {
395; CHECK-LABEL: stepvector_nxv8i64:
396; CHECK:       # %bb.0:
397; CHECK-NEXT:    vsetvli a0, zero, e64,m8,ta,mu
398; CHECK-NEXT:    vid.v v8
399; CHECK-NEXT:    ret
400  %v = call <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64()
401  ret <vscale x 8 x i64> %v
402}
403
404define <vscale x 8 x i64> @add_stepvector_nxv8i64() {
405; CHECK-LABEL: add_stepvector_nxv8i64:
406; CHECK:       # %bb.0: # %entry
407; CHECK-NEXT:    vsetvli a0, zero, e64,m8,ta,mu
408; CHECK-NEXT:    vid.v v8
409; CHECK-NEXT:    vsll.vi v8, v8, 1
410; CHECK-NEXT:    ret
411entry:
412  %0 = call <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64()
413  %1 = call <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64()
414  %2 = add <vscale x 8 x i64> %0, %1
415  ret <vscale x 8 x i64> %2
416}
417
418define <vscale x 8 x i64> @mul_stepvector_nxv8i64() {
419; CHECK-LABEL: mul_stepvector_nxv8i64:
420; CHECK:       # %bb.0: # %entry
421; CHECK-NEXT:    vsetvli a0, zero, e64,m8,ta,mu
422; CHECK-NEXT:    vid.v v8
423; CHECK-NEXT:    addi a0, zero, 3
424; CHECK-NEXT:    vmul.vx v8, v8, a0
425; CHECK-NEXT:    ret
426entry:
427  %0 = insertelement <vscale x 8 x i64> poison, i64 3, i32 0
428  %1 = shufflevector <vscale x 8 x i64> %0, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
429  %2 = call <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64()
430  %3 = mul <vscale x 8 x i64> %2, %1
431  ret <vscale x 8 x i64> %3
432}
433
434define <vscale x 8 x i64> @shl_stepvector_nxv8i64() {
435; CHECK-LABEL: shl_stepvector_nxv8i64:
436; CHECK:       # %bb.0: # %entry
437; CHECK-NEXT:    vsetvli a0, zero, e64,m8,ta,mu
438; CHECK-NEXT:    vid.v v8
439; CHECK-NEXT:    vsll.vi v8, v8, 2
440; CHECK-NEXT:    ret
441entry:
442  %0 = insertelement <vscale x 8 x i64> poison, i64 2, i32 0
443  %1 = shufflevector <vscale x 8 x i64> %0, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
444  %2 = call <vscale x 8 x i64> @llvm.experimental.stepvector.nxv8i64()
445  %3 = shl <vscale x 8 x i64> %2, %1
446  ret <vscale x 8 x i64> %3
447}
448
449declare <vscale x 16 x i64> @llvm.experimental.stepvector.nxv16i64()
450
451define <vscale x 16 x i64> @stepvector_nxv16i64() {
452; CHECK-LABEL: stepvector_nxv16i64:
453; CHECK:       # %bb.0:
454; CHECK-NEXT:    csrr a0, vlenb
455; CHECK-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
456; CHECK-NEXT:    vid.v v8
457; CHECK-NEXT:    vadd.vx v16, v8, a0
458; CHECK-NEXT:    ret
459  %v = call <vscale x 16 x i64> @llvm.experimental.stepvector.nxv16i64()
460  ret <vscale x 16 x i64> %v
461}
462
463define <vscale x 16 x i64> @add_stepvector_nxv16i64() {
464; CHECK-LABEL: add_stepvector_nxv16i64:
465; CHECK:       # %bb.0: # %entry
466; CHECK-NEXT:    csrr a0, vlenb
467; CHECK-NEXT:    slli a0, a0, 1
468; CHECK-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
469; CHECK-NEXT:    vid.v v8
470; CHECK-NEXT:    vsll.vi v8, v8, 1
471; CHECK-NEXT:    vadd.vx v16, v8, a0
472; CHECK-NEXT:    ret
473entry:
474  %0 = call <vscale x 16 x i64> @llvm.experimental.stepvector.nxv16i64()
475  %1 = call <vscale x 16 x i64> @llvm.experimental.stepvector.nxv16i64()
476  %2 = add <vscale x 16 x i64> %0, %1
477  ret <vscale x 16 x i64> %2
478}
479
480define <vscale x 16 x i64> @mul_stepvector_nxv16i64() {
481; CHECK-LABEL: mul_stepvector_nxv16i64:
482; CHECK:       # %bb.0: # %entry
483; CHECK-NEXT:    vsetvli a0, zero, e64,m8,ta,mu
484; CHECK-NEXT:    vid.v v8
485; CHECK-NEXT:    addi a0, zero, 3
486; CHECK-NEXT:    vmul.vx v8, v8, a0
487; CHECK-NEXT:    csrr a0, vlenb
488; CHECK-NEXT:    srli a0, a0, 3
489; CHECK-NEXT:    addi a1, zero, 24
490; CHECK-NEXT:    mul a0, a0, a1
491; CHECK-NEXT:    vadd.vx v16, v8, a0
492; CHECK-NEXT:    ret
493entry:
494  %0 = insertelement <vscale x 16 x i64> poison, i64 3, i32 0
495  %1 = shufflevector <vscale x 16 x i64> %0, <vscale x 16 x i64> poison, <vscale x 16 x i32> zeroinitializer
496  %2 = call <vscale x 16 x i64> @llvm.experimental.stepvector.nxv16i64()
497  %3 = mul <vscale x 16 x i64> %2, %1
498  ret <vscale x 16 x i64> %3
499}
500
501define <vscale x 16 x i64> @shl_stepvector_nxv16i64() {
502; CHECK-LABEL: shl_stepvector_nxv16i64:
503; CHECK:       # %bb.0: # %entry
504; CHECK-NEXT:    csrr a0, vlenb
505; CHECK-NEXT:    slli a0, a0, 2
506; CHECK-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
507; CHECK-NEXT:    vid.v v8
508; CHECK-NEXT:    vsll.vi v8, v8, 2
509; CHECK-NEXT:    vadd.vx v16, v8, a0
510; CHECK-NEXT:    ret
511entry:
512  %0 = insertelement <vscale x 16 x i64> poison, i64 2, i32 0
513  %1 = shufflevector <vscale x 16 x i64> %0, <vscale x 16 x i64> poison, <vscale x 16 x i32> zeroinitializer
514  %2 = call <vscale x 16 x i64> @llvm.experimental.stepvector.nxv16i64()
515  %3 = shl <vscale x 16 x i64> %2, %1
516  ret <vscale x 16 x i64> %3
517}
518