1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs \ 3; RUN: -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IZFH %s 4; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs \ 5; RUN: -target-abi lp64f < %s | FileCheck -check-prefix=RV64IZFH %s 6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs \ 7; RUN: -target-abi ilp32d < %s | FileCheck -check-prefix=RV32IDZFH %s 8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs \ 9; RUN: -target-abi lp64d < %s | FileCheck -check-prefix=RV64IDZFH %s 10; RUN: llc -mtriple=riscv32 -verify-machineinstrs \ 11; RUN: < %s | FileCheck -check-prefix=RV32I %s 12; RUN: llc -mtriple=riscv64 -verify-machineinstrs \ 13; RUN: < %s | FileCheck -check-prefix=RV64I %s 14 15define i16 @fcvt_si_h(half %a) nounwind { 16; RV32IZFH-LABEL: fcvt_si_h: 17; RV32IZFH: # %bb.0: 18; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 19; RV32IZFH-NEXT: ret 20; 21; RV64IZFH-LABEL: fcvt_si_h: 22; RV64IZFH: # %bb.0: 23; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 24; RV64IZFH-NEXT: ret 25; 26; RV32IDZFH-LABEL: fcvt_si_h: 27; RV32IDZFH: # %bb.0: 28; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 29; RV32IDZFH-NEXT: ret 30; 31; RV64IDZFH-LABEL: fcvt_si_h: 32; RV64IDZFH: # %bb.0: 33; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 34; RV64IDZFH-NEXT: ret 35; 36; RV32I-LABEL: fcvt_si_h: 37; RV32I: # %bb.0: 38; RV32I-NEXT: addi sp, sp, -16 39; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 40; RV32I-NEXT: slli a0, a0, 16 41; RV32I-NEXT: srli a0, a0, 16 42; RV32I-NEXT: call __extendhfsf2@plt 43; RV32I-NEXT: call __fixsfsi@plt 44; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 45; RV32I-NEXT: addi sp, sp, 16 46; RV32I-NEXT: ret 47; 48; RV64I-LABEL: fcvt_si_h: 49; RV64I: # %bb.0: 50; RV64I-NEXT: addi sp, sp, -16 51; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 52; RV64I-NEXT: slli a0, a0, 48 53; RV64I-NEXT: srli a0, a0, 48 54; RV64I-NEXT: call __extendhfsf2@plt 55; RV64I-NEXT: call __fixsfdi@plt 56; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 57; RV64I-NEXT: addi sp, sp, 16 58; RV64I-NEXT: ret 59 %1 = fptosi half %a to i16 60 ret i16 %1 61} 62 63define i16 @fcvt_si_h_sat(half %a) nounwind { 64; RV32IZFH-LABEL: fcvt_si_h_sat: 65; RV32IZFH: # %bb.0: # %start 66; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 67; RV32IZFH-NEXT: feq.s a0, ft0, ft0 68; RV32IZFH-NEXT: beqz a0, .LBB1_2 69; RV32IZFH-NEXT: # %bb.1: 70; RV32IZFH-NEXT: lui a0, %hi(.LCPI1_0) 71; RV32IZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 72; RV32IZFH-NEXT: lui a0, %hi(.LCPI1_1) 73; RV32IZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 74; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 75; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 76; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 77; RV32IZFH-NEXT: .LBB1_2: # %start 78; RV32IZFH-NEXT: ret 79; 80; RV64IZFH-LABEL: fcvt_si_h_sat: 81; RV64IZFH: # %bb.0: # %start 82; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 83; RV64IZFH-NEXT: feq.s a0, ft0, ft0 84; RV64IZFH-NEXT: beqz a0, .LBB1_2 85; RV64IZFH-NEXT: # %bb.1: 86; RV64IZFH-NEXT: lui a0, %hi(.LCPI1_0) 87; RV64IZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 88; RV64IZFH-NEXT: lui a0, %hi(.LCPI1_1) 89; RV64IZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 90; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 91; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 92; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 93; RV64IZFH-NEXT: .LBB1_2: # %start 94; RV64IZFH-NEXT: ret 95; 96; RV32IDZFH-LABEL: fcvt_si_h_sat: 97; RV32IDZFH: # %bb.0: # %start 98; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 99; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 100; RV32IDZFH-NEXT: beqz a0, .LBB1_2 101; RV32IDZFH-NEXT: # %bb.1: 102; RV32IDZFH-NEXT: lui a0, %hi(.LCPI1_0) 103; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 104; RV32IDZFH-NEXT: lui a0, %hi(.LCPI1_1) 105; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 106; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 107; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 108; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 109; RV32IDZFH-NEXT: .LBB1_2: # %start 110; RV32IDZFH-NEXT: ret 111; 112; RV64IDZFH-LABEL: fcvt_si_h_sat: 113; RV64IDZFH: # %bb.0: # %start 114; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 115; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 116; RV64IDZFH-NEXT: beqz a0, .LBB1_2 117; RV64IDZFH-NEXT: # %bb.1: 118; RV64IDZFH-NEXT: lui a0, %hi(.LCPI1_0) 119; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 120; RV64IDZFH-NEXT: lui a0, %hi(.LCPI1_1) 121; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 122; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 123; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 124; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 125; RV64IDZFH-NEXT: .LBB1_2: # %start 126; RV64IDZFH-NEXT: ret 127; 128; RV32I-LABEL: fcvt_si_h_sat: 129; RV32I: # %bb.0: # %start 130; RV32I-NEXT: addi sp, sp, -32 131; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 132; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 133; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 134; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 135; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 136; RV32I-NEXT: slli a0, a0, 16 137; RV32I-NEXT: srli a0, a0, 16 138; RV32I-NEXT: call __extendhfsf2@plt 139; RV32I-NEXT: mv s0, a0 140; RV32I-NEXT: lui a1, 815104 141; RV32I-NEXT: call __gesf2@plt 142; RV32I-NEXT: mv s2, a0 143; RV32I-NEXT: mv a0, s0 144; RV32I-NEXT: call __fixsfsi@plt 145; RV32I-NEXT: li s1, 0 146; RV32I-NEXT: lui s3, 1048568 147; RV32I-NEXT: bltz s2, .LBB1_2 148; RV32I-NEXT: # %bb.1: # %start 149; RV32I-NEXT: mv s3, a0 150; RV32I-NEXT: .LBB1_2: # %start 151; RV32I-NEXT: lui a0, 290816 152; RV32I-NEXT: addi a1, a0, -512 153; RV32I-NEXT: mv a0, s0 154; RV32I-NEXT: call __gtsf2@plt 155; RV32I-NEXT: bge s1, a0, .LBB1_4 156; RV32I-NEXT: # %bb.3: 157; RV32I-NEXT: lui a0, 8 158; RV32I-NEXT: addi s3, a0, -1 159; RV32I-NEXT: .LBB1_4: # %start 160; RV32I-NEXT: mv a0, s0 161; RV32I-NEXT: mv a1, s0 162; RV32I-NEXT: call __unordsf2@plt 163; RV32I-NEXT: bne a0, s1, .LBB1_6 164; RV32I-NEXT: # %bb.5: # %start 165; RV32I-NEXT: mv s1, s3 166; RV32I-NEXT: .LBB1_6: # %start 167; RV32I-NEXT: mv a0, s1 168; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 169; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 170; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 171; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 172; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 173; RV32I-NEXT: addi sp, sp, 32 174; RV32I-NEXT: ret 175; 176; RV64I-LABEL: fcvt_si_h_sat: 177; RV64I: # %bb.0: # %start 178; RV64I-NEXT: addi sp, sp, -48 179; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 180; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 181; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 182; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 183; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 184; RV64I-NEXT: slli a0, a0, 48 185; RV64I-NEXT: srli a0, a0, 48 186; RV64I-NEXT: call __extendhfsf2@plt 187; RV64I-NEXT: mv s0, a0 188; RV64I-NEXT: lui a1, 815104 189; RV64I-NEXT: call __gesf2@plt 190; RV64I-NEXT: mv s2, a0 191; RV64I-NEXT: mv a0, s0 192; RV64I-NEXT: call __fixsfdi@plt 193; RV64I-NEXT: li s1, 0 194; RV64I-NEXT: lui s3, 1048568 195; RV64I-NEXT: bltz s2, .LBB1_2 196; RV64I-NEXT: # %bb.1: # %start 197; RV64I-NEXT: mv s3, a0 198; RV64I-NEXT: .LBB1_2: # %start 199; RV64I-NEXT: lui a0, 290816 200; RV64I-NEXT: addiw a1, a0, -512 201; RV64I-NEXT: mv a0, s0 202; RV64I-NEXT: call __gtsf2@plt 203; RV64I-NEXT: bge s1, a0, .LBB1_4 204; RV64I-NEXT: # %bb.3: 205; RV64I-NEXT: lui a0, 8 206; RV64I-NEXT: addiw s3, a0, -1 207; RV64I-NEXT: .LBB1_4: # %start 208; RV64I-NEXT: mv a0, s0 209; RV64I-NEXT: mv a1, s0 210; RV64I-NEXT: call __unordsf2@plt 211; RV64I-NEXT: bne a0, s1, .LBB1_6 212; RV64I-NEXT: # %bb.5: # %start 213; RV64I-NEXT: mv s1, s3 214; RV64I-NEXT: .LBB1_6: # %start 215; RV64I-NEXT: mv a0, s1 216; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 217; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 218; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 219; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 220; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 221; RV64I-NEXT: addi sp, sp, 48 222; RV64I-NEXT: ret 223start: 224 %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) 225 ret i16 %0 226} 227declare i16 @llvm.fptosi.sat.i16.f16(half) 228 229define i16 @fcvt_ui_h(half %a) nounwind { 230; RV32IZFH-LABEL: fcvt_ui_h: 231; RV32IZFH: # %bb.0: 232; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 233; RV32IZFH-NEXT: ret 234; 235; RV64IZFH-LABEL: fcvt_ui_h: 236; RV64IZFH: # %bb.0: 237; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 238; RV64IZFH-NEXT: ret 239; 240; RV32IDZFH-LABEL: fcvt_ui_h: 241; RV32IDZFH: # %bb.0: 242; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 243; RV32IDZFH-NEXT: ret 244; 245; RV64IDZFH-LABEL: fcvt_ui_h: 246; RV64IDZFH: # %bb.0: 247; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 248; RV64IDZFH-NEXT: ret 249; 250; RV32I-LABEL: fcvt_ui_h: 251; RV32I: # %bb.0: 252; RV32I-NEXT: addi sp, sp, -16 253; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 254; RV32I-NEXT: slli a0, a0, 16 255; RV32I-NEXT: srli a0, a0, 16 256; RV32I-NEXT: call __extendhfsf2@plt 257; RV32I-NEXT: call __fixunssfsi@plt 258; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 259; RV32I-NEXT: addi sp, sp, 16 260; RV32I-NEXT: ret 261; 262; RV64I-LABEL: fcvt_ui_h: 263; RV64I: # %bb.0: 264; RV64I-NEXT: addi sp, sp, -16 265; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 266; RV64I-NEXT: slli a0, a0, 48 267; RV64I-NEXT: srli a0, a0, 48 268; RV64I-NEXT: call __extendhfsf2@plt 269; RV64I-NEXT: call __fixunssfdi@plt 270; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 271; RV64I-NEXT: addi sp, sp, 16 272; RV64I-NEXT: ret 273 %1 = fptoui half %a to i16 274 ret i16 %1 275} 276 277define i16 @fcvt_ui_h_sat(half %a) nounwind { 278; RV32IZFH-LABEL: fcvt_ui_h_sat: 279; RV32IZFH: # %bb.0: # %start 280; RV32IZFH-NEXT: lui a0, %hi(.LCPI3_0) 281; RV32IZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 282; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 283; RV32IZFH-NEXT: fmv.w.x ft2, zero 284; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 285; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 286; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 287; RV32IZFH-NEXT: ret 288; 289; RV64IZFH-LABEL: fcvt_ui_h_sat: 290; RV64IZFH: # %bb.0: # %start 291; RV64IZFH-NEXT: lui a0, %hi(.LCPI3_0) 292; RV64IZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 293; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 294; RV64IZFH-NEXT: fmv.w.x ft2, zero 295; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 296; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 297; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 298; RV64IZFH-NEXT: ret 299; 300; RV32IDZFH-LABEL: fcvt_ui_h_sat: 301; RV32IDZFH: # %bb.0: # %start 302; RV32IDZFH-NEXT: lui a0, %hi(.LCPI3_0) 303; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 304; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 305; RV32IDZFH-NEXT: fmv.w.x ft2, zero 306; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 307; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 308; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 309; RV32IDZFH-NEXT: ret 310; 311; RV64IDZFH-LABEL: fcvt_ui_h_sat: 312; RV64IDZFH: # %bb.0: # %start 313; RV64IDZFH-NEXT: lui a0, %hi(.LCPI3_0) 314; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 315; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 316; RV64IDZFH-NEXT: fmv.w.x ft2, zero 317; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 318; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 319; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 320; RV64IDZFH-NEXT: ret 321; 322; RV32I-LABEL: fcvt_ui_h_sat: 323; RV32I: # %bb.0: # %start 324; RV32I-NEXT: addi sp, sp, -32 325; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 326; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 327; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 328; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 329; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 330; RV32I-NEXT: lui a1, 16 331; RV32I-NEXT: addi s0, a1, -1 332; RV32I-NEXT: and a0, a0, s0 333; RV32I-NEXT: call __extendhfsf2@plt 334; RV32I-NEXT: mv s1, a0 335; RV32I-NEXT: li a1, 0 336; RV32I-NEXT: call __gesf2@plt 337; RV32I-NEXT: mv s2, a0 338; RV32I-NEXT: mv a0, s1 339; RV32I-NEXT: call __fixunssfsi@plt 340; RV32I-NEXT: li s3, 0 341; RV32I-NEXT: bltz s2, .LBB3_2 342; RV32I-NEXT: # %bb.1: # %start 343; RV32I-NEXT: mv s3, a0 344; RV32I-NEXT: .LBB3_2: # %start 345; RV32I-NEXT: lui a0, 292864 346; RV32I-NEXT: addi a1, a0, -256 347; RV32I-NEXT: mv a0, s1 348; RV32I-NEXT: call __gtsf2@plt 349; RV32I-NEXT: bgtz a0, .LBB3_4 350; RV32I-NEXT: # %bb.3: # %start 351; RV32I-NEXT: mv s0, s3 352; RV32I-NEXT: .LBB3_4: # %start 353; RV32I-NEXT: mv a0, s0 354; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 355; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 356; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 357; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 358; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 359; RV32I-NEXT: addi sp, sp, 32 360; RV32I-NEXT: ret 361; 362; RV64I-LABEL: fcvt_ui_h_sat: 363; RV64I: # %bb.0: # %start 364; RV64I-NEXT: addi sp, sp, -48 365; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 366; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 367; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 368; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 369; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 370; RV64I-NEXT: lui a1, 16 371; RV64I-NEXT: addiw s0, a1, -1 372; RV64I-NEXT: and a0, a0, s0 373; RV64I-NEXT: call __extendhfsf2@plt 374; RV64I-NEXT: mv s1, a0 375; RV64I-NEXT: li a1, 0 376; RV64I-NEXT: call __gesf2@plt 377; RV64I-NEXT: mv s2, a0 378; RV64I-NEXT: mv a0, s1 379; RV64I-NEXT: call __fixunssfdi@plt 380; RV64I-NEXT: li s3, 0 381; RV64I-NEXT: bltz s2, .LBB3_2 382; RV64I-NEXT: # %bb.1: # %start 383; RV64I-NEXT: mv s3, a0 384; RV64I-NEXT: .LBB3_2: # %start 385; RV64I-NEXT: lui a0, 292864 386; RV64I-NEXT: addiw a1, a0, -256 387; RV64I-NEXT: mv a0, s1 388; RV64I-NEXT: call __gtsf2@plt 389; RV64I-NEXT: bgtz a0, .LBB3_4 390; RV64I-NEXT: # %bb.3: # %start 391; RV64I-NEXT: mv s0, s3 392; RV64I-NEXT: .LBB3_4: # %start 393; RV64I-NEXT: mv a0, s0 394; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 395; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 396; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 397; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 398; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 399; RV64I-NEXT: addi sp, sp, 48 400; RV64I-NEXT: ret 401start: 402 %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a) 403 ret i16 %0 404} 405declare i16 @llvm.fptoui.sat.i16.f16(half) 406 407define i32 @fcvt_w_h(half %a) nounwind { 408; RV32IZFH-LABEL: fcvt_w_h: 409; RV32IZFH: # %bb.0: 410; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 411; RV32IZFH-NEXT: ret 412; 413; RV64IZFH-LABEL: fcvt_w_h: 414; RV64IZFH: # %bb.0: 415; RV64IZFH-NEXT: fcvt.w.h a0, fa0, rtz 416; RV64IZFH-NEXT: ret 417; 418; RV32IDZFH-LABEL: fcvt_w_h: 419; RV32IDZFH: # %bb.0: 420; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 421; RV32IDZFH-NEXT: ret 422; 423; RV64IDZFH-LABEL: fcvt_w_h: 424; RV64IDZFH: # %bb.0: 425; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 426; RV64IDZFH-NEXT: ret 427; 428; RV32I-LABEL: fcvt_w_h: 429; RV32I: # %bb.0: 430; RV32I-NEXT: addi sp, sp, -16 431; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 432; RV32I-NEXT: slli a0, a0, 16 433; RV32I-NEXT: srli a0, a0, 16 434; RV32I-NEXT: call __extendhfsf2@plt 435; RV32I-NEXT: call __fixsfsi@plt 436; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 437; RV32I-NEXT: addi sp, sp, 16 438; RV32I-NEXT: ret 439; 440; RV64I-LABEL: fcvt_w_h: 441; RV64I: # %bb.0: 442; RV64I-NEXT: addi sp, sp, -16 443; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 444; RV64I-NEXT: slli a0, a0, 48 445; RV64I-NEXT: srli a0, a0, 48 446; RV64I-NEXT: call __extendhfsf2@plt 447; RV64I-NEXT: call __fixsfdi@plt 448; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 449; RV64I-NEXT: addi sp, sp, 16 450; RV64I-NEXT: ret 451 %1 = fptosi half %a to i32 452 ret i32 %1 453} 454 455define i32 @fcvt_w_h_sat(half %a) nounwind { 456; RV32IZFH-LABEL: fcvt_w_h_sat: 457; RV32IZFH: # %bb.0: # %start 458; RV32IZFH-NEXT: feq.h a0, fa0, fa0 459; RV32IZFH-NEXT: beqz a0, .LBB5_2 460; RV32IZFH-NEXT: # %bb.1: 461; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 462; RV32IZFH-NEXT: .LBB5_2: # %start 463; RV32IZFH-NEXT: ret 464; 465; RV64IZFH-LABEL: fcvt_w_h_sat: 466; RV64IZFH: # %bb.0: # %start 467; RV64IZFH-NEXT: feq.h a0, fa0, fa0 468; RV64IZFH-NEXT: beqz a0, .LBB5_2 469; RV64IZFH-NEXT: # %bb.1: 470; RV64IZFH-NEXT: fcvt.w.h a0, fa0, rtz 471; RV64IZFH-NEXT: .LBB5_2: # %start 472; RV64IZFH-NEXT: ret 473; 474; RV32IDZFH-LABEL: fcvt_w_h_sat: 475; RV32IDZFH: # %bb.0: # %start 476; RV32IDZFH-NEXT: feq.h a0, fa0, fa0 477; RV32IDZFH-NEXT: beqz a0, .LBB5_2 478; RV32IDZFH-NEXT: # %bb.1: 479; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 480; RV32IDZFH-NEXT: .LBB5_2: # %start 481; RV32IDZFH-NEXT: ret 482; 483; RV64IDZFH-LABEL: fcvt_w_h_sat: 484; RV64IDZFH: # %bb.0: # %start 485; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 486; RV64IDZFH-NEXT: beqz a0, .LBB5_2 487; RV64IDZFH-NEXT: # %bb.1: 488; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 489; RV64IDZFH-NEXT: .LBB5_2: # %start 490; RV64IDZFH-NEXT: ret 491; 492; RV32I-LABEL: fcvt_w_h_sat: 493; RV32I: # %bb.0: # %start 494; RV32I-NEXT: addi sp, sp, -32 495; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 496; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 497; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 498; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 499; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 500; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 501; RV32I-NEXT: slli a0, a0, 16 502; RV32I-NEXT: srli a0, a0, 16 503; RV32I-NEXT: call __extendhfsf2@plt 504; RV32I-NEXT: mv s0, a0 505; RV32I-NEXT: lui a1, 847872 506; RV32I-NEXT: call __gesf2@plt 507; RV32I-NEXT: mv s2, a0 508; RV32I-NEXT: mv a0, s0 509; RV32I-NEXT: call __fixsfsi@plt 510; RV32I-NEXT: li s1, 0 511; RV32I-NEXT: lui s4, 524288 512; RV32I-NEXT: lui s3, 524288 513; RV32I-NEXT: bltz s2, .LBB5_2 514; RV32I-NEXT: # %bb.1: # %start 515; RV32I-NEXT: mv s3, a0 516; RV32I-NEXT: .LBB5_2: # %start 517; RV32I-NEXT: lui a0, 323584 518; RV32I-NEXT: addi a1, a0, -1 519; RV32I-NEXT: mv a0, s0 520; RV32I-NEXT: call __gtsf2@plt 521; RV32I-NEXT: bge s1, a0, .LBB5_4 522; RV32I-NEXT: # %bb.3: 523; RV32I-NEXT: addi s3, s4, -1 524; RV32I-NEXT: .LBB5_4: # %start 525; RV32I-NEXT: mv a0, s0 526; RV32I-NEXT: mv a1, s0 527; RV32I-NEXT: call __unordsf2@plt 528; RV32I-NEXT: bne a0, s1, .LBB5_6 529; RV32I-NEXT: # %bb.5: # %start 530; RV32I-NEXT: mv s1, s3 531; RV32I-NEXT: .LBB5_6: # %start 532; RV32I-NEXT: mv a0, s1 533; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 534; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 535; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 536; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 537; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 538; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 539; RV32I-NEXT: addi sp, sp, 32 540; RV32I-NEXT: ret 541; 542; RV64I-LABEL: fcvt_w_h_sat: 543; RV64I: # %bb.0: # %start 544; RV64I-NEXT: addi sp, sp, -48 545; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 546; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 547; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 548; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 549; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 550; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill 551; RV64I-NEXT: slli a0, a0, 48 552; RV64I-NEXT: srli a0, a0, 48 553; RV64I-NEXT: call __extendhfsf2@plt 554; RV64I-NEXT: mv s0, a0 555; RV64I-NEXT: lui a1, 847872 556; RV64I-NEXT: call __gesf2@plt 557; RV64I-NEXT: mv s2, a0 558; RV64I-NEXT: mv a0, s0 559; RV64I-NEXT: call __fixsfdi@plt 560; RV64I-NEXT: li s1, 0 561; RV64I-NEXT: lui s4, 524288 562; RV64I-NEXT: lui s3, 524288 563; RV64I-NEXT: bltz s2, .LBB5_2 564; RV64I-NEXT: # %bb.1: # %start 565; RV64I-NEXT: mv s3, a0 566; RV64I-NEXT: .LBB5_2: # %start 567; RV64I-NEXT: lui a0, 323584 568; RV64I-NEXT: addiw a1, a0, -1 569; RV64I-NEXT: mv a0, s0 570; RV64I-NEXT: call __gtsf2@plt 571; RV64I-NEXT: bge s1, a0, .LBB5_4 572; RV64I-NEXT: # %bb.3: 573; RV64I-NEXT: addiw s3, s4, -1 574; RV64I-NEXT: .LBB5_4: # %start 575; RV64I-NEXT: mv a0, s0 576; RV64I-NEXT: mv a1, s0 577; RV64I-NEXT: call __unordsf2@plt 578; RV64I-NEXT: bne a0, s1, .LBB5_6 579; RV64I-NEXT: # %bb.5: # %start 580; RV64I-NEXT: mv s1, s3 581; RV64I-NEXT: .LBB5_6: # %start 582; RV64I-NEXT: mv a0, s1 583; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 584; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 585; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 586; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 587; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 588; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload 589; RV64I-NEXT: addi sp, sp, 48 590; RV64I-NEXT: ret 591start: 592 %0 = tail call i32 @llvm.fptosi.sat.i32.f16(half %a) 593 ret i32 %0 594} 595declare i32 @llvm.fptosi.sat.i32.f16(half) 596 597define i32 @fcvt_wu_h(half %a) nounwind { 598; RV32IZFH-LABEL: fcvt_wu_h: 599; RV32IZFH: # %bb.0: 600; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 601; RV32IZFH-NEXT: ret 602; 603; RV64IZFH-LABEL: fcvt_wu_h: 604; RV64IZFH: # %bb.0: 605; RV64IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 606; RV64IZFH-NEXT: ret 607; 608; RV32IDZFH-LABEL: fcvt_wu_h: 609; RV32IDZFH: # %bb.0: 610; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 611; RV32IDZFH-NEXT: ret 612; 613; RV64IDZFH-LABEL: fcvt_wu_h: 614; RV64IDZFH: # %bb.0: 615; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 616; RV64IDZFH-NEXT: ret 617; 618; RV32I-LABEL: fcvt_wu_h: 619; RV32I: # %bb.0: 620; RV32I-NEXT: addi sp, sp, -16 621; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 622; RV32I-NEXT: slli a0, a0, 16 623; RV32I-NEXT: srli a0, a0, 16 624; RV32I-NEXT: call __extendhfsf2@plt 625; RV32I-NEXT: call __fixunssfsi@plt 626; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 627; RV32I-NEXT: addi sp, sp, 16 628; RV32I-NEXT: ret 629; 630; RV64I-LABEL: fcvt_wu_h: 631; RV64I: # %bb.0: 632; RV64I-NEXT: addi sp, sp, -16 633; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 634; RV64I-NEXT: slli a0, a0, 48 635; RV64I-NEXT: srli a0, a0, 48 636; RV64I-NEXT: call __extendhfsf2@plt 637; RV64I-NEXT: call __fixunssfdi@plt 638; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 639; RV64I-NEXT: addi sp, sp, 16 640; RV64I-NEXT: ret 641 %1 = fptoui half %a to i32 642 ret i32 %1 643} 644 645; Test where the fptoui has multiple uses, one of which causes a sext to be 646; inserted on RV64. 647define i32 @fcvt_wu_h_multiple_use(half %x, i32* %y) nounwind { 648; RV32IZFH-LABEL: fcvt_wu_h_multiple_use: 649; RV32IZFH: # %bb.0: 650; RV32IZFH-NEXT: fcvt.wu.h a1, fa0, rtz 651; RV32IZFH-NEXT: li a0, 1 652; RV32IZFH-NEXT: beqz a1, .LBB7_2 653; RV32IZFH-NEXT: # %bb.1: 654; RV32IZFH-NEXT: mv a0, a1 655; RV32IZFH-NEXT: .LBB7_2: 656; RV32IZFH-NEXT: ret 657; 658; RV64IZFH-LABEL: fcvt_wu_h_multiple_use: 659; RV64IZFH: # %bb.0: 660; RV64IZFH-NEXT: fcvt.wu.h a1, fa0, rtz 661; RV64IZFH-NEXT: li a0, 1 662; RV64IZFH-NEXT: beqz a1, .LBB7_2 663; RV64IZFH-NEXT: # %bb.1: 664; RV64IZFH-NEXT: mv a0, a1 665; RV64IZFH-NEXT: .LBB7_2: 666; RV64IZFH-NEXT: ret 667; 668; RV32IDZFH-LABEL: fcvt_wu_h_multiple_use: 669; RV32IDZFH: # %bb.0: 670; RV32IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz 671; RV32IDZFH-NEXT: li a0, 1 672; RV32IDZFH-NEXT: beqz a1, .LBB7_2 673; RV32IDZFH-NEXT: # %bb.1: 674; RV32IDZFH-NEXT: mv a0, a1 675; RV32IDZFH-NEXT: .LBB7_2: 676; RV32IDZFH-NEXT: ret 677; 678; RV64IDZFH-LABEL: fcvt_wu_h_multiple_use: 679; RV64IDZFH: # %bb.0: 680; RV64IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz 681; RV64IDZFH-NEXT: li a0, 1 682; RV64IDZFH-NEXT: beqz a1, .LBB7_2 683; RV64IDZFH-NEXT: # %bb.1: 684; RV64IDZFH-NEXT: mv a0, a1 685; RV64IDZFH-NEXT: .LBB7_2: 686; RV64IDZFH-NEXT: ret 687; 688; RV32I-LABEL: fcvt_wu_h_multiple_use: 689; RV32I: # %bb.0: 690; RV32I-NEXT: addi sp, sp, -16 691; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 692; RV32I-NEXT: slli a0, a0, 16 693; RV32I-NEXT: srli a0, a0, 16 694; RV32I-NEXT: call __extendhfsf2@plt 695; RV32I-NEXT: call __fixunssfsi@plt 696; RV32I-NEXT: mv a1, a0 697; RV32I-NEXT: li a0, 1 698; RV32I-NEXT: beqz a1, .LBB7_2 699; RV32I-NEXT: # %bb.1: 700; RV32I-NEXT: mv a0, a1 701; RV32I-NEXT: .LBB7_2: 702; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 703; RV32I-NEXT: addi sp, sp, 16 704; RV32I-NEXT: ret 705; 706; RV64I-LABEL: fcvt_wu_h_multiple_use: 707; RV64I: # %bb.0: 708; RV64I-NEXT: addi sp, sp, -16 709; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 710; RV64I-NEXT: slli a0, a0, 48 711; RV64I-NEXT: srli a0, a0, 48 712; RV64I-NEXT: call __extendhfsf2@plt 713; RV64I-NEXT: call __fixunssfdi@plt 714; RV64I-NEXT: mv a1, a0 715; RV64I-NEXT: li a0, 1 716; RV64I-NEXT: beqz a1, .LBB7_2 717; RV64I-NEXT: # %bb.1: 718; RV64I-NEXT: mv a0, a1 719; RV64I-NEXT: .LBB7_2: 720; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 721; RV64I-NEXT: addi sp, sp, 16 722; RV64I-NEXT: ret 723 %a = fptoui half %x to i32 724 %b = icmp eq i32 %a, 0 725 %c = select i1 %b, i32 1, i32 %a 726 ret i32 %c 727} 728 729define i32 @fcvt_wu_h_sat(half %a) nounwind { 730; RV32IZFH-LABEL: fcvt_wu_h_sat: 731; RV32IZFH: # %bb.0: # %start 732; RV32IZFH-NEXT: feq.h a0, fa0, fa0 733; RV32IZFH-NEXT: beqz a0, .LBB8_2 734; RV32IZFH-NEXT: # %bb.1: 735; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 736; RV32IZFH-NEXT: .LBB8_2: # %start 737; RV32IZFH-NEXT: ret 738; 739; RV64IZFH-LABEL: fcvt_wu_h_sat: 740; RV64IZFH: # %bb.0: # %start 741; RV64IZFH-NEXT: feq.h a0, fa0, fa0 742; RV64IZFH-NEXT: beqz a0, .LBB8_2 743; RV64IZFH-NEXT: # %bb.1: 744; RV64IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 745; RV64IZFH-NEXT: .LBB8_2: # %start 746; RV64IZFH-NEXT: ret 747; 748; RV32IDZFH-LABEL: fcvt_wu_h_sat: 749; RV32IDZFH: # %bb.0: # %start 750; RV32IDZFH-NEXT: feq.h a0, fa0, fa0 751; RV32IDZFH-NEXT: beqz a0, .LBB8_2 752; RV32IDZFH-NEXT: # %bb.1: 753; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 754; RV32IDZFH-NEXT: .LBB8_2: # %start 755; RV32IDZFH-NEXT: ret 756; 757; RV64IDZFH-LABEL: fcvt_wu_h_sat: 758; RV64IDZFH: # %bb.0: # %start 759; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 760; RV64IDZFH-NEXT: beqz a0, .LBB8_2 761; RV64IDZFH-NEXT: # %bb.1: 762; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 763; RV64IDZFH-NEXT: .LBB8_2: # %start 764; RV64IDZFH-NEXT: ret 765; 766; RV32I-LABEL: fcvt_wu_h_sat: 767; RV32I: # %bb.0: # %start 768; RV32I-NEXT: addi sp, sp, -16 769; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 770; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 771; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 772; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 773; RV32I-NEXT: slli a0, a0, 16 774; RV32I-NEXT: srli a0, a0, 16 775; RV32I-NEXT: call __extendhfsf2@plt 776; RV32I-NEXT: mv s0, a0 777; RV32I-NEXT: li a1, 0 778; RV32I-NEXT: call __gesf2@plt 779; RV32I-NEXT: mv s1, a0 780; RV32I-NEXT: mv a0, s0 781; RV32I-NEXT: call __fixunssfsi@plt 782; RV32I-NEXT: li s2, 0 783; RV32I-NEXT: bltz s1, .LBB8_2 784; RV32I-NEXT: # %bb.1: # %start 785; RV32I-NEXT: mv s2, a0 786; RV32I-NEXT: .LBB8_2: # %start 787; RV32I-NEXT: lui a0, 325632 788; RV32I-NEXT: addi a1, a0, -1 789; RV32I-NEXT: mv a0, s0 790; RV32I-NEXT: call __gtsf2@plt 791; RV32I-NEXT: mv a1, a0 792; RV32I-NEXT: li a0, -1 793; RV32I-NEXT: bgtz a1, .LBB8_4 794; RV32I-NEXT: # %bb.3: # %start 795; RV32I-NEXT: mv a0, s2 796; RV32I-NEXT: .LBB8_4: # %start 797; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 798; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 799; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 800; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 801; RV32I-NEXT: addi sp, sp, 16 802; RV32I-NEXT: ret 803; 804; RV64I-LABEL: fcvt_wu_h_sat: 805; RV64I: # %bb.0: # %start 806; RV64I-NEXT: addi sp, sp, -32 807; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 808; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 809; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 810; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 811; RV64I-NEXT: slli a0, a0, 48 812; RV64I-NEXT: srli a0, a0, 48 813; RV64I-NEXT: call __extendhfsf2@plt 814; RV64I-NEXT: mv s0, a0 815; RV64I-NEXT: li a1, 0 816; RV64I-NEXT: call __gesf2@plt 817; RV64I-NEXT: mv s2, a0 818; RV64I-NEXT: mv a0, s0 819; RV64I-NEXT: call __fixunssfdi@plt 820; RV64I-NEXT: li s1, 0 821; RV64I-NEXT: bltz s2, .LBB8_2 822; RV64I-NEXT: # %bb.1: # %start 823; RV64I-NEXT: mv s1, a0 824; RV64I-NEXT: .LBB8_2: # %start 825; RV64I-NEXT: lui a0, 325632 826; RV64I-NEXT: addiw a1, a0, -1 827; RV64I-NEXT: mv a0, s0 828; RV64I-NEXT: call __gtsf2@plt 829; RV64I-NEXT: blez a0, .LBB8_4 830; RV64I-NEXT: # %bb.3: 831; RV64I-NEXT: li a0, -1 832; RV64I-NEXT: srli s1, a0, 32 833; RV64I-NEXT: .LBB8_4: # %start 834; RV64I-NEXT: mv a0, s1 835; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 836; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 837; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 838; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 839; RV64I-NEXT: addi sp, sp, 32 840; RV64I-NEXT: ret 841start: 842 %0 = tail call i32 @llvm.fptoui.sat.i32.f16(half %a) 843 ret i32 %0 844} 845declare i32 @llvm.fptoui.sat.i32.f16(half) 846 847define i64 @fcvt_l_h(half %a) nounwind { 848; RV32IZFH-LABEL: fcvt_l_h: 849; RV32IZFH: # %bb.0: 850; RV32IZFH-NEXT: addi sp, sp, -16 851; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 852; RV32IZFH-NEXT: call __fixhfdi@plt 853; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 854; RV32IZFH-NEXT: addi sp, sp, 16 855; RV32IZFH-NEXT: ret 856; 857; RV64IZFH-LABEL: fcvt_l_h: 858; RV64IZFH: # %bb.0: 859; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 860; RV64IZFH-NEXT: ret 861; 862; RV32IDZFH-LABEL: fcvt_l_h: 863; RV32IDZFH: # %bb.0: 864; RV32IDZFH-NEXT: addi sp, sp, -16 865; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 866; RV32IDZFH-NEXT: call __fixhfdi@plt 867; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 868; RV32IDZFH-NEXT: addi sp, sp, 16 869; RV32IDZFH-NEXT: ret 870; 871; RV64IDZFH-LABEL: fcvt_l_h: 872; RV64IDZFH: # %bb.0: 873; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 874; RV64IDZFH-NEXT: ret 875; 876; RV32I-LABEL: fcvt_l_h: 877; RV32I: # %bb.0: 878; RV32I-NEXT: addi sp, sp, -16 879; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 880; RV32I-NEXT: slli a0, a0, 16 881; RV32I-NEXT: srli a0, a0, 16 882; RV32I-NEXT: call __extendhfsf2@plt 883; RV32I-NEXT: call __fixsfdi@plt 884; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 885; RV32I-NEXT: addi sp, sp, 16 886; RV32I-NEXT: ret 887; 888; RV64I-LABEL: fcvt_l_h: 889; RV64I: # %bb.0: 890; RV64I-NEXT: addi sp, sp, -16 891; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 892; RV64I-NEXT: slli a0, a0, 48 893; RV64I-NEXT: srli a0, a0, 48 894; RV64I-NEXT: call __extendhfsf2@plt 895; RV64I-NEXT: call __fixsfdi@plt 896; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 897; RV64I-NEXT: addi sp, sp, 16 898; RV64I-NEXT: ret 899 %1 = fptosi half %a to i64 900 ret i64 %1 901} 902 903define i64 @fcvt_l_h_sat(half %a) nounwind { 904; RV32IZFH-LABEL: fcvt_l_h_sat: 905; RV32IZFH: # %bb.0: # %start 906; RV32IZFH-NEXT: addi sp, sp, -16 907; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 908; RV32IZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 909; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 910; RV32IZFH-NEXT: lui a0, %hi(.LCPI10_0) 911; RV32IZFH-NEXT: flw ft0, %lo(.LCPI10_0)(a0) 912; RV32IZFH-NEXT: fcvt.s.h fs0, fa0 913; RV32IZFH-NEXT: fle.s s0, ft0, fs0 914; RV32IZFH-NEXT: fmv.s fa0, fs0 915; RV32IZFH-NEXT: call __fixsfdi@plt 916; RV32IZFH-NEXT: mv a2, a0 917; RV32IZFH-NEXT: bnez s0, .LBB10_2 918; RV32IZFH-NEXT: # %bb.1: # %start 919; RV32IZFH-NEXT: li a2, 0 920; RV32IZFH-NEXT: .LBB10_2: # %start 921; RV32IZFH-NEXT: lui a0, %hi(.LCPI10_1) 922; RV32IZFH-NEXT: flw ft0, %lo(.LCPI10_1)(a0) 923; RV32IZFH-NEXT: flt.s a3, ft0, fs0 924; RV32IZFH-NEXT: li a0, -1 925; RV32IZFH-NEXT: beqz a3, .LBB10_9 926; RV32IZFH-NEXT: # %bb.3: # %start 927; RV32IZFH-NEXT: feq.s a2, fs0, fs0 928; RV32IZFH-NEXT: beqz a2, .LBB10_10 929; RV32IZFH-NEXT: .LBB10_4: # %start 930; RV32IZFH-NEXT: lui a4, 524288 931; RV32IZFH-NEXT: beqz s0, .LBB10_11 932; RV32IZFH-NEXT: .LBB10_5: # %start 933; RV32IZFH-NEXT: bnez a3, .LBB10_12 934; RV32IZFH-NEXT: .LBB10_6: # %start 935; RV32IZFH-NEXT: bnez a2, .LBB10_8 936; RV32IZFH-NEXT: .LBB10_7: # %start 937; RV32IZFH-NEXT: li a1, 0 938; RV32IZFH-NEXT: .LBB10_8: # %start 939; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 940; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 941; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 942; RV32IZFH-NEXT: addi sp, sp, 16 943; RV32IZFH-NEXT: ret 944; RV32IZFH-NEXT: .LBB10_9: # %start 945; RV32IZFH-NEXT: mv a0, a2 946; RV32IZFH-NEXT: feq.s a2, fs0, fs0 947; RV32IZFH-NEXT: bnez a2, .LBB10_4 948; RV32IZFH-NEXT: .LBB10_10: # %start 949; RV32IZFH-NEXT: li a0, 0 950; RV32IZFH-NEXT: lui a4, 524288 951; RV32IZFH-NEXT: bnez s0, .LBB10_5 952; RV32IZFH-NEXT: .LBB10_11: # %start 953; RV32IZFH-NEXT: lui a1, 524288 954; RV32IZFH-NEXT: beqz a3, .LBB10_6 955; RV32IZFH-NEXT: .LBB10_12: 956; RV32IZFH-NEXT: addi a1, a4, -1 957; RV32IZFH-NEXT: beqz a2, .LBB10_7 958; RV32IZFH-NEXT: j .LBB10_8 959; 960; RV64IZFH-LABEL: fcvt_l_h_sat: 961; RV64IZFH: # %bb.0: # %start 962; RV64IZFH-NEXT: feq.h a0, fa0, fa0 963; RV64IZFH-NEXT: beqz a0, .LBB10_2 964; RV64IZFH-NEXT: # %bb.1: 965; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 966; RV64IZFH-NEXT: .LBB10_2: # %start 967; RV64IZFH-NEXT: ret 968; 969; RV32IDZFH-LABEL: fcvt_l_h_sat: 970; RV32IDZFH: # %bb.0: # %start 971; RV32IDZFH-NEXT: addi sp, sp, -16 972; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 973; RV32IDZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 974; RV32IDZFH-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill 975; RV32IDZFH-NEXT: lui a0, %hi(.LCPI10_0) 976; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI10_0)(a0) 977; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 978; RV32IDZFH-NEXT: fle.s s0, ft0, fs0 979; RV32IDZFH-NEXT: fmv.s fa0, fs0 980; RV32IDZFH-NEXT: call __fixsfdi@plt 981; RV32IDZFH-NEXT: mv a2, a0 982; RV32IDZFH-NEXT: bnez s0, .LBB10_2 983; RV32IDZFH-NEXT: # %bb.1: # %start 984; RV32IDZFH-NEXT: li a2, 0 985; RV32IDZFH-NEXT: .LBB10_2: # %start 986; RV32IDZFH-NEXT: lui a0, %hi(.LCPI10_1) 987; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI10_1)(a0) 988; RV32IDZFH-NEXT: flt.s a3, ft0, fs0 989; RV32IDZFH-NEXT: li a0, -1 990; RV32IDZFH-NEXT: beqz a3, .LBB10_9 991; RV32IDZFH-NEXT: # %bb.3: # %start 992; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 993; RV32IDZFH-NEXT: beqz a2, .LBB10_10 994; RV32IDZFH-NEXT: .LBB10_4: # %start 995; RV32IDZFH-NEXT: lui a4, 524288 996; RV32IDZFH-NEXT: beqz s0, .LBB10_11 997; RV32IDZFH-NEXT: .LBB10_5: # %start 998; RV32IDZFH-NEXT: bnez a3, .LBB10_12 999; RV32IDZFH-NEXT: .LBB10_6: # %start 1000; RV32IDZFH-NEXT: bnez a2, .LBB10_8 1001; RV32IDZFH-NEXT: .LBB10_7: # %start 1002; RV32IDZFH-NEXT: li a1, 0 1003; RV32IDZFH-NEXT: .LBB10_8: # %start 1004; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1005; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1006; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload 1007; RV32IDZFH-NEXT: addi sp, sp, 16 1008; RV32IDZFH-NEXT: ret 1009; RV32IDZFH-NEXT: .LBB10_9: # %start 1010; RV32IDZFH-NEXT: mv a0, a2 1011; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 1012; RV32IDZFH-NEXT: bnez a2, .LBB10_4 1013; RV32IDZFH-NEXT: .LBB10_10: # %start 1014; RV32IDZFH-NEXT: li a0, 0 1015; RV32IDZFH-NEXT: lui a4, 524288 1016; RV32IDZFH-NEXT: bnez s0, .LBB10_5 1017; RV32IDZFH-NEXT: .LBB10_11: # %start 1018; RV32IDZFH-NEXT: lui a1, 524288 1019; RV32IDZFH-NEXT: beqz a3, .LBB10_6 1020; RV32IDZFH-NEXT: .LBB10_12: 1021; RV32IDZFH-NEXT: addi a1, a4, -1 1022; RV32IDZFH-NEXT: beqz a2, .LBB10_7 1023; RV32IDZFH-NEXT: j .LBB10_8 1024; 1025; RV64IDZFH-LABEL: fcvt_l_h_sat: 1026; RV64IDZFH: # %bb.0: # %start 1027; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 1028; RV64IDZFH-NEXT: beqz a0, .LBB10_2 1029; RV64IDZFH-NEXT: # %bb.1: 1030; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 1031; RV64IDZFH-NEXT: .LBB10_2: # %start 1032; RV64IDZFH-NEXT: ret 1033; 1034; RV32I-LABEL: fcvt_l_h_sat: 1035; RV32I: # %bb.0: # %start 1036; RV32I-NEXT: addi sp, sp, -32 1037; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1038; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1039; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1040; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1041; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1042; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 1043; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill 1044; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill 1045; RV32I-NEXT: slli a0, a0, 16 1046; RV32I-NEXT: srli a0, a0, 16 1047; RV32I-NEXT: call __extendhfsf2@plt 1048; RV32I-NEXT: mv s0, a0 1049; RV32I-NEXT: lui a1, 913408 1050; RV32I-NEXT: call __gesf2@plt 1051; RV32I-NEXT: mv s3, a0 1052; RV32I-NEXT: mv a0, s0 1053; RV32I-NEXT: call __fixsfdi@plt 1054; RV32I-NEXT: mv s2, a1 1055; RV32I-NEXT: li s1, 0 1056; RV32I-NEXT: li s5, 0 1057; RV32I-NEXT: bltz s3, .LBB10_2 1058; RV32I-NEXT: # %bb.1: # %start 1059; RV32I-NEXT: mv s5, a0 1060; RV32I-NEXT: .LBB10_2: # %start 1061; RV32I-NEXT: lui a0, 389120 1062; RV32I-NEXT: addi s4, a0, -1 1063; RV32I-NEXT: mv a0, s0 1064; RV32I-NEXT: mv a1, s4 1065; RV32I-NEXT: call __gtsf2@plt 1066; RV32I-NEXT: li s6, -1 1067; RV32I-NEXT: blt s1, a0, .LBB10_4 1068; RV32I-NEXT: # %bb.3: # %start 1069; RV32I-NEXT: mv s6, s5 1070; RV32I-NEXT: .LBB10_4: # %start 1071; RV32I-NEXT: mv a0, s0 1072; RV32I-NEXT: mv a1, s0 1073; RV32I-NEXT: call __unordsf2@plt 1074; RV32I-NEXT: mv s3, s1 1075; RV32I-NEXT: bne a0, s1, .LBB10_6 1076; RV32I-NEXT: # %bb.5: # %start 1077; RV32I-NEXT: mv s3, s6 1078; RV32I-NEXT: .LBB10_6: # %start 1079; RV32I-NEXT: lui a1, 913408 1080; RV32I-NEXT: mv a0, s0 1081; RV32I-NEXT: call __gesf2@plt 1082; RV32I-NEXT: lui s6, 524288 1083; RV32I-NEXT: lui s5, 524288 1084; RV32I-NEXT: blt a0, s1, .LBB10_8 1085; RV32I-NEXT: # %bb.7: # %start 1086; RV32I-NEXT: mv s5, s2 1087; RV32I-NEXT: .LBB10_8: # %start 1088; RV32I-NEXT: mv a0, s0 1089; RV32I-NEXT: mv a1, s4 1090; RV32I-NEXT: call __gtsf2@plt 1091; RV32I-NEXT: bge s1, a0, .LBB10_10 1092; RV32I-NEXT: # %bb.9: 1093; RV32I-NEXT: addi s5, s6, -1 1094; RV32I-NEXT: .LBB10_10: # %start 1095; RV32I-NEXT: mv a0, s0 1096; RV32I-NEXT: mv a1, s0 1097; RV32I-NEXT: call __unordsf2@plt 1098; RV32I-NEXT: bne a0, s1, .LBB10_12 1099; RV32I-NEXT: # %bb.11: # %start 1100; RV32I-NEXT: mv s1, s5 1101; RV32I-NEXT: .LBB10_12: # %start 1102; RV32I-NEXT: mv a0, s3 1103; RV32I-NEXT: mv a1, s1 1104; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1105; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1106; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1107; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1108; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1109; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 1110; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload 1111; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload 1112; RV32I-NEXT: addi sp, sp, 32 1113; RV32I-NEXT: ret 1114; 1115; RV64I-LABEL: fcvt_l_h_sat: 1116; RV64I: # %bb.0: # %start 1117; RV64I-NEXT: addi sp, sp, -48 1118; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 1119; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 1120; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 1121; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 1122; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 1123; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill 1124; RV64I-NEXT: slli a0, a0, 48 1125; RV64I-NEXT: srli a0, a0, 48 1126; RV64I-NEXT: call __extendhfsf2@plt 1127; RV64I-NEXT: mv s0, a0 1128; RV64I-NEXT: lui a1, 913408 1129; RV64I-NEXT: call __gesf2@plt 1130; RV64I-NEXT: mv s3, a0 1131; RV64I-NEXT: mv a0, s0 1132; RV64I-NEXT: call __fixsfdi@plt 1133; RV64I-NEXT: li s1, 0 1134; RV64I-NEXT: li s4, -1 1135; RV64I-NEXT: bltz s3, .LBB10_2 1136; RV64I-NEXT: # %bb.1: # %start 1137; RV64I-NEXT: mv s2, a0 1138; RV64I-NEXT: j .LBB10_3 1139; RV64I-NEXT: .LBB10_2: 1140; RV64I-NEXT: slli s2, s4, 63 1141; RV64I-NEXT: .LBB10_3: # %start 1142; RV64I-NEXT: lui a0, 389120 1143; RV64I-NEXT: addiw a1, a0, -1 1144; RV64I-NEXT: mv a0, s0 1145; RV64I-NEXT: call __gtsf2@plt 1146; RV64I-NEXT: bge s1, a0, .LBB10_5 1147; RV64I-NEXT: # %bb.4: 1148; RV64I-NEXT: srli s2, s4, 1 1149; RV64I-NEXT: .LBB10_5: # %start 1150; RV64I-NEXT: mv a0, s0 1151; RV64I-NEXT: mv a1, s0 1152; RV64I-NEXT: call __unordsf2@plt 1153; RV64I-NEXT: bne a0, s1, .LBB10_7 1154; RV64I-NEXT: # %bb.6: # %start 1155; RV64I-NEXT: mv s1, s2 1156; RV64I-NEXT: .LBB10_7: # %start 1157; RV64I-NEXT: mv a0, s1 1158; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 1159; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 1160; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 1161; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 1162; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 1163; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload 1164; RV64I-NEXT: addi sp, sp, 48 1165; RV64I-NEXT: ret 1166start: 1167 %0 = tail call i64 @llvm.fptosi.sat.i64.f16(half %a) 1168 ret i64 %0 1169} 1170declare i64 @llvm.fptosi.sat.i64.f16(half) 1171 1172define i64 @fcvt_lu_h(half %a) nounwind { 1173; RV32IZFH-LABEL: fcvt_lu_h: 1174; RV32IZFH: # %bb.0: 1175; RV32IZFH-NEXT: addi sp, sp, -16 1176; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1177; RV32IZFH-NEXT: call __fixunshfdi@plt 1178; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1179; RV32IZFH-NEXT: addi sp, sp, 16 1180; RV32IZFH-NEXT: ret 1181; 1182; RV64IZFH-LABEL: fcvt_lu_h: 1183; RV64IZFH: # %bb.0: 1184; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1185; RV64IZFH-NEXT: ret 1186; 1187; RV32IDZFH-LABEL: fcvt_lu_h: 1188; RV32IDZFH: # %bb.0: 1189; RV32IDZFH-NEXT: addi sp, sp, -16 1190; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1191; RV32IDZFH-NEXT: call __fixunshfdi@plt 1192; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1193; RV32IDZFH-NEXT: addi sp, sp, 16 1194; RV32IDZFH-NEXT: ret 1195; 1196; RV64IDZFH-LABEL: fcvt_lu_h: 1197; RV64IDZFH: # %bb.0: 1198; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1199; RV64IDZFH-NEXT: ret 1200; 1201; RV32I-LABEL: fcvt_lu_h: 1202; RV32I: # %bb.0: 1203; RV32I-NEXT: addi sp, sp, -16 1204; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1205; RV32I-NEXT: slli a0, a0, 16 1206; RV32I-NEXT: srli a0, a0, 16 1207; RV32I-NEXT: call __extendhfsf2@plt 1208; RV32I-NEXT: call __fixunssfdi@plt 1209; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1210; RV32I-NEXT: addi sp, sp, 16 1211; RV32I-NEXT: ret 1212; 1213; RV64I-LABEL: fcvt_lu_h: 1214; RV64I: # %bb.0: 1215; RV64I-NEXT: addi sp, sp, -16 1216; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1217; RV64I-NEXT: slli a0, a0, 48 1218; RV64I-NEXT: srli a0, a0, 48 1219; RV64I-NEXT: call __extendhfsf2@plt 1220; RV64I-NEXT: call __fixunssfdi@plt 1221; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1222; RV64I-NEXT: addi sp, sp, 16 1223; RV64I-NEXT: ret 1224 %1 = fptoui half %a to i64 1225 ret i64 %1 1226} 1227 1228define i64 @fcvt_lu_h_sat(half %a) nounwind { 1229; RV32IZFH-LABEL: fcvt_lu_h_sat: 1230; RV32IZFH: # %bb.0: # %start 1231; RV32IZFH-NEXT: addi sp, sp, -16 1232; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1233; RV32IZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1234; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 1235; RV32IZFH-NEXT: fcvt.s.h fs0, fa0 1236; RV32IZFH-NEXT: fmv.w.x ft0, zero 1237; RV32IZFH-NEXT: fle.s s0, ft0, fs0 1238; RV32IZFH-NEXT: fmv.s fa0, fs0 1239; RV32IZFH-NEXT: call __fixunssfdi@plt 1240; RV32IZFH-NEXT: mv a3, a0 1241; RV32IZFH-NEXT: bnez s0, .LBB12_2 1242; RV32IZFH-NEXT: # %bb.1: # %start 1243; RV32IZFH-NEXT: li a3, 0 1244; RV32IZFH-NEXT: .LBB12_2: # %start 1245; RV32IZFH-NEXT: lui a0, %hi(.LCPI12_0) 1246; RV32IZFH-NEXT: flw ft0, %lo(.LCPI12_0)(a0) 1247; RV32IZFH-NEXT: flt.s a4, ft0, fs0 1248; RV32IZFH-NEXT: li a2, -1 1249; RV32IZFH-NEXT: li a0, -1 1250; RV32IZFH-NEXT: beqz a4, .LBB12_7 1251; RV32IZFH-NEXT: # %bb.3: # %start 1252; RV32IZFH-NEXT: beqz s0, .LBB12_8 1253; RV32IZFH-NEXT: .LBB12_4: # %start 1254; RV32IZFH-NEXT: bnez a4, .LBB12_6 1255; RV32IZFH-NEXT: .LBB12_5: # %start 1256; RV32IZFH-NEXT: mv a2, a1 1257; RV32IZFH-NEXT: .LBB12_6: # %start 1258; RV32IZFH-NEXT: mv a1, a2 1259; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1260; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1261; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 1262; RV32IZFH-NEXT: addi sp, sp, 16 1263; RV32IZFH-NEXT: ret 1264; RV32IZFH-NEXT: .LBB12_7: # %start 1265; RV32IZFH-NEXT: mv a0, a3 1266; RV32IZFH-NEXT: bnez s0, .LBB12_4 1267; RV32IZFH-NEXT: .LBB12_8: # %start 1268; RV32IZFH-NEXT: li a1, 0 1269; RV32IZFH-NEXT: beqz a4, .LBB12_5 1270; RV32IZFH-NEXT: j .LBB12_6 1271; 1272; RV64IZFH-LABEL: fcvt_lu_h_sat: 1273; RV64IZFH: # %bb.0: # %start 1274; RV64IZFH-NEXT: feq.h a0, fa0, fa0 1275; RV64IZFH-NEXT: beqz a0, .LBB12_2 1276; RV64IZFH-NEXT: # %bb.1: 1277; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1278; RV64IZFH-NEXT: .LBB12_2: # %start 1279; RV64IZFH-NEXT: ret 1280; 1281; RV32IDZFH-LABEL: fcvt_lu_h_sat: 1282; RV32IDZFH: # %bb.0: # %start 1283; RV32IDZFH-NEXT: addi sp, sp, -16 1284; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1285; RV32IDZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1286; RV32IDZFH-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill 1287; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 1288; RV32IDZFH-NEXT: fmv.w.x ft0, zero 1289; RV32IDZFH-NEXT: fle.s s0, ft0, fs0 1290; RV32IDZFH-NEXT: fmv.s fa0, fs0 1291; RV32IDZFH-NEXT: call __fixunssfdi@plt 1292; RV32IDZFH-NEXT: mv a3, a0 1293; RV32IDZFH-NEXT: bnez s0, .LBB12_2 1294; RV32IDZFH-NEXT: # %bb.1: # %start 1295; RV32IDZFH-NEXT: li a3, 0 1296; RV32IDZFH-NEXT: .LBB12_2: # %start 1297; RV32IDZFH-NEXT: lui a0, %hi(.LCPI12_0) 1298; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI12_0)(a0) 1299; RV32IDZFH-NEXT: flt.s a4, ft0, fs0 1300; RV32IDZFH-NEXT: li a2, -1 1301; RV32IDZFH-NEXT: li a0, -1 1302; RV32IDZFH-NEXT: beqz a4, .LBB12_7 1303; RV32IDZFH-NEXT: # %bb.3: # %start 1304; RV32IDZFH-NEXT: beqz s0, .LBB12_8 1305; RV32IDZFH-NEXT: .LBB12_4: # %start 1306; RV32IDZFH-NEXT: bnez a4, .LBB12_6 1307; RV32IDZFH-NEXT: .LBB12_5: # %start 1308; RV32IDZFH-NEXT: mv a2, a1 1309; RV32IDZFH-NEXT: .LBB12_6: # %start 1310; RV32IDZFH-NEXT: mv a1, a2 1311; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1312; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1313; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload 1314; RV32IDZFH-NEXT: addi sp, sp, 16 1315; RV32IDZFH-NEXT: ret 1316; RV32IDZFH-NEXT: .LBB12_7: # %start 1317; RV32IDZFH-NEXT: mv a0, a3 1318; RV32IDZFH-NEXT: bnez s0, .LBB12_4 1319; RV32IDZFH-NEXT: .LBB12_8: # %start 1320; RV32IDZFH-NEXT: li a1, 0 1321; RV32IDZFH-NEXT: beqz a4, .LBB12_5 1322; RV32IDZFH-NEXT: j .LBB12_6 1323; 1324; RV64IDZFH-LABEL: fcvt_lu_h_sat: 1325; RV64IDZFH: # %bb.0: # %start 1326; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 1327; RV64IDZFH-NEXT: beqz a0, .LBB12_2 1328; RV64IDZFH-NEXT: # %bb.1: 1329; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1330; RV64IDZFH-NEXT: .LBB12_2: # %start 1331; RV64IDZFH-NEXT: ret 1332; 1333; RV32I-LABEL: fcvt_lu_h_sat: 1334; RV32I: # %bb.0: # %start 1335; RV32I-NEXT: addi sp, sp, -32 1336; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1337; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1338; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1339; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1340; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1341; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 1342; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill 1343; RV32I-NEXT: slli a0, a0, 16 1344; RV32I-NEXT: srli a0, a0, 16 1345; RV32I-NEXT: call __extendhfsf2@plt 1346; RV32I-NEXT: mv s0, a0 1347; RV32I-NEXT: li a1, 0 1348; RV32I-NEXT: call __gesf2@plt 1349; RV32I-NEXT: mv s2, a0 1350; RV32I-NEXT: mv a0, s0 1351; RV32I-NEXT: call __fixunssfdi@plt 1352; RV32I-NEXT: mv s1, a1 1353; RV32I-NEXT: li s5, 0 1354; RV32I-NEXT: bltz s2, .LBB12_2 1355; RV32I-NEXT: # %bb.1: # %start 1356; RV32I-NEXT: mv s5, a0 1357; RV32I-NEXT: .LBB12_2: # %start 1358; RV32I-NEXT: lui a0, 391168 1359; RV32I-NEXT: addi s4, a0, -1 1360; RV32I-NEXT: mv a0, s0 1361; RV32I-NEXT: mv a1, s4 1362; RV32I-NEXT: call __gtsf2@plt 1363; RV32I-NEXT: li s2, -1 1364; RV32I-NEXT: li s3, -1 1365; RV32I-NEXT: bgtz a0, .LBB12_4 1366; RV32I-NEXT: # %bb.3: # %start 1367; RV32I-NEXT: mv s3, s5 1368; RV32I-NEXT: .LBB12_4: # %start 1369; RV32I-NEXT: mv a0, s0 1370; RV32I-NEXT: li a1, 0 1371; RV32I-NEXT: call __gesf2@plt 1372; RV32I-NEXT: li s5, 0 1373; RV32I-NEXT: bltz a0, .LBB12_6 1374; RV32I-NEXT: # %bb.5: # %start 1375; RV32I-NEXT: mv s5, s1 1376; RV32I-NEXT: .LBB12_6: # %start 1377; RV32I-NEXT: mv a0, s0 1378; RV32I-NEXT: mv a1, s4 1379; RV32I-NEXT: call __gtsf2@plt 1380; RV32I-NEXT: bgtz a0, .LBB12_8 1381; RV32I-NEXT: # %bb.7: # %start 1382; RV32I-NEXT: mv s2, s5 1383; RV32I-NEXT: .LBB12_8: # %start 1384; RV32I-NEXT: mv a0, s3 1385; RV32I-NEXT: mv a1, s2 1386; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1387; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1388; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1389; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1390; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1391; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 1392; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload 1393; RV32I-NEXT: addi sp, sp, 32 1394; RV32I-NEXT: ret 1395; 1396; RV64I-LABEL: fcvt_lu_h_sat: 1397; RV64I: # %bb.0: # %start 1398; RV64I-NEXT: addi sp, sp, -32 1399; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 1400; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 1401; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 1402; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 1403; RV64I-NEXT: slli a0, a0, 48 1404; RV64I-NEXT: srli a0, a0, 48 1405; RV64I-NEXT: call __extendhfsf2@plt 1406; RV64I-NEXT: mv s0, a0 1407; RV64I-NEXT: li a1, 0 1408; RV64I-NEXT: call __gesf2@plt 1409; RV64I-NEXT: mv s1, a0 1410; RV64I-NEXT: mv a0, s0 1411; RV64I-NEXT: call __fixunssfdi@plt 1412; RV64I-NEXT: li s2, 0 1413; RV64I-NEXT: bltz s1, .LBB12_2 1414; RV64I-NEXT: # %bb.1: # %start 1415; RV64I-NEXT: mv s2, a0 1416; RV64I-NEXT: .LBB12_2: # %start 1417; RV64I-NEXT: lui a0, 391168 1418; RV64I-NEXT: addiw a1, a0, -1 1419; RV64I-NEXT: mv a0, s0 1420; RV64I-NEXT: call __gtsf2@plt 1421; RV64I-NEXT: mv a1, a0 1422; RV64I-NEXT: li a0, -1 1423; RV64I-NEXT: bgtz a1, .LBB12_4 1424; RV64I-NEXT: # %bb.3: # %start 1425; RV64I-NEXT: mv a0, s2 1426; RV64I-NEXT: .LBB12_4: # %start 1427; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 1428; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 1429; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 1430; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 1431; RV64I-NEXT: addi sp, sp, 32 1432; RV64I-NEXT: ret 1433start: 1434 %0 = tail call i64 @llvm.fptoui.sat.i64.f16(half %a) 1435 ret i64 %0 1436} 1437declare i64 @llvm.fptoui.sat.i64.f16(half) 1438 1439define half @fcvt_h_si(i16 %a) nounwind { 1440; RV32IZFH-LABEL: fcvt_h_si: 1441; RV32IZFH: # %bb.0: 1442; RV32IZFH-NEXT: slli a0, a0, 16 1443; RV32IZFH-NEXT: srai a0, a0, 16 1444; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1445; RV32IZFH-NEXT: ret 1446; 1447; RV64IZFH-LABEL: fcvt_h_si: 1448; RV64IZFH: # %bb.0: 1449; RV64IZFH-NEXT: slli a0, a0, 48 1450; RV64IZFH-NEXT: srai a0, a0, 48 1451; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1452; RV64IZFH-NEXT: ret 1453; 1454; RV32IDZFH-LABEL: fcvt_h_si: 1455; RV32IDZFH: # %bb.0: 1456; RV32IDZFH-NEXT: slli a0, a0, 16 1457; RV32IDZFH-NEXT: srai a0, a0, 16 1458; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1459; RV32IDZFH-NEXT: ret 1460; 1461; RV64IDZFH-LABEL: fcvt_h_si: 1462; RV64IDZFH: # %bb.0: 1463; RV64IDZFH-NEXT: slli a0, a0, 48 1464; RV64IDZFH-NEXT: srai a0, a0, 48 1465; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1466; RV64IDZFH-NEXT: ret 1467; 1468; RV32I-LABEL: fcvt_h_si: 1469; RV32I: # %bb.0: 1470; RV32I-NEXT: addi sp, sp, -16 1471; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1472; RV32I-NEXT: slli a0, a0, 16 1473; RV32I-NEXT: srai a0, a0, 16 1474; RV32I-NEXT: call __floatsisf@plt 1475; RV32I-NEXT: call __truncsfhf2@plt 1476; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1477; RV32I-NEXT: addi sp, sp, 16 1478; RV32I-NEXT: ret 1479; 1480; RV64I-LABEL: fcvt_h_si: 1481; RV64I: # %bb.0: 1482; RV64I-NEXT: addi sp, sp, -16 1483; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1484; RV64I-NEXT: slli a0, a0, 48 1485; RV64I-NEXT: srai a0, a0, 48 1486; RV64I-NEXT: call __floatsisf@plt 1487; RV64I-NEXT: call __truncsfhf2@plt 1488; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1489; RV64I-NEXT: addi sp, sp, 16 1490; RV64I-NEXT: ret 1491 %1 = sitofp i16 %a to half 1492 ret half %1 1493} 1494 1495define half @fcvt_h_si_signext(i16 signext %a) nounwind { 1496; RV32IZFH-LABEL: fcvt_h_si_signext: 1497; RV32IZFH: # %bb.0: 1498; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1499; RV32IZFH-NEXT: ret 1500; 1501; RV64IZFH-LABEL: fcvt_h_si_signext: 1502; RV64IZFH: # %bb.0: 1503; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1504; RV64IZFH-NEXT: ret 1505; 1506; RV32IDZFH-LABEL: fcvt_h_si_signext: 1507; RV32IDZFH: # %bb.0: 1508; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1509; RV32IDZFH-NEXT: ret 1510; 1511; RV64IDZFH-LABEL: fcvt_h_si_signext: 1512; RV64IDZFH: # %bb.0: 1513; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1514; RV64IDZFH-NEXT: ret 1515; 1516; RV32I-LABEL: fcvt_h_si_signext: 1517; RV32I: # %bb.0: 1518; RV32I-NEXT: addi sp, sp, -16 1519; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1520; RV32I-NEXT: call __floatsisf@plt 1521; RV32I-NEXT: call __truncsfhf2@plt 1522; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1523; RV32I-NEXT: addi sp, sp, 16 1524; RV32I-NEXT: ret 1525; 1526; RV64I-LABEL: fcvt_h_si_signext: 1527; RV64I: # %bb.0: 1528; RV64I-NEXT: addi sp, sp, -16 1529; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1530; RV64I-NEXT: call __floatsisf@plt 1531; RV64I-NEXT: call __truncsfhf2@plt 1532; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1533; RV64I-NEXT: addi sp, sp, 16 1534; RV64I-NEXT: ret 1535 %1 = sitofp i16 %a to half 1536 ret half %1 1537} 1538 1539define half @fcvt_h_ui(i16 %a) nounwind { 1540; RV32IZFH-LABEL: fcvt_h_ui: 1541; RV32IZFH: # %bb.0: 1542; RV32IZFH-NEXT: slli a0, a0, 16 1543; RV32IZFH-NEXT: srli a0, a0, 16 1544; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1545; RV32IZFH-NEXT: ret 1546; 1547; RV64IZFH-LABEL: fcvt_h_ui: 1548; RV64IZFH: # %bb.0: 1549; RV64IZFH-NEXT: slli a0, a0, 48 1550; RV64IZFH-NEXT: srli a0, a0, 48 1551; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1552; RV64IZFH-NEXT: ret 1553; 1554; RV32IDZFH-LABEL: fcvt_h_ui: 1555; RV32IDZFH: # %bb.0: 1556; RV32IDZFH-NEXT: slli a0, a0, 16 1557; RV32IDZFH-NEXT: srli a0, a0, 16 1558; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1559; RV32IDZFH-NEXT: ret 1560; 1561; RV64IDZFH-LABEL: fcvt_h_ui: 1562; RV64IDZFH: # %bb.0: 1563; RV64IDZFH-NEXT: slli a0, a0, 48 1564; RV64IDZFH-NEXT: srli a0, a0, 48 1565; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1566; RV64IDZFH-NEXT: ret 1567; 1568; RV32I-LABEL: fcvt_h_ui: 1569; RV32I: # %bb.0: 1570; RV32I-NEXT: addi sp, sp, -16 1571; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1572; RV32I-NEXT: slli a0, a0, 16 1573; RV32I-NEXT: srli a0, a0, 16 1574; RV32I-NEXT: call __floatunsisf@plt 1575; RV32I-NEXT: call __truncsfhf2@plt 1576; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1577; RV32I-NEXT: addi sp, sp, 16 1578; RV32I-NEXT: ret 1579; 1580; RV64I-LABEL: fcvt_h_ui: 1581; RV64I: # %bb.0: 1582; RV64I-NEXT: addi sp, sp, -16 1583; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1584; RV64I-NEXT: slli a0, a0, 48 1585; RV64I-NEXT: srli a0, a0, 48 1586; RV64I-NEXT: call __floatunsisf@plt 1587; RV64I-NEXT: call __truncsfhf2@plt 1588; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1589; RV64I-NEXT: addi sp, sp, 16 1590; RV64I-NEXT: ret 1591 %1 = uitofp i16 %a to half 1592 ret half %1 1593} 1594 1595define half @fcvt_h_ui_zeroext(i16 zeroext %a) nounwind { 1596; RV32IZFH-LABEL: fcvt_h_ui_zeroext: 1597; RV32IZFH: # %bb.0: 1598; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1599; RV32IZFH-NEXT: ret 1600; 1601; RV64IZFH-LABEL: fcvt_h_ui_zeroext: 1602; RV64IZFH: # %bb.0: 1603; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1604; RV64IZFH-NEXT: ret 1605; 1606; RV32IDZFH-LABEL: fcvt_h_ui_zeroext: 1607; RV32IDZFH: # %bb.0: 1608; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1609; RV32IDZFH-NEXT: ret 1610; 1611; RV64IDZFH-LABEL: fcvt_h_ui_zeroext: 1612; RV64IDZFH: # %bb.0: 1613; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1614; RV64IDZFH-NEXT: ret 1615; 1616; RV32I-LABEL: fcvt_h_ui_zeroext: 1617; RV32I: # %bb.0: 1618; RV32I-NEXT: addi sp, sp, -16 1619; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1620; RV32I-NEXT: call __floatunsisf@plt 1621; RV32I-NEXT: call __truncsfhf2@plt 1622; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1623; RV32I-NEXT: addi sp, sp, 16 1624; RV32I-NEXT: ret 1625; 1626; RV64I-LABEL: fcvt_h_ui_zeroext: 1627; RV64I: # %bb.0: 1628; RV64I-NEXT: addi sp, sp, -16 1629; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1630; RV64I-NEXT: call __floatunsisf@plt 1631; RV64I-NEXT: call __truncsfhf2@plt 1632; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1633; RV64I-NEXT: addi sp, sp, 16 1634; RV64I-NEXT: ret 1635 %1 = uitofp i16 %a to half 1636 ret half %1 1637} 1638 1639define half @fcvt_h_w(i32 %a) nounwind { 1640; RV32IZFH-LABEL: fcvt_h_w: 1641; RV32IZFH: # %bb.0: 1642; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1643; RV32IZFH-NEXT: ret 1644; 1645; RV64IZFH-LABEL: fcvt_h_w: 1646; RV64IZFH: # %bb.0: 1647; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1648; RV64IZFH-NEXT: ret 1649; 1650; RV32IDZFH-LABEL: fcvt_h_w: 1651; RV32IDZFH: # %bb.0: 1652; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1653; RV32IDZFH-NEXT: ret 1654; 1655; RV64IDZFH-LABEL: fcvt_h_w: 1656; RV64IDZFH: # %bb.0: 1657; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1658; RV64IDZFH-NEXT: ret 1659; 1660; RV32I-LABEL: fcvt_h_w: 1661; RV32I: # %bb.0: 1662; RV32I-NEXT: addi sp, sp, -16 1663; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1664; RV32I-NEXT: call __floatsisf@plt 1665; RV32I-NEXT: call __truncsfhf2@plt 1666; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1667; RV32I-NEXT: addi sp, sp, 16 1668; RV32I-NEXT: ret 1669; 1670; RV64I-LABEL: fcvt_h_w: 1671; RV64I: # %bb.0: 1672; RV64I-NEXT: addi sp, sp, -16 1673; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1674; RV64I-NEXT: sext.w a0, a0 1675; RV64I-NEXT: call __floatsisf@plt 1676; RV64I-NEXT: call __truncsfhf2@plt 1677; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1678; RV64I-NEXT: addi sp, sp, 16 1679; RV64I-NEXT: ret 1680 %1 = sitofp i32 %a to half 1681 ret half %1 1682} 1683 1684define half @fcvt_h_w_load(i32* %p) nounwind { 1685; RV32IZFH-LABEL: fcvt_h_w_load: 1686; RV32IZFH: # %bb.0: 1687; RV32IZFH-NEXT: lw a0, 0(a0) 1688; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1689; RV32IZFH-NEXT: ret 1690; 1691; RV64IZFH-LABEL: fcvt_h_w_load: 1692; RV64IZFH: # %bb.0: 1693; RV64IZFH-NEXT: lw a0, 0(a0) 1694; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1695; RV64IZFH-NEXT: ret 1696; 1697; RV32IDZFH-LABEL: fcvt_h_w_load: 1698; RV32IDZFH: # %bb.0: 1699; RV32IDZFH-NEXT: lw a0, 0(a0) 1700; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1701; RV32IDZFH-NEXT: ret 1702; 1703; RV64IDZFH-LABEL: fcvt_h_w_load: 1704; RV64IDZFH: # %bb.0: 1705; RV64IDZFH-NEXT: lw a0, 0(a0) 1706; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1707; RV64IDZFH-NEXT: ret 1708; 1709; RV32I-LABEL: fcvt_h_w_load: 1710; RV32I: # %bb.0: 1711; RV32I-NEXT: addi sp, sp, -16 1712; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1713; RV32I-NEXT: lw a0, 0(a0) 1714; RV32I-NEXT: call __floatsisf@plt 1715; RV32I-NEXT: call __truncsfhf2@plt 1716; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1717; RV32I-NEXT: addi sp, sp, 16 1718; RV32I-NEXT: ret 1719; 1720; RV64I-LABEL: fcvt_h_w_load: 1721; RV64I: # %bb.0: 1722; RV64I-NEXT: addi sp, sp, -16 1723; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1724; RV64I-NEXT: lw a0, 0(a0) 1725; RV64I-NEXT: call __floatsisf@plt 1726; RV64I-NEXT: call __truncsfhf2@plt 1727; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1728; RV64I-NEXT: addi sp, sp, 16 1729; RV64I-NEXT: ret 1730 %a = load i32, i32* %p 1731 %1 = sitofp i32 %a to half 1732 ret half %1 1733} 1734 1735define half @fcvt_h_wu(i32 %a) nounwind { 1736; RV32IZFH-LABEL: fcvt_h_wu: 1737; RV32IZFH: # %bb.0: 1738; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1739; RV32IZFH-NEXT: ret 1740; 1741; RV64IZFH-LABEL: fcvt_h_wu: 1742; RV64IZFH: # %bb.0: 1743; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1744; RV64IZFH-NEXT: ret 1745; 1746; RV32IDZFH-LABEL: fcvt_h_wu: 1747; RV32IDZFH: # %bb.0: 1748; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1749; RV32IDZFH-NEXT: ret 1750; 1751; RV64IDZFH-LABEL: fcvt_h_wu: 1752; RV64IDZFH: # %bb.0: 1753; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1754; RV64IDZFH-NEXT: ret 1755; 1756; RV32I-LABEL: fcvt_h_wu: 1757; RV32I: # %bb.0: 1758; RV32I-NEXT: addi sp, sp, -16 1759; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1760; RV32I-NEXT: call __floatunsisf@plt 1761; RV32I-NEXT: call __truncsfhf2@plt 1762; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1763; RV32I-NEXT: addi sp, sp, 16 1764; RV32I-NEXT: ret 1765; 1766; RV64I-LABEL: fcvt_h_wu: 1767; RV64I: # %bb.0: 1768; RV64I-NEXT: addi sp, sp, -16 1769; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1770; RV64I-NEXT: sext.w a0, a0 1771; RV64I-NEXT: call __floatunsisf@plt 1772; RV64I-NEXT: call __truncsfhf2@plt 1773; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1774; RV64I-NEXT: addi sp, sp, 16 1775; RV64I-NEXT: ret 1776 %1 = uitofp i32 %a to half 1777 ret half %1 1778} 1779 1780define half @fcvt_h_wu_load(i32* %p) nounwind { 1781; RV32IZFH-LABEL: fcvt_h_wu_load: 1782; RV32IZFH: # %bb.0: 1783; RV32IZFH-NEXT: lw a0, 0(a0) 1784; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1785; RV32IZFH-NEXT: ret 1786; 1787; RV64IZFH-LABEL: fcvt_h_wu_load: 1788; RV64IZFH: # %bb.0: 1789; RV64IZFH-NEXT: lwu a0, 0(a0) 1790; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1791; RV64IZFH-NEXT: ret 1792; 1793; RV32IDZFH-LABEL: fcvt_h_wu_load: 1794; RV32IDZFH: # %bb.0: 1795; RV32IDZFH-NEXT: lw a0, 0(a0) 1796; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1797; RV32IDZFH-NEXT: ret 1798; 1799; RV64IDZFH-LABEL: fcvt_h_wu_load: 1800; RV64IDZFH: # %bb.0: 1801; RV64IDZFH-NEXT: lwu a0, 0(a0) 1802; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1803; RV64IDZFH-NEXT: ret 1804; 1805; RV32I-LABEL: fcvt_h_wu_load: 1806; RV32I: # %bb.0: 1807; RV32I-NEXT: addi sp, sp, -16 1808; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1809; RV32I-NEXT: lw a0, 0(a0) 1810; RV32I-NEXT: call __floatunsisf@plt 1811; RV32I-NEXT: call __truncsfhf2@plt 1812; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1813; RV32I-NEXT: addi sp, sp, 16 1814; RV32I-NEXT: ret 1815; 1816; RV64I-LABEL: fcvt_h_wu_load: 1817; RV64I: # %bb.0: 1818; RV64I-NEXT: addi sp, sp, -16 1819; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1820; RV64I-NEXT: lw a0, 0(a0) 1821; RV64I-NEXT: call __floatunsisf@plt 1822; RV64I-NEXT: call __truncsfhf2@plt 1823; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1824; RV64I-NEXT: addi sp, sp, 16 1825; RV64I-NEXT: ret 1826 %a = load i32, i32* %p 1827 %1 = uitofp i32 %a to half 1828 ret half %1 1829} 1830 1831define half @fcvt_h_l(i64 %a) nounwind { 1832; RV32IZFH-LABEL: fcvt_h_l: 1833; RV32IZFH: # %bb.0: 1834; RV32IZFH-NEXT: addi sp, sp, -16 1835; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1836; RV32IZFH-NEXT: call __floatdihf@plt 1837; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1838; RV32IZFH-NEXT: addi sp, sp, 16 1839; RV32IZFH-NEXT: ret 1840; 1841; RV64IZFH-LABEL: fcvt_h_l: 1842; RV64IZFH: # %bb.0: 1843; RV64IZFH-NEXT: fcvt.h.l fa0, a0 1844; RV64IZFH-NEXT: ret 1845; 1846; RV32IDZFH-LABEL: fcvt_h_l: 1847; RV32IDZFH: # %bb.0: 1848; RV32IDZFH-NEXT: addi sp, sp, -16 1849; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1850; RV32IDZFH-NEXT: call __floatdihf@plt 1851; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1852; RV32IDZFH-NEXT: addi sp, sp, 16 1853; RV32IDZFH-NEXT: ret 1854; 1855; RV64IDZFH-LABEL: fcvt_h_l: 1856; RV64IDZFH: # %bb.0: 1857; RV64IDZFH-NEXT: fcvt.h.l fa0, a0 1858; RV64IDZFH-NEXT: ret 1859; 1860; RV32I-LABEL: fcvt_h_l: 1861; RV32I: # %bb.0: 1862; RV32I-NEXT: addi sp, sp, -16 1863; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1864; RV32I-NEXT: call __floatdisf@plt 1865; RV32I-NEXT: call __truncsfhf2@plt 1866; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1867; RV32I-NEXT: addi sp, sp, 16 1868; RV32I-NEXT: ret 1869; 1870; RV64I-LABEL: fcvt_h_l: 1871; RV64I: # %bb.0: 1872; RV64I-NEXT: addi sp, sp, -16 1873; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1874; RV64I-NEXT: call __floatdisf@plt 1875; RV64I-NEXT: call __truncsfhf2@plt 1876; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1877; RV64I-NEXT: addi sp, sp, 16 1878; RV64I-NEXT: ret 1879 %1 = sitofp i64 %a to half 1880 ret half %1 1881} 1882 1883define half @fcvt_h_lu(i64 %a) nounwind { 1884; RV32IZFH-LABEL: fcvt_h_lu: 1885; RV32IZFH: # %bb.0: 1886; RV32IZFH-NEXT: addi sp, sp, -16 1887; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1888; RV32IZFH-NEXT: call __floatundihf@plt 1889; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1890; RV32IZFH-NEXT: addi sp, sp, 16 1891; RV32IZFH-NEXT: ret 1892; 1893; RV64IZFH-LABEL: fcvt_h_lu: 1894; RV64IZFH: # %bb.0: 1895; RV64IZFH-NEXT: fcvt.h.lu fa0, a0 1896; RV64IZFH-NEXT: ret 1897; 1898; RV32IDZFH-LABEL: fcvt_h_lu: 1899; RV32IDZFH: # %bb.0: 1900; RV32IDZFH-NEXT: addi sp, sp, -16 1901; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1902; RV32IDZFH-NEXT: call __floatundihf@plt 1903; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1904; RV32IDZFH-NEXT: addi sp, sp, 16 1905; RV32IDZFH-NEXT: ret 1906; 1907; RV64IDZFH-LABEL: fcvt_h_lu: 1908; RV64IDZFH: # %bb.0: 1909; RV64IDZFH-NEXT: fcvt.h.lu fa0, a0 1910; RV64IDZFH-NEXT: ret 1911; 1912; RV32I-LABEL: fcvt_h_lu: 1913; RV32I: # %bb.0: 1914; RV32I-NEXT: addi sp, sp, -16 1915; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1916; RV32I-NEXT: call __floatundisf@plt 1917; RV32I-NEXT: call __truncsfhf2@plt 1918; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1919; RV32I-NEXT: addi sp, sp, 16 1920; RV32I-NEXT: ret 1921; 1922; RV64I-LABEL: fcvt_h_lu: 1923; RV64I: # %bb.0: 1924; RV64I-NEXT: addi sp, sp, -16 1925; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1926; RV64I-NEXT: call __floatundisf@plt 1927; RV64I-NEXT: call __truncsfhf2@plt 1928; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1929; RV64I-NEXT: addi sp, sp, 16 1930; RV64I-NEXT: ret 1931 %1 = uitofp i64 %a to half 1932 ret half %1 1933} 1934 1935define half @fcvt_h_s(float %a) nounwind { 1936; RV32IZFH-LABEL: fcvt_h_s: 1937; RV32IZFH: # %bb.0: 1938; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 1939; RV32IZFH-NEXT: ret 1940; 1941; RV64IZFH-LABEL: fcvt_h_s: 1942; RV64IZFH: # %bb.0: 1943; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 1944; RV64IZFH-NEXT: ret 1945; 1946; RV32IDZFH-LABEL: fcvt_h_s: 1947; RV32IDZFH: # %bb.0: 1948; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0 1949; RV32IDZFH-NEXT: ret 1950; 1951; RV64IDZFH-LABEL: fcvt_h_s: 1952; RV64IDZFH: # %bb.0: 1953; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0 1954; RV64IDZFH-NEXT: ret 1955; 1956; RV32I-LABEL: fcvt_h_s: 1957; RV32I: # %bb.0: 1958; RV32I-NEXT: addi sp, sp, -16 1959; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1960; RV32I-NEXT: call __truncsfhf2@plt 1961; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1962; RV32I-NEXT: addi sp, sp, 16 1963; RV32I-NEXT: ret 1964; 1965; RV64I-LABEL: fcvt_h_s: 1966; RV64I: # %bb.0: 1967; RV64I-NEXT: addi sp, sp, -16 1968; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1969; RV64I-NEXT: call __truncsfhf2@plt 1970; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1971; RV64I-NEXT: addi sp, sp, 16 1972; RV64I-NEXT: ret 1973 %1 = fptrunc float %a to half 1974 ret half %1 1975} 1976 1977define float @fcvt_s_h(half %a) nounwind { 1978; RV32IZFH-LABEL: fcvt_s_h: 1979; RV32IZFH: # %bb.0: 1980; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 1981; RV32IZFH-NEXT: ret 1982; 1983; RV64IZFH-LABEL: fcvt_s_h: 1984; RV64IZFH: # %bb.0: 1985; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 1986; RV64IZFH-NEXT: ret 1987; 1988; RV32IDZFH-LABEL: fcvt_s_h: 1989; RV32IDZFH: # %bb.0: 1990; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0 1991; RV32IDZFH-NEXT: ret 1992; 1993; RV64IDZFH-LABEL: fcvt_s_h: 1994; RV64IDZFH: # %bb.0: 1995; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0 1996; RV64IDZFH-NEXT: ret 1997; 1998; RV32I-LABEL: fcvt_s_h: 1999; RV32I: # %bb.0: 2000; RV32I-NEXT: addi sp, sp, -16 2001; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2002; RV32I-NEXT: slli a0, a0, 16 2003; RV32I-NEXT: srli a0, a0, 16 2004; RV32I-NEXT: call __extendhfsf2@plt 2005; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2006; RV32I-NEXT: addi sp, sp, 16 2007; RV32I-NEXT: ret 2008; 2009; RV64I-LABEL: fcvt_s_h: 2010; RV64I: # %bb.0: 2011; RV64I-NEXT: addi sp, sp, -16 2012; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2013; RV64I-NEXT: slli a0, a0, 48 2014; RV64I-NEXT: srli a0, a0, 48 2015; RV64I-NEXT: call __extendhfsf2@plt 2016; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2017; RV64I-NEXT: addi sp, sp, 16 2018; RV64I-NEXT: ret 2019 %1 = fpext half %a to float 2020 ret float %1 2021} 2022 2023define half @fcvt_h_d(double %a) nounwind { 2024; RV32IZFH-LABEL: fcvt_h_d: 2025; RV32IZFH: # %bb.0: 2026; RV32IZFH-NEXT: addi sp, sp, -16 2027; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2028; RV32IZFH-NEXT: call __truncdfhf2@plt 2029; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2030; RV32IZFH-NEXT: addi sp, sp, 16 2031; RV32IZFH-NEXT: ret 2032; 2033; RV64IZFH-LABEL: fcvt_h_d: 2034; RV64IZFH: # %bb.0: 2035; RV64IZFH-NEXT: addi sp, sp, -16 2036; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2037; RV64IZFH-NEXT: call __truncdfhf2@plt 2038; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2039; RV64IZFH-NEXT: addi sp, sp, 16 2040; RV64IZFH-NEXT: ret 2041; 2042; RV32IDZFH-LABEL: fcvt_h_d: 2043; RV32IDZFH: # %bb.0: 2044; RV32IDZFH-NEXT: fcvt.h.d fa0, fa0 2045; RV32IDZFH-NEXT: ret 2046; 2047; RV64IDZFH-LABEL: fcvt_h_d: 2048; RV64IDZFH: # %bb.0: 2049; RV64IDZFH-NEXT: fcvt.h.d fa0, fa0 2050; RV64IDZFH-NEXT: ret 2051; 2052; RV32I-LABEL: fcvt_h_d: 2053; RV32I: # %bb.0: 2054; RV32I-NEXT: addi sp, sp, -16 2055; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2056; RV32I-NEXT: call __truncdfhf2@plt 2057; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2058; RV32I-NEXT: addi sp, sp, 16 2059; RV32I-NEXT: ret 2060; 2061; RV64I-LABEL: fcvt_h_d: 2062; RV64I: # %bb.0: 2063; RV64I-NEXT: addi sp, sp, -16 2064; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2065; RV64I-NEXT: call __truncdfhf2@plt 2066; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2067; RV64I-NEXT: addi sp, sp, 16 2068; RV64I-NEXT: ret 2069 %1 = fptrunc double %a to half 2070 ret half %1 2071} 2072 2073define double @fcvt_d_h(half %a) nounwind { 2074; RV32IZFH-LABEL: fcvt_d_h: 2075; RV32IZFH: # %bb.0: 2076; RV32IZFH-NEXT: addi sp, sp, -16 2077; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2078; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2079; RV32IZFH-NEXT: call __extendsfdf2@plt 2080; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2081; RV32IZFH-NEXT: addi sp, sp, 16 2082; RV32IZFH-NEXT: ret 2083; 2084; RV64IZFH-LABEL: fcvt_d_h: 2085; RV64IZFH: # %bb.0: 2086; RV64IZFH-NEXT: addi sp, sp, -16 2087; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2088; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2089; RV64IZFH-NEXT: call __extendsfdf2@plt 2090; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2091; RV64IZFH-NEXT: addi sp, sp, 16 2092; RV64IZFH-NEXT: ret 2093; 2094; RV32IDZFH-LABEL: fcvt_d_h: 2095; RV32IDZFH: # %bb.0: 2096; RV32IDZFH-NEXT: fcvt.d.h fa0, fa0 2097; RV32IDZFH-NEXT: ret 2098; 2099; RV64IDZFH-LABEL: fcvt_d_h: 2100; RV64IDZFH: # %bb.0: 2101; RV64IDZFH-NEXT: fcvt.d.h fa0, fa0 2102; RV64IDZFH-NEXT: ret 2103; 2104; RV32I-LABEL: fcvt_d_h: 2105; RV32I: # %bb.0: 2106; RV32I-NEXT: addi sp, sp, -16 2107; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2108; RV32I-NEXT: slli a0, a0, 16 2109; RV32I-NEXT: srli a0, a0, 16 2110; RV32I-NEXT: call __extendhfsf2@plt 2111; RV32I-NEXT: call __extendsfdf2@plt 2112; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2113; RV32I-NEXT: addi sp, sp, 16 2114; RV32I-NEXT: ret 2115; 2116; RV64I-LABEL: fcvt_d_h: 2117; RV64I: # %bb.0: 2118; RV64I-NEXT: addi sp, sp, -16 2119; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2120; RV64I-NEXT: slli a0, a0, 48 2121; RV64I-NEXT: srli a0, a0, 48 2122; RV64I-NEXT: call __extendhfsf2@plt 2123; RV64I-NEXT: slli a0, a0, 32 2124; RV64I-NEXT: srli a0, a0, 32 2125; RV64I-NEXT: call __extendsfdf2@plt 2126; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2127; RV64I-NEXT: addi sp, sp, 16 2128; RV64I-NEXT: ret 2129 %1 = fpext half %a to double 2130 ret double %1 2131} 2132 2133define half @bitcast_h_i16(i16 %a) nounwind { 2134; RV32IZFH-LABEL: bitcast_h_i16: 2135; RV32IZFH: # %bb.0: 2136; RV32IZFH-NEXT: fmv.h.x fa0, a0 2137; RV32IZFH-NEXT: ret 2138; 2139; RV64IZFH-LABEL: bitcast_h_i16: 2140; RV64IZFH: # %bb.0: 2141; RV64IZFH-NEXT: fmv.h.x fa0, a0 2142; RV64IZFH-NEXT: ret 2143; 2144; RV32IDZFH-LABEL: bitcast_h_i16: 2145; RV32IDZFH: # %bb.0: 2146; RV32IDZFH-NEXT: fmv.h.x fa0, a0 2147; RV32IDZFH-NEXT: ret 2148; 2149; RV64IDZFH-LABEL: bitcast_h_i16: 2150; RV64IDZFH: # %bb.0: 2151; RV64IDZFH-NEXT: fmv.h.x fa0, a0 2152; RV64IDZFH-NEXT: ret 2153; 2154; RV32I-LABEL: bitcast_h_i16: 2155; RV32I: # %bb.0: 2156; RV32I-NEXT: ret 2157; 2158; RV64I-LABEL: bitcast_h_i16: 2159; RV64I: # %bb.0: 2160; RV64I-NEXT: ret 2161 %1 = bitcast i16 %a to half 2162 ret half %1 2163} 2164 2165define i16 @bitcast_i16_h(half %a) nounwind { 2166; RV32IZFH-LABEL: bitcast_i16_h: 2167; RV32IZFH: # %bb.0: 2168; RV32IZFH-NEXT: fmv.x.h a0, fa0 2169; RV32IZFH-NEXT: ret 2170; 2171; RV64IZFH-LABEL: bitcast_i16_h: 2172; RV64IZFH: # %bb.0: 2173; RV64IZFH-NEXT: fmv.x.h a0, fa0 2174; RV64IZFH-NEXT: ret 2175; 2176; RV32IDZFH-LABEL: bitcast_i16_h: 2177; RV32IDZFH: # %bb.0: 2178; RV32IDZFH-NEXT: fmv.x.h a0, fa0 2179; RV32IDZFH-NEXT: ret 2180; 2181; RV64IDZFH-LABEL: bitcast_i16_h: 2182; RV64IDZFH: # %bb.0: 2183; RV64IDZFH-NEXT: fmv.x.h a0, fa0 2184; RV64IDZFH-NEXT: ret 2185; 2186; RV32I-LABEL: bitcast_i16_h: 2187; RV32I: # %bb.0: 2188; RV32I-NEXT: ret 2189; 2190; RV64I-LABEL: bitcast_i16_h: 2191; RV64I: # %bb.0: 2192; RV64I-NEXT: ret 2193 %1 = bitcast half %a to i16 2194 ret i16 %1 2195} 2196 2197; Make sure we select W version of addi on RV64. 2198define signext i32 @fcvt_h_w_demanded_bits(i32 signext %0, half* %1) nounwind { 2199; RV32IZFH-LABEL: fcvt_h_w_demanded_bits: 2200; RV32IZFH: # %bb.0: 2201; RV32IZFH-NEXT: addi a0, a0, 1 2202; RV32IZFH-NEXT: fcvt.h.w ft0, a0 2203; RV32IZFH-NEXT: fsh ft0, 0(a1) 2204; RV32IZFH-NEXT: ret 2205; 2206; RV64IZFH-LABEL: fcvt_h_w_demanded_bits: 2207; RV64IZFH: # %bb.0: 2208; RV64IZFH-NEXT: addiw a0, a0, 1 2209; RV64IZFH-NEXT: fcvt.h.w ft0, a0 2210; RV64IZFH-NEXT: fsh ft0, 0(a1) 2211; RV64IZFH-NEXT: ret 2212; 2213; RV32IDZFH-LABEL: fcvt_h_w_demanded_bits: 2214; RV32IDZFH: # %bb.0: 2215; RV32IDZFH-NEXT: addi a0, a0, 1 2216; RV32IDZFH-NEXT: fcvt.h.w ft0, a0 2217; RV32IDZFH-NEXT: fsh ft0, 0(a1) 2218; RV32IDZFH-NEXT: ret 2219; 2220; RV64IDZFH-LABEL: fcvt_h_w_demanded_bits: 2221; RV64IDZFH: # %bb.0: 2222; RV64IDZFH-NEXT: addiw a0, a0, 1 2223; RV64IDZFH-NEXT: fcvt.h.w ft0, a0 2224; RV64IDZFH-NEXT: fsh ft0, 0(a1) 2225; RV64IDZFH-NEXT: ret 2226; 2227; RV32I-LABEL: fcvt_h_w_demanded_bits: 2228; RV32I: # %bb.0: 2229; RV32I-NEXT: addi sp, sp, -16 2230; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2231; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2232; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2233; RV32I-NEXT: mv s0, a1 2234; RV32I-NEXT: addi s1, a0, 1 2235; RV32I-NEXT: mv a0, s1 2236; RV32I-NEXT: call __floatsisf@plt 2237; RV32I-NEXT: call __truncsfhf2@plt 2238; RV32I-NEXT: sh a0, 0(s0) 2239; RV32I-NEXT: mv a0, s1 2240; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2241; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2242; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2243; RV32I-NEXT: addi sp, sp, 16 2244; RV32I-NEXT: ret 2245; 2246; RV64I-LABEL: fcvt_h_w_demanded_bits: 2247; RV64I: # %bb.0: 2248; RV64I-NEXT: addi sp, sp, -32 2249; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2250; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2251; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2252; RV64I-NEXT: mv s0, a1 2253; RV64I-NEXT: addiw s1, a0, 1 2254; RV64I-NEXT: mv a0, s1 2255; RV64I-NEXT: call __floatsisf@plt 2256; RV64I-NEXT: call __truncsfhf2@plt 2257; RV64I-NEXT: sh a0, 0(s0) 2258; RV64I-NEXT: mv a0, s1 2259; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2260; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2261; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2262; RV64I-NEXT: addi sp, sp, 32 2263; RV64I-NEXT: ret 2264 %3 = add i32 %0, 1 2265 %4 = sitofp i32 %3 to half 2266 store half %4, half* %1, align 2 2267 ret i32 %3 2268} 2269 2270; Make sure we select W version of addi on RV64. 2271define signext i32 @fcvt_h_wu_demanded_bits(i32 signext %0, half* %1) nounwind { 2272; RV32IZFH-LABEL: fcvt_h_wu_demanded_bits: 2273; RV32IZFH: # %bb.0: 2274; RV32IZFH-NEXT: addi a0, a0, 1 2275; RV32IZFH-NEXT: fcvt.h.wu ft0, a0 2276; RV32IZFH-NEXT: fsh ft0, 0(a1) 2277; RV32IZFH-NEXT: ret 2278; 2279; RV64IZFH-LABEL: fcvt_h_wu_demanded_bits: 2280; RV64IZFH: # %bb.0: 2281; RV64IZFH-NEXT: addiw a0, a0, 1 2282; RV64IZFH-NEXT: fcvt.h.wu ft0, a0 2283; RV64IZFH-NEXT: fsh ft0, 0(a1) 2284; RV64IZFH-NEXT: ret 2285; 2286; RV32IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2287; RV32IDZFH: # %bb.0: 2288; RV32IDZFH-NEXT: addi a0, a0, 1 2289; RV32IDZFH-NEXT: fcvt.h.wu ft0, a0 2290; RV32IDZFH-NEXT: fsh ft0, 0(a1) 2291; RV32IDZFH-NEXT: ret 2292; 2293; RV64IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2294; RV64IDZFH: # %bb.0: 2295; RV64IDZFH-NEXT: addiw a0, a0, 1 2296; RV64IDZFH-NEXT: fcvt.h.wu ft0, a0 2297; RV64IDZFH-NEXT: fsh ft0, 0(a1) 2298; RV64IDZFH-NEXT: ret 2299; 2300; RV32I-LABEL: fcvt_h_wu_demanded_bits: 2301; RV32I: # %bb.0: 2302; RV32I-NEXT: addi sp, sp, -16 2303; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2304; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2305; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2306; RV32I-NEXT: mv s0, a1 2307; RV32I-NEXT: addi s1, a0, 1 2308; RV32I-NEXT: mv a0, s1 2309; RV32I-NEXT: call __floatunsisf@plt 2310; RV32I-NEXT: call __truncsfhf2@plt 2311; RV32I-NEXT: sh a0, 0(s0) 2312; RV32I-NEXT: mv a0, s1 2313; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2314; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2315; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2316; RV32I-NEXT: addi sp, sp, 16 2317; RV32I-NEXT: ret 2318; 2319; RV64I-LABEL: fcvt_h_wu_demanded_bits: 2320; RV64I: # %bb.0: 2321; RV64I-NEXT: addi sp, sp, -32 2322; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2323; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2324; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2325; RV64I-NEXT: mv s0, a1 2326; RV64I-NEXT: addiw s1, a0, 1 2327; RV64I-NEXT: mv a0, s1 2328; RV64I-NEXT: call __floatunsisf@plt 2329; RV64I-NEXT: call __truncsfhf2@plt 2330; RV64I-NEXT: sh a0, 0(s0) 2331; RV64I-NEXT: mv a0, s1 2332; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2333; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2334; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2335; RV64I-NEXT: addi sp, sp, 32 2336; RV64I-NEXT: ret 2337 %3 = add i32 %0, 1 2338 %4 = uitofp i32 %3 to half 2339 store half %4, half* %1, align 2 2340 ret i32 %3 2341} 2342 2343define signext i16 @fcvt_w_s_i16(half %a) nounwind { 2344; RV32IZFH-LABEL: fcvt_w_s_i16: 2345; RV32IZFH: # %bb.0: 2346; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 2347; RV32IZFH-NEXT: ret 2348; 2349; RV64IZFH-LABEL: fcvt_w_s_i16: 2350; RV64IZFH: # %bb.0: 2351; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 2352; RV64IZFH-NEXT: ret 2353; 2354; RV32IDZFH-LABEL: fcvt_w_s_i16: 2355; RV32IDZFH: # %bb.0: 2356; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 2357; RV32IDZFH-NEXT: ret 2358; 2359; RV64IDZFH-LABEL: fcvt_w_s_i16: 2360; RV64IDZFH: # %bb.0: 2361; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 2362; RV64IDZFH-NEXT: ret 2363; 2364; RV32I-LABEL: fcvt_w_s_i16: 2365; RV32I: # %bb.0: 2366; RV32I-NEXT: addi sp, sp, -16 2367; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2368; RV32I-NEXT: slli a0, a0, 16 2369; RV32I-NEXT: srli a0, a0, 16 2370; RV32I-NEXT: call __extendhfsf2@plt 2371; RV32I-NEXT: call __fixsfsi@plt 2372; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2373; RV32I-NEXT: addi sp, sp, 16 2374; RV32I-NEXT: ret 2375; 2376; RV64I-LABEL: fcvt_w_s_i16: 2377; RV64I: # %bb.0: 2378; RV64I-NEXT: addi sp, sp, -16 2379; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2380; RV64I-NEXT: slli a0, a0, 48 2381; RV64I-NEXT: srli a0, a0, 48 2382; RV64I-NEXT: call __extendhfsf2@plt 2383; RV64I-NEXT: call __fixsfdi@plt 2384; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2385; RV64I-NEXT: addi sp, sp, 16 2386; RV64I-NEXT: ret 2387 %1 = fptosi half %a to i16 2388 ret i16 %1 2389} 2390 2391define signext i16 @fcvt_w_s_sat_i16(half %a) nounwind { 2392; RV32IZFH-LABEL: fcvt_w_s_sat_i16: 2393; RV32IZFH: # %bb.0: # %start 2394; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 2395; RV32IZFH-NEXT: feq.s a0, ft0, ft0 2396; RV32IZFH-NEXT: beqz a0, .LBB32_2 2397; RV32IZFH-NEXT: # %bb.1: 2398; RV32IZFH-NEXT: lui a0, %hi(.LCPI32_0) 2399; RV32IZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2400; RV32IZFH-NEXT: lui a0, %hi(.LCPI32_1) 2401; RV32IZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2402; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 2403; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 2404; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 2405; RV32IZFH-NEXT: .LBB32_2: # %start 2406; RV32IZFH-NEXT: ret 2407; 2408; RV64IZFH-LABEL: fcvt_w_s_sat_i16: 2409; RV64IZFH: # %bb.0: # %start 2410; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 2411; RV64IZFH-NEXT: feq.s a0, ft0, ft0 2412; RV64IZFH-NEXT: beqz a0, .LBB32_2 2413; RV64IZFH-NEXT: # %bb.1: 2414; RV64IZFH-NEXT: lui a0, %hi(.LCPI32_0) 2415; RV64IZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2416; RV64IZFH-NEXT: lui a0, %hi(.LCPI32_1) 2417; RV64IZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2418; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 2419; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 2420; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 2421; RV64IZFH-NEXT: .LBB32_2: # %start 2422; RV64IZFH-NEXT: ret 2423; 2424; RV32IDZFH-LABEL: fcvt_w_s_sat_i16: 2425; RV32IDZFH: # %bb.0: # %start 2426; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 2427; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 2428; RV32IDZFH-NEXT: beqz a0, .LBB32_2 2429; RV32IDZFH-NEXT: # %bb.1: 2430; RV32IDZFH-NEXT: lui a0, %hi(.LCPI32_0) 2431; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2432; RV32IDZFH-NEXT: lui a0, %hi(.LCPI32_1) 2433; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2434; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 2435; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 2436; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 2437; RV32IDZFH-NEXT: .LBB32_2: # %start 2438; RV32IDZFH-NEXT: ret 2439; 2440; RV64IDZFH-LABEL: fcvt_w_s_sat_i16: 2441; RV64IDZFH: # %bb.0: # %start 2442; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 2443; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 2444; RV64IDZFH-NEXT: beqz a0, .LBB32_2 2445; RV64IDZFH-NEXT: # %bb.1: 2446; RV64IDZFH-NEXT: lui a0, %hi(.LCPI32_0) 2447; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2448; RV64IDZFH-NEXT: lui a0, %hi(.LCPI32_1) 2449; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2450; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 2451; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 2452; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 2453; RV64IDZFH-NEXT: .LBB32_2: # %start 2454; RV64IDZFH-NEXT: ret 2455; 2456; RV32I-LABEL: fcvt_w_s_sat_i16: 2457; RV32I: # %bb.0: # %start 2458; RV32I-NEXT: addi sp, sp, -32 2459; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2460; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2461; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 2462; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 2463; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 2464; RV32I-NEXT: slli a0, a0, 16 2465; RV32I-NEXT: srli a0, a0, 16 2466; RV32I-NEXT: call __extendhfsf2@plt 2467; RV32I-NEXT: mv s0, a0 2468; RV32I-NEXT: lui a1, 815104 2469; RV32I-NEXT: call __gesf2@plt 2470; RV32I-NEXT: mv s1, a0 2471; RV32I-NEXT: mv a0, s0 2472; RV32I-NEXT: call __fixsfsi@plt 2473; RV32I-NEXT: li s2, 0 2474; RV32I-NEXT: lui s3, 1048568 2475; RV32I-NEXT: bltz s1, .LBB32_2 2476; RV32I-NEXT: # %bb.1: # %start 2477; RV32I-NEXT: mv s3, a0 2478; RV32I-NEXT: .LBB32_2: # %start 2479; RV32I-NEXT: lui a0, 290816 2480; RV32I-NEXT: addi a1, a0, -512 2481; RV32I-NEXT: mv a0, s0 2482; RV32I-NEXT: call __gtsf2@plt 2483; RV32I-NEXT: bge s2, a0, .LBB32_4 2484; RV32I-NEXT: # %bb.3: 2485; RV32I-NEXT: lui a0, 8 2486; RV32I-NEXT: addi s3, a0, -1 2487; RV32I-NEXT: .LBB32_4: # %start 2488; RV32I-NEXT: mv a0, s0 2489; RV32I-NEXT: mv a1, s0 2490; RV32I-NEXT: call __unordsf2@plt 2491; RV32I-NEXT: bne a0, s2, .LBB32_6 2492; RV32I-NEXT: # %bb.5: # %start 2493; RV32I-NEXT: mv s2, s3 2494; RV32I-NEXT: .LBB32_6: # %start 2495; RV32I-NEXT: slli a0, s2, 16 2496; RV32I-NEXT: srai a0, a0, 16 2497; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2498; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2499; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 2500; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 2501; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 2502; RV32I-NEXT: addi sp, sp, 32 2503; RV32I-NEXT: ret 2504; 2505; RV64I-LABEL: fcvt_w_s_sat_i16: 2506; RV64I: # %bb.0: # %start 2507; RV64I-NEXT: addi sp, sp, -48 2508; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 2509; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 2510; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 2511; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 2512; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 2513; RV64I-NEXT: slli a0, a0, 48 2514; RV64I-NEXT: srli a0, a0, 48 2515; RV64I-NEXT: call __extendhfsf2@plt 2516; RV64I-NEXT: mv s0, a0 2517; RV64I-NEXT: lui a1, 815104 2518; RV64I-NEXT: call __gesf2@plt 2519; RV64I-NEXT: mv s1, a0 2520; RV64I-NEXT: mv a0, s0 2521; RV64I-NEXT: call __fixsfdi@plt 2522; RV64I-NEXT: li s2, 0 2523; RV64I-NEXT: lui s3, 1048568 2524; RV64I-NEXT: bltz s1, .LBB32_2 2525; RV64I-NEXT: # %bb.1: # %start 2526; RV64I-NEXT: mv s3, a0 2527; RV64I-NEXT: .LBB32_2: # %start 2528; RV64I-NEXT: lui a0, 290816 2529; RV64I-NEXT: addiw a1, a0, -512 2530; RV64I-NEXT: mv a0, s0 2531; RV64I-NEXT: call __gtsf2@plt 2532; RV64I-NEXT: bge s2, a0, .LBB32_4 2533; RV64I-NEXT: # %bb.3: 2534; RV64I-NEXT: lui a0, 8 2535; RV64I-NEXT: addiw s3, a0, -1 2536; RV64I-NEXT: .LBB32_4: # %start 2537; RV64I-NEXT: mv a0, s0 2538; RV64I-NEXT: mv a1, s0 2539; RV64I-NEXT: call __unordsf2@plt 2540; RV64I-NEXT: bne a0, s2, .LBB32_6 2541; RV64I-NEXT: # %bb.5: # %start 2542; RV64I-NEXT: mv s2, s3 2543; RV64I-NEXT: .LBB32_6: # %start 2544; RV64I-NEXT: slli a0, s2, 48 2545; RV64I-NEXT: srai a0, a0, 48 2546; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 2547; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 2548; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 2549; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 2550; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 2551; RV64I-NEXT: addi sp, sp, 48 2552; RV64I-NEXT: ret 2553start: 2554 %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) 2555 ret i16 %0 2556} 2557 2558define zeroext i16 @fcvt_wu_s_i16(half %a) nounwind { 2559; RV32IZFH-LABEL: fcvt_wu_s_i16: 2560; RV32IZFH: # %bb.0: 2561; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2562; RV32IZFH-NEXT: ret 2563; 2564; RV64IZFH-LABEL: fcvt_wu_s_i16: 2565; RV64IZFH: # %bb.0: 2566; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2567; RV64IZFH-NEXT: ret 2568; 2569; RV32IDZFH-LABEL: fcvt_wu_s_i16: 2570; RV32IDZFH: # %bb.0: 2571; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2572; RV32IDZFH-NEXT: ret 2573; 2574; RV64IDZFH-LABEL: fcvt_wu_s_i16: 2575; RV64IDZFH: # %bb.0: 2576; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2577; RV64IDZFH-NEXT: ret 2578; 2579; RV32I-LABEL: fcvt_wu_s_i16: 2580; RV32I: # %bb.0: 2581; RV32I-NEXT: addi sp, sp, -16 2582; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2583; RV32I-NEXT: slli a0, a0, 16 2584; RV32I-NEXT: srli a0, a0, 16 2585; RV32I-NEXT: call __extendhfsf2@plt 2586; RV32I-NEXT: call __fixunssfsi@plt 2587; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2588; RV32I-NEXT: addi sp, sp, 16 2589; RV32I-NEXT: ret 2590; 2591; RV64I-LABEL: fcvt_wu_s_i16: 2592; RV64I: # %bb.0: 2593; RV64I-NEXT: addi sp, sp, -16 2594; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2595; RV64I-NEXT: slli a0, a0, 48 2596; RV64I-NEXT: srli a0, a0, 48 2597; RV64I-NEXT: call __extendhfsf2@plt 2598; RV64I-NEXT: call __fixunssfdi@plt 2599; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2600; RV64I-NEXT: addi sp, sp, 16 2601; RV64I-NEXT: ret 2602 %1 = fptoui half %a to i16 2603 ret i16 %1 2604} 2605 2606define zeroext i16 @fcvt_wu_s_sat_i16(half %a) nounwind { 2607; RV32IZFH-LABEL: fcvt_wu_s_sat_i16: 2608; RV32IZFH: # %bb.0: # %start 2609; RV32IZFH-NEXT: lui a0, %hi(.LCPI34_0) 2610; RV32IZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2611; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 2612; RV32IZFH-NEXT: fmv.w.x ft2, zero 2613; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 2614; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 2615; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 2616; RV32IZFH-NEXT: ret 2617; 2618; RV64IZFH-LABEL: fcvt_wu_s_sat_i16: 2619; RV64IZFH: # %bb.0: # %start 2620; RV64IZFH-NEXT: lui a0, %hi(.LCPI34_0) 2621; RV64IZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2622; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 2623; RV64IZFH-NEXT: fmv.w.x ft2, zero 2624; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 2625; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 2626; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 2627; RV64IZFH-NEXT: ret 2628; 2629; RV32IDZFH-LABEL: fcvt_wu_s_sat_i16: 2630; RV32IDZFH: # %bb.0: # %start 2631; RV32IDZFH-NEXT: lui a0, %hi(.LCPI34_0) 2632; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2633; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 2634; RV32IDZFH-NEXT: fmv.w.x ft2, zero 2635; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 2636; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 2637; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 2638; RV32IDZFH-NEXT: ret 2639; 2640; RV64IDZFH-LABEL: fcvt_wu_s_sat_i16: 2641; RV64IDZFH: # %bb.0: # %start 2642; RV64IDZFH-NEXT: lui a0, %hi(.LCPI34_0) 2643; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2644; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 2645; RV64IDZFH-NEXT: fmv.w.x ft2, zero 2646; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 2647; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 2648; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 2649; RV64IDZFH-NEXT: ret 2650; 2651; RV32I-LABEL: fcvt_wu_s_sat_i16: 2652; RV32I: # %bb.0: # %start 2653; RV32I-NEXT: addi sp, sp, -32 2654; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2655; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2656; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 2657; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 2658; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 2659; RV32I-NEXT: lui a1, 16 2660; RV32I-NEXT: addi s2, a1, -1 2661; RV32I-NEXT: and a0, a0, s2 2662; RV32I-NEXT: call __extendhfsf2@plt 2663; RV32I-NEXT: mv s0, a0 2664; RV32I-NEXT: li a1, 0 2665; RV32I-NEXT: call __gesf2@plt 2666; RV32I-NEXT: mv s1, a0 2667; RV32I-NEXT: mv a0, s0 2668; RV32I-NEXT: call __fixunssfsi@plt 2669; RV32I-NEXT: li s3, 0 2670; RV32I-NEXT: bltz s1, .LBB34_2 2671; RV32I-NEXT: # %bb.1: # %start 2672; RV32I-NEXT: mv s3, a0 2673; RV32I-NEXT: .LBB34_2: # %start 2674; RV32I-NEXT: lui a0, 292864 2675; RV32I-NEXT: addi a1, a0, -256 2676; RV32I-NEXT: mv a0, s0 2677; RV32I-NEXT: call __gtsf2@plt 2678; RV32I-NEXT: mv a1, s2 2679; RV32I-NEXT: bgtz a0, .LBB34_4 2680; RV32I-NEXT: # %bb.3: # %start 2681; RV32I-NEXT: mv a1, s3 2682; RV32I-NEXT: .LBB34_4: # %start 2683; RV32I-NEXT: and a0, a1, s2 2684; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2685; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2686; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 2687; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 2688; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 2689; RV32I-NEXT: addi sp, sp, 32 2690; RV32I-NEXT: ret 2691; 2692; RV64I-LABEL: fcvt_wu_s_sat_i16: 2693; RV64I: # %bb.0: # %start 2694; RV64I-NEXT: addi sp, sp, -48 2695; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 2696; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 2697; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 2698; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 2699; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 2700; RV64I-NEXT: lui a1, 16 2701; RV64I-NEXT: addiw s2, a1, -1 2702; RV64I-NEXT: and a0, a0, s2 2703; RV64I-NEXT: call __extendhfsf2@plt 2704; RV64I-NEXT: mv s0, a0 2705; RV64I-NEXT: li a1, 0 2706; RV64I-NEXT: call __gesf2@plt 2707; RV64I-NEXT: mv s1, a0 2708; RV64I-NEXT: mv a0, s0 2709; RV64I-NEXT: call __fixunssfdi@plt 2710; RV64I-NEXT: li s3, 0 2711; RV64I-NEXT: bltz s1, .LBB34_2 2712; RV64I-NEXT: # %bb.1: # %start 2713; RV64I-NEXT: mv s3, a0 2714; RV64I-NEXT: .LBB34_2: # %start 2715; RV64I-NEXT: lui a0, 292864 2716; RV64I-NEXT: addiw a1, a0, -256 2717; RV64I-NEXT: mv a0, s0 2718; RV64I-NEXT: call __gtsf2@plt 2719; RV64I-NEXT: mv a1, s2 2720; RV64I-NEXT: bgtz a0, .LBB34_4 2721; RV64I-NEXT: # %bb.3: # %start 2722; RV64I-NEXT: mv a1, s3 2723; RV64I-NEXT: .LBB34_4: # %start 2724; RV64I-NEXT: and a0, a1, s2 2725; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 2726; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 2727; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 2728; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 2729; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 2730; RV64I-NEXT: addi sp, sp, 48 2731; RV64I-NEXT: ret 2732start: 2733 %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a) 2734 ret i16 %0 2735} 2736 2737define signext i8 @fcvt_w_s_i8(half %a) nounwind { 2738; RV32IZFH-LABEL: fcvt_w_s_i8: 2739; RV32IZFH: # %bb.0: 2740; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 2741; RV32IZFH-NEXT: ret 2742; 2743; RV64IZFH-LABEL: fcvt_w_s_i8: 2744; RV64IZFH: # %bb.0: 2745; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 2746; RV64IZFH-NEXT: ret 2747; 2748; RV32IDZFH-LABEL: fcvt_w_s_i8: 2749; RV32IDZFH: # %bb.0: 2750; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 2751; RV32IDZFH-NEXT: ret 2752; 2753; RV64IDZFH-LABEL: fcvt_w_s_i8: 2754; RV64IDZFH: # %bb.0: 2755; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 2756; RV64IDZFH-NEXT: ret 2757; 2758; RV32I-LABEL: fcvt_w_s_i8: 2759; RV32I: # %bb.0: 2760; RV32I-NEXT: addi sp, sp, -16 2761; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2762; RV32I-NEXT: slli a0, a0, 16 2763; RV32I-NEXT: srli a0, a0, 16 2764; RV32I-NEXT: call __extendhfsf2@plt 2765; RV32I-NEXT: call __fixsfsi@plt 2766; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2767; RV32I-NEXT: addi sp, sp, 16 2768; RV32I-NEXT: ret 2769; 2770; RV64I-LABEL: fcvt_w_s_i8: 2771; RV64I: # %bb.0: 2772; RV64I-NEXT: addi sp, sp, -16 2773; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2774; RV64I-NEXT: slli a0, a0, 48 2775; RV64I-NEXT: srli a0, a0, 48 2776; RV64I-NEXT: call __extendhfsf2@plt 2777; RV64I-NEXT: call __fixsfdi@plt 2778; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2779; RV64I-NEXT: addi sp, sp, 16 2780; RV64I-NEXT: ret 2781 %1 = fptosi half %a to i8 2782 ret i8 %1 2783} 2784 2785define signext i8 @fcvt_w_s_sat_i8(half %a) nounwind { 2786; RV32IZFH-LABEL: fcvt_w_s_sat_i8: 2787; RV32IZFH: # %bb.0: # %start 2788; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 2789; RV32IZFH-NEXT: feq.s a0, ft0, ft0 2790; RV32IZFH-NEXT: beqz a0, .LBB36_2 2791; RV32IZFH-NEXT: # %bb.1: 2792; RV32IZFH-NEXT: lui a0, %hi(.LCPI36_0) 2793; RV32IZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2794; RV32IZFH-NEXT: lui a0, %hi(.LCPI36_1) 2795; RV32IZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2796; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 2797; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 2798; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 2799; RV32IZFH-NEXT: .LBB36_2: # %start 2800; RV32IZFH-NEXT: ret 2801; 2802; RV64IZFH-LABEL: fcvt_w_s_sat_i8: 2803; RV64IZFH: # %bb.0: # %start 2804; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 2805; RV64IZFH-NEXT: feq.s a0, ft0, ft0 2806; RV64IZFH-NEXT: beqz a0, .LBB36_2 2807; RV64IZFH-NEXT: # %bb.1: 2808; RV64IZFH-NEXT: lui a0, %hi(.LCPI36_0) 2809; RV64IZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2810; RV64IZFH-NEXT: lui a0, %hi(.LCPI36_1) 2811; RV64IZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2812; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 2813; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 2814; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 2815; RV64IZFH-NEXT: .LBB36_2: # %start 2816; RV64IZFH-NEXT: ret 2817; 2818; RV32IDZFH-LABEL: fcvt_w_s_sat_i8: 2819; RV32IDZFH: # %bb.0: # %start 2820; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 2821; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 2822; RV32IDZFH-NEXT: beqz a0, .LBB36_2 2823; RV32IDZFH-NEXT: # %bb.1: 2824; RV32IDZFH-NEXT: lui a0, %hi(.LCPI36_0) 2825; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2826; RV32IDZFH-NEXT: lui a0, %hi(.LCPI36_1) 2827; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2828; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 2829; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 2830; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 2831; RV32IDZFH-NEXT: .LBB36_2: # %start 2832; RV32IDZFH-NEXT: ret 2833; 2834; RV64IDZFH-LABEL: fcvt_w_s_sat_i8: 2835; RV64IDZFH: # %bb.0: # %start 2836; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 2837; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 2838; RV64IDZFH-NEXT: beqz a0, .LBB36_2 2839; RV64IDZFH-NEXT: # %bb.1: 2840; RV64IDZFH-NEXT: lui a0, %hi(.LCPI36_0) 2841; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2842; RV64IDZFH-NEXT: lui a0, %hi(.LCPI36_1) 2843; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2844; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 2845; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 2846; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 2847; RV64IDZFH-NEXT: .LBB36_2: # %start 2848; RV64IDZFH-NEXT: ret 2849; 2850; RV32I-LABEL: fcvt_w_s_sat_i8: 2851; RV32I: # %bb.0: # %start 2852; RV32I-NEXT: addi sp, sp, -32 2853; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2854; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2855; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 2856; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 2857; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 2858; RV32I-NEXT: slli a0, a0, 16 2859; RV32I-NEXT: srli a0, a0, 16 2860; RV32I-NEXT: call __extendhfsf2@plt 2861; RV32I-NEXT: mv s0, a0 2862; RV32I-NEXT: lui a1, 798720 2863; RV32I-NEXT: call __gesf2@plt 2864; RV32I-NEXT: mv s1, a0 2865; RV32I-NEXT: mv a0, s0 2866; RV32I-NEXT: call __fixsfsi@plt 2867; RV32I-NEXT: li s2, 0 2868; RV32I-NEXT: li s3, -128 2869; RV32I-NEXT: bltz s1, .LBB36_2 2870; RV32I-NEXT: # %bb.1: # %start 2871; RV32I-NEXT: mv s3, a0 2872; RV32I-NEXT: .LBB36_2: # %start 2873; RV32I-NEXT: lui a1, 274400 2874; RV32I-NEXT: mv a0, s0 2875; RV32I-NEXT: call __gtsf2@plt 2876; RV32I-NEXT: li s1, 127 2877; RV32I-NEXT: blt s2, a0, .LBB36_4 2878; RV32I-NEXT: # %bb.3: # %start 2879; RV32I-NEXT: mv s1, s3 2880; RV32I-NEXT: .LBB36_4: # %start 2881; RV32I-NEXT: mv a0, s0 2882; RV32I-NEXT: mv a1, s0 2883; RV32I-NEXT: call __unordsf2@plt 2884; RV32I-NEXT: bne a0, s2, .LBB36_6 2885; RV32I-NEXT: # %bb.5: # %start 2886; RV32I-NEXT: mv s2, s1 2887; RV32I-NEXT: .LBB36_6: # %start 2888; RV32I-NEXT: slli a0, s2, 24 2889; RV32I-NEXT: srai a0, a0, 24 2890; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2891; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2892; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 2893; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 2894; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 2895; RV32I-NEXT: addi sp, sp, 32 2896; RV32I-NEXT: ret 2897; 2898; RV64I-LABEL: fcvt_w_s_sat_i8: 2899; RV64I: # %bb.0: # %start 2900; RV64I-NEXT: addi sp, sp, -48 2901; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 2902; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 2903; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 2904; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 2905; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 2906; RV64I-NEXT: slli a0, a0, 48 2907; RV64I-NEXT: srli a0, a0, 48 2908; RV64I-NEXT: call __extendhfsf2@plt 2909; RV64I-NEXT: mv s0, a0 2910; RV64I-NEXT: lui a1, 798720 2911; RV64I-NEXT: call __gesf2@plt 2912; RV64I-NEXT: mv s1, a0 2913; RV64I-NEXT: mv a0, s0 2914; RV64I-NEXT: call __fixsfdi@plt 2915; RV64I-NEXT: li s2, 0 2916; RV64I-NEXT: li s3, -128 2917; RV64I-NEXT: bltz s1, .LBB36_2 2918; RV64I-NEXT: # %bb.1: # %start 2919; RV64I-NEXT: mv s3, a0 2920; RV64I-NEXT: .LBB36_2: # %start 2921; RV64I-NEXT: lui a1, 274400 2922; RV64I-NEXT: mv a0, s0 2923; RV64I-NEXT: call __gtsf2@plt 2924; RV64I-NEXT: li s1, 127 2925; RV64I-NEXT: blt s2, a0, .LBB36_4 2926; RV64I-NEXT: # %bb.3: # %start 2927; RV64I-NEXT: mv s1, s3 2928; RV64I-NEXT: .LBB36_4: # %start 2929; RV64I-NEXT: mv a0, s0 2930; RV64I-NEXT: mv a1, s0 2931; RV64I-NEXT: call __unordsf2@plt 2932; RV64I-NEXT: bne a0, s2, .LBB36_6 2933; RV64I-NEXT: # %bb.5: # %start 2934; RV64I-NEXT: mv s2, s1 2935; RV64I-NEXT: .LBB36_6: # %start 2936; RV64I-NEXT: slli a0, s2, 56 2937; RV64I-NEXT: srai a0, a0, 56 2938; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 2939; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 2940; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 2941; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 2942; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 2943; RV64I-NEXT: addi sp, sp, 48 2944; RV64I-NEXT: ret 2945start: 2946 %0 = tail call i8 @llvm.fptosi.sat.i8.f16(half %a) 2947 ret i8 %0 2948} 2949declare i8 @llvm.fptosi.sat.i8.f16(half) 2950 2951define zeroext i8 @fcvt_wu_s_i8(half %a) nounwind { 2952; RV32IZFH-LABEL: fcvt_wu_s_i8: 2953; RV32IZFH: # %bb.0: 2954; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2955; RV32IZFH-NEXT: ret 2956; 2957; RV64IZFH-LABEL: fcvt_wu_s_i8: 2958; RV64IZFH: # %bb.0: 2959; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2960; RV64IZFH-NEXT: ret 2961; 2962; RV32IDZFH-LABEL: fcvt_wu_s_i8: 2963; RV32IDZFH: # %bb.0: 2964; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2965; RV32IDZFH-NEXT: ret 2966; 2967; RV64IDZFH-LABEL: fcvt_wu_s_i8: 2968; RV64IDZFH: # %bb.0: 2969; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2970; RV64IDZFH-NEXT: ret 2971; 2972; RV32I-LABEL: fcvt_wu_s_i8: 2973; RV32I: # %bb.0: 2974; RV32I-NEXT: addi sp, sp, -16 2975; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2976; RV32I-NEXT: slli a0, a0, 16 2977; RV32I-NEXT: srli a0, a0, 16 2978; RV32I-NEXT: call __extendhfsf2@plt 2979; RV32I-NEXT: call __fixunssfsi@plt 2980; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2981; RV32I-NEXT: addi sp, sp, 16 2982; RV32I-NEXT: ret 2983; 2984; RV64I-LABEL: fcvt_wu_s_i8: 2985; RV64I: # %bb.0: 2986; RV64I-NEXT: addi sp, sp, -16 2987; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2988; RV64I-NEXT: slli a0, a0, 48 2989; RV64I-NEXT: srli a0, a0, 48 2990; RV64I-NEXT: call __extendhfsf2@plt 2991; RV64I-NEXT: call __fixunssfdi@plt 2992; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2993; RV64I-NEXT: addi sp, sp, 16 2994; RV64I-NEXT: ret 2995 %1 = fptoui half %a to i8 2996 ret i8 %1 2997} 2998 2999define zeroext i8 @fcvt_wu_s_sat_i8(half %a) nounwind { 3000; RV32IZFH-LABEL: fcvt_wu_s_sat_i8: 3001; RV32IZFH: # %bb.0: # %start 3002; RV32IZFH-NEXT: lui a0, %hi(.LCPI38_0) 3003; RV32IZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 3004; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 3005; RV32IZFH-NEXT: fmv.w.x ft2, zero 3006; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 3007; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 3008; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 3009; RV32IZFH-NEXT: ret 3010; 3011; RV64IZFH-LABEL: fcvt_wu_s_sat_i8: 3012; RV64IZFH: # %bb.0: # %start 3013; RV64IZFH-NEXT: lui a0, %hi(.LCPI38_0) 3014; RV64IZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 3015; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 3016; RV64IZFH-NEXT: fmv.w.x ft2, zero 3017; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 3018; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 3019; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 3020; RV64IZFH-NEXT: ret 3021; 3022; RV32IDZFH-LABEL: fcvt_wu_s_sat_i8: 3023; RV32IDZFH: # %bb.0: # %start 3024; RV32IDZFH-NEXT: lui a0, %hi(.LCPI38_0) 3025; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 3026; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 3027; RV32IDZFH-NEXT: fmv.w.x ft2, zero 3028; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 3029; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 3030; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 3031; RV32IDZFH-NEXT: ret 3032; 3033; RV64IDZFH-LABEL: fcvt_wu_s_sat_i8: 3034; RV64IDZFH: # %bb.0: # %start 3035; RV64IDZFH-NEXT: lui a0, %hi(.LCPI38_0) 3036; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 3037; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 3038; RV64IDZFH-NEXT: fmv.w.x ft2, zero 3039; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 3040; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 3041; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 3042; RV64IDZFH-NEXT: ret 3043; 3044; RV32I-LABEL: fcvt_wu_s_sat_i8: 3045; RV32I: # %bb.0: # %start 3046; RV32I-NEXT: addi sp, sp, -16 3047; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 3048; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 3049; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 3050; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 3051; RV32I-NEXT: slli a0, a0, 16 3052; RV32I-NEXT: srli a0, a0, 16 3053; RV32I-NEXT: call __extendhfsf2@plt 3054; RV32I-NEXT: mv s0, a0 3055; RV32I-NEXT: li a1, 0 3056; RV32I-NEXT: call __gesf2@plt 3057; RV32I-NEXT: mv s1, a0 3058; RV32I-NEXT: mv a0, s0 3059; RV32I-NEXT: call __fixunssfsi@plt 3060; RV32I-NEXT: li s2, 0 3061; RV32I-NEXT: bltz s1, .LBB38_2 3062; RV32I-NEXT: # %bb.1: # %start 3063; RV32I-NEXT: mv s2, a0 3064; RV32I-NEXT: .LBB38_2: # %start 3065; RV32I-NEXT: lui a1, 276464 3066; RV32I-NEXT: mv a0, s0 3067; RV32I-NEXT: call __gtsf2@plt 3068; RV32I-NEXT: li a1, 255 3069; RV32I-NEXT: bgtz a0, .LBB38_4 3070; RV32I-NEXT: # %bb.3: # %start 3071; RV32I-NEXT: mv a1, s2 3072; RV32I-NEXT: .LBB38_4: # %start 3073; RV32I-NEXT: andi a0, a1, 255 3074; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 3075; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 3076; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 3077; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 3078; RV32I-NEXT: addi sp, sp, 16 3079; RV32I-NEXT: ret 3080; 3081; RV64I-LABEL: fcvt_wu_s_sat_i8: 3082; RV64I: # %bb.0: # %start 3083; RV64I-NEXT: addi sp, sp, -32 3084; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 3085; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 3086; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 3087; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 3088; RV64I-NEXT: slli a0, a0, 48 3089; RV64I-NEXT: srli a0, a0, 48 3090; RV64I-NEXT: call __extendhfsf2@plt 3091; RV64I-NEXT: mv s0, a0 3092; RV64I-NEXT: li a1, 0 3093; RV64I-NEXT: call __gesf2@plt 3094; RV64I-NEXT: mv s1, a0 3095; RV64I-NEXT: mv a0, s0 3096; RV64I-NEXT: call __fixunssfdi@plt 3097; RV64I-NEXT: li s2, 0 3098; RV64I-NEXT: bltz s1, .LBB38_2 3099; RV64I-NEXT: # %bb.1: # %start 3100; RV64I-NEXT: mv s2, a0 3101; RV64I-NEXT: .LBB38_2: # %start 3102; RV64I-NEXT: lui a1, 276464 3103; RV64I-NEXT: mv a0, s0 3104; RV64I-NEXT: call __gtsf2@plt 3105; RV64I-NEXT: li a1, 255 3106; RV64I-NEXT: bgtz a0, .LBB38_4 3107; RV64I-NEXT: # %bb.3: # %start 3108; RV64I-NEXT: mv a1, s2 3109; RV64I-NEXT: .LBB38_4: # %start 3110; RV64I-NEXT: andi a0, a1, 255 3111; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 3112; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 3113; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 3114; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 3115; RV64I-NEXT: addi sp, sp, 32 3116; RV64I-NEXT: ret 3117start: 3118 %0 = tail call i8 @llvm.fptoui.sat.i8.f16(half %a) 3119 ret i8 %0 3120} 3121declare i8 @llvm.fptoui.sat.i8.f16(half) 3122