1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs \ 3; RUN: -target-abi ilp32f < %s | FileCheck -check-prefixes=CHECKIZFH,RV32IZFH %s 4; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs \ 5; RUN: -target-abi lp64f < %s | FileCheck -check-prefixes=CHECKIZFH,RV64IZFH %s 6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs \ 7; RUN: -target-abi ilp32d < %s | FileCheck -check-prefix=RV32IDZFH %s 8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs \ 9; RUN: -target-abi lp64d < %s | FileCheck -check-prefix=RV64IDZFH %s 10; RUN: llc -mtriple=riscv32 -verify-machineinstrs \ 11; RUN: < %s | FileCheck -check-prefix=RV32I %s 12; RUN: llc -mtriple=riscv64 -verify-machineinstrs \ 13; RUN: < %s | FileCheck -check-prefix=RV64I %s 14 15define i16 @fcvt_si_h(half %a) nounwind { 16; RV32IZFH-LABEL: fcvt_si_h: 17; RV32IZFH: # %bb.0: 18; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 19; RV32IZFH-NEXT: ret 20; 21; RV64IZFH-LABEL: fcvt_si_h: 22; RV64IZFH: # %bb.0: 23; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 24; RV64IZFH-NEXT: ret 25; 26; RV32IDZFH-LABEL: fcvt_si_h: 27; RV32IDZFH: # %bb.0: 28; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 29; RV32IDZFH-NEXT: ret 30; 31; RV64IDZFH-LABEL: fcvt_si_h: 32; RV64IDZFH: # %bb.0: 33; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 34; RV64IDZFH-NEXT: ret 35; 36; RV32I-LABEL: fcvt_si_h: 37; RV32I: # %bb.0: 38; RV32I-NEXT: addi sp, sp, -16 39; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 40; RV32I-NEXT: slli a0, a0, 16 41; RV32I-NEXT: srli a0, a0, 16 42; RV32I-NEXT: call __extendhfsf2@plt 43; RV32I-NEXT: call __fixsfsi@plt 44; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 45; RV32I-NEXT: addi sp, sp, 16 46; RV32I-NEXT: ret 47; 48; RV64I-LABEL: fcvt_si_h: 49; RV64I: # %bb.0: 50; RV64I-NEXT: addi sp, sp, -16 51; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 52; RV64I-NEXT: slli a0, a0, 48 53; RV64I-NEXT: srli a0, a0, 48 54; RV64I-NEXT: call __extendhfsf2@plt 55; RV64I-NEXT: call __fixsfdi@plt 56; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 57; RV64I-NEXT: addi sp, sp, 16 58; RV64I-NEXT: ret 59 %1 = fptosi half %a to i16 60 ret i16 %1 61} 62 63define i16 @fcvt_si_h_sat(half %a) nounwind { 64; RV32IZFH-LABEL: fcvt_si_h_sat: 65; RV32IZFH: # %bb.0: # %start 66; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 67; RV32IZFH-NEXT: feq.s a0, ft0, ft0 68; RV32IZFH-NEXT: beqz a0, .LBB1_2 69; RV32IZFH-NEXT: # %bb.1: 70; RV32IZFH-NEXT: lui a0, %hi(.LCPI1_0) 71; RV32IZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 72; RV32IZFH-NEXT: lui a0, %hi(.LCPI1_1) 73; RV32IZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 74; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 75; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 76; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 77; RV32IZFH-NEXT: .LBB1_2: # %start 78; RV32IZFH-NEXT: ret 79; 80; RV64IZFH-LABEL: fcvt_si_h_sat: 81; RV64IZFH: # %bb.0: # %start 82; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 83; RV64IZFH-NEXT: feq.s a0, ft0, ft0 84; RV64IZFH-NEXT: beqz a0, .LBB1_2 85; RV64IZFH-NEXT: # %bb.1: 86; RV64IZFH-NEXT: lui a0, %hi(.LCPI1_0) 87; RV64IZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 88; RV64IZFH-NEXT: lui a0, %hi(.LCPI1_1) 89; RV64IZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 90; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 91; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 92; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 93; RV64IZFH-NEXT: .LBB1_2: # %start 94; RV64IZFH-NEXT: ret 95; 96; RV32IDZFH-LABEL: fcvt_si_h_sat: 97; RV32IDZFH: # %bb.0: # %start 98; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 99; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 100; RV32IDZFH-NEXT: beqz a0, .LBB1_2 101; RV32IDZFH-NEXT: # %bb.1: 102; RV32IDZFH-NEXT: lui a0, %hi(.LCPI1_0) 103; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 104; RV32IDZFH-NEXT: lui a0, %hi(.LCPI1_1) 105; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 106; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 107; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 108; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 109; RV32IDZFH-NEXT: .LBB1_2: # %start 110; RV32IDZFH-NEXT: ret 111; 112; RV64IDZFH-LABEL: fcvt_si_h_sat: 113; RV64IDZFH: # %bb.0: # %start 114; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 115; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 116; RV64IDZFH-NEXT: beqz a0, .LBB1_2 117; RV64IDZFH-NEXT: # %bb.1: 118; RV64IDZFH-NEXT: lui a0, %hi(.LCPI1_0) 119; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 120; RV64IDZFH-NEXT: lui a0, %hi(.LCPI1_1) 121; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 122; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 123; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 124; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 125; RV64IDZFH-NEXT: .LBB1_2: # %start 126; RV64IDZFH-NEXT: ret 127; 128; RV32I-LABEL: fcvt_si_h_sat: 129; RV32I: # %bb.0: # %start 130; RV32I-NEXT: addi sp, sp, -32 131; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 132; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 133; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 134; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 135; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 136; RV32I-NEXT: slli a0, a0, 16 137; RV32I-NEXT: srli a0, a0, 16 138; RV32I-NEXT: call __extendhfsf2@plt 139; RV32I-NEXT: mv s0, a0 140; RV32I-NEXT: lui a1, 815104 141; RV32I-NEXT: call __gesf2@plt 142; RV32I-NEXT: mv s2, a0 143; RV32I-NEXT: mv a0, s0 144; RV32I-NEXT: call __fixsfsi@plt 145; RV32I-NEXT: li s1, 0 146; RV32I-NEXT: lui s3, 1048568 147; RV32I-NEXT: bltz s2, .LBB1_2 148; RV32I-NEXT: # %bb.1: # %start 149; RV32I-NEXT: mv s3, a0 150; RV32I-NEXT: .LBB1_2: # %start 151; RV32I-NEXT: lui a0, 290816 152; RV32I-NEXT: addi a1, a0, -512 153; RV32I-NEXT: mv a0, s0 154; RV32I-NEXT: call __gtsf2@plt 155; RV32I-NEXT: bge s1, a0, .LBB1_4 156; RV32I-NEXT: # %bb.3: 157; RV32I-NEXT: lui a0, 8 158; RV32I-NEXT: addi s3, a0, -1 159; RV32I-NEXT: .LBB1_4: # %start 160; RV32I-NEXT: mv a0, s0 161; RV32I-NEXT: mv a1, s0 162; RV32I-NEXT: call __unordsf2@plt 163; RV32I-NEXT: bne a0, s1, .LBB1_6 164; RV32I-NEXT: # %bb.5: # %start 165; RV32I-NEXT: mv s1, s3 166; RV32I-NEXT: .LBB1_6: # %start 167; RV32I-NEXT: mv a0, s1 168; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 169; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 170; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 171; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 172; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 173; RV32I-NEXT: addi sp, sp, 32 174; RV32I-NEXT: ret 175; 176; RV64I-LABEL: fcvt_si_h_sat: 177; RV64I: # %bb.0: # %start 178; RV64I-NEXT: addi sp, sp, -48 179; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 180; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 181; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 182; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 183; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 184; RV64I-NEXT: slli a0, a0, 48 185; RV64I-NEXT: srli a0, a0, 48 186; RV64I-NEXT: call __extendhfsf2@plt 187; RV64I-NEXT: mv s0, a0 188; RV64I-NEXT: lui a1, 815104 189; RV64I-NEXT: call __gesf2@plt 190; RV64I-NEXT: mv s2, a0 191; RV64I-NEXT: mv a0, s0 192; RV64I-NEXT: call __fixsfdi@plt 193; RV64I-NEXT: li s1, 0 194; RV64I-NEXT: lui s3, 1048568 195; RV64I-NEXT: bltz s2, .LBB1_2 196; RV64I-NEXT: # %bb.1: # %start 197; RV64I-NEXT: mv s3, a0 198; RV64I-NEXT: .LBB1_2: # %start 199; RV64I-NEXT: lui a0, 290816 200; RV64I-NEXT: addiw a1, a0, -512 201; RV64I-NEXT: mv a0, s0 202; RV64I-NEXT: call __gtsf2@plt 203; RV64I-NEXT: bge s1, a0, .LBB1_4 204; RV64I-NEXT: # %bb.3: 205; RV64I-NEXT: lui a0, 8 206; RV64I-NEXT: addiw s3, a0, -1 207; RV64I-NEXT: .LBB1_4: # %start 208; RV64I-NEXT: mv a0, s0 209; RV64I-NEXT: mv a1, s0 210; RV64I-NEXT: call __unordsf2@plt 211; RV64I-NEXT: bne a0, s1, .LBB1_6 212; RV64I-NEXT: # %bb.5: # %start 213; RV64I-NEXT: mv s1, s3 214; RV64I-NEXT: .LBB1_6: # %start 215; RV64I-NEXT: mv a0, s1 216; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 217; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 218; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 219; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 220; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 221; RV64I-NEXT: addi sp, sp, 48 222; RV64I-NEXT: ret 223start: 224 %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) 225 ret i16 %0 226} 227declare i16 @llvm.fptosi.sat.i16.f16(half) 228 229define i16 @fcvt_ui_h(half %a) nounwind { 230; RV32IZFH-LABEL: fcvt_ui_h: 231; RV32IZFH: # %bb.0: 232; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 233; RV32IZFH-NEXT: ret 234; 235; RV64IZFH-LABEL: fcvt_ui_h: 236; RV64IZFH: # %bb.0: 237; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 238; RV64IZFH-NEXT: ret 239; 240; RV32IDZFH-LABEL: fcvt_ui_h: 241; RV32IDZFH: # %bb.0: 242; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 243; RV32IDZFH-NEXT: ret 244; 245; RV64IDZFH-LABEL: fcvt_ui_h: 246; RV64IDZFH: # %bb.0: 247; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 248; RV64IDZFH-NEXT: ret 249; 250; RV32I-LABEL: fcvt_ui_h: 251; RV32I: # %bb.0: 252; RV32I-NEXT: addi sp, sp, -16 253; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 254; RV32I-NEXT: slli a0, a0, 16 255; RV32I-NEXT: srli a0, a0, 16 256; RV32I-NEXT: call __extendhfsf2@plt 257; RV32I-NEXT: call __fixunssfsi@plt 258; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 259; RV32I-NEXT: addi sp, sp, 16 260; RV32I-NEXT: ret 261; 262; RV64I-LABEL: fcvt_ui_h: 263; RV64I: # %bb.0: 264; RV64I-NEXT: addi sp, sp, -16 265; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 266; RV64I-NEXT: slli a0, a0, 48 267; RV64I-NEXT: srli a0, a0, 48 268; RV64I-NEXT: call __extendhfsf2@plt 269; RV64I-NEXT: call __fixunssfdi@plt 270; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 271; RV64I-NEXT: addi sp, sp, 16 272; RV64I-NEXT: ret 273 %1 = fptoui half %a to i16 274 ret i16 %1 275} 276 277define i16 @fcvt_ui_h_sat(half %a) nounwind { 278; RV32IZFH-LABEL: fcvt_ui_h_sat: 279; RV32IZFH: # %bb.0: # %start 280; RV32IZFH-NEXT: lui a0, %hi(.LCPI3_0) 281; RV32IZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 282; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 283; RV32IZFH-NEXT: fmv.w.x ft2, zero 284; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 285; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 286; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 287; RV32IZFH-NEXT: ret 288; 289; RV64IZFH-LABEL: fcvt_ui_h_sat: 290; RV64IZFH: # %bb.0: # %start 291; RV64IZFH-NEXT: lui a0, %hi(.LCPI3_0) 292; RV64IZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 293; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 294; RV64IZFH-NEXT: fmv.w.x ft2, zero 295; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 296; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 297; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 298; RV64IZFH-NEXT: ret 299; 300; RV32IDZFH-LABEL: fcvt_ui_h_sat: 301; RV32IDZFH: # %bb.0: # %start 302; RV32IDZFH-NEXT: lui a0, %hi(.LCPI3_0) 303; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 304; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 305; RV32IDZFH-NEXT: fmv.w.x ft2, zero 306; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 307; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 308; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 309; RV32IDZFH-NEXT: ret 310; 311; RV64IDZFH-LABEL: fcvt_ui_h_sat: 312; RV64IDZFH: # %bb.0: # %start 313; RV64IDZFH-NEXT: lui a0, %hi(.LCPI3_0) 314; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI3_0)(a0) 315; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 316; RV64IDZFH-NEXT: fmv.w.x ft2, zero 317; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 318; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 319; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 320; RV64IDZFH-NEXT: ret 321; 322; RV32I-LABEL: fcvt_ui_h_sat: 323; RV32I: # %bb.0: # %start 324; RV32I-NEXT: addi sp, sp, -32 325; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 326; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 327; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 328; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 329; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 330; RV32I-NEXT: lui a1, 16 331; RV32I-NEXT: addi s0, a1, -1 332; RV32I-NEXT: and a0, a0, s0 333; RV32I-NEXT: call __extendhfsf2@plt 334; RV32I-NEXT: mv s1, a0 335; RV32I-NEXT: li a1, 0 336; RV32I-NEXT: call __gesf2@plt 337; RV32I-NEXT: mv s2, a0 338; RV32I-NEXT: mv a0, s1 339; RV32I-NEXT: call __fixunssfsi@plt 340; RV32I-NEXT: li s3, 0 341; RV32I-NEXT: bltz s2, .LBB3_2 342; RV32I-NEXT: # %bb.1: # %start 343; RV32I-NEXT: mv s3, a0 344; RV32I-NEXT: .LBB3_2: # %start 345; RV32I-NEXT: lui a0, 292864 346; RV32I-NEXT: addi a1, a0, -256 347; RV32I-NEXT: mv a0, s1 348; RV32I-NEXT: call __gtsf2@plt 349; RV32I-NEXT: bgtz a0, .LBB3_4 350; RV32I-NEXT: # %bb.3: # %start 351; RV32I-NEXT: mv s0, s3 352; RV32I-NEXT: .LBB3_4: # %start 353; RV32I-NEXT: mv a0, s0 354; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 355; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 356; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 357; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 358; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 359; RV32I-NEXT: addi sp, sp, 32 360; RV32I-NEXT: ret 361; 362; RV64I-LABEL: fcvt_ui_h_sat: 363; RV64I: # %bb.0: # %start 364; RV64I-NEXT: addi sp, sp, -48 365; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 366; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 367; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 368; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 369; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 370; RV64I-NEXT: lui a1, 16 371; RV64I-NEXT: addiw s0, a1, -1 372; RV64I-NEXT: and a0, a0, s0 373; RV64I-NEXT: call __extendhfsf2@plt 374; RV64I-NEXT: mv s1, a0 375; RV64I-NEXT: li a1, 0 376; RV64I-NEXT: call __gesf2@plt 377; RV64I-NEXT: mv s2, a0 378; RV64I-NEXT: mv a0, s1 379; RV64I-NEXT: call __fixunssfdi@plt 380; RV64I-NEXT: li s3, 0 381; RV64I-NEXT: bltz s2, .LBB3_2 382; RV64I-NEXT: # %bb.1: # %start 383; RV64I-NEXT: mv s3, a0 384; RV64I-NEXT: .LBB3_2: # %start 385; RV64I-NEXT: lui a0, 292864 386; RV64I-NEXT: addiw a1, a0, -256 387; RV64I-NEXT: mv a0, s1 388; RV64I-NEXT: call __gtsf2@plt 389; RV64I-NEXT: bgtz a0, .LBB3_4 390; RV64I-NEXT: # %bb.3: # %start 391; RV64I-NEXT: mv s0, s3 392; RV64I-NEXT: .LBB3_4: # %start 393; RV64I-NEXT: mv a0, s0 394; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 395; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 396; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 397; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 398; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 399; RV64I-NEXT: addi sp, sp, 48 400; RV64I-NEXT: ret 401start: 402 %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a) 403 ret i16 %0 404} 405declare i16 @llvm.fptoui.sat.i16.f16(half) 406 407define i32 @fcvt_w_h(half %a) nounwind { 408; CHECKIZFH-LABEL: fcvt_w_h: 409; CHECKIZFH: # %bb.0: 410; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rtz 411; CHECKIZFH-NEXT: ret 412; 413; RV32IDZFH-LABEL: fcvt_w_h: 414; RV32IDZFH: # %bb.0: 415; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 416; RV32IDZFH-NEXT: ret 417; 418; RV64IDZFH-LABEL: fcvt_w_h: 419; RV64IDZFH: # %bb.0: 420; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 421; RV64IDZFH-NEXT: ret 422; 423; RV32I-LABEL: fcvt_w_h: 424; RV32I: # %bb.0: 425; RV32I-NEXT: addi sp, sp, -16 426; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 427; RV32I-NEXT: slli a0, a0, 16 428; RV32I-NEXT: srli a0, a0, 16 429; RV32I-NEXT: call __extendhfsf2@plt 430; RV32I-NEXT: call __fixsfsi@plt 431; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 432; RV32I-NEXT: addi sp, sp, 16 433; RV32I-NEXT: ret 434; 435; RV64I-LABEL: fcvt_w_h: 436; RV64I: # %bb.0: 437; RV64I-NEXT: addi sp, sp, -16 438; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 439; RV64I-NEXT: slli a0, a0, 48 440; RV64I-NEXT: srli a0, a0, 48 441; RV64I-NEXT: call __extendhfsf2@plt 442; RV64I-NEXT: call __fixsfdi@plt 443; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 444; RV64I-NEXT: addi sp, sp, 16 445; RV64I-NEXT: ret 446 %1 = fptosi half %a to i32 447 ret i32 %1 448} 449 450define i32 @fcvt_w_h_sat(half %a) nounwind { 451; CHECKIZFH-LABEL: fcvt_w_h_sat: 452; CHECKIZFH: # %bb.0: # %start 453; CHECKIZFH-NEXT: feq.h a0, fa0, fa0 454; CHECKIZFH-NEXT: beqz a0, .LBB5_2 455; CHECKIZFH-NEXT: # %bb.1: 456; CHECKIZFH-NEXT: fcvt.w.h a0, fa0, rtz 457; CHECKIZFH-NEXT: .LBB5_2: # %start 458; CHECKIZFH-NEXT: ret 459; 460; RV32IDZFH-LABEL: fcvt_w_h_sat: 461; RV32IDZFH: # %bb.0: # %start 462; RV32IDZFH-NEXT: feq.h a0, fa0, fa0 463; RV32IDZFH-NEXT: beqz a0, .LBB5_2 464; RV32IDZFH-NEXT: # %bb.1: 465; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 466; RV32IDZFH-NEXT: .LBB5_2: # %start 467; RV32IDZFH-NEXT: ret 468; 469; RV64IDZFH-LABEL: fcvt_w_h_sat: 470; RV64IDZFH: # %bb.0: # %start 471; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 472; RV64IDZFH-NEXT: beqz a0, .LBB5_2 473; RV64IDZFH-NEXT: # %bb.1: 474; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 475; RV64IDZFH-NEXT: .LBB5_2: # %start 476; RV64IDZFH-NEXT: ret 477; 478; RV32I-LABEL: fcvt_w_h_sat: 479; RV32I: # %bb.0: # %start 480; RV32I-NEXT: addi sp, sp, -32 481; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 482; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 483; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 484; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 485; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 486; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 487; RV32I-NEXT: slli a0, a0, 16 488; RV32I-NEXT: srli a0, a0, 16 489; RV32I-NEXT: call __extendhfsf2@plt 490; RV32I-NEXT: mv s0, a0 491; RV32I-NEXT: lui a1, 847872 492; RV32I-NEXT: call __gesf2@plt 493; RV32I-NEXT: mv s2, a0 494; RV32I-NEXT: mv a0, s0 495; RV32I-NEXT: call __fixsfsi@plt 496; RV32I-NEXT: li s1, 0 497; RV32I-NEXT: lui s4, 524288 498; RV32I-NEXT: lui s3, 524288 499; RV32I-NEXT: bltz s2, .LBB5_2 500; RV32I-NEXT: # %bb.1: # %start 501; RV32I-NEXT: mv s3, a0 502; RV32I-NEXT: .LBB5_2: # %start 503; RV32I-NEXT: lui a0, 323584 504; RV32I-NEXT: addi a1, a0, -1 505; RV32I-NEXT: mv a0, s0 506; RV32I-NEXT: call __gtsf2@plt 507; RV32I-NEXT: bge s1, a0, .LBB5_4 508; RV32I-NEXT: # %bb.3: 509; RV32I-NEXT: addi s3, s4, -1 510; RV32I-NEXT: .LBB5_4: # %start 511; RV32I-NEXT: mv a0, s0 512; RV32I-NEXT: mv a1, s0 513; RV32I-NEXT: call __unordsf2@plt 514; RV32I-NEXT: bne a0, s1, .LBB5_6 515; RV32I-NEXT: # %bb.5: # %start 516; RV32I-NEXT: mv s1, s3 517; RV32I-NEXT: .LBB5_6: # %start 518; RV32I-NEXT: mv a0, s1 519; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 520; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 521; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 522; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 523; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 524; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 525; RV32I-NEXT: addi sp, sp, 32 526; RV32I-NEXT: ret 527; 528; RV64I-LABEL: fcvt_w_h_sat: 529; RV64I: # %bb.0: # %start 530; RV64I-NEXT: addi sp, sp, -48 531; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 532; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 533; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 534; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 535; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 536; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill 537; RV64I-NEXT: slli a0, a0, 48 538; RV64I-NEXT: srli a0, a0, 48 539; RV64I-NEXT: call __extendhfsf2@plt 540; RV64I-NEXT: mv s0, a0 541; RV64I-NEXT: lui a1, 847872 542; RV64I-NEXT: call __gesf2@plt 543; RV64I-NEXT: mv s2, a0 544; RV64I-NEXT: mv a0, s0 545; RV64I-NEXT: call __fixsfdi@plt 546; RV64I-NEXT: li s1, 0 547; RV64I-NEXT: lui s4, 524288 548; RV64I-NEXT: lui s3, 524288 549; RV64I-NEXT: bltz s2, .LBB5_2 550; RV64I-NEXT: # %bb.1: # %start 551; RV64I-NEXT: mv s3, a0 552; RV64I-NEXT: .LBB5_2: # %start 553; RV64I-NEXT: lui a0, 323584 554; RV64I-NEXT: addiw a1, a0, -1 555; RV64I-NEXT: mv a0, s0 556; RV64I-NEXT: call __gtsf2@plt 557; RV64I-NEXT: bge s1, a0, .LBB5_4 558; RV64I-NEXT: # %bb.3: 559; RV64I-NEXT: addiw s3, s4, -1 560; RV64I-NEXT: .LBB5_4: # %start 561; RV64I-NEXT: mv a0, s0 562; RV64I-NEXT: mv a1, s0 563; RV64I-NEXT: call __unordsf2@plt 564; RV64I-NEXT: bne a0, s1, .LBB5_6 565; RV64I-NEXT: # %bb.5: # %start 566; RV64I-NEXT: mv s1, s3 567; RV64I-NEXT: .LBB5_6: # %start 568; RV64I-NEXT: mv a0, s1 569; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 570; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 571; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 572; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 573; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 574; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload 575; RV64I-NEXT: addi sp, sp, 48 576; RV64I-NEXT: ret 577start: 578 %0 = tail call i32 @llvm.fptosi.sat.i32.f16(half %a) 579 ret i32 %0 580} 581declare i32 @llvm.fptosi.sat.i32.f16(half) 582 583define i32 @fcvt_wu_h(half %a) nounwind { 584; CHECKIZFH-LABEL: fcvt_wu_h: 585; CHECKIZFH: # %bb.0: 586; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz 587; CHECKIZFH-NEXT: ret 588; 589; RV32IDZFH-LABEL: fcvt_wu_h: 590; RV32IDZFH: # %bb.0: 591; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 592; RV32IDZFH-NEXT: ret 593; 594; RV64IDZFH-LABEL: fcvt_wu_h: 595; RV64IDZFH: # %bb.0: 596; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 597; RV64IDZFH-NEXT: ret 598; 599; RV32I-LABEL: fcvt_wu_h: 600; RV32I: # %bb.0: 601; RV32I-NEXT: addi sp, sp, -16 602; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 603; RV32I-NEXT: slli a0, a0, 16 604; RV32I-NEXT: srli a0, a0, 16 605; RV32I-NEXT: call __extendhfsf2@plt 606; RV32I-NEXT: call __fixunssfsi@plt 607; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 608; RV32I-NEXT: addi sp, sp, 16 609; RV32I-NEXT: ret 610; 611; RV64I-LABEL: fcvt_wu_h: 612; RV64I: # %bb.0: 613; RV64I-NEXT: addi sp, sp, -16 614; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 615; RV64I-NEXT: slli a0, a0, 48 616; RV64I-NEXT: srli a0, a0, 48 617; RV64I-NEXT: call __extendhfsf2@plt 618; RV64I-NEXT: call __fixunssfdi@plt 619; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 620; RV64I-NEXT: addi sp, sp, 16 621; RV64I-NEXT: ret 622 %1 = fptoui half %a to i32 623 ret i32 %1 624} 625 626; Test where the fptoui has multiple uses, one of which causes a sext to be 627; inserted on RV64. 628define i32 @fcvt_wu_h_multiple_use(half %x, i32* %y) nounwind { 629; CHECKIZFH-LABEL: fcvt_wu_h_multiple_use: 630; CHECKIZFH: # %bb.0: 631; CHECKIZFH-NEXT: fcvt.wu.h a1, fa0, rtz 632; CHECKIZFH-NEXT: li a0, 1 633; CHECKIZFH-NEXT: beqz a1, .LBB7_2 634; CHECKIZFH-NEXT: # %bb.1: 635; CHECKIZFH-NEXT: mv a0, a1 636; CHECKIZFH-NEXT: .LBB7_2: 637; CHECKIZFH-NEXT: ret 638; 639; RV32IDZFH-LABEL: fcvt_wu_h_multiple_use: 640; RV32IDZFH: # %bb.0: 641; RV32IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz 642; RV32IDZFH-NEXT: li a0, 1 643; RV32IDZFH-NEXT: beqz a1, .LBB7_2 644; RV32IDZFH-NEXT: # %bb.1: 645; RV32IDZFH-NEXT: mv a0, a1 646; RV32IDZFH-NEXT: .LBB7_2: 647; RV32IDZFH-NEXT: ret 648; 649; RV64IDZFH-LABEL: fcvt_wu_h_multiple_use: 650; RV64IDZFH: # %bb.0: 651; RV64IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz 652; RV64IDZFH-NEXT: li a0, 1 653; RV64IDZFH-NEXT: beqz a1, .LBB7_2 654; RV64IDZFH-NEXT: # %bb.1: 655; RV64IDZFH-NEXT: mv a0, a1 656; RV64IDZFH-NEXT: .LBB7_2: 657; RV64IDZFH-NEXT: ret 658; 659; RV32I-LABEL: fcvt_wu_h_multiple_use: 660; RV32I: # %bb.0: 661; RV32I-NEXT: addi sp, sp, -16 662; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 663; RV32I-NEXT: slli a0, a0, 16 664; RV32I-NEXT: srli a0, a0, 16 665; RV32I-NEXT: call __extendhfsf2@plt 666; RV32I-NEXT: call __fixunssfsi@plt 667; RV32I-NEXT: mv a1, a0 668; RV32I-NEXT: li a0, 1 669; RV32I-NEXT: beqz a1, .LBB7_2 670; RV32I-NEXT: # %bb.1: 671; RV32I-NEXT: mv a0, a1 672; RV32I-NEXT: .LBB7_2: 673; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 674; RV32I-NEXT: addi sp, sp, 16 675; RV32I-NEXT: ret 676; 677; RV64I-LABEL: fcvt_wu_h_multiple_use: 678; RV64I: # %bb.0: 679; RV64I-NEXT: addi sp, sp, -16 680; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 681; RV64I-NEXT: slli a0, a0, 48 682; RV64I-NEXT: srli a0, a0, 48 683; RV64I-NEXT: call __extendhfsf2@plt 684; RV64I-NEXT: call __fixunssfdi@plt 685; RV64I-NEXT: mv a1, a0 686; RV64I-NEXT: li a0, 1 687; RV64I-NEXT: beqz a1, .LBB7_2 688; RV64I-NEXT: # %bb.1: 689; RV64I-NEXT: mv a0, a1 690; RV64I-NEXT: .LBB7_2: 691; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 692; RV64I-NEXT: addi sp, sp, 16 693; RV64I-NEXT: ret 694 %a = fptoui half %x to i32 695 %b = icmp eq i32 %a, 0 696 %c = select i1 %b, i32 1, i32 %a 697 ret i32 %c 698} 699 700define i32 @fcvt_wu_h_sat(half %a) nounwind { 701; CHECKIZFH-LABEL: fcvt_wu_h_sat: 702; CHECKIZFH: # %bb.0: # %start 703; CHECKIZFH-NEXT: feq.h a0, fa0, fa0 704; CHECKIZFH-NEXT: beqz a0, .LBB8_2 705; CHECKIZFH-NEXT: # %bb.1: 706; CHECKIZFH-NEXT: fcvt.wu.h a0, fa0, rtz 707; CHECKIZFH-NEXT: .LBB8_2: # %start 708; CHECKIZFH-NEXT: ret 709; 710; RV32IDZFH-LABEL: fcvt_wu_h_sat: 711; RV32IDZFH: # %bb.0: # %start 712; RV32IDZFH-NEXT: feq.h a0, fa0, fa0 713; RV32IDZFH-NEXT: beqz a0, .LBB8_2 714; RV32IDZFH-NEXT: # %bb.1: 715; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 716; RV32IDZFH-NEXT: .LBB8_2: # %start 717; RV32IDZFH-NEXT: ret 718; 719; RV64IDZFH-LABEL: fcvt_wu_h_sat: 720; RV64IDZFH: # %bb.0: # %start 721; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 722; RV64IDZFH-NEXT: beqz a0, .LBB8_2 723; RV64IDZFH-NEXT: # %bb.1: 724; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 725; RV64IDZFH-NEXT: .LBB8_2: # %start 726; RV64IDZFH-NEXT: ret 727; 728; RV32I-LABEL: fcvt_wu_h_sat: 729; RV32I: # %bb.0: # %start 730; RV32I-NEXT: addi sp, sp, -16 731; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 732; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 733; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 734; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 735; RV32I-NEXT: slli a0, a0, 16 736; RV32I-NEXT: srli a0, a0, 16 737; RV32I-NEXT: call __extendhfsf2@plt 738; RV32I-NEXT: mv s0, a0 739; RV32I-NEXT: li a1, 0 740; RV32I-NEXT: call __gesf2@plt 741; RV32I-NEXT: mv s1, a0 742; RV32I-NEXT: mv a0, s0 743; RV32I-NEXT: call __fixunssfsi@plt 744; RV32I-NEXT: li s2, 0 745; RV32I-NEXT: bltz s1, .LBB8_2 746; RV32I-NEXT: # %bb.1: # %start 747; RV32I-NEXT: mv s2, a0 748; RV32I-NEXT: .LBB8_2: # %start 749; RV32I-NEXT: lui a0, 325632 750; RV32I-NEXT: addi a1, a0, -1 751; RV32I-NEXT: mv a0, s0 752; RV32I-NEXT: call __gtsf2@plt 753; RV32I-NEXT: mv a1, a0 754; RV32I-NEXT: li a0, -1 755; RV32I-NEXT: bgtz a1, .LBB8_4 756; RV32I-NEXT: # %bb.3: # %start 757; RV32I-NEXT: mv a0, s2 758; RV32I-NEXT: .LBB8_4: # %start 759; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 760; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 761; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 762; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 763; RV32I-NEXT: addi sp, sp, 16 764; RV32I-NEXT: ret 765; 766; RV64I-LABEL: fcvt_wu_h_sat: 767; RV64I: # %bb.0: # %start 768; RV64I-NEXT: addi sp, sp, -32 769; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 770; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 771; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 772; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 773; RV64I-NEXT: slli a0, a0, 48 774; RV64I-NEXT: srli a0, a0, 48 775; RV64I-NEXT: call __extendhfsf2@plt 776; RV64I-NEXT: mv s0, a0 777; RV64I-NEXT: li a1, 0 778; RV64I-NEXT: call __gesf2@plt 779; RV64I-NEXT: mv s2, a0 780; RV64I-NEXT: mv a0, s0 781; RV64I-NEXT: call __fixunssfdi@plt 782; RV64I-NEXT: li s1, 0 783; RV64I-NEXT: bltz s2, .LBB8_2 784; RV64I-NEXT: # %bb.1: # %start 785; RV64I-NEXT: mv s1, a0 786; RV64I-NEXT: .LBB8_2: # %start 787; RV64I-NEXT: lui a0, 325632 788; RV64I-NEXT: addiw a1, a0, -1 789; RV64I-NEXT: mv a0, s0 790; RV64I-NEXT: call __gtsf2@plt 791; RV64I-NEXT: blez a0, .LBB8_4 792; RV64I-NEXT: # %bb.3: 793; RV64I-NEXT: li a0, -1 794; RV64I-NEXT: srli s1, a0, 32 795; RV64I-NEXT: .LBB8_4: # %start 796; RV64I-NEXT: mv a0, s1 797; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 798; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 799; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 800; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 801; RV64I-NEXT: addi sp, sp, 32 802; RV64I-NEXT: ret 803start: 804 %0 = tail call i32 @llvm.fptoui.sat.i32.f16(half %a) 805 ret i32 %0 806} 807declare i32 @llvm.fptoui.sat.i32.f16(half) 808 809define i64 @fcvt_l_h(half %a) nounwind { 810; RV32IZFH-LABEL: fcvt_l_h: 811; RV32IZFH: # %bb.0: 812; RV32IZFH-NEXT: addi sp, sp, -16 813; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 814; RV32IZFH-NEXT: call __fixhfdi@plt 815; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 816; RV32IZFH-NEXT: addi sp, sp, 16 817; RV32IZFH-NEXT: ret 818; 819; RV64IZFH-LABEL: fcvt_l_h: 820; RV64IZFH: # %bb.0: 821; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 822; RV64IZFH-NEXT: ret 823; 824; RV32IDZFH-LABEL: fcvt_l_h: 825; RV32IDZFH: # %bb.0: 826; RV32IDZFH-NEXT: addi sp, sp, -16 827; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 828; RV32IDZFH-NEXT: call __fixhfdi@plt 829; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 830; RV32IDZFH-NEXT: addi sp, sp, 16 831; RV32IDZFH-NEXT: ret 832; 833; RV64IDZFH-LABEL: fcvt_l_h: 834; RV64IDZFH: # %bb.0: 835; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 836; RV64IDZFH-NEXT: ret 837; 838; RV32I-LABEL: fcvt_l_h: 839; RV32I: # %bb.0: 840; RV32I-NEXT: addi sp, sp, -16 841; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 842; RV32I-NEXT: slli a0, a0, 16 843; RV32I-NEXT: srli a0, a0, 16 844; RV32I-NEXT: call __extendhfsf2@plt 845; RV32I-NEXT: call __fixsfdi@plt 846; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 847; RV32I-NEXT: addi sp, sp, 16 848; RV32I-NEXT: ret 849; 850; RV64I-LABEL: fcvt_l_h: 851; RV64I: # %bb.0: 852; RV64I-NEXT: addi sp, sp, -16 853; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 854; RV64I-NEXT: slli a0, a0, 48 855; RV64I-NEXT: srli a0, a0, 48 856; RV64I-NEXT: call __extendhfsf2@plt 857; RV64I-NEXT: call __fixsfdi@plt 858; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 859; RV64I-NEXT: addi sp, sp, 16 860; RV64I-NEXT: ret 861 %1 = fptosi half %a to i64 862 ret i64 %1 863} 864 865define i64 @fcvt_l_h_sat(half %a) nounwind { 866; RV32IZFH-LABEL: fcvt_l_h_sat: 867; RV32IZFH: # %bb.0: # %start 868; RV32IZFH-NEXT: addi sp, sp, -16 869; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 870; RV32IZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 871; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 872; RV32IZFH-NEXT: lui a0, %hi(.LCPI10_0) 873; RV32IZFH-NEXT: flw ft0, %lo(.LCPI10_0)(a0) 874; RV32IZFH-NEXT: fcvt.s.h fs0, fa0 875; RV32IZFH-NEXT: fle.s s0, ft0, fs0 876; RV32IZFH-NEXT: fmv.s fa0, fs0 877; RV32IZFH-NEXT: call __fixsfdi@plt 878; RV32IZFH-NEXT: mv a2, a0 879; RV32IZFH-NEXT: bnez s0, .LBB10_2 880; RV32IZFH-NEXT: # %bb.1: # %start 881; RV32IZFH-NEXT: li a2, 0 882; RV32IZFH-NEXT: .LBB10_2: # %start 883; RV32IZFH-NEXT: lui a0, %hi(.LCPI10_1) 884; RV32IZFH-NEXT: flw ft0, %lo(.LCPI10_1)(a0) 885; RV32IZFH-NEXT: flt.s a3, ft0, fs0 886; RV32IZFH-NEXT: li a0, -1 887; RV32IZFH-NEXT: beqz a3, .LBB10_9 888; RV32IZFH-NEXT: # %bb.3: # %start 889; RV32IZFH-NEXT: feq.s a2, fs0, fs0 890; RV32IZFH-NEXT: beqz a2, .LBB10_10 891; RV32IZFH-NEXT: .LBB10_4: # %start 892; RV32IZFH-NEXT: lui a4, 524288 893; RV32IZFH-NEXT: beqz s0, .LBB10_11 894; RV32IZFH-NEXT: .LBB10_5: # %start 895; RV32IZFH-NEXT: bnez a3, .LBB10_12 896; RV32IZFH-NEXT: .LBB10_6: # %start 897; RV32IZFH-NEXT: bnez a2, .LBB10_8 898; RV32IZFH-NEXT: .LBB10_7: # %start 899; RV32IZFH-NEXT: li a1, 0 900; RV32IZFH-NEXT: .LBB10_8: # %start 901; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 902; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 903; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 904; RV32IZFH-NEXT: addi sp, sp, 16 905; RV32IZFH-NEXT: ret 906; RV32IZFH-NEXT: .LBB10_9: # %start 907; RV32IZFH-NEXT: mv a0, a2 908; RV32IZFH-NEXT: feq.s a2, fs0, fs0 909; RV32IZFH-NEXT: bnez a2, .LBB10_4 910; RV32IZFH-NEXT: .LBB10_10: # %start 911; RV32IZFH-NEXT: li a0, 0 912; RV32IZFH-NEXT: lui a4, 524288 913; RV32IZFH-NEXT: bnez s0, .LBB10_5 914; RV32IZFH-NEXT: .LBB10_11: # %start 915; RV32IZFH-NEXT: lui a1, 524288 916; RV32IZFH-NEXT: beqz a3, .LBB10_6 917; RV32IZFH-NEXT: .LBB10_12: 918; RV32IZFH-NEXT: addi a1, a4, -1 919; RV32IZFH-NEXT: beqz a2, .LBB10_7 920; RV32IZFH-NEXT: j .LBB10_8 921; 922; RV64IZFH-LABEL: fcvt_l_h_sat: 923; RV64IZFH: # %bb.0: # %start 924; RV64IZFH-NEXT: feq.h a0, fa0, fa0 925; RV64IZFH-NEXT: beqz a0, .LBB10_2 926; RV64IZFH-NEXT: # %bb.1: 927; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 928; RV64IZFH-NEXT: .LBB10_2: # %start 929; RV64IZFH-NEXT: ret 930; 931; RV32IDZFH-LABEL: fcvt_l_h_sat: 932; RV32IDZFH: # %bb.0: # %start 933; RV32IDZFH-NEXT: addi sp, sp, -16 934; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 935; RV32IDZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 936; RV32IDZFH-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill 937; RV32IDZFH-NEXT: lui a0, %hi(.LCPI10_0) 938; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI10_0)(a0) 939; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 940; RV32IDZFH-NEXT: fle.s s0, ft0, fs0 941; RV32IDZFH-NEXT: fmv.s fa0, fs0 942; RV32IDZFH-NEXT: call __fixsfdi@plt 943; RV32IDZFH-NEXT: mv a2, a0 944; RV32IDZFH-NEXT: bnez s0, .LBB10_2 945; RV32IDZFH-NEXT: # %bb.1: # %start 946; RV32IDZFH-NEXT: li a2, 0 947; RV32IDZFH-NEXT: .LBB10_2: # %start 948; RV32IDZFH-NEXT: lui a0, %hi(.LCPI10_1) 949; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI10_1)(a0) 950; RV32IDZFH-NEXT: flt.s a3, ft0, fs0 951; RV32IDZFH-NEXT: li a0, -1 952; RV32IDZFH-NEXT: beqz a3, .LBB10_9 953; RV32IDZFH-NEXT: # %bb.3: # %start 954; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 955; RV32IDZFH-NEXT: beqz a2, .LBB10_10 956; RV32IDZFH-NEXT: .LBB10_4: # %start 957; RV32IDZFH-NEXT: lui a4, 524288 958; RV32IDZFH-NEXT: beqz s0, .LBB10_11 959; RV32IDZFH-NEXT: .LBB10_5: # %start 960; RV32IDZFH-NEXT: bnez a3, .LBB10_12 961; RV32IDZFH-NEXT: .LBB10_6: # %start 962; RV32IDZFH-NEXT: bnez a2, .LBB10_8 963; RV32IDZFH-NEXT: .LBB10_7: # %start 964; RV32IDZFH-NEXT: li a1, 0 965; RV32IDZFH-NEXT: .LBB10_8: # %start 966; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 967; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 968; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload 969; RV32IDZFH-NEXT: addi sp, sp, 16 970; RV32IDZFH-NEXT: ret 971; RV32IDZFH-NEXT: .LBB10_9: # %start 972; RV32IDZFH-NEXT: mv a0, a2 973; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 974; RV32IDZFH-NEXT: bnez a2, .LBB10_4 975; RV32IDZFH-NEXT: .LBB10_10: # %start 976; RV32IDZFH-NEXT: li a0, 0 977; RV32IDZFH-NEXT: lui a4, 524288 978; RV32IDZFH-NEXT: bnez s0, .LBB10_5 979; RV32IDZFH-NEXT: .LBB10_11: # %start 980; RV32IDZFH-NEXT: lui a1, 524288 981; RV32IDZFH-NEXT: beqz a3, .LBB10_6 982; RV32IDZFH-NEXT: .LBB10_12: 983; RV32IDZFH-NEXT: addi a1, a4, -1 984; RV32IDZFH-NEXT: beqz a2, .LBB10_7 985; RV32IDZFH-NEXT: j .LBB10_8 986; 987; RV64IDZFH-LABEL: fcvt_l_h_sat: 988; RV64IDZFH: # %bb.0: # %start 989; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 990; RV64IDZFH-NEXT: beqz a0, .LBB10_2 991; RV64IDZFH-NEXT: # %bb.1: 992; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 993; RV64IDZFH-NEXT: .LBB10_2: # %start 994; RV64IDZFH-NEXT: ret 995; 996; RV32I-LABEL: fcvt_l_h_sat: 997; RV32I: # %bb.0: # %start 998; RV32I-NEXT: addi sp, sp, -32 999; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1000; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1001; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1002; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1003; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1004; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 1005; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill 1006; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill 1007; RV32I-NEXT: slli a0, a0, 16 1008; RV32I-NEXT: srli a0, a0, 16 1009; RV32I-NEXT: call __extendhfsf2@plt 1010; RV32I-NEXT: mv s0, a0 1011; RV32I-NEXT: lui a1, 913408 1012; RV32I-NEXT: call __gesf2@plt 1013; RV32I-NEXT: mv s3, a0 1014; RV32I-NEXT: mv a0, s0 1015; RV32I-NEXT: call __fixsfdi@plt 1016; RV32I-NEXT: mv s2, a1 1017; RV32I-NEXT: li s1, 0 1018; RV32I-NEXT: li s5, 0 1019; RV32I-NEXT: bltz s3, .LBB10_2 1020; RV32I-NEXT: # %bb.1: # %start 1021; RV32I-NEXT: mv s5, a0 1022; RV32I-NEXT: .LBB10_2: # %start 1023; RV32I-NEXT: lui a0, 389120 1024; RV32I-NEXT: addi s4, a0, -1 1025; RV32I-NEXT: mv a0, s0 1026; RV32I-NEXT: mv a1, s4 1027; RV32I-NEXT: call __gtsf2@plt 1028; RV32I-NEXT: li s6, -1 1029; RV32I-NEXT: blt s1, a0, .LBB10_4 1030; RV32I-NEXT: # %bb.3: # %start 1031; RV32I-NEXT: mv s6, s5 1032; RV32I-NEXT: .LBB10_4: # %start 1033; RV32I-NEXT: mv a0, s0 1034; RV32I-NEXT: mv a1, s0 1035; RV32I-NEXT: call __unordsf2@plt 1036; RV32I-NEXT: mv s3, s1 1037; RV32I-NEXT: bne a0, s1, .LBB10_6 1038; RV32I-NEXT: # %bb.5: # %start 1039; RV32I-NEXT: mv s3, s6 1040; RV32I-NEXT: .LBB10_6: # %start 1041; RV32I-NEXT: lui a1, 913408 1042; RV32I-NEXT: mv a0, s0 1043; RV32I-NEXT: call __gesf2@plt 1044; RV32I-NEXT: lui s6, 524288 1045; RV32I-NEXT: lui s5, 524288 1046; RV32I-NEXT: blt a0, s1, .LBB10_8 1047; RV32I-NEXT: # %bb.7: # %start 1048; RV32I-NEXT: mv s5, s2 1049; RV32I-NEXT: .LBB10_8: # %start 1050; RV32I-NEXT: mv a0, s0 1051; RV32I-NEXT: mv a1, s4 1052; RV32I-NEXT: call __gtsf2@plt 1053; RV32I-NEXT: bge s1, a0, .LBB10_10 1054; RV32I-NEXT: # %bb.9: 1055; RV32I-NEXT: addi s5, s6, -1 1056; RV32I-NEXT: .LBB10_10: # %start 1057; RV32I-NEXT: mv a0, s0 1058; RV32I-NEXT: mv a1, s0 1059; RV32I-NEXT: call __unordsf2@plt 1060; RV32I-NEXT: bne a0, s1, .LBB10_12 1061; RV32I-NEXT: # %bb.11: # %start 1062; RV32I-NEXT: mv s1, s5 1063; RV32I-NEXT: .LBB10_12: # %start 1064; RV32I-NEXT: mv a0, s3 1065; RV32I-NEXT: mv a1, s1 1066; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1067; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1068; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1069; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1070; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1071; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 1072; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload 1073; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload 1074; RV32I-NEXT: addi sp, sp, 32 1075; RV32I-NEXT: ret 1076; 1077; RV64I-LABEL: fcvt_l_h_sat: 1078; RV64I: # %bb.0: # %start 1079; RV64I-NEXT: addi sp, sp, -48 1080; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 1081; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 1082; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 1083; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 1084; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 1085; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill 1086; RV64I-NEXT: slli a0, a0, 48 1087; RV64I-NEXT: srli a0, a0, 48 1088; RV64I-NEXT: call __extendhfsf2@plt 1089; RV64I-NEXT: mv s0, a0 1090; RV64I-NEXT: lui a1, 913408 1091; RV64I-NEXT: call __gesf2@plt 1092; RV64I-NEXT: mv s3, a0 1093; RV64I-NEXT: mv a0, s0 1094; RV64I-NEXT: call __fixsfdi@plt 1095; RV64I-NEXT: li s1, 0 1096; RV64I-NEXT: li s4, -1 1097; RV64I-NEXT: bltz s3, .LBB10_2 1098; RV64I-NEXT: # %bb.1: # %start 1099; RV64I-NEXT: mv s2, a0 1100; RV64I-NEXT: j .LBB10_3 1101; RV64I-NEXT: .LBB10_2: 1102; RV64I-NEXT: slli s2, s4, 63 1103; RV64I-NEXT: .LBB10_3: # %start 1104; RV64I-NEXT: lui a0, 389120 1105; RV64I-NEXT: addiw a1, a0, -1 1106; RV64I-NEXT: mv a0, s0 1107; RV64I-NEXT: call __gtsf2@plt 1108; RV64I-NEXT: bge s1, a0, .LBB10_5 1109; RV64I-NEXT: # %bb.4: 1110; RV64I-NEXT: srli s2, s4, 1 1111; RV64I-NEXT: .LBB10_5: # %start 1112; RV64I-NEXT: mv a0, s0 1113; RV64I-NEXT: mv a1, s0 1114; RV64I-NEXT: call __unordsf2@plt 1115; RV64I-NEXT: bne a0, s1, .LBB10_7 1116; RV64I-NEXT: # %bb.6: # %start 1117; RV64I-NEXT: mv s1, s2 1118; RV64I-NEXT: .LBB10_7: # %start 1119; RV64I-NEXT: mv a0, s1 1120; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 1121; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 1122; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 1123; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 1124; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 1125; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload 1126; RV64I-NEXT: addi sp, sp, 48 1127; RV64I-NEXT: ret 1128start: 1129 %0 = tail call i64 @llvm.fptosi.sat.i64.f16(half %a) 1130 ret i64 %0 1131} 1132declare i64 @llvm.fptosi.sat.i64.f16(half) 1133 1134define i64 @fcvt_lu_h(half %a) nounwind { 1135; RV32IZFH-LABEL: fcvt_lu_h: 1136; RV32IZFH: # %bb.0: 1137; RV32IZFH-NEXT: addi sp, sp, -16 1138; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1139; RV32IZFH-NEXT: call __fixunshfdi@plt 1140; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1141; RV32IZFH-NEXT: addi sp, sp, 16 1142; RV32IZFH-NEXT: ret 1143; 1144; RV64IZFH-LABEL: fcvt_lu_h: 1145; RV64IZFH: # %bb.0: 1146; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1147; RV64IZFH-NEXT: ret 1148; 1149; RV32IDZFH-LABEL: fcvt_lu_h: 1150; RV32IDZFH: # %bb.0: 1151; RV32IDZFH-NEXT: addi sp, sp, -16 1152; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1153; RV32IDZFH-NEXT: call __fixunshfdi@plt 1154; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1155; RV32IDZFH-NEXT: addi sp, sp, 16 1156; RV32IDZFH-NEXT: ret 1157; 1158; RV64IDZFH-LABEL: fcvt_lu_h: 1159; RV64IDZFH: # %bb.0: 1160; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1161; RV64IDZFH-NEXT: ret 1162; 1163; RV32I-LABEL: fcvt_lu_h: 1164; RV32I: # %bb.0: 1165; RV32I-NEXT: addi sp, sp, -16 1166; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1167; RV32I-NEXT: slli a0, a0, 16 1168; RV32I-NEXT: srli a0, a0, 16 1169; RV32I-NEXT: call __extendhfsf2@plt 1170; RV32I-NEXT: call __fixunssfdi@plt 1171; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1172; RV32I-NEXT: addi sp, sp, 16 1173; RV32I-NEXT: ret 1174; 1175; RV64I-LABEL: fcvt_lu_h: 1176; RV64I: # %bb.0: 1177; RV64I-NEXT: addi sp, sp, -16 1178; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1179; RV64I-NEXT: slli a0, a0, 48 1180; RV64I-NEXT: srli a0, a0, 48 1181; RV64I-NEXT: call __extendhfsf2@plt 1182; RV64I-NEXT: call __fixunssfdi@plt 1183; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1184; RV64I-NEXT: addi sp, sp, 16 1185; RV64I-NEXT: ret 1186 %1 = fptoui half %a to i64 1187 ret i64 %1 1188} 1189 1190define i64 @fcvt_lu_h_sat(half %a) nounwind { 1191; RV32IZFH-LABEL: fcvt_lu_h_sat: 1192; RV32IZFH: # %bb.0: # %start 1193; RV32IZFH-NEXT: addi sp, sp, -16 1194; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1195; RV32IZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1196; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 1197; RV32IZFH-NEXT: fcvt.s.h fs0, fa0 1198; RV32IZFH-NEXT: fmv.w.x ft0, zero 1199; RV32IZFH-NEXT: fle.s s0, ft0, fs0 1200; RV32IZFH-NEXT: fmv.s fa0, fs0 1201; RV32IZFH-NEXT: call __fixunssfdi@plt 1202; RV32IZFH-NEXT: mv a3, a0 1203; RV32IZFH-NEXT: bnez s0, .LBB12_2 1204; RV32IZFH-NEXT: # %bb.1: # %start 1205; RV32IZFH-NEXT: li a3, 0 1206; RV32IZFH-NEXT: .LBB12_2: # %start 1207; RV32IZFH-NEXT: lui a0, %hi(.LCPI12_0) 1208; RV32IZFH-NEXT: flw ft0, %lo(.LCPI12_0)(a0) 1209; RV32IZFH-NEXT: flt.s a4, ft0, fs0 1210; RV32IZFH-NEXT: li a2, -1 1211; RV32IZFH-NEXT: li a0, -1 1212; RV32IZFH-NEXT: beqz a4, .LBB12_7 1213; RV32IZFH-NEXT: # %bb.3: # %start 1214; RV32IZFH-NEXT: beqz s0, .LBB12_8 1215; RV32IZFH-NEXT: .LBB12_4: # %start 1216; RV32IZFH-NEXT: bnez a4, .LBB12_6 1217; RV32IZFH-NEXT: .LBB12_5: # %start 1218; RV32IZFH-NEXT: mv a2, a1 1219; RV32IZFH-NEXT: .LBB12_6: # %start 1220; RV32IZFH-NEXT: mv a1, a2 1221; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1222; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1223; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 1224; RV32IZFH-NEXT: addi sp, sp, 16 1225; RV32IZFH-NEXT: ret 1226; RV32IZFH-NEXT: .LBB12_7: # %start 1227; RV32IZFH-NEXT: mv a0, a3 1228; RV32IZFH-NEXT: bnez s0, .LBB12_4 1229; RV32IZFH-NEXT: .LBB12_8: # %start 1230; RV32IZFH-NEXT: li a1, 0 1231; RV32IZFH-NEXT: beqz a4, .LBB12_5 1232; RV32IZFH-NEXT: j .LBB12_6 1233; 1234; RV64IZFH-LABEL: fcvt_lu_h_sat: 1235; RV64IZFH: # %bb.0: # %start 1236; RV64IZFH-NEXT: feq.h a0, fa0, fa0 1237; RV64IZFH-NEXT: beqz a0, .LBB12_2 1238; RV64IZFH-NEXT: # %bb.1: 1239; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1240; RV64IZFH-NEXT: .LBB12_2: # %start 1241; RV64IZFH-NEXT: ret 1242; 1243; RV32IDZFH-LABEL: fcvt_lu_h_sat: 1244; RV32IDZFH: # %bb.0: # %start 1245; RV32IDZFH-NEXT: addi sp, sp, -16 1246; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1247; RV32IDZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1248; RV32IDZFH-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill 1249; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 1250; RV32IDZFH-NEXT: fmv.w.x ft0, zero 1251; RV32IDZFH-NEXT: fle.s s0, ft0, fs0 1252; RV32IDZFH-NEXT: fmv.s fa0, fs0 1253; RV32IDZFH-NEXT: call __fixunssfdi@plt 1254; RV32IDZFH-NEXT: mv a3, a0 1255; RV32IDZFH-NEXT: bnez s0, .LBB12_2 1256; RV32IDZFH-NEXT: # %bb.1: # %start 1257; RV32IDZFH-NEXT: li a3, 0 1258; RV32IDZFH-NEXT: .LBB12_2: # %start 1259; RV32IDZFH-NEXT: lui a0, %hi(.LCPI12_0) 1260; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI12_0)(a0) 1261; RV32IDZFH-NEXT: flt.s a4, ft0, fs0 1262; RV32IDZFH-NEXT: li a2, -1 1263; RV32IDZFH-NEXT: li a0, -1 1264; RV32IDZFH-NEXT: beqz a4, .LBB12_7 1265; RV32IDZFH-NEXT: # %bb.3: # %start 1266; RV32IDZFH-NEXT: beqz s0, .LBB12_8 1267; RV32IDZFH-NEXT: .LBB12_4: # %start 1268; RV32IDZFH-NEXT: bnez a4, .LBB12_6 1269; RV32IDZFH-NEXT: .LBB12_5: # %start 1270; RV32IDZFH-NEXT: mv a2, a1 1271; RV32IDZFH-NEXT: .LBB12_6: # %start 1272; RV32IDZFH-NEXT: mv a1, a2 1273; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1274; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1275; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload 1276; RV32IDZFH-NEXT: addi sp, sp, 16 1277; RV32IDZFH-NEXT: ret 1278; RV32IDZFH-NEXT: .LBB12_7: # %start 1279; RV32IDZFH-NEXT: mv a0, a3 1280; RV32IDZFH-NEXT: bnez s0, .LBB12_4 1281; RV32IDZFH-NEXT: .LBB12_8: # %start 1282; RV32IDZFH-NEXT: li a1, 0 1283; RV32IDZFH-NEXT: beqz a4, .LBB12_5 1284; RV32IDZFH-NEXT: j .LBB12_6 1285; 1286; RV64IDZFH-LABEL: fcvt_lu_h_sat: 1287; RV64IDZFH: # %bb.0: # %start 1288; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 1289; RV64IDZFH-NEXT: beqz a0, .LBB12_2 1290; RV64IDZFH-NEXT: # %bb.1: 1291; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1292; RV64IDZFH-NEXT: .LBB12_2: # %start 1293; RV64IDZFH-NEXT: ret 1294; 1295; RV32I-LABEL: fcvt_lu_h_sat: 1296; RV32I: # %bb.0: # %start 1297; RV32I-NEXT: addi sp, sp, -32 1298; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1299; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1300; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1301; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1302; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1303; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 1304; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill 1305; RV32I-NEXT: slli a0, a0, 16 1306; RV32I-NEXT: srli a0, a0, 16 1307; RV32I-NEXT: call __extendhfsf2@plt 1308; RV32I-NEXT: mv s0, a0 1309; RV32I-NEXT: li a1, 0 1310; RV32I-NEXT: call __gesf2@plt 1311; RV32I-NEXT: mv s2, a0 1312; RV32I-NEXT: mv a0, s0 1313; RV32I-NEXT: call __fixunssfdi@plt 1314; RV32I-NEXT: mv s1, a1 1315; RV32I-NEXT: li s5, 0 1316; RV32I-NEXT: bltz s2, .LBB12_2 1317; RV32I-NEXT: # %bb.1: # %start 1318; RV32I-NEXT: mv s5, a0 1319; RV32I-NEXT: .LBB12_2: # %start 1320; RV32I-NEXT: lui a0, 391168 1321; RV32I-NEXT: addi s4, a0, -1 1322; RV32I-NEXT: mv a0, s0 1323; RV32I-NEXT: mv a1, s4 1324; RV32I-NEXT: call __gtsf2@plt 1325; RV32I-NEXT: li s2, -1 1326; RV32I-NEXT: li s3, -1 1327; RV32I-NEXT: bgtz a0, .LBB12_4 1328; RV32I-NEXT: # %bb.3: # %start 1329; RV32I-NEXT: mv s3, s5 1330; RV32I-NEXT: .LBB12_4: # %start 1331; RV32I-NEXT: mv a0, s0 1332; RV32I-NEXT: li a1, 0 1333; RV32I-NEXT: call __gesf2@plt 1334; RV32I-NEXT: li s5, 0 1335; RV32I-NEXT: bltz a0, .LBB12_6 1336; RV32I-NEXT: # %bb.5: # %start 1337; RV32I-NEXT: mv s5, s1 1338; RV32I-NEXT: .LBB12_6: # %start 1339; RV32I-NEXT: mv a0, s0 1340; RV32I-NEXT: mv a1, s4 1341; RV32I-NEXT: call __gtsf2@plt 1342; RV32I-NEXT: bgtz a0, .LBB12_8 1343; RV32I-NEXT: # %bb.7: # %start 1344; RV32I-NEXT: mv s2, s5 1345; RV32I-NEXT: .LBB12_8: # %start 1346; RV32I-NEXT: mv a0, s3 1347; RV32I-NEXT: mv a1, s2 1348; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1349; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1350; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1351; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1352; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1353; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 1354; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload 1355; RV32I-NEXT: addi sp, sp, 32 1356; RV32I-NEXT: ret 1357; 1358; RV64I-LABEL: fcvt_lu_h_sat: 1359; RV64I: # %bb.0: # %start 1360; RV64I-NEXT: addi sp, sp, -32 1361; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 1362; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 1363; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 1364; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 1365; RV64I-NEXT: slli a0, a0, 48 1366; RV64I-NEXT: srli a0, a0, 48 1367; RV64I-NEXT: call __extendhfsf2@plt 1368; RV64I-NEXT: mv s0, a0 1369; RV64I-NEXT: li a1, 0 1370; RV64I-NEXT: call __gesf2@plt 1371; RV64I-NEXT: mv s1, a0 1372; RV64I-NEXT: mv a0, s0 1373; RV64I-NEXT: call __fixunssfdi@plt 1374; RV64I-NEXT: li s2, 0 1375; RV64I-NEXT: bltz s1, .LBB12_2 1376; RV64I-NEXT: # %bb.1: # %start 1377; RV64I-NEXT: mv s2, a0 1378; RV64I-NEXT: .LBB12_2: # %start 1379; RV64I-NEXT: lui a0, 391168 1380; RV64I-NEXT: addiw a1, a0, -1 1381; RV64I-NEXT: mv a0, s0 1382; RV64I-NEXT: call __gtsf2@plt 1383; RV64I-NEXT: mv a1, a0 1384; RV64I-NEXT: li a0, -1 1385; RV64I-NEXT: bgtz a1, .LBB12_4 1386; RV64I-NEXT: # %bb.3: # %start 1387; RV64I-NEXT: mv a0, s2 1388; RV64I-NEXT: .LBB12_4: # %start 1389; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 1390; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 1391; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 1392; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 1393; RV64I-NEXT: addi sp, sp, 32 1394; RV64I-NEXT: ret 1395start: 1396 %0 = tail call i64 @llvm.fptoui.sat.i64.f16(half %a) 1397 ret i64 %0 1398} 1399declare i64 @llvm.fptoui.sat.i64.f16(half) 1400 1401define half @fcvt_h_si(i16 %a) nounwind { 1402; RV32IZFH-LABEL: fcvt_h_si: 1403; RV32IZFH: # %bb.0: 1404; RV32IZFH-NEXT: slli a0, a0, 16 1405; RV32IZFH-NEXT: srai a0, a0, 16 1406; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1407; RV32IZFH-NEXT: ret 1408; 1409; RV64IZFH-LABEL: fcvt_h_si: 1410; RV64IZFH: # %bb.0: 1411; RV64IZFH-NEXT: slli a0, a0, 48 1412; RV64IZFH-NEXT: srai a0, a0, 48 1413; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1414; RV64IZFH-NEXT: ret 1415; 1416; RV32IDZFH-LABEL: fcvt_h_si: 1417; RV32IDZFH: # %bb.0: 1418; RV32IDZFH-NEXT: slli a0, a0, 16 1419; RV32IDZFH-NEXT: srai a0, a0, 16 1420; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1421; RV32IDZFH-NEXT: ret 1422; 1423; RV64IDZFH-LABEL: fcvt_h_si: 1424; RV64IDZFH: # %bb.0: 1425; RV64IDZFH-NEXT: slli a0, a0, 48 1426; RV64IDZFH-NEXT: srai a0, a0, 48 1427; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1428; RV64IDZFH-NEXT: ret 1429; 1430; RV32I-LABEL: fcvt_h_si: 1431; RV32I: # %bb.0: 1432; RV32I-NEXT: addi sp, sp, -16 1433; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1434; RV32I-NEXT: slli a0, a0, 16 1435; RV32I-NEXT: srai a0, a0, 16 1436; RV32I-NEXT: call __floatsisf@plt 1437; RV32I-NEXT: call __truncsfhf2@plt 1438; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1439; RV32I-NEXT: addi sp, sp, 16 1440; RV32I-NEXT: ret 1441; 1442; RV64I-LABEL: fcvt_h_si: 1443; RV64I: # %bb.0: 1444; RV64I-NEXT: addi sp, sp, -16 1445; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1446; RV64I-NEXT: slli a0, a0, 48 1447; RV64I-NEXT: srai a0, a0, 48 1448; RV64I-NEXT: call __floatsisf@plt 1449; RV64I-NEXT: call __truncsfhf2@plt 1450; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1451; RV64I-NEXT: addi sp, sp, 16 1452; RV64I-NEXT: ret 1453 %1 = sitofp i16 %a to half 1454 ret half %1 1455} 1456 1457define half @fcvt_h_si_signext(i16 signext %a) nounwind { 1458; CHECKIZFH-LABEL: fcvt_h_si_signext: 1459; CHECKIZFH: # %bb.0: 1460; CHECKIZFH-NEXT: fcvt.h.w fa0, a0 1461; CHECKIZFH-NEXT: ret 1462; 1463; RV32IDZFH-LABEL: fcvt_h_si_signext: 1464; RV32IDZFH: # %bb.0: 1465; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1466; RV32IDZFH-NEXT: ret 1467; 1468; RV64IDZFH-LABEL: fcvt_h_si_signext: 1469; RV64IDZFH: # %bb.0: 1470; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1471; RV64IDZFH-NEXT: ret 1472; 1473; RV32I-LABEL: fcvt_h_si_signext: 1474; RV32I: # %bb.0: 1475; RV32I-NEXT: addi sp, sp, -16 1476; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1477; RV32I-NEXT: call __floatsisf@plt 1478; RV32I-NEXT: call __truncsfhf2@plt 1479; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1480; RV32I-NEXT: addi sp, sp, 16 1481; RV32I-NEXT: ret 1482; 1483; RV64I-LABEL: fcvt_h_si_signext: 1484; RV64I: # %bb.0: 1485; RV64I-NEXT: addi sp, sp, -16 1486; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1487; RV64I-NEXT: call __floatsisf@plt 1488; RV64I-NEXT: call __truncsfhf2@plt 1489; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1490; RV64I-NEXT: addi sp, sp, 16 1491; RV64I-NEXT: ret 1492 %1 = sitofp i16 %a to half 1493 ret half %1 1494} 1495 1496define half @fcvt_h_ui(i16 %a) nounwind { 1497; RV32IZFH-LABEL: fcvt_h_ui: 1498; RV32IZFH: # %bb.0: 1499; RV32IZFH-NEXT: slli a0, a0, 16 1500; RV32IZFH-NEXT: srli a0, a0, 16 1501; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1502; RV32IZFH-NEXT: ret 1503; 1504; RV64IZFH-LABEL: fcvt_h_ui: 1505; RV64IZFH: # %bb.0: 1506; RV64IZFH-NEXT: slli a0, a0, 48 1507; RV64IZFH-NEXT: srli a0, a0, 48 1508; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1509; RV64IZFH-NEXT: ret 1510; 1511; RV32IDZFH-LABEL: fcvt_h_ui: 1512; RV32IDZFH: # %bb.0: 1513; RV32IDZFH-NEXT: slli a0, a0, 16 1514; RV32IDZFH-NEXT: srli a0, a0, 16 1515; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1516; RV32IDZFH-NEXT: ret 1517; 1518; RV64IDZFH-LABEL: fcvt_h_ui: 1519; RV64IDZFH: # %bb.0: 1520; RV64IDZFH-NEXT: slli a0, a0, 48 1521; RV64IDZFH-NEXT: srli a0, a0, 48 1522; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1523; RV64IDZFH-NEXT: ret 1524; 1525; RV32I-LABEL: fcvt_h_ui: 1526; RV32I: # %bb.0: 1527; RV32I-NEXT: addi sp, sp, -16 1528; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1529; RV32I-NEXT: slli a0, a0, 16 1530; RV32I-NEXT: srli a0, a0, 16 1531; RV32I-NEXT: call __floatunsisf@plt 1532; RV32I-NEXT: call __truncsfhf2@plt 1533; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1534; RV32I-NEXT: addi sp, sp, 16 1535; RV32I-NEXT: ret 1536; 1537; RV64I-LABEL: fcvt_h_ui: 1538; RV64I: # %bb.0: 1539; RV64I-NEXT: addi sp, sp, -16 1540; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1541; RV64I-NEXT: slli a0, a0, 48 1542; RV64I-NEXT: srli a0, a0, 48 1543; RV64I-NEXT: call __floatunsisf@plt 1544; RV64I-NEXT: call __truncsfhf2@plt 1545; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1546; RV64I-NEXT: addi sp, sp, 16 1547; RV64I-NEXT: ret 1548 %1 = uitofp i16 %a to half 1549 ret half %1 1550} 1551 1552define half @fcvt_h_ui_zeroext(i16 zeroext %a) nounwind { 1553; CHECKIZFH-LABEL: fcvt_h_ui_zeroext: 1554; CHECKIZFH: # %bb.0: 1555; CHECKIZFH-NEXT: fcvt.h.wu fa0, a0 1556; CHECKIZFH-NEXT: ret 1557; 1558; RV32IDZFH-LABEL: fcvt_h_ui_zeroext: 1559; RV32IDZFH: # %bb.0: 1560; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1561; RV32IDZFH-NEXT: ret 1562; 1563; RV64IDZFH-LABEL: fcvt_h_ui_zeroext: 1564; RV64IDZFH: # %bb.0: 1565; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1566; RV64IDZFH-NEXT: ret 1567; 1568; RV32I-LABEL: fcvt_h_ui_zeroext: 1569; RV32I: # %bb.0: 1570; RV32I-NEXT: addi sp, sp, -16 1571; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1572; RV32I-NEXT: call __floatunsisf@plt 1573; RV32I-NEXT: call __truncsfhf2@plt 1574; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1575; RV32I-NEXT: addi sp, sp, 16 1576; RV32I-NEXT: ret 1577; 1578; RV64I-LABEL: fcvt_h_ui_zeroext: 1579; RV64I: # %bb.0: 1580; RV64I-NEXT: addi sp, sp, -16 1581; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1582; RV64I-NEXT: call __floatunsisf@plt 1583; RV64I-NEXT: call __truncsfhf2@plt 1584; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1585; RV64I-NEXT: addi sp, sp, 16 1586; RV64I-NEXT: ret 1587 %1 = uitofp i16 %a to half 1588 ret half %1 1589} 1590 1591define half @fcvt_h_w(i32 %a) nounwind { 1592; CHECKIZFH-LABEL: fcvt_h_w: 1593; CHECKIZFH: # %bb.0: 1594; CHECKIZFH-NEXT: fcvt.h.w fa0, a0 1595; CHECKIZFH-NEXT: ret 1596; 1597; RV32IDZFH-LABEL: fcvt_h_w: 1598; RV32IDZFH: # %bb.0: 1599; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1600; RV32IDZFH-NEXT: ret 1601; 1602; RV64IDZFH-LABEL: fcvt_h_w: 1603; RV64IDZFH: # %bb.0: 1604; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1605; RV64IDZFH-NEXT: ret 1606; 1607; RV32I-LABEL: fcvt_h_w: 1608; RV32I: # %bb.0: 1609; RV32I-NEXT: addi sp, sp, -16 1610; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1611; RV32I-NEXT: call __floatsisf@plt 1612; RV32I-NEXT: call __truncsfhf2@plt 1613; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1614; RV32I-NEXT: addi sp, sp, 16 1615; RV32I-NEXT: ret 1616; 1617; RV64I-LABEL: fcvt_h_w: 1618; RV64I: # %bb.0: 1619; RV64I-NEXT: addi sp, sp, -16 1620; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1621; RV64I-NEXT: sext.w a0, a0 1622; RV64I-NEXT: call __floatsisf@plt 1623; RV64I-NEXT: call __truncsfhf2@plt 1624; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1625; RV64I-NEXT: addi sp, sp, 16 1626; RV64I-NEXT: ret 1627 %1 = sitofp i32 %a to half 1628 ret half %1 1629} 1630 1631define half @fcvt_h_w_load(i32* %p) nounwind { 1632; CHECKIZFH-LABEL: fcvt_h_w_load: 1633; CHECKIZFH: # %bb.0: 1634; CHECKIZFH-NEXT: lw a0, 0(a0) 1635; CHECKIZFH-NEXT: fcvt.h.w fa0, a0 1636; CHECKIZFH-NEXT: ret 1637; 1638; RV32IDZFH-LABEL: fcvt_h_w_load: 1639; RV32IDZFH: # %bb.0: 1640; RV32IDZFH-NEXT: lw a0, 0(a0) 1641; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1642; RV32IDZFH-NEXT: ret 1643; 1644; RV64IDZFH-LABEL: fcvt_h_w_load: 1645; RV64IDZFH: # %bb.0: 1646; RV64IDZFH-NEXT: lw a0, 0(a0) 1647; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1648; RV64IDZFH-NEXT: ret 1649; 1650; RV32I-LABEL: fcvt_h_w_load: 1651; RV32I: # %bb.0: 1652; RV32I-NEXT: addi sp, sp, -16 1653; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1654; RV32I-NEXT: lw a0, 0(a0) 1655; RV32I-NEXT: call __floatsisf@plt 1656; RV32I-NEXT: call __truncsfhf2@plt 1657; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1658; RV32I-NEXT: addi sp, sp, 16 1659; RV32I-NEXT: ret 1660; 1661; RV64I-LABEL: fcvt_h_w_load: 1662; RV64I: # %bb.0: 1663; RV64I-NEXT: addi sp, sp, -16 1664; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1665; RV64I-NEXT: lw a0, 0(a0) 1666; RV64I-NEXT: call __floatsisf@plt 1667; RV64I-NEXT: call __truncsfhf2@plt 1668; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1669; RV64I-NEXT: addi sp, sp, 16 1670; RV64I-NEXT: ret 1671 %a = load i32, i32* %p 1672 %1 = sitofp i32 %a to half 1673 ret half %1 1674} 1675 1676define half @fcvt_h_wu(i32 %a) nounwind { 1677; CHECKIZFH-LABEL: fcvt_h_wu: 1678; CHECKIZFH: # %bb.0: 1679; CHECKIZFH-NEXT: fcvt.h.wu fa0, a0 1680; CHECKIZFH-NEXT: ret 1681; 1682; RV32IDZFH-LABEL: fcvt_h_wu: 1683; RV32IDZFH: # %bb.0: 1684; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1685; RV32IDZFH-NEXT: ret 1686; 1687; RV64IDZFH-LABEL: fcvt_h_wu: 1688; RV64IDZFH: # %bb.0: 1689; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1690; RV64IDZFH-NEXT: ret 1691; 1692; RV32I-LABEL: fcvt_h_wu: 1693; RV32I: # %bb.0: 1694; RV32I-NEXT: addi sp, sp, -16 1695; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1696; RV32I-NEXT: call __floatunsisf@plt 1697; RV32I-NEXT: call __truncsfhf2@plt 1698; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1699; RV32I-NEXT: addi sp, sp, 16 1700; RV32I-NEXT: ret 1701; 1702; RV64I-LABEL: fcvt_h_wu: 1703; RV64I: # %bb.0: 1704; RV64I-NEXT: addi sp, sp, -16 1705; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1706; RV64I-NEXT: sext.w a0, a0 1707; RV64I-NEXT: call __floatunsisf@plt 1708; RV64I-NEXT: call __truncsfhf2@plt 1709; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1710; RV64I-NEXT: addi sp, sp, 16 1711; RV64I-NEXT: ret 1712 %1 = uitofp i32 %a to half 1713 ret half %1 1714} 1715 1716define half @fcvt_h_wu_load(i32* %p) nounwind { 1717; RV32IZFH-LABEL: fcvt_h_wu_load: 1718; RV32IZFH: # %bb.0: 1719; RV32IZFH-NEXT: lw a0, 0(a0) 1720; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1721; RV32IZFH-NEXT: ret 1722; 1723; RV64IZFH-LABEL: fcvt_h_wu_load: 1724; RV64IZFH: # %bb.0: 1725; RV64IZFH-NEXT: lwu a0, 0(a0) 1726; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1727; RV64IZFH-NEXT: ret 1728; 1729; RV32IDZFH-LABEL: fcvt_h_wu_load: 1730; RV32IDZFH: # %bb.0: 1731; RV32IDZFH-NEXT: lw a0, 0(a0) 1732; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1733; RV32IDZFH-NEXT: ret 1734; 1735; RV64IDZFH-LABEL: fcvt_h_wu_load: 1736; RV64IDZFH: # %bb.0: 1737; RV64IDZFH-NEXT: lwu a0, 0(a0) 1738; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1739; RV64IDZFH-NEXT: ret 1740; 1741; RV32I-LABEL: fcvt_h_wu_load: 1742; RV32I: # %bb.0: 1743; RV32I-NEXT: addi sp, sp, -16 1744; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1745; RV32I-NEXT: lw a0, 0(a0) 1746; RV32I-NEXT: call __floatunsisf@plt 1747; RV32I-NEXT: call __truncsfhf2@plt 1748; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1749; RV32I-NEXT: addi sp, sp, 16 1750; RV32I-NEXT: ret 1751; 1752; RV64I-LABEL: fcvt_h_wu_load: 1753; RV64I: # %bb.0: 1754; RV64I-NEXT: addi sp, sp, -16 1755; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1756; RV64I-NEXT: lw a0, 0(a0) 1757; RV64I-NEXT: call __floatunsisf@plt 1758; RV64I-NEXT: call __truncsfhf2@plt 1759; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1760; RV64I-NEXT: addi sp, sp, 16 1761; RV64I-NEXT: ret 1762 %a = load i32, i32* %p 1763 %1 = uitofp i32 %a to half 1764 ret half %1 1765} 1766 1767define half @fcvt_h_l(i64 %a) nounwind { 1768; RV32IZFH-LABEL: fcvt_h_l: 1769; RV32IZFH: # %bb.0: 1770; RV32IZFH-NEXT: addi sp, sp, -16 1771; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1772; RV32IZFH-NEXT: call __floatdihf@plt 1773; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1774; RV32IZFH-NEXT: addi sp, sp, 16 1775; RV32IZFH-NEXT: ret 1776; 1777; RV64IZFH-LABEL: fcvt_h_l: 1778; RV64IZFH: # %bb.0: 1779; RV64IZFH-NEXT: fcvt.h.l fa0, a0 1780; RV64IZFH-NEXT: ret 1781; 1782; RV32IDZFH-LABEL: fcvt_h_l: 1783; RV32IDZFH: # %bb.0: 1784; RV32IDZFH-NEXT: addi sp, sp, -16 1785; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1786; RV32IDZFH-NEXT: call __floatdihf@plt 1787; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1788; RV32IDZFH-NEXT: addi sp, sp, 16 1789; RV32IDZFH-NEXT: ret 1790; 1791; RV64IDZFH-LABEL: fcvt_h_l: 1792; RV64IDZFH: # %bb.0: 1793; RV64IDZFH-NEXT: fcvt.h.l fa0, a0 1794; RV64IDZFH-NEXT: ret 1795; 1796; RV32I-LABEL: fcvt_h_l: 1797; RV32I: # %bb.0: 1798; RV32I-NEXT: addi sp, sp, -16 1799; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1800; RV32I-NEXT: call __floatdisf@plt 1801; RV32I-NEXT: call __truncsfhf2@plt 1802; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1803; RV32I-NEXT: addi sp, sp, 16 1804; RV32I-NEXT: ret 1805; 1806; RV64I-LABEL: fcvt_h_l: 1807; RV64I: # %bb.0: 1808; RV64I-NEXT: addi sp, sp, -16 1809; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1810; RV64I-NEXT: call __floatdisf@plt 1811; RV64I-NEXT: call __truncsfhf2@plt 1812; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1813; RV64I-NEXT: addi sp, sp, 16 1814; RV64I-NEXT: ret 1815 %1 = sitofp i64 %a to half 1816 ret half %1 1817} 1818 1819define half @fcvt_h_lu(i64 %a) nounwind { 1820; RV32IZFH-LABEL: fcvt_h_lu: 1821; RV32IZFH: # %bb.0: 1822; RV32IZFH-NEXT: addi sp, sp, -16 1823; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1824; RV32IZFH-NEXT: call __floatundihf@plt 1825; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1826; RV32IZFH-NEXT: addi sp, sp, 16 1827; RV32IZFH-NEXT: ret 1828; 1829; RV64IZFH-LABEL: fcvt_h_lu: 1830; RV64IZFH: # %bb.0: 1831; RV64IZFH-NEXT: fcvt.h.lu fa0, a0 1832; RV64IZFH-NEXT: ret 1833; 1834; RV32IDZFH-LABEL: fcvt_h_lu: 1835; RV32IDZFH: # %bb.0: 1836; RV32IDZFH-NEXT: addi sp, sp, -16 1837; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1838; RV32IDZFH-NEXT: call __floatundihf@plt 1839; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1840; RV32IDZFH-NEXT: addi sp, sp, 16 1841; RV32IDZFH-NEXT: ret 1842; 1843; RV64IDZFH-LABEL: fcvt_h_lu: 1844; RV64IDZFH: # %bb.0: 1845; RV64IDZFH-NEXT: fcvt.h.lu fa0, a0 1846; RV64IDZFH-NEXT: ret 1847; 1848; RV32I-LABEL: fcvt_h_lu: 1849; RV32I: # %bb.0: 1850; RV32I-NEXT: addi sp, sp, -16 1851; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1852; RV32I-NEXT: call __floatundisf@plt 1853; RV32I-NEXT: call __truncsfhf2@plt 1854; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1855; RV32I-NEXT: addi sp, sp, 16 1856; RV32I-NEXT: ret 1857; 1858; RV64I-LABEL: fcvt_h_lu: 1859; RV64I: # %bb.0: 1860; RV64I-NEXT: addi sp, sp, -16 1861; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1862; RV64I-NEXT: call __floatundisf@plt 1863; RV64I-NEXT: call __truncsfhf2@plt 1864; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1865; RV64I-NEXT: addi sp, sp, 16 1866; RV64I-NEXT: ret 1867 %1 = uitofp i64 %a to half 1868 ret half %1 1869} 1870 1871define half @fcvt_h_s(float %a) nounwind { 1872; CHECKIZFH-LABEL: fcvt_h_s: 1873; CHECKIZFH: # %bb.0: 1874; CHECKIZFH-NEXT: fcvt.h.s fa0, fa0 1875; CHECKIZFH-NEXT: ret 1876; 1877; RV32IDZFH-LABEL: fcvt_h_s: 1878; RV32IDZFH: # %bb.0: 1879; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0 1880; RV32IDZFH-NEXT: ret 1881; 1882; RV64IDZFH-LABEL: fcvt_h_s: 1883; RV64IDZFH: # %bb.0: 1884; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0 1885; RV64IDZFH-NEXT: ret 1886; 1887; RV32I-LABEL: fcvt_h_s: 1888; RV32I: # %bb.0: 1889; RV32I-NEXT: addi sp, sp, -16 1890; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1891; RV32I-NEXT: call __truncsfhf2@plt 1892; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1893; RV32I-NEXT: addi sp, sp, 16 1894; RV32I-NEXT: ret 1895; 1896; RV64I-LABEL: fcvt_h_s: 1897; RV64I: # %bb.0: 1898; RV64I-NEXT: addi sp, sp, -16 1899; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1900; RV64I-NEXT: call __truncsfhf2@plt 1901; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1902; RV64I-NEXT: addi sp, sp, 16 1903; RV64I-NEXT: ret 1904 %1 = fptrunc float %a to half 1905 ret half %1 1906} 1907 1908define float @fcvt_s_h(half %a) nounwind { 1909; CHECKIZFH-LABEL: fcvt_s_h: 1910; CHECKIZFH: # %bb.0: 1911; CHECKIZFH-NEXT: fcvt.s.h fa0, fa0 1912; CHECKIZFH-NEXT: ret 1913; 1914; RV32IDZFH-LABEL: fcvt_s_h: 1915; RV32IDZFH: # %bb.0: 1916; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0 1917; RV32IDZFH-NEXT: ret 1918; 1919; RV64IDZFH-LABEL: fcvt_s_h: 1920; RV64IDZFH: # %bb.0: 1921; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0 1922; RV64IDZFH-NEXT: ret 1923; 1924; RV32I-LABEL: fcvt_s_h: 1925; RV32I: # %bb.0: 1926; RV32I-NEXT: addi sp, sp, -16 1927; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1928; RV32I-NEXT: slli a0, a0, 16 1929; RV32I-NEXT: srli a0, a0, 16 1930; RV32I-NEXT: call __extendhfsf2@plt 1931; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1932; RV32I-NEXT: addi sp, sp, 16 1933; RV32I-NEXT: ret 1934; 1935; RV64I-LABEL: fcvt_s_h: 1936; RV64I: # %bb.0: 1937; RV64I-NEXT: addi sp, sp, -16 1938; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1939; RV64I-NEXT: slli a0, a0, 48 1940; RV64I-NEXT: srli a0, a0, 48 1941; RV64I-NEXT: call __extendhfsf2@plt 1942; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1943; RV64I-NEXT: addi sp, sp, 16 1944; RV64I-NEXT: ret 1945 %1 = fpext half %a to float 1946 ret float %1 1947} 1948 1949define half @fcvt_h_d(double %a) nounwind { 1950; RV32IZFH-LABEL: fcvt_h_d: 1951; RV32IZFH: # %bb.0: 1952; RV32IZFH-NEXT: addi sp, sp, -16 1953; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1954; RV32IZFH-NEXT: call __truncdfhf2@plt 1955; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1956; RV32IZFH-NEXT: addi sp, sp, 16 1957; RV32IZFH-NEXT: ret 1958; 1959; RV64IZFH-LABEL: fcvt_h_d: 1960; RV64IZFH: # %bb.0: 1961; RV64IZFH-NEXT: addi sp, sp, -16 1962; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1963; RV64IZFH-NEXT: call __truncdfhf2@plt 1964; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1965; RV64IZFH-NEXT: addi sp, sp, 16 1966; RV64IZFH-NEXT: ret 1967; 1968; RV32IDZFH-LABEL: fcvt_h_d: 1969; RV32IDZFH: # %bb.0: 1970; RV32IDZFH-NEXT: fcvt.h.d fa0, fa0 1971; RV32IDZFH-NEXT: ret 1972; 1973; RV64IDZFH-LABEL: fcvt_h_d: 1974; RV64IDZFH: # %bb.0: 1975; RV64IDZFH-NEXT: fcvt.h.d fa0, fa0 1976; RV64IDZFH-NEXT: ret 1977; 1978; RV32I-LABEL: fcvt_h_d: 1979; RV32I: # %bb.0: 1980; RV32I-NEXT: addi sp, sp, -16 1981; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1982; RV32I-NEXT: call __truncdfhf2@plt 1983; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1984; RV32I-NEXT: addi sp, sp, 16 1985; RV32I-NEXT: ret 1986; 1987; RV64I-LABEL: fcvt_h_d: 1988; RV64I: # %bb.0: 1989; RV64I-NEXT: addi sp, sp, -16 1990; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1991; RV64I-NEXT: call __truncdfhf2@plt 1992; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1993; RV64I-NEXT: addi sp, sp, 16 1994; RV64I-NEXT: ret 1995 %1 = fptrunc double %a to half 1996 ret half %1 1997} 1998 1999define double @fcvt_d_h(half %a) nounwind { 2000; RV32IZFH-LABEL: fcvt_d_h: 2001; RV32IZFH: # %bb.0: 2002; RV32IZFH-NEXT: addi sp, sp, -16 2003; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2004; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2005; RV32IZFH-NEXT: call __extendsfdf2@plt 2006; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2007; RV32IZFH-NEXT: addi sp, sp, 16 2008; RV32IZFH-NEXT: ret 2009; 2010; RV64IZFH-LABEL: fcvt_d_h: 2011; RV64IZFH: # %bb.0: 2012; RV64IZFH-NEXT: addi sp, sp, -16 2013; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2014; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2015; RV64IZFH-NEXT: call __extendsfdf2@plt 2016; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2017; RV64IZFH-NEXT: addi sp, sp, 16 2018; RV64IZFH-NEXT: ret 2019; 2020; RV32IDZFH-LABEL: fcvt_d_h: 2021; RV32IDZFH: # %bb.0: 2022; RV32IDZFH-NEXT: fcvt.d.h fa0, fa0 2023; RV32IDZFH-NEXT: ret 2024; 2025; RV64IDZFH-LABEL: fcvt_d_h: 2026; RV64IDZFH: # %bb.0: 2027; RV64IDZFH-NEXT: fcvt.d.h fa0, fa0 2028; RV64IDZFH-NEXT: ret 2029; 2030; RV32I-LABEL: fcvt_d_h: 2031; RV32I: # %bb.0: 2032; RV32I-NEXT: addi sp, sp, -16 2033; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2034; RV32I-NEXT: slli a0, a0, 16 2035; RV32I-NEXT: srli a0, a0, 16 2036; RV32I-NEXT: call __extendhfsf2@plt 2037; RV32I-NEXT: call __extendsfdf2@plt 2038; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2039; RV32I-NEXT: addi sp, sp, 16 2040; RV32I-NEXT: ret 2041; 2042; RV64I-LABEL: fcvt_d_h: 2043; RV64I: # %bb.0: 2044; RV64I-NEXT: addi sp, sp, -16 2045; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2046; RV64I-NEXT: slli a0, a0, 48 2047; RV64I-NEXT: srli a0, a0, 48 2048; RV64I-NEXT: call __extendhfsf2@plt 2049; RV64I-NEXT: slli a0, a0, 32 2050; RV64I-NEXT: srli a0, a0, 32 2051; RV64I-NEXT: call __extendsfdf2@plt 2052; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2053; RV64I-NEXT: addi sp, sp, 16 2054; RV64I-NEXT: ret 2055 %1 = fpext half %a to double 2056 ret double %1 2057} 2058 2059define half @bitcast_h_i16(i16 %a) nounwind { 2060; CHECKIZFH-LABEL: bitcast_h_i16: 2061; CHECKIZFH: # %bb.0: 2062; CHECKIZFH-NEXT: fmv.h.x fa0, a0 2063; CHECKIZFH-NEXT: ret 2064; 2065; RV32IDZFH-LABEL: bitcast_h_i16: 2066; RV32IDZFH: # %bb.0: 2067; RV32IDZFH-NEXT: fmv.h.x fa0, a0 2068; RV32IDZFH-NEXT: ret 2069; 2070; RV64IDZFH-LABEL: bitcast_h_i16: 2071; RV64IDZFH: # %bb.0: 2072; RV64IDZFH-NEXT: fmv.h.x fa0, a0 2073; RV64IDZFH-NEXT: ret 2074; 2075; RV32I-LABEL: bitcast_h_i16: 2076; RV32I: # %bb.0: 2077; RV32I-NEXT: ret 2078; 2079; RV64I-LABEL: bitcast_h_i16: 2080; RV64I: # %bb.0: 2081; RV64I-NEXT: ret 2082 %1 = bitcast i16 %a to half 2083 ret half %1 2084} 2085 2086define i16 @bitcast_i16_h(half %a) nounwind { 2087; CHECKIZFH-LABEL: bitcast_i16_h: 2088; CHECKIZFH: # %bb.0: 2089; CHECKIZFH-NEXT: fmv.x.h a0, fa0 2090; CHECKIZFH-NEXT: ret 2091; 2092; RV32IDZFH-LABEL: bitcast_i16_h: 2093; RV32IDZFH: # %bb.0: 2094; RV32IDZFH-NEXT: fmv.x.h a0, fa0 2095; RV32IDZFH-NEXT: ret 2096; 2097; RV64IDZFH-LABEL: bitcast_i16_h: 2098; RV64IDZFH: # %bb.0: 2099; RV64IDZFH-NEXT: fmv.x.h a0, fa0 2100; RV64IDZFH-NEXT: ret 2101; 2102; RV32I-LABEL: bitcast_i16_h: 2103; RV32I: # %bb.0: 2104; RV32I-NEXT: ret 2105; 2106; RV64I-LABEL: bitcast_i16_h: 2107; RV64I: # %bb.0: 2108; RV64I-NEXT: ret 2109 %1 = bitcast half %a to i16 2110 ret i16 %1 2111} 2112 2113; Make sure we select W version of addi on RV64. 2114define signext i32 @fcvt_h_w_demanded_bits(i32 signext %0, half* %1) nounwind { 2115; RV32IZFH-LABEL: fcvt_h_w_demanded_bits: 2116; RV32IZFH: # %bb.0: 2117; RV32IZFH-NEXT: addi a0, a0, 1 2118; RV32IZFH-NEXT: fcvt.h.w ft0, a0 2119; RV32IZFH-NEXT: fsh ft0, 0(a1) 2120; RV32IZFH-NEXT: ret 2121; 2122; RV64IZFH-LABEL: fcvt_h_w_demanded_bits: 2123; RV64IZFH: # %bb.0: 2124; RV64IZFH-NEXT: addiw a0, a0, 1 2125; RV64IZFH-NEXT: fcvt.h.w ft0, a0 2126; RV64IZFH-NEXT: fsh ft0, 0(a1) 2127; RV64IZFH-NEXT: ret 2128; 2129; RV32IDZFH-LABEL: fcvt_h_w_demanded_bits: 2130; RV32IDZFH: # %bb.0: 2131; RV32IDZFH-NEXT: addi a0, a0, 1 2132; RV32IDZFH-NEXT: fcvt.h.w ft0, a0 2133; RV32IDZFH-NEXT: fsh ft0, 0(a1) 2134; RV32IDZFH-NEXT: ret 2135; 2136; RV64IDZFH-LABEL: fcvt_h_w_demanded_bits: 2137; RV64IDZFH: # %bb.0: 2138; RV64IDZFH-NEXT: addiw a0, a0, 1 2139; RV64IDZFH-NEXT: fcvt.h.w ft0, a0 2140; RV64IDZFH-NEXT: fsh ft0, 0(a1) 2141; RV64IDZFH-NEXT: ret 2142; 2143; RV32I-LABEL: fcvt_h_w_demanded_bits: 2144; RV32I: # %bb.0: 2145; RV32I-NEXT: addi sp, sp, -16 2146; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2147; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2148; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2149; RV32I-NEXT: mv s0, a1 2150; RV32I-NEXT: addi s1, a0, 1 2151; RV32I-NEXT: mv a0, s1 2152; RV32I-NEXT: call __floatsisf@plt 2153; RV32I-NEXT: call __truncsfhf2@plt 2154; RV32I-NEXT: sh a0, 0(s0) 2155; RV32I-NEXT: mv a0, s1 2156; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2157; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2158; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2159; RV32I-NEXT: addi sp, sp, 16 2160; RV32I-NEXT: ret 2161; 2162; RV64I-LABEL: fcvt_h_w_demanded_bits: 2163; RV64I: # %bb.0: 2164; RV64I-NEXT: addi sp, sp, -32 2165; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2166; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2167; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2168; RV64I-NEXT: mv s0, a1 2169; RV64I-NEXT: addiw s1, a0, 1 2170; RV64I-NEXT: mv a0, s1 2171; RV64I-NEXT: call __floatsisf@plt 2172; RV64I-NEXT: call __truncsfhf2@plt 2173; RV64I-NEXT: sh a0, 0(s0) 2174; RV64I-NEXT: mv a0, s1 2175; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2176; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2177; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2178; RV64I-NEXT: addi sp, sp, 32 2179; RV64I-NEXT: ret 2180 %3 = add i32 %0, 1 2181 %4 = sitofp i32 %3 to half 2182 store half %4, half* %1, align 2 2183 ret i32 %3 2184} 2185 2186; Make sure we select W version of addi on RV64. 2187define signext i32 @fcvt_h_wu_demanded_bits(i32 signext %0, half* %1) nounwind { 2188; RV32IZFH-LABEL: fcvt_h_wu_demanded_bits: 2189; RV32IZFH: # %bb.0: 2190; RV32IZFH-NEXT: addi a0, a0, 1 2191; RV32IZFH-NEXT: fcvt.h.wu ft0, a0 2192; RV32IZFH-NEXT: fsh ft0, 0(a1) 2193; RV32IZFH-NEXT: ret 2194; 2195; RV64IZFH-LABEL: fcvt_h_wu_demanded_bits: 2196; RV64IZFH: # %bb.0: 2197; RV64IZFH-NEXT: addiw a0, a0, 1 2198; RV64IZFH-NEXT: fcvt.h.wu ft0, a0 2199; RV64IZFH-NEXT: fsh ft0, 0(a1) 2200; RV64IZFH-NEXT: ret 2201; 2202; RV32IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2203; RV32IDZFH: # %bb.0: 2204; RV32IDZFH-NEXT: addi a0, a0, 1 2205; RV32IDZFH-NEXT: fcvt.h.wu ft0, a0 2206; RV32IDZFH-NEXT: fsh ft0, 0(a1) 2207; RV32IDZFH-NEXT: ret 2208; 2209; RV64IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2210; RV64IDZFH: # %bb.0: 2211; RV64IDZFH-NEXT: addiw a0, a0, 1 2212; RV64IDZFH-NEXT: fcvt.h.wu ft0, a0 2213; RV64IDZFH-NEXT: fsh ft0, 0(a1) 2214; RV64IDZFH-NEXT: ret 2215; 2216; RV32I-LABEL: fcvt_h_wu_demanded_bits: 2217; RV32I: # %bb.0: 2218; RV32I-NEXT: addi sp, sp, -16 2219; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2220; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2221; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2222; RV32I-NEXT: mv s0, a1 2223; RV32I-NEXT: addi s1, a0, 1 2224; RV32I-NEXT: mv a0, s1 2225; RV32I-NEXT: call __floatunsisf@plt 2226; RV32I-NEXT: call __truncsfhf2@plt 2227; RV32I-NEXT: sh a0, 0(s0) 2228; RV32I-NEXT: mv a0, s1 2229; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2230; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2231; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2232; RV32I-NEXT: addi sp, sp, 16 2233; RV32I-NEXT: ret 2234; 2235; RV64I-LABEL: fcvt_h_wu_demanded_bits: 2236; RV64I: # %bb.0: 2237; RV64I-NEXT: addi sp, sp, -32 2238; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2239; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2240; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2241; RV64I-NEXT: mv s0, a1 2242; RV64I-NEXT: addiw s1, a0, 1 2243; RV64I-NEXT: mv a0, s1 2244; RV64I-NEXT: call __floatunsisf@plt 2245; RV64I-NEXT: call __truncsfhf2@plt 2246; RV64I-NEXT: sh a0, 0(s0) 2247; RV64I-NEXT: mv a0, s1 2248; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2249; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2250; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2251; RV64I-NEXT: addi sp, sp, 32 2252; RV64I-NEXT: ret 2253 %3 = add i32 %0, 1 2254 %4 = uitofp i32 %3 to half 2255 store half %4, half* %1, align 2 2256 ret i32 %3 2257} 2258 2259define signext i16 @fcvt_w_s_i16(half %a) nounwind { 2260; RV32IZFH-LABEL: fcvt_w_s_i16: 2261; RV32IZFH: # %bb.0: 2262; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 2263; RV32IZFH-NEXT: ret 2264; 2265; RV64IZFH-LABEL: fcvt_w_s_i16: 2266; RV64IZFH: # %bb.0: 2267; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 2268; RV64IZFH-NEXT: ret 2269; 2270; RV32IDZFH-LABEL: fcvt_w_s_i16: 2271; RV32IDZFH: # %bb.0: 2272; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 2273; RV32IDZFH-NEXT: ret 2274; 2275; RV64IDZFH-LABEL: fcvt_w_s_i16: 2276; RV64IDZFH: # %bb.0: 2277; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 2278; RV64IDZFH-NEXT: ret 2279; 2280; RV32I-LABEL: fcvt_w_s_i16: 2281; RV32I: # %bb.0: 2282; RV32I-NEXT: addi sp, sp, -16 2283; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2284; RV32I-NEXT: slli a0, a0, 16 2285; RV32I-NEXT: srli a0, a0, 16 2286; RV32I-NEXT: call __extendhfsf2@plt 2287; RV32I-NEXT: call __fixsfsi@plt 2288; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2289; RV32I-NEXT: addi sp, sp, 16 2290; RV32I-NEXT: ret 2291; 2292; RV64I-LABEL: fcvt_w_s_i16: 2293; RV64I: # %bb.0: 2294; RV64I-NEXT: addi sp, sp, -16 2295; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2296; RV64I-NEXT: slli a0, a0, 48 2297; RV64I-NEXT: srli a0, a0, 48 2298; RV64I-NEXT: call __extendhfsf2@plt 2299; RV64I-NEXT: call __fixsfdi@plt 2300; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2301; RV64I-NEXT: addi sp, sp, 16 2302; RV64I-NEXT: ret 2303 %1 = fptosi half %a to i16 2304 ret i16 %1 2305} 2306 2307define signext i16 @fcvt_w_s_sat_i16(half %a) nounwind { 2308; RV32IZFH-LABEL: fcvt_w_s_sat_i16: 2309; RV32IZFH: # %bb.0: # %start 2310; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 2311; RV32IZFH-NEXT: feq.s a0, ft0, ft0 2312; RV32IZFH-NEXT: beqz a0, .LBB32_2 2313; RV32IZFH-NEXT: # %bb.1: 2314; RV32IZFH-NEXT: lui a0, %hi(.LCPI32_0) 2315; RV32IZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2316; RV32IZFH-NEXT: lui a0, %hi(.LCPI32_1) 2317; RV32IZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2318; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 2319; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 2320; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 2321; RV32IZFH-NEXT: .LBB32_2: # %start 2322; RV32IZFH-NEXT: ret 2323; 2324; RV64IZFH-LABEL: fcvt_w_s_sat_i16: 2325; RV64IZFH: # %bb.0: # %start 2326; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 2327; RV64IZFH-NEXT: feq.s a0, ft0, ft0 2328; RV64IZFH-NEXT: beqz a0, .LBB32_2 2329; RV64IZFH-NEXT: # %bb.1: 2330; RV64IZFH-NEXT: lui a0, %hi(.LCPI32_0) 2331; RV64IZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2332; RV64IZFH-NEXT: lui a0, %hi(.LCPI32_1) 2333; RV64IZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2334; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 2335; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 2336; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 2337; RV64IZFH-NEXT: .LBB32_2: # %start 2338; RV64IZFH-NEXT: ret 2339; 2340; RV32IDZFH-LABEL: fcvt_w_s_sat_i16: 2341; RV32IDZFH: # %bb.0: # %start 2342; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 2343; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 2344; RV32IDZFH-NEXT: beqz a0, .LBB32_2 2345; RV32IDZFH-NEXT: # %bb.1: 2346; RV32IDZFH-NEXT: lui a0, %hi(.LCPI32_0) 2347; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2348; RV32IDZFH-NEXT: lui a0, %hi(.LCPI32_1) 2349; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2350; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 2351; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 2352; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 2353; RV32IDZFH-NEXT: .LBB32_2: # %start 2354; RV32IDZFH-NEXT: ret 2355; 2356; RV64IDZFH-LABEL: fcvt_w_s_sat_i16: 2357; RV64IDZFH: # %bb.0: # %start 2358; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 2359; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 2360; RV64IDZFH-NEXT: beqz a0, .LBB32_2 2361; RV64IDZFH-NEXT: # %bb.1: 2362; RV64IDZFH-NEXT: lui a0, %hi(.LCPI32_0) 2363; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI32_0)(a0) 2364; RV64IDZFH-NEXT: lui a0, %hi(.LCPI32_1) 2365; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI32_1)(a0) 2366; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 2367; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 2368; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 2369; RV64IDZFH-NEXT: .LBB32_2: # %start 2370; RV64IDZFH-NEXT: ret 2371; 2372; RV32I-LABEL: fcvt_w_s_sat_i16: 2373; RV32I: # %bb.0: # %start 2374; RV32I-NEXT: addi sp, sp, -32 2375; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2376; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2377; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 2378; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 2379; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 2380; RV32I-NEXT: slli a0, a0, 16 2381; RV32I-NEXT: srli a0, a0, 16 2382; RV32I-NEXT: call __extendhfsf2@plt 2383; RV32I-NEXT: mv s0, a0 2384; RV32I-NEXT: lui a1, 815104 2385; RV32I-NEXT: call __gesf2@plt 2386; RV32I-NEXT: mv s1, a0 2387; RV32I-NEXT: mv a0, s0 2388; RV32I-NEXT: call __fixsfsi@plt 2389; RV32I-NEXT: li s2, 0 2390; RV32I-NEXT: lui s3, 1048568 2391; RV32I-NEXT: bltz s1, .LBB32_2 2392; RV32I-NEXT: # %bb.1: # %start 2393; RV32I-NEXT: mv s3, a0 2394; RV32I-NEXT: .LBB32_2: # %start 2395; RV32I-NEXT: lui a0, 290816 2396; RV32I-NEXT: addi a1, a0, -512 2397; RV32I-NEXT: mv a0, s0 2398; RV32I-NEXT: call __gtsf2@plt 2399; RV32I-NEXT: bge s2, a0, .LBB32_4 2400; RV32I-NEXT: # %bb.3: 2401; RV32I-NEXT: lui a0, 8 2402; RV32I-NEXT: addi s3, a0, -1 2403; RV32I-NEXT: .LBB32_4: # %start 2404; RV32I-NEXT: mv a0, s0 2405; RV32I-NEXT: mv a1, s0 2406; RV32I-NEXT: call __unordsf2@plt 2407; RV32I-NEXT: bne a0, s2, .LBB32_6 2408; RV32I-NEXT: # %bb.5: # %start 2409; RV32I-NEXT: mv s2, s3 2410; RV32I-NEXT: .LBB32_6: # %start 2411; RV32I-NEXT: slli a0, s2, 16 2412; RV32I-NEXT: srai a0, a0, 16 2413; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2414; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2415; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 2416; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 2417; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 2418; RV32I-NEXT: addi sp, sp, 32 2419; RV32I-NEXT: ret 2420; 2421; RV64I-LABEL: fcvt_w_s_sat_i16: 2422; RV64I: # %bb.0: # %start 2423; RV64I-NEXT: addi sp, sp, -48 2424; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 2425; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 2426; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 2427; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 2428; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 2429; RV64I-NEXT: slli a0, a0, 48 2430; RV64I-NEXT: srli a0, a0, 48 2431; RV64I-NEXT: call __extendhfsf2@plt 2432; RV64I-NEXT: mv s0, a0 2433; RV64I-NEXT: lui a1, 815104 2434; RV64I-NEXT: call __gesf2@plt 2435; RV64I-NEXT: mv s1, a0 2436; RV64I-NEXT: mv a0, s0 2437; RV64I-NEXT: call __fixsfdi@plt 2438; RV64I-NEXT: li s2, 0 2439; RV64I-NEXT: lui s3, 1048568 2440; RV64I-NEXT: bltz s1, .LBB32_2 2441; RV64I-NEXT: # %bb.1: # %start 2442; RV64I-NEXT: mv s3, a0 2443; RV64I-NEXT: .LBB32_2: # %start 2444; RV64I-NEXT: lui a0, 290816 2445; RV64I-NEXT: addiw a1, a0, -512 2446; RV64I-NEXT: mv a0, s0 2447; RV64I-NEXT: call __gtsf2@plt 2448; RV64I-NEXT: bge s2, a0, .LBB32_4 2449; RV64I-NEXT: # %bb.3: 2450; RV64I-NEXT: lui a0, 8 2451; RV64I-NEXT: addiw s3, a0, -1 2452; RV64I-NEXT: .LBB32_4: # %start 2453; RV64I-NEXT: mv a0, s0 2454; RV64I-NEXT: mv a1, s0 2455; RV64I-NEXT: call __unordsf2@plt 2456; RV64I-NEXT: bne a0, s2, .LBB32_6 2457; RV64I-NEXT: # %bb.5: # %start 2458; RV64I-NEXT: mv s2, s3 2459; RV64I-NEXT: .LBB32_6: # %start 2460; RV64I-NEXT: slli a0, s2, 48 2461; RV64I-NEXT: srai a0, a0, 48 2462; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 2463; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 2464; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 2465; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 2466; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 2467; RV64I-NEXT: addi sp, sp, 48 2468; RV64I-NEXT: ret 2469start: 2470 %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) 2471 ret i16 %0 2472} 2473 2474define zeroext i16 @fcvt_wu_s_i16(half %a) nounwind { 2475; RV32IZFH-LABEL: fcvt_wu_s_i16: 2476; RV32IZFH: # %bb.0: 2477; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2478; RV32IZFH-NEXT: ret 2479; 2480; RV64IZFH-LABEL: fcvt_wu_s_i16: 2481; RV64IZFH: # %bb.0: 2482; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2483; RV64IZFH-NEXT: ret 2484; 2485; RV32IDZFH-LABEL: fcvt_wu_s_i16: 2486; RV32IDZFH: # %bb.0: 2487; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2488; RV32IDZFH-NEXT: ret 2489; 2490; RV64IDZFH-LABEL: fcvt_wu_s_i16: 2491; RV64IDZFH: # %bb.0: 2492; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2493; RV64IDZFH-NEXT: ret 2494; 2495; RV32I-LABEL: fcvt_wu_s_i16: 2496; RV32I: # %bb.0: 2497; RV32I-NEXT: addi sp, sp, -16 2498; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2499; RV32I-NEXT: slli a0, a0, 16 2500; RV32I-NEXT: srli a0, a0, 16 2501; RV32I-NEXT: call __extendhfsf2@plt 2502; RV32I-NEXT: call __fixunssfsi@plt 2503; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2504; RV32I-NEXT: addi sp, sp, 16 2505; RV32I-NEXT: ret 2506; 2507; RV64I-LABEL: fcvt_wu_s_i16: 2508; RV64I: # %bb.0: 2509; RV64I-NEXT: addi sp, sp, -16 2510; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2511; RV64I-NEXT: slli a0, a0, 48 2512; RV64I-NEXT: srli a0, a0, 48 2513; RV64I-NEXT: call __extendhfsf2@plt 2514; RV64I-NEXT: call __fixunssfdi@plt 2515; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2516; RV64I-NEXT: addi sp, sp, 16 2517; RV64I-NEXT: ret 2518 %1 = fptoui half %a to i16 2519 ret i16 %1 2520} 2521 2522define zeroext i16 @fcvt_wu_s_sat_i16(half %a) nounwind { 2523; RV32IZFH-LABEL: fcvt_wu_s_sat_i16: 2524; RV32IZFH: # %bb.0: # %start 2525; RV32IZFH-NEXT: lui a0, %hi(.LCPI34_0) 2526; RV32IZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2527; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 2528; RV32IZFH-NEXT: fmv.w.x ft2, zero 2529; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 2530; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 2531; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 2532; RV32IZFH-NEXT: ret 2533; 2534; RV64IZFH-LABEL: fcvt_wu_s_sat_i16: 2535; RV64IZFH: # %bb.0: # %start 2536; RV64IZFH-NEXT: lui a0, %hi(.LCPI34_0) 2537; RV64IZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2538; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 2539; RV64IZFH-NEXT: fmv.w.x ft2, zero 2540; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 2541; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 2542; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 2543; RV64IZFH-NEXT: ret 2544; 2545; RV32IDZFH-LABEL: fcvt_wu_s_sat_i16: 2546; RV32IDZFH: # %bb.0: # %start 2547; RV32IDZFH-NEXT: lui a0, %hi(.LCPI34_0) 2548; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2549; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 2550; RV32IDZFH-NEXT: fmv.w.x ft2, zero 2551; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 2552; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 2553; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 2554; RV32IDZFH-NEXT: ret 2555; 2556; RV64IDZFH-LABEL: fcvt_wu_s_sat_i16: 2557; RV64IDZFH: # %bb.0: # %start 2558; RV64IDZFH-NEXT: lui a0, %hi(.LCPI34_0) 2559; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI34_0)(a0) 2560; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 2561; RV64IDZFH-NEXT: fmv.w.x ft2, zero 2562; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 2563; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 2564; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 2565; RV64IDZFH-NEXT: ret 2566; 2567; RV32I-LABEL: fcvt_wu_s_sat_i16: 2568; RV32I: # %bb.0: # %start 2569; RV32I-NEXT: addi sp, sp, -32 2570; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2571; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2572; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 2573; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 2574; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 2575; RV32I-NEXT: lui a1, 16 2576; RV32I-NEXT: addi s2, a1, -1 2577; RV32I-NEXT: and a0, a0, s2 2578; RV32I-NEXT: call __extendhfsf2@plt 2579; RV32I-NEXT: mv s0, a0 2580; RV32I-NEXT: li a1, 0 2581; RV32I-NEXT: call __gesf2@plt 2582; RV32I-NEXT: mv s1, a0 2583; RV32I-NEXT: mv a0, s0 2584; RV32I-NEXT: call __fixunssfsi@plt 2585; RV32I-NEXT: li s3, 0 2586; RV32I-NEXT: bltz s1, .LBB34_2 2587; RV32I-NEXT: # %bb.1: # %start 2588; RV32I-NEXT: mv s3, a0 2589; RV32I-NEXT: .LBB34_2: # %start 2590; RV32I-NEXT: lui a0, 292864 2591; RV32I-NEXT: addi a1, a0, -256 2592; RV32I-NEXT: mv a0, s0 2593; RV32I-NEXT: call __gtsf2@plt 2594; RV32I-NEXT: mv a1, s2 2595; RV32I-NEXT: bgtz a0, .LBB34_4 2596; RV32I-NEXT: # %bb.3: # %start 2597; RV32I-NEXT: mv a1, s3 2598; RV32I-NEXT: .LBB34_4: # %start 2599; RV32I-NEXT: and a0, a1, s2 2600; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2601; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2602; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 2603; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 2604; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 2605; RV32I-NEXT: addi sp, sp, 32 2606; RV32I-NEXT: ret 2607; 2608; RV64I-LABEL: fcvt_wu_s_sat_i16: 2609; RV64I: # %bb.0: # %start 2610; RV64I-NEXT: addi sp, sp, -48 2611; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 2612; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 2613; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 2614; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 2615; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 2616; RV64I-NEXT: lui a1, 16 2617; RV64I-NEXT: addiw s2, a1, -1 2618; RV64I-NEXT: and a0, a0, s2 2619; RV64I-NEXT: call __extendhfsf2@plt 2620; RV64I-NEXT: mv s0, a0 2621; RV64I-NEXT: li a1, 0 2622; RV64I-NEXT: call __gesf2@plt 2623; RV64I-NEXT: mv s1, a0 2624; RV64I-NEXT: mv a0, s0 2625; RV64I-NEXT: call __fixunssfdi@plt 2626; RV64I-NEXT: li s3, 0 2627; RV64I-NEXT: bltz s1, .LBB34_2 2628; RV64I-NEXT: # %bb.1: # %start 2629; RV64I-NEXT: mv s3, a0 2630; RV64I-NEXT: .LBB34_2: # %start 2631; RV64I-NEXT: lui a0, 292864 2632; RV64I-NEXT: addiw a1, a0, -256 2633; RV64I-NEXT: mv a0, s0 2634; RV64I-NEXT: call __gtsf2@plt 2635; RV64I-NEXT: mv a1, s2 2636; RV64I-NEXT: bgtz a0, .LBB34_4 2637; RV64I-NEXT: # %bb.3: # %start 2638; RV64I-NEXT: mv a1, s3 2639; RV64I-NEXT: .LBB34_4: # %start 2640; RV64I-NEXT: and a0, a1, s2 2641; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 2642; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 2643; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 2644; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 2645; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 2646; RV64I-NEXT: addi sp, sp, 48 2647; RV64I-NEXT: ret 2648start: 2649 %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a) 2650 ret i16 %0 2651} 2652 2653define signext i8 @fcvt_w_s_i8(half %a) nounwind { 2654; RV32IZFH-LABEL: fcvt_w_s_i8: 2655; RV32IZFH: # %bb.0: 2656; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 2657; RV32IZFH-NEXT: ret 2658; 2659; RV64IZFH-LABEL: fcvt_w_s_i8: 2660; RV64IZFH: # %bb.0: 2661; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 2662; RV64IZFH-NEXT: ret 2663; 2664; RV32IDZFH-LABEL: fcvt_w_s_i8: 2665; RV32IDZFH: # %bb.0: 2666; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 2667; RV32IDZFH-NEXT: ret 2668; 2669; RV64IDZFH-LABEL: fcvt_w_s_i8: 2670; RV64IDZFH: # %bb.0: 2671; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 2672; RV64IDZFH-NEXT: ret 2673; 2674; RV32I-LABEL: fcvt_w_s_i8: 2675; RV32I: # %bb.0: 2676; RV32I-NEXT: addi sp, sp, -16 2677; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2678; RV32I-NEXT: slli a0, a0, 16 2679; RV32I-NEXT: srli a0, a0, 16 2680; RV32I-NEXT: call __extendhfsf2@plt 2681; RV32I-NEXT: call __fixsfsi@plt 2682; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2683; RV32I-NEXT: addi sp, sp, 16 2684; RV32I-NEXT: ret 2685; 2686; RV64I-LABEL: fcvt_w_s_i8: 2687; RV64I: # %bb.0: 2688; RV64I-NEXT: addi sp, sp, -16 2689; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2690; RV64I-NEXT: slli a0, a0, 48 2691; RV64I-NEXT: srli a0, a0, 48 2692; RV64I-NEXT: call __extendhfsf2@plt 2693; RV64I-NEXT: call __fixsfdi@plt 2694; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2695; RV64I-NEXT: addi sp, sp, 16 2696; RV64I-NEXT: ret 2697 %1 = fptosi half %a to i8 2698 ret i8 %1 2699} 2700 2701define signext i8 @fcvt_w_s_sat_i8(half %a) nounwind { 2702; RV32IZFH-LABEL: fcvt_w_s_sat_i8: 2703; RV32IZFH: # %bb.0: # %start 2704; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 2705; RV32IZFH-NEXT: feq.s a0, ft0, ft0 2706; RV32IZFH-NEXT: beqz a0, .LBB36_2 2707; RV32IZFH-NEXT: # %bb.1: 2708; RV32IZFH-NEXT: lui a0, %hi(.LCPI36_0) 2709; RV32IZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2710; RV32IZFH-NEXT: lui a0, %hi(.LCPI36_1) 2711; RV32IZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2712; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 2713; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 2714; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 2715; RV32IZFH-NEXT: .LBB36_2: # %start 2716; RV32IZFH-NEXT: ret 2717; 2718; RV64IZFH-LABEL: fcvt_w_s_sat_i8: 2719; RV64IZFH: # %bb.0: # %start 2720; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 2721; RV64IZFH-NEXT: feq.s a0, ft0, ft0 2722; RV64IZFH-NEXT: beqz a0, .LBB36_2 2723; RV64IZFH-NEXT: # %bb.1: 2724; RV64IZFH-NEXT: lui a0, %hi(.LCPI36_0) 2725; RV64IZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2726; RV64IZFH-NEXT: lui a0, %hi(.LCPI36_1) 2727; RV64IZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2728; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 2729; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 2730; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 2731; RV64IZFH-NEXT: .LBB36_2: # %start 2732; RV64IZFH-NEXT: ret 2733; 2734; RV32IDZFH-LABEL: fcvt_w_s_sat_i8: 2735; RV32IDZFH: # %bb.0: # %start 2736; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 2737; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 2738; RV32IDZFH-NEXT: beqz a0, .LBB36_2 2739; RV32IDZFH-NEXT: # %bb.1: 2740; RV32IDZFH-NEXT: lui a0, %hi(.LCPI36_0) 2741; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2742; RV32IDZFH-NEXT: lui a0, %hi(.LCPI36_1) 2743; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2744; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 2745; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 2746; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 2747; RV32IDZFH-NEXT: .LBB36_2: # %start 2748; RV32IDZFH-NEXT: ret 2749; 2750; RV64IDZFH-LABEL: fcvt_w_s_sat_i8: 2751; RV64IDZFH: # %bb.0: # %start 2752; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 2753; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 2754; RV64IDZFH-NEXT: beqz a0, .LBB36_2 2755; RV64IDZFH-NEXT: # %bb.1: 2756; RV64IDZFH-NEXT: lui a0, %hi(.LCPI36_0) 2757; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI36_0)(a0) 2758; RV64IDZFH-NEXT: lui a0, %hi(.LCPI36_1) 2759; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI36_1)(a0) 2760; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 2761; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 2762; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 2763; RV64IDZFH-NEXT: .LBB36_2: # %start 2764; RV64IDZFH-NEXT: ret 2765; 2766; RV32I-LABEL: fcvt_w_s_sat_i8: 2767; RV32I: # %bb.0: # %start 2768; RV32I-NEXT: addi sp, sp, -32 2769; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 2770; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 2771; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 2772; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 2773; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 2774; RV32I-NEXT: slli a0, a0, 16 2775; RV32I-NEXT: srli a0, a0, 16 2776; RV32I-NEXT: call __extendhfsf2@plt 2777; RV32I-NEXT: mv s0, a0 2778; RV32I-NEXT: lui a1, 798720 2779; RV32I-NEXT: call __gesf2@plt 2780; RV32I-NEXT: mv s1, a0 2781; RV32I-NEXT: mv a0, s0 2782; RV32I-NEXT: call __fixsfsi@plt 2783; RV32I-NEXT: li s2, 0 2784; RV32I-NEXT: li s3, -128 2785; RV32I-NEXT: bltz s1, .LBB36_2 2786; RV32I-NEXT: # %bb.1: # %start 2787; RV32I-NEXT: mv s3, a0 2788; RV32I-NEXT: .LBB36_2: # %start 2789; RV32I-NEXT: lui a1, 274400 2790; RV32I-NEXT: mv a0, s0 2791; RV32I-NEXT: call __gtsf2@plt 2792; RV32I-NEXT: li s1, 127 2793; RV32I-NEXT: blt s2, a0, .LBB36_4 2794; RV32I-NEXT: # %bb.3: # %start 2795; RV32I-NEXT: mv s1, s3 2796; RV32I-NEXT: .LBB36_4: # %start 2797; RV32I-NEXT: mv a0, s0 2798; RV32I-NEXT: mv a1, s0 2799; RV32I-NEXT: call __unordsf2@plt 2800; RV32I-NEXT: bne a0, s2, .LBB36_6 2801; RV32I-NEXT: # %bb.5: # %start 2802; RV32I-NEXT: mv s2, s1 2803; RV32I-NEXT: .LBB36_6: # %start 2804; RV32I-NEXT: slli a0, s2, 24 2805; RV32I-NEXT: srai a0, a0, 24 2806; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 2807; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 2808; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 2809; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 2810; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 2811; RV32I-NEXT: addi sp, sp, 32 2812; RV32I-NEXT: ret 2813; 2814; RV64I-LABEL: fcvt_w_s_sat_i8: 2815; RV64I: # %bb.0: # %start 2816; RV64I-NEXT: addi sp, sp, -48 2817; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 2818; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 2819; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 2820; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 2821; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 2822; RV64I-NEXT: slli a0, a0, 48 2823; RV64I-NEXT: srli a0, a0, 48 2824; RV64I-NEXT: call __extendhfsf2@plt 2825; RV64I-NEXT: mv s0, a0 2826; RV64I-NEXT: lui a1, 798720 2827; RV64I-NEXT: call __gesf2@plt 2828; RV64I-NEXT: mv s1, a0 2829; RV64I-NEXT: mv a0, s0 2830; RV64I-NEXT: call __fixsfdi@plt 2831; RV64I-NEXT: li s2, 0 2832; RV64I-NEXT: li s3, -128 2833; RV64I-NEXT: bltz s1, .LBB36_2 2834; RV64I-NEXT: # %bb.1: # %start 2835; RV64I-NEXT: mv s3, a0 2836; RV64I-NEXT: .LBB36_2: # %start 2837; RV64I-NEXT: lui a1, 274400 2838; RV64I-NEXT: mv a0, s0 2839; RV64I-NEXT: call __gtsf2@plt 2840; RV64I-NEXT: li s1, 127 2841; RV64I-NEXT: blt s2, a0, .LBB36_4 2842; RV64I-NEXT: # %bb.3: # %start 2843; RV64I-NEXT: mv s1, s3 2844; RV64I-NEXT: .LBB36_4: # %start 2845; RV64I-NEXT: mv a0, s0 2846; RV64I-NEXT: mv a1, s0 2847; RV64I-NEXT: call __unordsf2@plt 2848; RV64I-NEXT: bne a0, s2, .LBB36_6 2849; RV64I-NEXT: # %bb.5: # %start 2850; RV64I-NEXT: mv s2, s1 2851; RV64I-NEXT: .LBB36_6: # %start 2852; RV64I-NEXT: slli a0, s2, 56 2853; RV64I-NEXT: srai a0, a0, 56 2854; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 2855; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 2856; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 2857; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 2858; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 2859; RV64I-NEXT: addi sp, sp, 48 2860; RV64I-NEXT: ret 2861start: 2862 %0 = tail call i8 @llvm.fptosi.sat.i8.f16(half %a) 2863 ret i8 %0 2864} 2865declare i8 @llvm.fptosi.sat.i8.f16(half) 2866 2867define zeroext i8 @fcvt_wu_s_i8(half %a) nounwind { 2868; RV32IZFH-LABEL: fcvt_wu_s_i8: 2869; RV32IZFH: # %bb.0: 2870; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2871; RV32IZFH-NEXT: ret 2872; 2873; RV64IZFH-LABEL: fcvt_wu_s_i8: 2874; RV64IZFH: # %bb.0: 2875; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2876; RV64IZFH-NEXT: ret 2877; 2878; RV32IDZFH-LABEL: fcvt_wu_s_i8: 2879; RV32IDZFH: # %bb.0: 2880; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 2881; RV32IDZFH-NEXT: ret 2882; 2883; RV64IDZFH-LABEL: fcvt_wu_s_i8: 2884; RV64IDZFH: # %bb.0: 2885; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 2886; RV64IDZFH-NEXT: ret 2887; 2888; RV32I-LABEL: fcvt_wu_s_i8: 2889; RV32I: # %bb.0: 2890; RV32I-NEXT: addi sp, sp, -16 2891; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2892; RV32I-NEXT: slli a0, a0, 16 2893; RV32I-NEXT: srli a0, a0, 16 2894; RV32I-NEXT: call __extendhfsf2@plt 2895; RV32I-NEXT: call __fixunssfsi@plt 2896; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2897; RV32I-NEXT: addi sp, sp, 16 2898; RV32I-NEXT: ret 2899; 2900; RV64I-LABEL: fcvt_wu_s_i8: 2901; RV64I: # %bb.0: 2902; RV64I-NEXT: addi sp, sp, -16 2903; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2904; RV64I-NEXT: slli a0, a0, 48 2905; RV64I-NEXT: srli a0, a0, 48 2906; RV64I-NEXT: call __extendhfsf2@plt 2907; RV64I-NEXT: call __fixunssfdi@plt 2908; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2909; RV64I-NEXT: addi sp, sp, 16 2910; RV64I-NEXT: ret 2911 %1 = fptoui half %a to i8 2912 ret i8 %1 2913} 2914 2915define zeroext i8 @fcvt_wu_s_sat_i8(half %a) nounwind { 2916; RV32IZFH-LABEL: fcvt_wu_s_sat_i8: 2917; RV32IZFH: # %bb.0: # %start 2918; RV32IZFH-NEXT: lui a0, %hi(.LCPI38_0) 2919; RV32IZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 2920; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 2921; RV32IZFH-NEXT: fmv.w.x ft2, zero 2922; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 2923; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 2924; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 2925; RV32IZFH-NEXT: ret 2926; 2927; RV64IZFH-LABEL: fcvt_wu_s_sat_i8: 2928; RV64IZFH: # %bb.0: # %start 2929; RV64IZFH-NEXT: lui a0, %hi(.LCPI38_0) 2930; RV64IZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 2931; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 2932; RV64IZFH-NEXT: fmv.w.x ft2, zero 2933; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 2934; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 2935; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 2936; RV64IZFH-NEXT: ret 2937; 2938; RV32IDZFH-LABEL: fcvt_wu_s_sat_i8: 2939; RV32IDZFH: # %bb.0: # %start 2940; RV32IDZFH-NEXT: lui a0, %hi(.LCPI38_0) 2941; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 2942; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 2943; RV32IDZFH-NEXT: fmv.w.x ft2, zero 2944; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 2945; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 2946; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 2947; RV32IDZFH-NEXT: ret 2948; 2949; RV64IDZFH-LABEL: fcvt_wu_s_sat_i8: 2950; RV64IDZFH: # %bb.0: # %start 2951; RV64IDZFH-NEXT: lui a0, %hi(.LCPI38_0) 2952; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI38_0)(a0) 2953; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 2954; RV64IDZFH-NEXT: fmv.w.x ft2, zero 2955; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 2956; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 2957; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 2958; RV64IDZFH-NEXT: ret 2959; 2960; RV32I-LABEL: fcvt_wu_s_sat_i8: 2961; RV32I: # %bb.0: # %start 2962; RV32I-NEXT: addi sp, sp, -16 2963; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2964; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2965; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2966; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 2967; RV32I-NEXT: slli a0, a0, 16 2968; RV32I-NEXT: srli a0, a0, 16 2969; RV32I-NEXT: call __extendhfsf2@plt 2970; RV32I-NEXT: mv s0, a0 2971; RV32I-NEXT: li a1, 0 2972; RV32I-NEXT: call __gesf2@plt 2973; RV32I-NEXT: mv s1, a0 2974; RV32I-NEXT: mv a0, s0 2975; RV32I-NEXT: call __fixunssfsi@plt 2976; RV32I-NEXT: li s2, 0 2977; RV32I-NEXT: bltz s1, .LBB38_2 2978; RV32I-NEXT: # %bb.1: # %start 2979; RV32I-NEXT: mv s2, a0 2980; RV32I-NEXT: .LBB38_2: # %start 2981; RV32I-NEXT: lui a1, 276464 2982; RV32I-NEXT: mv a0, s0 2983; RV32I-NEXT: call __gtsf2@plt 2984; RV32I-NEXT: li a1, 255 2985; RV32I-NEXT: bgtz a0, .LBB38_4 2986; RV32I-NEXT: # %bb.3: # %start 2987; RV32I-NEXT: mv a1, s2 2988; RV32I-NEXT: .LBB38_4: # %start 2989; RV32I-NEXT: andi a0, a1, 255 2990; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2991; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2992; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2993; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 2994; RV32I-NEXT: addi sp, sp, 16 2995; RV32I-NEXT: ret 2996; 2997; RV64I-LABEL: fcvt_wu_s_sat_i8: 2998; RV64I: # %bb.0: # %start 2999; RV64I-NEXT: addi sp, sp, -32 3000; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 3001; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 3002; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 3003; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 3004; RV64I-NEXT: slli a0, a0, 48 3005; RV64I-NEXT: srli a0, a0, 48 3006; RV64I-NEXT: call __extendhfsf2@plt 3007; RV64I-NEXT: mv s0, a0 3008; RV64I-NEXT: li a1, 0 3009; RV64I-NEXT: call __gesf2@plt 3010; RV64I-NEXT: mv s1, a0 3011; RV64I-NEXT: mv a0, s0 3012; RV64I-NEXT: call __fixunssfdi@plt 3013; RV64I-NEXT: li s2, 0 3014; RV64I-NEXT: bltz s1, .LBB38_2 3015; RV64I-NEXT: # %bb.1: # %start 3016; RV64I-NEXT: mv s2, a0 3017; RV64I-NEXT: .LBB38_2: # %start 3018; RV64I-NEXT: lui a1, 276464 3019; RV64I-NEXT: mv a0, s0 3020; RV64I-NEXT: call __gtsf2@plt 3021; RV64I-NEXT: li a1, 255 3022; RV64I-NEXT: bgtz a0, .LBB38_4 3023; RV64I-NEXT: # %bb.3: # %start 3024; RV64I-NEXT: mv a1, s2 3025; RV64I-NEXT: .LBB38_4: # %start 3026; RV64I-NEXT: andi a0, a1, 255 3027; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 3028; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 3029; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 3030; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 3031; RV64I-NEXT: addi sp, sp, 32 3032; RV64I-NEXT: ret 3033start: 3034 %0 = tail call i8 @llvm.fptoui.sat.i8.f16(half %a) 3035 ret i8 %0 3036} 3037declare i8 @llvm.fptoui.sat.i8.f16(half) 3038