1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs \
3; RUN:   -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IZFH %s
4; RUN: llc -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs \
5; RUN:   -target-abi lp64f < %s | FileCheck -check-prefix=RV64IZFH %s
6; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs \
7; RUN:   -target-abi ilp32d < %s | FileCheck -check-prefix=RV32IDZFH %s
8; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs \
9; RUN:   -target-abi lp64d < %s | FileCheck -check-prefix=RV64IDZFH %s
10; RUN: llc -mtriple=riscv32 -verify-machineinstrs \
11; RUN:   < %s | FileCheck -check-prefix=RV32I %s
12; RUN: llc -mtriple=riscv64 -verify-machineinstrs \
13; RUN:   < %s | FileCheck -check-prefix=RV64I %s
14
15define i16 @fcvt_si_h(half %a) nounwind {
16; RV32IZFH-LABEL: fcvt_si_h:
17; RV32IZFH:       # %bb.0:
18; RV32IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
19; RV32IZFH-NEXT:    ret
20;
21; RV64IZFH-LABEL: fcvt_si_h:
22; RV64IZFH:       # %bb.0:
23; RV64IZFH-NEXT:    fcvt.l.h a0, fa0, rtz
24; RV64IZFH-NEXT:    ret
25;
26; RV32IDZFH-LABEL: fcvt_si_h:
27; RV32IDZFH:       # %bb.0:
28; RV32IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
29; RV32IDZFH-NEXT:    ret
30;
31; RV64IDZFH-LABEL: fcvt_si_h:
32; RV64IDZFH:       # %bb.0:
33; RV64IDZFH-NEXT:    fcvt.l.h a0, fa0, rtz
34; RV64IDZFH-NEXT:    ret
35;
36; RV32I-LABEL: fcvt_si_h:
37; RV32I:       # %bb.0:
38; RV32I-NEXT:    addi sp, sp, -16
39; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
40; RV32I-NEXT:    slli a0, a0, 16
41; RV32I-NEXT:    srli a0, a0, 16
42; RV32I-NEXT:    call __gnu_h2f_ieee@plt
43; RV32I-NEXT:    call __fixsfsi@plt
44; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
45; RV32I-NEXT:    addi sp, sp, 16
46; RV32I-NEXT:    ret
47;
48; RV64I-LABEL: fcvt_si_h:
49; RV64I:       # %bb.0:
50; RV64I-NEXT:    addi sp, sp, -16
51; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
52; RV64I-NEXT:    slli a0, a0, 48
53; RV64I-NEXT:    srli a0, a0, 48
54; RV64I-NEXT:    call __gnu_h2f_ieee@plt
55; RV64I-NEXT:    call __fixsfdi@plt
56; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
57; RV64I-NEXT:    addi sp, sp, 16
58; RV64I-NEXT:    ret
59  %1 = fptosi half %a to i16
60  ret i16 %1
61}
62
63define i16 @fcvt_si_h_sat(half %a) nounwind {
64; RV32IZFH-LABEL: fcvt_si_h_sat:
65; RV32IZFH:       # %bb.0: # %start
66; RV32IZFH-NEXT:    fcvt.s.h ft0, fa0
67; RV32IZFH-NEXT:    feq.s a0, ft0, ft0
68; RV32IZFH-NEXT:    bnez a0, .LBB1_2
69; RV32IZFH-NEXT:  # %bb.1: # %start
70; RV32IZFH-NEXT:    li a0, 0
71; RV32IZFH-NEXT:    ret
72; RV32IZFH-NEXT:  .LBB1_2:
73; RV32IZFH-NEXT:    lui a0, %hi(.LCPI1_0)
74; RV32IZFH-NEXT:    flw ft1, %lo(.LCPI1_0)(a0)
75; RV32IZFH-NEXT:    lui a0, %hi(.LCPI1_1)
76; RV32IZFH-NEXT:    flw ft2, %lo(.LCPI1_1)(a0)
77; RV32IZFH-NEXT:    fmax.s ft0, ft0, ft1
78; RV32IZFH-NEXT:    fmin.s ft0, ft0, ft2
79; RV32IZFH-NEXT:    fcvt.w.s a0, ft0, rtz
80; RV32IZFH-NEXT:    ret
81;
82; RV64IZFH-LABEL: fcvt_si_h_sat:
83; RV64IZFH:       # %bb.0: # %start
84; RV64IZFH-NEXT:    fcvt.s.h ft0, fa0
85; RV64IZFH-NEXT:    feq.s a0, ft0, ft0
86; RV64IZFH-NEXT:    bnez a0, .LBB1_2
87; RV64IZFH-NEXT:  # %bb.1: # %start
88; RV64IZFH-NEXT:    li a0, 0
89; RV64IZFH-NEXT:    ret
90; RV64IZFH-NEXT:  .LBB1_2:
91; RV64IZFH-NEXT:    lui a0, %hi(.LCPI1_0)
92; RV64IZFH-NEXT:    flw ft1, %lo(.LCPI1_0)(a0)
93; RV64IZFH-NEXT:    lui a0, %hi(.LCPI1_1)
94; RV64IZFH-NEXT:    flw ft2, %lo(.LCPI1_1)(a0)
95; RV64IZFH-NEXT:    fmax.s ft0, ft0, ft1
96; RV64IZFH-NEXT:    fmin.s ft0, ft0, ft2
97; RV64IZFH-NEXT:    fcvt.l.s a0, ft0, rtz
98; RV64IZFH-NEXT:    ret
99;
100; RV32IDZFH-LABEL: fcvt_si_h_sat:
101; RV32IDZFH:       # %bb.0: # %start
102; RV32IDZFH-NEXT:    fcvt.s.h ft0, fa0
103; RV32IDZFH-NEXT:    feq.s a0, ft0, ft0
104; RV32IDZFH-NEXT:    bnez a0, .LBB1_2
105; RV32IDZFH-NEXT:  # %bb.1: # %start
106; RV32IDZFH-NEXT:    li a0, 0
107; RV32IDZFH-NEXT:    ret
108; RV32IDZFH-NEXT:  .LBB1_2:
109; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI1_0)
110; RV32IDZFH-NEXT:    flw ft1, %lo(.LCPI1_0)(a0)
111; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI1_1)
112; RV32IDZFH-NEXT:    flw ft2, %lo(.LCPI1_1)(a0)
113; RV32IDZFH-NEXT:    fmax.s ft0, ft0, ft1
114; RV32IDZFH-NEXT:    fmin.s ft0, ft0, ft2
115; RV32IDZFH-NEXT:    fcvt.w.s a0, ft0, rtz
116; RV32IDZFH-NEXT:    ret
117;
118; RV64IDZFH-LABEL: fcvt_si_h_sat:
119; RV64IDZFH:       # %bb.0: # %start
120; RV64IDZFH-NEXT:    fcvt.s.h ft0, fa0
121; RV64IDZFH-NEXT:    feq.s a0, ft0, ft0
122; RV64IDZFH-NEXT:    bnez a0, .LBB1_2
123; RV64IDZFH-NEXT:  # %bb.1: # %start
124; RV64IDZFH-NEXT:    li a0, 0
125; RV64IDZFH-NEXT:    ret
126; RV64IDZFH-NEXT:  .LBB1_2:
127; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI1_0)
128; RV64IDZFH-NEXT:    flw ft1, %lo(.LCPI1_0)(a0)
129; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI1_1)
130; RV64IDZFH-NEXT:    flw ft2, %lo(.LCPI1_1)(a0)
131; RV64IDZFH-NEXT:    fmax.s ft0, ft0, ft1
132; RV64IDZFH-NEXT:    fmin.s ft0, ft0, ft2
133; RV64IDZFH-NEXT:    fcvt.l.s a0, ft0, rtz
134; RV64IDZFH-NEXT:    ret
135;
136; RV32I-LABEL: fcvt_si_h_sat:
137; RV32I:       # %bb.0: # %start
138; RV32I-NEXT:    addi sp, sp, -32
139; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
140; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
141; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
142; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
143; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
144; RV32I-NEXT:    slli a0, a0, 16
145; RV32I-NEXT:    srli a0, a0, 16
146; RV32I-NEXT:    call __gnu_h2f_ieee@plt
147; RV32I-NEXT:    mv s0, a0
148; RV32I-NEXT:    lui a1, 815104
149; RV32I-NEXT:    call __gesf2@plt
150; RV32I-NEXT:    mv s2, a0
151; RV32I-NEXT:    mv a0, s0
152; RV32I-NEXT:    call __fixsfsi@plt
153; RV32I-NEXT:    li s1, 0
154; RV32I-NEXT:    lui s3, 1048568
155; RV32I-NEXT:    bltz s2, .LBB1_2
156; RV32I-NEXT:  # %bb.1: # %start
157; RV32I-NEXT:    mv s3, a0
158; RV32I-NEXT:  .LBB1_2: # %start
159; RV32I-NEXT:    lui a0, 290816
160; RV32I-NEXT:    addi a1, a0, -512
161; RV32I-NEXT:    mv a0, s0
162; RV32I-NEXT:    call __gtsf2@plt
163; RV32I-NEXT:    bge s1, a0, .LBB1_4
164; RV32I-NEXT:  # %bb.3:
165; RV32I-NEXT:    lui a0, 8
166; RV32I-NEXT:    addi s3, a0, -1
167; RV32I-NEXT:  .LBB1_4: # %start
168; RV32I-NEXT:    mv a0, s0
169; RV32I-NEXT:    mv a1, s0
170; RV32I-NEXT:    call __unordsf2@plt
171; RV32I-NEXT:    bne a0, s1, .LBB1_6
172; RV32I-NEXT:  # %bb.5: # %start
173; RV32I-NEXT:    mv s1, s3
174; RV32I-NEXT:  .LBB1_6: # %start
175; RV32I-NEXT:    mv a0, s1
176; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
177; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
178; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
179; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
180; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
181; RV32I-NEXT:    addi sp, sp, 32
182; RV32I-NEXT:    ret
183;
184; RV64I-LABEL: fcvt_si_h_sat:
185; RV64I:       # %bb.0: # %start
186; RV64I-NEXT:    addi sp, sp, -48
187; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
188; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
189; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
190; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
191; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
192; RV64I-NEXT:    slli a0, a0, 48
193; RV64I-NEXT:    srli a0, a0, 48
194; RV64I-NEXT:    call __gnu_h2f_ieee@plt
195; RV64I-NEXT:    mv s0, a0
196; RV64I-NEXT:    lui a1, 815104
197; RV64I-NEXT:    call __gesf2@plt
198; RV64I-NEXT:    mv s2, a0
199; RV64I-NEXT:    mv a0, s0
200; RV64I-NEXT:    call __fixsfdi@plt
201; RV64I-NEXT:    li s1, 0
202; RV64I-NEXT:    lui s3, 1048568
203; RV64I-NEXT:    bltz s2, .LBB1_2
204; RV64I-NEXT:  # %bb.1: # %start
205; RV64I-NEXT:    mv s3, a0
206; RV64I-NEXT:  .LBB1_2: # %start
207; RV64I-NEXT:    lui a0, 290816
208; RV64I-NEXT:    addiw a1, a0, -512
209; RV64I-NEXT:    mv a0, s0
210; RV64I-NEXT:    call __gtsf2@plt
211; RV64I-NEXT:    bge s1, a0, .LBB1_4
212; RV64I-NEXT:  # %bb.3:
213; RV64I-NEXT:    lui a0, 8
214; RV64I-NEXT:    addiw s3, a0, -1
215; RV64I-NEXT:  .LBB1_4: # %start
216; RV64I-NEXT:    mv a0, s0
217; RV64I-NEXT:    mv a1, s0
218; RV64I-NEXT:    call __unordsf2@plt
219; RV64I-NEXT:    bne a0, s1, .LBB1_6
220; RV64I-NEXT:  # %bb.5: # %start
221; RV64I-NEXT:    mv s1, s3
222; RV64I-NEXT:  .LBB1_6: # %start
223; RV64I-NEXT:    mv a0, s1
224; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
225; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
226; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
227; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
228; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
229; RV64I-NEXT:    addi sp, sp, 48
230; RV64I-NEXT:    ret
231start:
232  %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a)
233  ret i16 %0
234}
235declare i16 @llvm.fptosi.sat.i16.f16(half)
236
237define i16 @fcvt_ui_h(half %a) nounwind {
238; RV32IZFH-LABEL: fcvt_ui_h:
239; RV32IZFH:       # %bb.0:
240; RV32IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
241; RV32IZFH-NEXT:    ret
242;
243; RV64IZFH-LABEL: fcvt_ui_h:
244; RV64IZFH:       # %bb.0:
245; RV64IZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
246; RV64IZFH-NEXT:    ret
247;
248; RV32IDZFH-LABEL: fcvt_ui_h:
249; RV32IDZFH:       # %bb.0:
250; RV32IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
251; RV32IDZFH-NEXT:    ret
252;
253; RV64IDZFH-LABEL: fcvt_ui_h:
254; RV64IDZFH:       # %bb.0:
255; RV64IDZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
256; RV64IDZFH-NEXT:    ret
257;
258; RV32I-LABEL: fcvt_ui_h:
259; RV32I:       # %bb.0:
260; RV32I-NEXT:    addi sp, sp, -16
261; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
262; RV32I-NEXT:    slli a0, a0, 16
263; RV32I-NEXT:    srli a0, a0, 16
264; RV32I-NEXT:    call __gnu_h2f_ieee@plt
265; RV32I-NEXT:    call __fixunssfsi@plt
266; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
267; RV32I-NEXT:    addi sp, sp, 16
268; RV32I-NEXT:    ret
269;
270; RV64I-LABEL: fcvt_ui_h:
271; RV64I:       # %bb.0:
272; RV64I-NEXT:    addi sp, sp, -16
273; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
274; RV64I-NEXT:    slli a0, a0, 48
275; RV64I-NEXT:    srli a0, a0, 48
276; RV64I-NEXT:    call __gnu_h2f_ieee@plt
277; RV64I-NEXT:    call __fixunssfdi@plt
278; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
279; RV64I-NEXT:    addi sp, sp, 16
280; RV64I-NEXT:    ret
281  %1 = fptoui half %a to i16
282  ret i16 %1
283}
284
285define i16 @fcvt_ui_h_sat(half %a) nounwind {
286; RV32IZFH-LABEL: fcvt_ui_h_sat:
287; RV32IZFH:       # %bb.0: # %start
288; RV32IZFH-NEXT:    lui a0, %hi(.LCPI3_0)
289; RV32IZFH-NEXT:    flw ft0, %lo(.LCPI3_0)(a0)
290; RV32IZFH-NEXT:    fcvt.s.h ft1, fa0
291; RV32IZFH-NEXT:    fmv.w.x ft2, zero
292; RV32IZFH-NEXT:    fmax.s ft1, ft1, ft2
293; RV32IZFH-NEXT:    fmin.s ft0, ft1, ft0
294; RV32IZFH-NEXT:    fcvt.wu.s a0, ft0, rtz
295; RV32IZFH-NEXT:    ret
296;
297; RV64IZFH-LABEL: fcvt_ui_h_sat:
298; RV64IZFH:       # %bb.0: # %start
299; RV64IZFH-NEXT:    lui a0, %hi(.LCPI3_0)
300; RV64IZFH-NEXT:    flw ft0, %lo(.LCPI3_0)(a0)
301; RV64IZFH-NEXT:    fcvt.s.h ft1, fa0
302; RV64IZFH-NEXT:    fmv.w.x ft2, zero
303; RV64IZFH-NEXT:    fmax.s ft1, ft1, ft2
304; RV64IZFH-NEXT:    fmin.s ft0, ft1, ft0
305; RV64IZFH-NEXT:    fcvt.lu.s a0, ft0, rtz
306; RV64IZFH-NEXT:    ret
307;
308; RV32IDZFH-LABEL: fcvt_ui_h_sat:
309; RV32IDZFH:       # %bb.0: # %start
310; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI3_0)
311; RV32IDZFH-NEXT:    flw ft0, %lo(.LCPI3_0)(a0)
312; RV32IDZFH-NEXT:    fcvt.s.h ft1, fa0
313; RV32IDZFH-NEXT:    fmv.w.x ft2, zero
314; RV32IDZFH-NEXT:    fmax.s ft1, ft1, ft2
315; RV32IDZFH-NEXT:    fmin.s ft0, ft1, ft0
316; RV32IDZFH-NEXT:    fcvt.wu.s a0, ft0, rtz
317; RV32IDZFH-NEXT:    ret
318;
319; RV64IDZFH-LABEL: fcvt_ui_h_sat:
320; RV64IDZFH:       # %bb.0: # %start
321; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI3_0)
322; RV64IDZFH-NEXT:    flw ft0, %lo(.LCPI3_0)(a0)
323; RV64IDZFH-NEXT:    fcvt.s.h ft1, fa0
324; RV64IDZFH-NEXT:    fmv.w.x ft2, zero
325; RV64IDZFH-NEXT:    fmax.s ft1, ft1, ft2
326; RV64IDZFH-NEXT:    fmin.s ft0, ft1, ft0
327; RV64IDZFH-NEXT:    fcvt.lu.s a0, ft0, rtz
328; RV64IDZFH-NEXT:    ret
329;
330; RV32I-LABEL: fcvt_ui_h_sat:
331; RV32I:       # %bb.0: # %start
332; RV32I-NEXT:    addi sp, sp, -32
333; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
334; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
335; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
336; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
337; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
338; RV32I-NEXT:    lui a1, 16
339; RV32I-NEXT:    addi s2, a1, -1
340; RV32I-NEXT:    and a0, a0, s2
341; RV32I-NEXT:    call __gnu_h2f_ieee@plt
342; RV32I-NEXT:    mv s1, a0
343; RV32I-NEXT:    li a1, 0
344; RV32I-NEXT:    call __gesf2@plt
345; RV32I-NEXT:    mv s0, a0
346; RV32I-NEXT:    mv a0, s1
347; RV32I-NEXT:    call __fixunssfsi@plt
348; RV32I-NEXT:    li s3, 0
349; RV32I-NEXT:    bltz s0, .LBB3_2
350; RV32I-NEXT:  # %bb.1: # %start
351; RV32I-NEXT:    mv s3, a0
352; RV32I-NEXT:  .LBB3_2: # %start
353; RV32I-NEXT:    lui a0, 292864
354; RV32I-NEXT:    addi a1, a0, -256
355; RV32I-NEXT:    mv a0, s1
356; RV32I-NEXT:    call __gtsf2@plt
357; RV32I-NEXT:    bgtz a0, .LBB3_4
358; RV32I-NEXT:  # %bb.3: # %start
359; RV32I-NEXT:    mv s2, s3
360; RV32I-NEXT:  .LBB3_4: # %start
361; RV32I-NEXT:    mv a0, s2
362; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
363; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
364; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
365; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
366; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
367; RV32I-NEXT:    addi sp, sp, 32
368; RV32I-NEXT:    ret
369;
370; RV64I-LABEL: fcvt_ui_h_sat:
371; RV64I:       # %bb.0: # %start
372; RV64I-NEXT:    addi sp, sp, -48
373; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
374; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
375; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
376; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
377; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
378; RV64I-NEXT:    lui a1, 16
379; RV64I-NEXT:    addiw s2, a1, -1
380; RV64I-NEXT:    and a0, a0, s2
381; RV64I-NEXT:    call __gnu_h2f_ieee@plt
382; RV64I-NEXT:    mv s1, a0
383; RV64I-NEXT:    li a1, 0
384; RV64I-NEXT:    call __gesf2@plt
385; RV64I-NEXT:    mv s0, a0
386; RV64I-NEXT:    mv a0, s1
387; RV64I-NEXT:    call __fixunssfdi@plt
388; RV64I-NEXT:    li s3, 0
389; RV64I-NEXT:    bltz s0, .LBB3_2
390; RV64I-NEXT:  # %bb.1: # %start
391; RV64I-NEXT:    mv s3, a0
392; RV64I-NEXT:  .LBB3_2: # %start
393; RV64I-NEXT:    lui a0, 292864
394; RV64I-NEXT:    addiw a1, a0, -256
395; RV64I-NEXT:    mv a0, s1
396; RV64I-NEXT:    call __gtsf2@plt
397; RV64I-NEXT:    bgtz a0, .LBB3_4
398; RV64I-NEXT:  # %bb.3: # %start
399; RV64I-NEXT:    mv s2, s3
400; RV64I-NEXT:  .LBB3_4: # %start
401; RV64I-NEXT:    mv a0, s2
402; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
403; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
404; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
405; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
406; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
407; RV64I-NEXT:    addi sp, sp, 48
408; RV64I-NEXT:    ret
409start:
410  %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a)
411  ret i16 %0
412}
413declare i16 @llvm.fptoui.sat.i16.f16(half)
414
415define i32 @fcvt_w_h(half %a) nounwind {
416; RV32IZFH-LABEL: fcvt_w_h:
417; RV32IZFH:       # %bb.0:
418; RV32IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
419; RV32IZFH-NEXT:    ret
420;
421; RV64IZFH-LABEL: fcvt_w_h:
422; RV64IZFH:       # %bb.0:
423; RV64IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
424; RV64IZFH-NEXT:    ret
425;
426; RV32IDZFH-LABEL: fcvt_w_h:
427; RV32IDZFH:       # %bb.0:
428; RV32IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
429; RV32IDZFH-NEXT:    ret
430;
431; RV64IDZFH-LABEL: fcvt_w_h:
432; RV64IDZFH:       # %bb.0:
433; RV64IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
434; RV64IDZFH-NEXT:    ret
435;
436; RV32I-LABEL: fcvt_w_h:
437; RV32I:       # %bb.0:
438; RV32I-NEXT:    addi sp, sp, -16
439; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
440; RV32I-NEXT:    slli a0, a0, 16
441; RV32I-NEXT:    srli a0, a0, 16
442; RV32I-NEXT:    call __gnu_h2f_ieee@plt
443; RV32I-NEXT:    call __fixsfsi@plt
444; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
445; RV32I-NEXT:    addi sp, sp, 16
446; RV32I-NEXT:    ret
447;
448; RV64I-LABEL: fcvt_w_h:
449; RV64I:       # %bb.0:
450; RV64I-NEXT:    addi sp, sp, -16
451; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
452; RV64I-NEXT:    slli a0, a0, 48
453; RV64I-NEXT:    srli a0, a0, 48
454; RV64I-NEXT:    call __gnu_h2f_ieee@plt
455; RV64I-NEXT:    call __fixsfdi@plt
456; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
457; RV64I-NEXT:    addi sp, sp, 16
458; RV64I-NEXT:    ret
459  %1 = fptosi half %a to i32
460  ret i32 %1
461}
462
463define i32 @fcvt_w_h_sat(half %a) nounwind {
464; RV32IZFH-LABEL: fcvt_w_h_sat:
465; RV32IZFH:       # %bb.0: # %start
466; RV32IZFH-NEXT:    feq.h a0, fa0, fa0
467; RV32IZFH-NEXT:    bnez a0, .LBB5_2
468; RV32IZFH-NEXT:  # %bb.1: # %start
469; RV32IZFH-NEXT:    li a0, 0
470; RV32IZFH-NEXT:    ret
471; RV32IZFH-NEXT:  .LBB5_2:
472; RV32IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
473; RV32IZFH-NEXT:    ret
474;
475; RV64IZFH-LABEL: fcvt_w_h_sat:
476; RV64IZFH:       # %bb.0: # %start
477; RV64IZFH-NEXT:    feq.h a0, fa0, fa0
478; RV64IZFH-NEXT:    bnez a0, .LBB5_2
479; RV64IZFH-NEXT:  # %bb.1: # %start
480; RV64IZFH-NEXT:    li a0, 0
481; RV64IZFH-NEXT:    ret
482; RV64IZFH-NEXT:  .LBB5_2:
483; RV64IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
484; RV64IZFH-NEXT:    ret
485;
486; RV32IDZFH-LABEL: fcvt_w_h_sat:
487; RV32IDZFH:       # %bb.0: # %start
488; RV32IDZFH-NEXT:    feq.h a0, fa0, fa0
489; RV32IDZFH-NEXT:    bnez a0, .LBB5_2
490; RV32IDZFH-NEXT:  # %bb.1: # %start
491; RV32IDZFH-NEXT:    li a0, 0
492; RV32IDZFH-NEXT:    ret
493; RV32IDZFH-NEXT:  .LBB5_2:
494; RV32IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
495; RV32IDZFH-NEXT:    ret
496;
497; RV64IDZFH-LABEL: fcvt_w_h_sat:
498; RV64IDZFH:       # %bb.0: # %start
499; RV64IDZFH-NEXT:    feq.h a0, fa0, fa0
500; RV64IDZFH-NEXT:    bnez a0, .LBB5_2
501; RV64IDZFH-NEXT:  # %bb.1: # %start
502; RV64IDZFH-NEXT:    li a0, 0
503; RV64IDZFH-NEXT:    ret
504; RV64IDZFH-NEXT:  .LBB5_2:
505; RV64IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
506; RV64IDZFH-NEXT:    ret
507;
508; RV32I-LABEL: fcvt_w_h_sat:
509; RV32I:       # %bb.0: # %start
510; RV32I-NEXT:    addi sp, sp, -32
511; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
512; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
513; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
514; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
515; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
516; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
517; RV32I-NEXT:    slli a0, a0, 16
518; RV32I-NEXT:    srli a0, a0, 16
519; RV32I-NEXT:    call __gnu_h2f_ieee@plt
520; RV32I-NEXT:    mv s0, a0
521; RV32I-NEXT:    lui a1, 847872
522; RV32I-NEXT:    call __gesf2@plt
523; RV32I-NEXT:    mv s2, a0
524; RV32I-NEXT:    mv a0, s0
525; RV32I-NEXT:    call __fixsfsi@plt
526; RV32I-NEXT:    li s1, 0
527; RV32I-NEXT:    lui s4, 524288
528; RV32I-NEXT:    lui s3, 524288
529; RV32I-NEXT:    bltz s2, .LBB5_2
530; RV32I-NEXT:  # %bb.1: # %start
531; RV32I-NEXT:    mv s3, a0
532; RV32I-NEXT:  .LBB5_2: # %start
533; RV32I-NEXT:    lui a0, 323584
534; RV32I-NEXT:    addi a1, a0, -1
535; RV32I-NEXT:    mv a0, s0
536; RV32I-NEXT:    call __gtsf2@plt
537; RV32I-NEXT:    bge s1, a0, .LBB5_4
538; RV32I-NEXT:  # %bb.3:
539; RV32I-NEXT:    addi s3, s4, -1
540; RV32I-NEXT:  .LBB5_4: # %start
541; RV32I-NEXT:    mv a0, s0
542; RV32I-NEXT:    mv a1, s0
543; RV32I-NEXT:    call __unordsf2@plt
544; RV32I-NEXT:    bne a0, s1, .LBB5_6
545; RV32I-NEXT:  # %bb.5: # %start
546; RV32I-NEXT:    mv s1, s3
547; RV32I-NEXT:  .LBB5_6: # %start
548; RV32I-NEXT:    mv a0, s1
549; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
550; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
551; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
552; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
553; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
554; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
555; RV32I-NEXT:    addi sp, sp, 32
556; RV32I-NEXT:    ret
557;
558; RV64I-LABEL: fcvt_w_h_sat:
559; RV64I:       # %bb.0: # %start
560; RV64I-NEXT:    addi sp, sp, -48
561; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
562; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
563; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
564; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
565; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
566; RV64I-NEXT:    sd s4, 0(sp) # 8-byte Folded Spill
567; RV64I-NEXT:    slli a0, a0, 48
568; RV64I-NEXT:    srli a0, a0, 48
569; RV64I-NEXT:    call __gnu_h2f_ieee@plt
570; RV64I-NEXT:    mv s0, a0
571; RV64I-NEXT:    lui a1, 847872
572; RV64I-NEXT:    call __gesf2@plt
573; RV64I-NEXT:    mv s2, a0
574; RV64I-NEXT:    mv a0, s0
575; RV64I-NEXT:    call __fixsfdi@plt
576; RV64I-NEXT:    li s1, 0
577; RV64I-NEXT:    lui s4, 524288
578; RV64I-NEXT:    lui s3, 524288
579; RV64I-NEXT:    bltz s2, .LBB5_2
580; RV64I-NEXT:  # %bb.1: # %start
581; RV64I-NEXT:    mv s3, a0
582; RV64I-NEXT:  .LBB5_2: # %start
583; RV64I-NEXT:    lui a0, 323584
584; RV64I-NEXT:    addiw a1, a0, -1
585; RV64I-NEXT:    mv a0, s0
586; RV64I-NEXT:    call __gtsf2@plt
587; RV64I-NEXT:    bge s1, a0, .LBB5_4
588; RV64I-NEXT:  # %bb.3:
589; RV64I-NEXT:    addiw s3, s4, -1
590; RV64I-NEXT:  .LBB5_4: # %start
591; RV64I-NEXT:    mv a0, s0
592; RV64I-NEXT:    mv a1, s0
593; RV64I-NEXT:    call __unordsf2@plt
594; RV64I-NEXT:    bne a0, s1, .LBB5_6
595; RV64I-NEXT:  # %bb.5: # %start
596; RV64I-NEXT:    mv s1, s3
597; RV64I-NEXT:  .LBB5_6: # %start
598; RV64I-NEXT:    mv a0, s1
599; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
600; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
601; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
602; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
603; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
604; RV64I-NEXT:    ld s4, 0(sp) # 8-byte Folded Reload
605; RV64I-NEXT:    addi sp, sp, 48
606; RV64I-NEXT:    ret
607start:
608  %0 = tail call i32 @llvm.fptosi.sat.i32.f16(half %a)
609  ret i32 %0
610}
611declare i32 @llvm.fptosi.sat.i32.f16(half)
612
613define i32 @fcvt_wu_h(half %a) nounwind {
614; RV32IZFH-LABEL: fcvt_wu_h:
615; RV32IZFH:       # %bb.0:
616; RV32IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
617; RV32IZFH-NEXT:    ret
618;
619; RV64IZFH-LABEL: fcvt_wu_h:
620; RV64IZFH:       # %bb.0:
621; RV64IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
622; RV64IZFH-NEXT:    ret
623;
624; RV32IDZFH-LABEL: fcvt_wu_h:
625; RV32IDZFH:       # %bb.0:
626; RV32IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
627; RV32IDZFH-NEXT:    ret
628;
629; RV64IDZFH-LABEL: fcvt_wu_h:
630; RV64IDZFH:       # %bb.0:
631; RV64IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
632; RV64IDZFH-NEXT:    ret
633;
634; RV32I-LABEL: fcvt_wu_h:
635; RV32I:       # %bb.0:
636; RV32I-NEXT:    addi sp, sp, -16
637; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
638; RV32I-NEXT:    slli a0, a0, 16
639; RV32I-NEXT:    srli a0, a0, 16
640; RV32I-NEXT:    call __gnu_h2f_ieee@plt
641; RV32I-NEXT:    call __fixunssfsi@plt
642; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
643; RV32I-NEXT:    addi sp, sp, 16
644; RV32I-NEXT:    ret
645;
646; RV64I-LABEL: fcvt_wu_h:
647; RV64I:       # %bb.0:
648; RV64I-NEXT:    addi sp, sp, -16
649; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
650; RV64I-NEXT:    slli a0, a0, 48
651; RV64I-NEXT:    srli a0, a0, 48
652; RV64I-NEXT:    call __gnu_h2f_ieee@plt
653; RV64I-NEXT:    call __fixunssfdi@plt
654; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
655; RV64I-NEXT:    addi sp, sp, 16
656; RV64I-NEXT:    ret
657  %1 = fptoui half %a to i32
658  ret i32 %1
659}
660
661; Test where the fptoui has multiple uses, one of which causes a sext to be
662; inserted on RV64.
663define i32 @fcvt_wu_h_multiple_use(half %x, i32* %y) nounwind {
664; RV32IZFH-LABEL: fcvt_wu_h_multiple_use:
665; RV32IZFH:       # %bb.0:
666; RV32IZFH-NEXT:    fcvt.wu.h a1, fa0, rtz
667; RV32IZFH-NEXT:    li a0, 1
668; RV32IZFH-NEXT:    beqz a1, .LBB7_2
669; RV32IZFH-NEXT:  # %bb.1:
670; RV32IZFH-NEXT:    mv a0, a1
671; RV32IZFH-NEXT:  .LBB7_2:
672; RV32IZFH-NEXT:    ret
673;
674; RV64IZFH-LABEL: fcvt_wu_h_multiple_use:
675; RV64IZFH:       # %bb.0:
676; RV64IZFH-NEXT:    fcvt.wu.h a1, fa0, rtz
677; RV64IZFH-NEXT:    li a0, 1
678; RV64IZFH-NEXT:    beqz a1, .LBB7_2
679; RV64IZFH-NEXT:  # %bb.1:
680; RV64IZFH-NEXT:    mv a0, a1
681; RV64IZFH-NEXT:  .LBB7_2:
682; RV64IZFH-NEXT:    ret
683;
684; RV32IDZFH-LABEL: fcvt_wu_h_multiple_use:
685; RV32IDZFH:       # %bb.0:
686; RV32IDZFH-NEXT:    fcvt.wu.h a1, fa0, rtz
687; RV32IDZFH-NEXT:    li a0, 1
688; RV32IDZFH-NEXT:    beqz a1, .LBB7_2
689; RV32IDZFH-NEXT:  # %bb.1:
690; RV32IDZFH-NEXT:    mv a0, a1
691; RV32IDZFH-NEXT:  .LBB7_2:
692; RV32IDZFH-NEXT:    ret
693;
694; RV64IDZFH-LABEL: fcvt_wu_h_multiple_use:
695; RV64IDZFH:       # %bb.0:
696; RV64IDZFH-NEXT:    fcvt.wu.h a1, fa0, rtz
697; RV64IDZFH-NEXT:    li a0, 1
698; RV64IDZFH-NEXT:    beqz a1, .LBB7_2
699; RV64IDZFH-NEXT:  # %bb.1:
700; RV64IDZFH-NEXT:    mv a0, a1
701; RV64IDZFH-NEXT:  .LBB7_2:
702; RV64IDZFH-NEXT:    ret
703;
704; RV32I-LABEL: fcvt_wu_h_multiple_use:
705; RV32I:       # %bb.0:
706; RV32I-NEXT:    addi sp, sp, -16
707; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
708; RV32I-NEXT:    slli a0, a0, 16
709; RV32I-NEXT:    srli a0, a0, 16
710; RV32I-NEXT:    call __gnu_h2f_ieee@plt
711; RV32I-NEXT:    call __fixunssfsi@plt
712; RV32I-NEXT:    mv a1, a0
713; RV32I-NEXT:    li a0, 1
714; RV32I-NEXT:    beqz a1, .LBB7_2
715; RV32I-NEXT:  # %bb.1:
716; RV32I-NEXT:    mv a0, a1
717; RV32I-NEXT:  .LBB7_2:
718; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
719; RV32I-NEXT:    addi sp, sp, 16
720; RV32I-NEXT:    ret
721;
722; RV64I-LABEL: fcvt_wu_h_multiple_use:
723; RV64I:       # %bb.0:
724; RV64I-NEXT:    addi sp, sp, -16
725; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
726; RV64I-NEXT:    slli a0, a0, 48
727; RV64I-NEXT:    srli a0, a0, 48
728; RV64I-NEXT:    call __gnu_h2f_ieee@plt
729; RV64I-NEXT:    call __fixunssfdi@plt
730; RV64I-NEXT:    mv a1, a0
731; RV64I-NEXT:    li a0, 1
732; RV64I-NEXT:    beqz a1, .LBB7_2
733; RV64I-NEXT:  # %bb.1:
734; RV64I-NEXT:    mv a0, a1
735; RV64I-NEXT:  .LBB7_2:
736; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
737; RV64I-NEXT:    addi sp, sp, 16
738; RV64I-NEXT:    ret
739  %a = fptoui half %x to i32
740  %b = icmp eq i32 %a, 0
741  %c = select i1 %b, i32 1, i32 %a
742  ret i32 %c
743}
744
745define i32 @fcvt_wu_h_sat(half %a) nounwind {
746; RV32IZFH-LABEL: fcvt_wu_h_sat:
747; RV32IZFH:       # %bb.0: # %start
748; RV32IZFH-NEXT:    feq.h a0, fa0, fa0
749; RV32IZFH-NEXT:    bnez a0, .LBB8_2
750; RV32IZFH-NEXT:  # %bb.1: # %start
751; RV32IZFH-NEXT:    li a0, 0
752; RV32IZFH-NEXT:    ret
753; RV32IZFH-NEXT:  .LBB8_2:
754; RV32IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
755; RV32IZFH-NEXT:    ret
756;
757; RV64IZFH-LABEL: fcvt_wu_h_sat:
758; RV64IZFH:       # %bb.0: # %start
759; RV64IZFH-NEXT:    feq.h a0, fa0, fa0
760; RV64IZFH-NEXT:    bnez a0, .LBB8_2
761; RV64IZFH-NEXT:  # %bb.1: # %start
762; RV64IZFH-NEXT:    li a0, 0
763; RV64IZFH-NEXT:    ret
764; RV64IZFH-NEXT:  .LBB8_2:
765; RV64IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
766; RV64IZFH-NEXT:    ret
767;
768; RV32IDZFH-LABEL: fcvt_wu_h_sat:
769; RV32IDZFH:       # %bb.0: # %start
770; RV32IDZFH-NEXT:    feq.h a0, fa0, fa0
771; RV32IDZFH-NEXT:    bnez a0, .LBB8_2
772; RV32IDZFH-NEXT:  # %bb.1: # %start
773; RV32IDZFH-NEXT:    li a0, 0
774; RV32IDZFH-NEXT:    ret
775; RV32IDZFH-NEXT:  .LBB8_2:
776; RV32IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
777; RV32IDZFH-NEXT:    ret
778;
779; RV64IDZFH-LABEL: fcvt_wu_h_sat:
780; RV64IDZFH:       # %bb.0: # %start
781; RV64IDZFH-NEXT:    feq.h a0, fa0, fa0
782; RV64IDZFH-NEXT:    bnez a0, .LBB8_2
783; RV64IDZFH-NEXT:  # %bb.1: # %start
784; RV64IDZFH-NEXT:    li a0, 0
785; RV64IDZFH-NEXT:    ret
786; RV64IDZFH-NEXT:  .LBB8_2:
787; RV64IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
788; RV64IDZFH-NEXT:    ret
789;
790; RV32I-LABEL: fcvt_wu_h_sat:
791; RV32I:       # %bb.0: # %start
792; RV32I-NEXT:    addi sp, sp, -16
793; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
794; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
795; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
796; RV32I-NEXT:    sw s2, 0(sp) # 4-byte Folded Spill
797; RV32I-NEXT:    slli a0, a0, 16
798; RV32I-NEXT:    srli a0, a0, 16
799; RV32I-NEXT:    call __gnu_h2f_ieee@plt
800; RV32I-NEXT:    mv s0, a0
801; RV32I-NEXT:    li a1, 0
802; RV32I-NEXT:    call __gesf2@plt
803; RV32I-NEXT:    mv s1, a0
804; RV32I-NEXT:    mv a0, s0
805; RV32I-NEXT:    call __fixunssfsi@plt
806; RV32I-NEXT:    li s2, 0
807; RV32I-NEXT:    bltz s1, .LBB8_2
808; RV32I-NEXT:  # %bb.1: # %start
809; RV32I-NEXT:    mv s2, a0
810; RV32I-NEXT:  .LBB8_2: # %start
811; RV32I-NEXT:    lui a0, 325632
812; RV32I-NEXT:    addi a1, a0, -1
813; RV32I-NEXT:    mv a0, s0
814; RV32I-NEXT:    call __gtsf2@plt
815; RV32I-NEXT:    mv a1, a0
816; RV32I-NEXT:    li a0, -1
817; RV32I-NEXT:    bgtz a1, .LBB8_4
818; RV32I-NEXT:  # %bb.3: # %start
819; RV32I-NEXT:    mv a0, s2
820; RV32I-NEXT:  .LBB8_4: # %start
821; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
822; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
823; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
824; RV32I-NEXT:    lw s2, 0(sp) # 4-byte Folded Reload
825; RV32I-NEXT:    addi sp, sp, 16
826; RV32I-NEXT:    ret
827;
828; RV64I-LABEL: fcvt_wu_h_sat:
829; RV64I:       # %bb.0: # %start
830; RV64I-NEXT:    addi sp, sp, -32
831; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
832; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
833; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
834; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
835; RV64I-NEXT:    slli a0, a0, 48
836; RV64I-NEXT:    srli a0, a0, 48
837; RV64I-NEXT:    call __gnu_h2f_ieee@plt
838; RV64I-NEXT:    mv s0, a0
839; RV64I-NEXT:    li a1, 0
840; RV64I-NEXT:    call __gesf2@plt
841; RV64I-NEXT:    mv s2, a0
842; RV64I-NEXT:    mv a0, s0
843; RV64I-NEXT:    call __fixunssfdi@plt
844; RV64I-NEXT:    li s1, 0
845; RV64I-NEXT:    bltz s2, .LBB8_2
846; RV64I-NEXT:  # %bb.1: # %start
847; RV64I-NEXT:    mv s1, a0
848; RV64I-NEXT:  .LBB8_2: # %start
849; RV64I-NEXT:    lui a0, 325632
850; RV64I-NEXT:    addiw a1, a0, -1
851; RV64I-NEXT:    mv a0, s0
852; RV64I-NEXT:    call __gtsf2@plt
853; RV64I-NEXT:    blez a0, .LBB8_4
854; RV64I-NEXT:  # %bb.3:
855; RV64I-NEXT:    li a0, -1
856; RV64I-NEXT:    srli s1, a0, 32
857; RV64I-NEXT:  .LBB8_4: # %start
858; RV64I-NEXT:    mv a0, s1
859; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
860; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
861; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
862; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
863; RV64I-NEXT:    addi sp, sp, 32
864; RV64I-NEXT:    ret
865start:
866  %0 = tail call i32 @llvm.fptoui.sat.i32.f16(half %a)
867  ret i32 %0
868}
869declare i32 @llvm.fptoui.sat.i32.f16(half)
870
871define i64 @fcvt_l_h(half %a) nounwind {
872; RV32IZFH-LABEL: fcvt_l_h:
873; RV32IZFH:       # %bb.0:
874; RV32IZFH-NEXT:    addi sp, sp, -16
875; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
876; RV32IZFH-NEXT:    call __fixhfdi@plt
877; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
878; RV32IZFH-NEXT:    addi sp, sp, 16
879; RV32IZFH-NEXT:    ret
880;
881; RV64IZFH-LABEL: fcvt_l_h:
882; RV64IZFH:       # %bb.0:
883; RV64IZFH-NEXT:    fcvt.l.h a0, fa0, rtz
884; RV64IZFH-NEXT:    ret
885;
886; RV32IDZFH-LABEL: fcvt_l_h:
887; RV32IDZFH:       # %bb.0:
888; RV32IDZFH-NEXT:    addi sp, sp, -16
889; RV32IDZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
890; RV32IDZFH-NEXT:    call __fixhfdi@plt
891; RV32IDZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
892; RV32IDZFH-NEXT:    addi sp, sp, 16
893; RV32IDZFH-NEXT:    ret
894;
895; RV64IDZFH-LABEL: fcvt_l_h:
896; RV64IDZFH:       # %bb.0:
897; RV64IDZFH-NEXT:    fcvt.l.h a0, fa0, rtz
898; RV64IDZFH-NEXT:    ret
899;
900; RV32I-LABEL: fcvt_l_h:
901; RV32I:       # %bb.0:
902; RV32I-NEXT:    addi sp, sp, -16
903; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
904; RV32I-NEXT:    slli a0, a0, 16
905; RV32I-NEXT:    srli a0, a0, 16
906; RV32I-NEXT:    call __gnu_h2f_ieee@plt
907; RV32I-NEXT:    call __fixsfdi@plt
908; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
909; RV32I-NEXT:    addi sp, sp, 16
910; RV32I-NEXT:    ret
911;
912; RV64I-LABEL: fcvt_l_h:
913; RV64I:       # %bb.0:
914; RV64I-NEXT:    addi sp, sp, -16
915; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
916; RV64I-NEXT:    slli a0, a0, 48
917; RV64I-NEXT:    srli a0, a0, 48
918; RV64I-NEXT:    call __gnu_h2f_ieee@plt
919; RV64I-NEXT:    call __fixsfdi@plt
920; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
921; RV64I-NEXT:    addi sp, sp, 16
922; RV64I-NEXT:    ret
923  %1 = fptosi half %a to i64
924  ret i64 %1
925}
926
927define i64 @fcvt_l_h_sat(half %a) nounwind {
928; RV32IZFH-LABEL: fcvt_l_h_sat:
929; RV32IZFH:       # %bb.0: # %start
930; RV32IZFH-NEXT:    addi sp, sp, -16
931; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
932; RV32IZFH-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
933; RV32IZFH-NEXT:    fsw fs0, 4(sp) # 4-byte Folded Spill
934; RV32IZFH-NEXT:    lui a0, %hi(.LCPI10_0)
935; RV32IZFH-NEXT:    flw ft0, %lo(.LCPI10_0)(a0)
936; RV32IZFH-NEXT:    fcvt.s.h fs0, fa0
937; RV32IZFH-NEXT:    fle.s s0, ft0, fs0
938; RV32IZFH-NEXT:    fmv.s fa0, fs0
939; RV32IZFH-NEXT:    call __fixsfdi@plt
940; RV32IZFH-NEXT:    mv a2, a0
941; RV32IZFH-NEXT:    bnez s0, .LBB10_2
942; RV32IZFH-NEXT:  # %bb.1: # %start
943; RV32IZFH-NEXT:    li a2, 0
944; RV32IZFH-NEXT:  .LBB10_2: # %start
945; RV32IZFH-NEXT:    lui a0, %hi(.LCPI10_1)
946; RV32IZFH-NEXT:    flw ft0, %lo(.LCPI10_1)(a0)
947; RV32IZFH-NEXT:    flt.s a3, ft0, fs0
948; RV32IZFH-NEXT:    li a0, -1
949; RV32IZFH-NEXT:    beqz a3, .LBB10_9
950; RV32IZFH-NEXT:  # %bb.3: # %start
951; RV32IZFH-NEXT:    feq.s a2, fs0, fs0
952; RV32IZFH-NEXT:    beqz a2, .LBB10_10
953; RV32IZFH-NEXT:  .LBB10_4: # %start
954; RV32IZFH-NEXT:    lui a4, 524288
955; RV32IZFH-NEXT:    beqz s0, .LBB10_11
956; RV32IZFH-NEXT:  .LBB10_5: # %start
957; RV32IZFH-NEXT:    bnez a3, .LBB10_12
958; RV32IZFH-NEXT:  .LBB10_6: # %start
959; RV32IZFH-NEXT:    bnez a2, .LBB10_8
960; RV32IZFH-NEXT:  .LBB10_7: # %start
961; RV32IZFH-NEXT:    li a1, 0
962; RV32IZFH-NEXT:  .LBB10_8: # %start
963; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
964; RV32IZFH-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
965; RV32IZFH-NEXT:    flw fs0, 4(sp) # 4-byte Folded Reload
966; RV32IZFH-NEXT:    addi sp, sp, 16
967; RV32IZFH-NEXT:    ret
968; RV32IZFH-NEXT:  .LBB10_9: # %start
969; RV32IZFH-NEXT:    mv a0, a2
970; RV32IZFH-NEXT:    feq.s a2, fs0, fs0
971; RV32IZFH-NEXT:    bnez a2, .LBB10_4
972; RV32IZFH-NEXT:  .LBB10_10: # %start
973; RV32IZFH-NEXT:    li a0, 0
974; RV32IZFH-NEXT:    lui a4, 524288
975; RV32IZFH-NEXT:    bnez s0, .LBB10_5
976; RV32IZFH-NEXT:  .LBB10_11: # %start
977; RV32IZFH-NEXT:    lui a1, 524288
978; RV32IZFH-NEXT:    beqz a3, .LBB10_6
979; RV32IZFH-NEXT:  .LBB10_12:
980; RV32IZFH-NEXT:    addi a1, a4, -1
981; RV32IZFH-NEXT:    beqz a2, .LBB10_7
982; RV32IZFH-NEXT:    j .LBB10_8
983;
984; RV64IZFH-LABEL: fcvt_l_h_sat:
985; RV64IZFH:       # %bb.0: # %start
986; RV64IZFH-NEXT:    feq.h a0, fa0, fa0
987; RV64IZFH-NEXT:    bnez a0, .LBB10_2
988; RV64IZFH-NEXT:  # %bb.1: # %start
989; RV64IZFH-NEXT:    li a0, 0
990; RV64IZFH-NEXT:    ret
991; RV64IZFH-NEXT:  .LBB10_2:
992; RV64IZFH-NEXT:    fcvt.l.h a0, fa0, rtz
993; RV64IZFH-NEXT:    ret
994;
995; RV32IDZFH-LABEL: fcvt_l_h_sat:
996; RV32IDZFH:       # %bb.0: # %start
997; RV32IDZFH-NEXT:    addi sp, sp, -16
998; RV32IDZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
999; RV32IDZFH-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
1000; RV32IDZFH-NEXT:    fsd fs0, 0(sp) # 8-byte Folded Spill
1001; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI10_0)
1002; RV32IDZFH-NEXT:    flw ft0, %lo(.LCPI10_0)(a0)
1003; RV32IDZFH-NEXT:    fcvt.s.h fs0, fa0
1004; RV32IDZFH-NEXT:    fle.s s0, ft0, fs0
1005; RV32IDZFH-NEXT:    fmv.s fa0, fs0
1006; RV32IDZFH-NEXT:    call __fixsfdi@plt
1007; RV32IDZFH-NEXT:    mv a2, a0
1008; RV32IDZFH-NEXT:    bnez s0, .LBB10_2
1009; RV32IDZFH-NEXT:  # %bb.1: # %start
1010; RV32IDZFH-NEXT:    li a2, 0
1011; RV32IDZFH-NEXT:  .LBB10_2: # %start
1012; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI10_1)
1013; RV32IDZFH-NEXT:    flw ft0, %lo(.LCPI10_1)(a0)
1014; RV32IDZFH-NEXT:    flt.s a3, ft0, fs0
1015; RV32IDZFH-NEXT:    li a0, -1
1016; RV32IDZFH-NEXT:    beqz a3, .LBB10_9
1017; RV32IDZFH-NEXT:  # %bb.3: # %start
1018; RV32IDZFH-NEXT:    feq.s a2, fs0, fs0
1019; RV32IDZFH-NEXT:    beqz a2, .LBB10_10
1020; RV32IDZFH-NEXT:  .LBB10_4: # %start
1021; RV32IDZFH-NEXT:    lui a4, 524288
1022; RV32IDZFH-NEXT:    beqz s0, .LBB10_11
1023; RV32IDZFH-NEXT:  .LBB10_5: # %start
1024; RV32IDZFH-NEXT:    bnez a3, .LBB10_12
1025; RV32IDZFH-NEXT:  .LBB10_6: # %start
1026; RV32IDZFH-NEXT:    bnez a2, .LBB10_8
1027; RV32IDZFH-NEXT:  .LBB10_7: # %start
1028; RV32IDZFH-NEXT:    li a1, 0
1029; RV32IDZFH-NEXT:  .LBB10_8: # %start
1030; RV32IDZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1031; RV32IDZFH-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
1032; RV32IDZFH-NEXT:    fld fs0, 0(sp) # 8-byte Folded Reload
1033; RV32IDZFH-NEXT:    addi sp, sp, 16
1034; RV32IDZFH-NEXT:    ret
1035; RV32IDZFH-NEXT:  .LBB10_9: # %start
1036; RV32IDZFH-NEXT:    mv a0, a2
1037; RV32IDZFH-NEXT:    feq.s a2, fs0, fs0
1038; RV32IDZFH-NEXT:    bnez a2, .LBB10_4
1039; RV32IDZFH-NEXT:  .LBB10_10: # %start
1040; RV32IDZFH-NEXT:    li a0, 0
1041; RV32IDZFH-NEXT:    lui a4, 524288
1042; RV32IDZFH-NEXT:    bnez s0, .LBB10_5
1043; RV32IDZFH-NEXT:  .LBB10_11: # %start
1044; RV32IDZFH-NEXT:    lui a1, 524288
1045; RV32IDZFH-NEXT:    beqz a3, .LBB10_6
1046; RV32IDZFH-NEXT:  .LBB10_12:
1047; RV32IDZFH-NEXT:    addi a1, a4, -1
1048; RV32IDZFH-NEXT:    beqz a2, .LBB10_7
1049; RV32IDZFH-NEXT:    j .LBB10_8
1050;
1051; RV64IDZFH-LABEL: fcvt_l_h_sat:
1052; RV64IDZFH:       # %bb.0: # %start
1053; RV64IDZFH-NEXT:    feq.h a0, fa0, fa0
1054; RV64IDZFH-NEXT:    bnez a0, .LBB10_2
1055; RV64IDZFH-NEXT:  # %bb.1: # %start
1056; RV64IDZFH-NEXT:    li a0, 0
1057; RV64IDZFH-NEXT:    ret
1058; RV64IDZFH-NEXT:  .LBB10_2:
1059; RV64IDZFH-NEXT:    fcvt.l.h a0, fa0, rtz
1060; RV64IDZFH-NEXT:    ret
1061;
1062; RV32I-LABEL: fcvt_l_h_sat:
1063; RV32I:       # %bb.0: # %start
1064; RV32I-NEXT:    addi sp, sp, -32
1065; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
1066; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
1067; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
1068; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
1069; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
1070; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
1071; RV32I-NEXT:    sw s5, 4(sp) # 4-byte Folded Spill
1072; RV32I-NEXT:    sw s6, 0(sp) # 4-byte Folded Spill
1073; RV32I-NEXT:    slli a0, a0, 16
1074; RV32I-NEXT:    srli a0, a0, 16
1075; RV32I-NEXT:    call __gnu_h2f_ieee@plt
1076; RV32I-NEXT:    mv s0, a0
1077; RV32I-NEXT:    lui a1, 913408
1078; RV32I-NEXT:    call __gesf2@plt
1079; RV32I-NEXT:    mv s3, a0
1080; RV32I-NEXT:    mv a0, s0
1081; RV32I-NEXT:    call __fixsfdi@plt
1082; RV32I-NEXT:    mv s2, a1
1083; RV32I-NEXT:    li s1, 0
1084; RV32I-NEXT:    li s5, 0
1085; RV32I-NEXT:    bltz s3, .LBB10_2
1086; RV32I-NEXT:  # %bb.1: # %start
1087; RV32I-NEXT:    mv s5, a0
1088; RV32I-NEXT:  .LBB10_2: # %start
1089; RV32I-NEXT:    lui a0, 389120
1090; RV32I-NEXT:    addi s4, a0, -1
1091; RV32I-NEXT:    mv a0, s0
1092; RV32I-NEXT:    mv a1, s4
1093; RV32I-NEXT:    call __gtsf2@plt
1094; RV32I-NEXT:    li s6, -1
1095; RV32I-NEXT:    blt s1, a0, .LBB10_4
1096; RV32I-NEXT:  # %bb.3: # %start
1097; RV32I-NEXT:    mv s6, s5
1098; RV32I-NEXT:  .LBB10_4: # %start
1099; RV32I-NEXT:    mv a0, s0
1100; RV32I-NEXT:    mv a1, s0
1101; RV32I-NEXT:    call __unordsf2@plt
1102; RV32I-NEXT:    mv s3, s1
1103; RV32I-NEXT:    bne a0, s1, .LBB10_6
1104; RV32I-NEXT:  # %bb.5: # %start
1105; RV32I-NEXT:    mv s3, s6
1106; RV32I-NEXT:  .LBB10_6: # %start
1107; RV32I-NEXT:    lui a1, 913408
1108; RV32I-NEXT:    mv a0, s0
1109; RV32I-NEXT:    call __gesf2@plt
1110; RV32I-NEXT:    lui s6, 524288
1111; RV32I-NEXT:    lui s5, 524288
1112; RV32I-NEXT:    blt a0, s1, .LBB10_8
1113; RV32I-NEXT:  # %bb.7: # %start
1114; RV32I-NEXT:    mv s5, s2
1115; RV32I-NEXT:  .LBB10_8: # %start
1116; RV32I-NEXT:    mv a0, s0
1117; RV32I-NEXT:    mv a1, s4
1118; RV32I-NEXT:    call __gtsf2@plt
1119; RV32I-NEXT:    bge s1, a0, .LBB10_10
1120; RV32I-NEXT:  # %bb.9:
1121; RV32I-NEXT:    addi s5, s6, -1
1122; RV32I-NEXT:  .LBB10_10: # %start
1123; RV32I-NEXT:    mv a0, s0
1124; RV32I-NEXT:    mv a1, s0
1125; RV32I-NEXT:    call __unordsf2@plt
1126; RV32I-NEXT:    bne a0, s1, .LBB10_12
1127; RV32I-NEXT:  # %bb.11: # %start
1128; RV32I-NEXT:    mv s1, s5
1129; RV32I-NEXT:  .LBB10_12: # %start
1130; RV32I-NEXT:    mv a0, s3
1131; RV32I-NEXT:    mv a1, s1
1132; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
1133; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
1134; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
1135; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
1136; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
1137; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
1138; RV32I-NEXT:    lw s5, 4(sp) # 4-byte Folded Reload
1139; RV32I-NEXT:    lw s6, 0(sp) # 4-byte Folded Reload
1140; RV32I-NEXT:    addi sp, sp, 32
1141; RV32I-NEXT:    ret
1142;
1143; RV64I-LABEL: fcvt_l_h_sat:
1144; RV64I:       # %bb.0: # %start
1145; RV64I-NEXT:    addi sp, sp, -48
1146; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
1147; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
1148; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
1149; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
1150; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
1151; RV64I-NEXT:    sd s4, 0(sp) # 8-byte Folded Spill
1152; RV64I-NEXT:    slli a0, a0, 48
1153; RV64I-NEXT:    srli a0, a0, 48
1154; RV64I-NEXT:    call __gnu_h2f_ieee@plt
1155; RV64I-NEXT:    mv s0, a0
1156; RV64I-NEXT:    lui a1, 913408
1157; RV64I-NEXT:    call __gesf2@plt
1158; RV64I-NEXT:    mv s3, a0
1159; RV64I-NEXT:    mv a0, s0
1160; RV64I-NEXT:    call __fixsfdi@plt
1161; RV64I-NEXT:    li s1, 0
1162; RV64I-NEXT:    li s4, -1
1163; RV64I-NEXT:    bltz s3, .LBB10_2
1164; RV64I-NEXT:  # %bb.1: # %start
1165; RV64I-NEXT:    mv s2, a0
1166; RV64I-NEXT:    j .LBB10_3
1167; RV64I-NEXT:  .LBB10_2:
1168; RV64I-NEXT:    slli s2, s4, 63
1169; RV64I-NEXT:  .LBB10_3: # %start
1170; RV64I-NEXT:    lui a0, 389120
1171; RV64I-NEXT:    addiw a1, a0, -1
1172; RV64I-NEXT:    mv a0, s0
1173; RV64I-NEXT:    call __gtsf2@plt
1174; RV64I-NEXT:    bge s1, a0, .LBB10_5
1175; RV64I-NEXT:  # %bb.4:
1176; RV64I-NEXT:    srli s2, s4, 1
1177; RV64I-NEXT:  .LBB10_5: # %start
1178; RV64I-NEXT:    mv a0, s0
1179; RV64I-NEXT:    mv a1, s0
1180; RV64I-NEXT:    call __unordsf2@plt
1181; RV64I-NEXT:    bne a0, s1, .LBB10_7
1182; RV64I-NEXT:  # %bb.6: # %start
1183; RV64I-NEXT:    mv s1, s2
1184; RV64I-NEXT:  .LBB10_7: # %start
1185; RV64I-NEXT:    mv a0, s1
1186; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
1187; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
1188; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
1189; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
1190; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
1191; RV64I-NEXT:    ld s4, 0(sp) # 8-byte Folded Reload
1192; RV64I-NEXT:    addi sp, sp, 48
1193; RV64I-NEXT:    ret
1194start:
1195  %0 = tail call i64 @llvm.fptosi.sat.i64.f16(half %a)
1196  ret i64 %0
1197}
1198declare i64 @llvm.fptosi.sat.i64.f16(half)
1199
1200define i64 @fcvt_lu_h(half %a) nounwind {
1201; RV32IZFH-LABEL: fcvt_lu_h:
1202; RV32IZFH:       # %bb.0:
1203; RV32IZFH-NEXT:    addi sp, sp, -16
1204; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1205; RV32IZFH-NEXT:    call __fixunshfdi@plt
1206; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1207; RV32IZFH-NEXT:    addi sp, sp, 16
1208; RV32IZFH-NEXT:    ret
1209;
1210; RV64IZFH-LABEL: fcvt_lu_h:
1211; RV64IZFH:       # %bb.0:
1212; RV64IZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
1213; RV64IZFH-NEXT:    ret
1214;
1215; RV32IDZFH-LABEL: fcvt_lu_h:
1216; RV32IDZFH:       # %bb.0:
1217; RV32IDZFH-NEXT:    addi sp, sp, -16
1218; RV32IDZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1219; RV32IDZFH-NEXT:    call __fixunshfdi@plt
1220; RV32IDZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1221; RV32IDZFH-NEXT:    addi sp, sp, 16
1222; RV32IDZFH-NEXT:    ret
1223;
1224; RV64IDZFH-LABEL: fcvt_lu_h:
1225; RV64IDZFH:       # %bb.0:
1226; RV64IDZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
1227; RV64IDZFH-NEXT:    ret
1228;
1229; RV32I-LABEL: fcvt_lu_h:
1230; RV32I:       # %bb.0:
1231; RV32I-NEXT:    addi sp, sp, -16
1232; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1233; RV32I-NEXT:    slli a0, a0, 16
1234; RV32I-NEXT:    srli a0, a0, 16
1235; RV32I-NEXT:    call __gnu_h2f_ieee@plt
1236; RV32I-NEXT:    call __fixunssfdi@plt
1237; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1238; RV32I-NEXT:    addi sp, sp, 16
1239; RV32I-NEXT:    ret
1240;
1241; RV64I-LABEL: fcvt_lu_h:
1242; RV64I:       # %bb.0:
1243; RV64I-NEXT:    addi sp, sp, -16
1244; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1245; RV64I-NEXT:    slli a0, a0, 48
1246; RV64I-NEXT:    srli a0, a0, 48
1247; RV64I-NEXT:    call __gnu_h2f_ieee@plt
1248; RV64I-NEXT:    call __fixunssfdi@plt
1249; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1250; RV64I-NEXT:    addi sp, sp, 16
1251; RV64I-NEXT:    ret
1252  %1 = fptoui half %a to i64
1253  ret i64 %1
1254}
1255
1256define i64 @fcvt_lu_h_sat(half %a) nounwind {
1257; RV32IZFH-LABEL: fcvt_lu_h_sat:
1258; RV32IZFH:       # %bb.0: # %start
1259; RV32IZFH-NEXT:    addi sp, sp, -16
1260; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1261; RV32IZFH-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
1262; RV32IZFH-NEXT:    fsw fs0, 4(sp) # 4-byte Folded Spill
1263; RV32IZFH-NEXT:    fcvt.s.h fs0, fa0
1264; RV32IZFH-NEXT:    fmv.w.x ft0, zero
1265; RV32IZFH-NEXT:    fle.s s0, ft0, fs0
1266; RV32IZFH-NEXT:    fmv.s fa0, fs0
1267; RV32IZFH-NEXT:    call __fixunssfdi@plt
1268; RV32IZFH-NEXT:    mv a3, a0
1269; RV32IZFH-NEXT:    bnez s0, .LBB12_2
1270; RV32IZFH-NEXT:  # %bb.1: # %start
1271; RV32IZFH-NEXT:    li a3, 0
1272; RV32IZFH-NEXT:  .LBB12_2: # %start
1273; RV32IZFH-NEXT:    lui a0, %hi(.LCPI12_0)
1274; RV32IZFH-NEXT:    flw ft0, %lo(.LCPI12_0)(a0)
1275; RV32IZFH-NEXT:    flt.s a4, ft0, fs0
1276; RV32IZFH-NEXT:    li a2, -1
1277; RV32IZFH-NEXT:    li a0, -1
1278; RV32IZFH-NEXT:    beqz a4, .LBB12_7
1279; RV32IZFH-NEXT:  # %bb.3: # %start
1280; RV32IZFH-NEXT:    beqz s0, .LBB12_8
1281; RV32IZFH-NEXT:  .LBB12_4: # %start
1282; RV32IZFH-NEXT:    bnez a4, .LBB12_6
1283; RV32IZFH-NEXT:  .LBB12_5: # %start
1284; RV32IZFH-NEXT:    mv a2, a1
1285; RV32IZFH-NEXT:  .LBB12_6: # %start
1286; RV32IZFH-NEXT:    mv a1, a2
1287; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1288; RV32IZFH-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
1289; RV32IZFH-NEXT:    flw fs0, 4(sp) # 4-byte Folded Reload
1290; RV32IZFH-NEXT:    addi sp, sp, 16
1291; RV32IZFH-NEXT:    ret
1292; RV32IZFH-NEXT:  .LBB12_7: # %start
1293; RV32IZFH-NEXT:    mv a0, a3
1294; RV32IZFH-NEXT:    bnez s0, .LBB12_4
1295; RV32IZFH-NEXT:  .LBB12_8: # %start
1296; RV32IZFH-NEXT:    li a1, 0
1297; RV32IZFH-NEXT:    beqz a4, .LBB12_5
1298; RV32IZFH-NEXT:    j .LBB12_6
1299;
1300; RV64IZFH-LABEL: fcvt_lu_h_sat:
1301; RV64IZFH:       # %bb.0: # %start
1302; RV64IZFH-NEXT:    feq.h a0, fa0, fa0
1303; RV64IZFH-NEXT:    bnez a0, .LBB12_2
1304; RV64IZFH-NEXT:  # %bb.1: # %start
1305; RV64IZFH-NEXT:    li a0, 0
1306; RV64IZFH-NEXT:    ret
1307; RV64IZFH-NEXT:  .LBB12_2:
1308; RV64IZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
1309; RV64IZFH-NEXT:    ret
1310;
1311; RV32IDZFH-LABEL: fcvt_lu_h_sat:
1312; RV32IDZFH:       # %bb.0: # %start
1313; RV32IDZFH-NEXT:    addi sp, sp, -16
1314; RV32IDZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1315; RV32IDZFH-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
1316; RV32IDZFH-NEXT:    fsd fs0, 0(sp) # 8-byte Folded Spill
1317; RV32IDZFH-NEXT:    fcvt.s.h fs0, fa0
1318; RV32IDZFH-NEXT:    fmv.w.x ft0, zero
1319; RV32IDZFH-NEXT:    fle.s s0, ft0, fs0
1320; RV32IDZFH-NEXT:    fmv.s fa0, fs0
1321; RV32IDZFH-NEXT:    call __fixunssfdi@plt
1322; RV32IDZFH-NEXT:    mv a3, a0
1323; RV32IDZFH-NEXT:    bnez s0, .LBB12_2
1324; RV32IDZFH-NEXT:  # %bb.1: # %start
1325; RV32IDZFH-NEXT:    li a3, 0
1326; RV32IDZFH-NEXT:  .LBB12_2: # %start
1327; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI12_0)
1328; RV32IDZFH-NEXT:    flw ft0, %lo(.LCPI12_0)(a0)
1329; RV32IDZFH-NEXT:    flt.s a4, ft0, fs0
1330; RV32IDZFH-NEXT:    li a2, -1
1331; RV32IDZFH-NEXT:    li a0, -1
1332; RV32IDZFH-NEXT:    beqz a4, .LBB12_7
1333; RV32IDZFH-NEXT:  # %bb.3: # %start
1334; RV32IDZFH-NEXT:    beqz s0, .LBB12_8
1335; RV32IDZFH-NEXT:  .LBB12_4: # %start
1336; RV32IDZFH-NEXT:    bnez a4, .LBB12_6
1337; RV32IDZFH-NEXT:  .LBB12_5: # %start
1338; RV32IDZFH-NEXT:    mv a2, a1
1339; RV32IDZFH-NEXT:  .LBB12_6: # %start
1340; RV32IDZFH-NEXT:    mv a1, a2
1341; RV32IDZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1342; RV32IDZFH-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
1343; RV32IDZFH-NEXT:    fld fs0, 0(sp) # 8-byte Folded Reload
1344; RV32IDZFH-NEXT:    addi sp, sp, 16
1345; RV32IDZFH-NEXT:    ret
1346; RV32IDZFH-NEXT:  .LBB12_7: # %start
1347; RV32IDZFH-NEXT:    mv a0, a3
1348; RV32IDZFH-NEXT:    bnez s0, .LBB12_4
1349; RV32IDZFH-NEXT:  .LBB12_8: # %start
1350; RV32IDZFH-NEXT:    li a1, 0
1351; RV32IDZFH-NEXT:    beqz a4, .LBB12_5
1352; RV32IDZFH-NEXT:    j .LBB12_6
1353;
1354; RV64IDZFH-LABEL: fcvt_lu_h_sat:
1355; RV64IDZFH:       # %bb.0: # %start
1356; RV64IDZFH-NEXT:    feq.h a0, fa0, fa0
1357; RV64IDZFH-NEXT:    bnez a0, .LBB12_2
1358; RV64IDZFH-NEXT:  # %bb.1: # %start
1359; RV64IDZFH-NEXT:    li a0, 0
1360; RV64IDZFH-NEXT:    ret
1361; RV64IDZFH-NEXT:  .LBB12_2:
1362; RV64IDZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
1363; RV64IDZFH-NEXT:    ret
1364;
1365; RV32I-LABEL: fcvt_lu_h_sat:
1366; RV32I:       # %bb.0: # %start
1367; RV32I-NEXT:    addi sp, sp, -32
1368; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
1369; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
1370; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
1371; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
1372; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
1373; RV32I-NEXT:    sw s4, 8(sp) # 4-byte Folded Spill
1374; RV32I-NEXT:    sw s5, 4(sp) # 4-byte Folded Spill
1375; RV32I-NEXT:    slli a0, a0, 16
1376; RV32I-NEXT:    srli a0, a0, 16
1377; RV32I-NEXT:    call __gnu_h2f_ieee@plt
1378; RV32I-NEXT:    mv s0, a0
1379; RV32I-NEXT:    li a1, 0
1380; RV32I-NEXT:    call __gesf2@plt
1381; RV32I-NEXT:    mv s1, a0
1382; RV32I-NEXT:    mv a0, s0
1383; RV32I-NEXT:    call __fixunssfdi@plt
1384; RV32I-NEXT:    mv s2, a1
1385; RV32I-NEXT:    li s5, 0
1386; RV32I-NEXT:    bltz s1, .LBB12_2
1387; RV32I-NEXT:  # %bb.1: # %start
1388; RV32I-NEXT:    mv s5, a0
1389; RV32I-NEXT:  .LBB12_2: # %start
1390; RV32I-NEXT:    lui a0, 391168
1391; RV32I-NEXT:    addi s1, a0, -1
1392; RV32I-NEXT:    mv a0, s0
1393; RV32I-NEXT:    mv a1, s1
1394; RV32I-NEXT:    call __gtsf2@plt
1395; RV32I-NEXT:    li s3, -1
1396; RV32I-NEXT:    li s4, -1
1397; RV32I-NEXT:    bgtz a0, .LBB12_4
1398; RV32I-NEXT:  # %bb.3: # %start
1399; RV32I-NEXT:    mv s4, s5
1400; RV32I-NEXT:  .LBB12_4: # %start
1401; RV32I-NEXT:    mv a0, s0
1402; RV32I-NEXT:    li a1, 0
1403; RV32I-NEXT:    call __gesf2@plt
1404; RV32I-NEXT:    li s5, 0
1405; RV32I-NEXT:    bltz a0, .LBB12_6
1406; RV32I-NEXT:  # %bb.5: # %start
1407; RV32I-NEXT:    mv s5, s2
1408; RV32I-NEXT:  .LBB12_6: # %start
1409; RV32I-NEXT:    mv a0, s0
1410; RV32I-NEXT:    mv a1, s1
1411; RV32I-NEXT:    call __gtsf2@plt
1412; RV32I-NEXT:    bgtz a0, .LBB12_8
1413; RV32I-NEXT:  # %bb.7: # %start
1414; RV32I-NEXT:    mv s3, s5
1415; RV32I-NEXT:  .LBB12_8: # %start
1416; RV32I-NEXT:    mv a0, s4
1417; RV32I-NEXT:    mv a1, s3
1418; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
1419; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
1420; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
1421; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
1422; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
1423; RV32I-NEXT:    lw s4, 8(sp) # 4-byte Folded Reload
1424; RV32I-NEXT:    lw s5, 4(sp) # 4-byte Folded Reload
1425; RV32I-NEXT:    addi sp, sp, 32
1426; RV32I-NEXT:    ret
1427;
1428; RV64I-LABEL: fcvt_lu_h_sat:
1429; RV64I:       # %bb.0: # %start
1430; RV64I-NEXT:    addi sp, sp, -32
1431; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
1432; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
1433; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
1434; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
1435; RV64I-NEXT:    slli a0, a0, 48
1436; RV64I-NEXT:    srli a0, a0, 48
1437; RV64I-NEXT:    call __gnu_h2f_ieee@plt
1438; RV64I-NEXT:    mv s0, a0
1439; RV64I-NEXT:    li a1, 0
1440; RV64I-NEXT:    call __gesf2@plt
1441; RV64I-NEXT:    mv s1, a0
1442; RV64I-NEXT:    mv a0, s0
1443; RV64I-NEXT:    call __fixunssfdi@plt
1444; RV64I-NEXT:    li s2, 0
1445; RV64I-NEXT:    bltz s1, .LBB12_2
1446; RV64I-NEXT:  # %bb.1: # %start
1447; RV64I-NEXT:    mv s2, a0
1448; RV64I-NEXT:  .LBB12_2: # %start
1449; RV64I-NEXT:    lui a0, 391168
1450; RV64I-NEXT:    addiw a1, a0, -1
1451; RV64I-NEXT:    mv a0, s0
1452; RV64I-NEXT:    call __gtsf2@plt
1453; RV64I-NEXT:    mv a1, a0
1454; RV64I-NEXT:    li a0, -1
1455; RV64I-NEXT:    bgtz a1, .LBB12_4
1456; RV64I-NEXT:  # %bb.3: # %start
1457; RV64I-NEXT:    mv a0, s2
1458; RV64I-NEXT:  .LBB12_4: # %start
1459; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
1460; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
1461; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
1462; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
1463; RV64I-NEXT:    addi sp, sp, 32
1464; RV64I-NEXT:    ret
1465start:
1466  %0 = tail call i64 @llvm.fptoui.sat.i64.f16(half %a)
1467  ret i64 %0
1468}
1469declare i64 @llvm.fptoui.sat.i64.f16(half)
1470
1471define half @fcvt_h_si(i16 %a) nounwind {
1472; RV32IZFH-LABEL: fcvt_h_si:
1473; RV32IZFH:       # %bb.0:
1474; RV32IZFH-NEXT:    slli a0, a0, 16
1475; RV32IZFH-NEXT:    srai a0, a0, 16
1476; RV32IZFH-NEXT:    fcvt.h.w fa0, a0
1477; RV32IZFH-NEXT:    ret
1478;
1479; RV64IZFH-LABEL: fcvt_h_si:
1480; RV64IZFH:       # %bb.0:
1481; RV64IZFH-NEXT:    slli a0, a0, 48
1482; RV64IZFH-NEXT:    srai a0, a0, 48
1483; RV64IZFH-NEXT:    fcvt.h.w fa0, a0
1484; RV64IZFH-NEXT:    ret
1485;
1486; RV32IDZFH-LABEL: fcvt_h_si:
1487; RV32IDZFH:       # %bb.0:
1488; RV32IDZFH-NEXT:    slli a0, a0, 16
1489; RV32IDZFH-NEXT:    srai a0, a0, 16
1490; RV32IDZFH-NEXT:    fcvt.h.w fa0, a0
1491; RV32IDZFH-NEXT:    ret
1492;
1493; RV64IDZFH-LABEL: fcvt_h_si:
1494; RV64IDZFH:       # %bb.0:
1495; RV64IDZFH-NEXT:    slli a0, a0, 48
1496; RV64IDZFH-NEXT:    srai a0, a0, 48
1497; RV64IDZFH-NEXT:    fcvt.h.w fa0, a0
1498; RV64IDZFH-NEXT:    ret
1499;
1500; RV32I-LABEL: fcvt_h_si:
1501; RV32I:       # %bb.0:
1502; RV32I-NEXT:    addi sp, sp, -16
1503; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1504; RV32I-NEXT:    slli a0, a0, 16
1505; RV32I-NEXT:    srai a0, a0, 16
1506; RV32I-NEXT:    call __floatsisf@plt
1507; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1508; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1509; RV32I-NEXT:    addi sp, sp, 16
1510; RV32I-NEXT:    ret
1511;
1512; RV64I-LABEL: fcvt_h_si:
1513; RV64I:       # %bb.0:
1514; RV64I-NEXT:    addi sp, sp, -16
1515; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1516; RV64I-NEXT:    slli a0, a0, 48
1517; RV64I-NEXT:    srai a0, a0, 48
1518; RV64I-NEXT:    call __floatsisf@plt
1519; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1520; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1521; RV64I-NEXT:    addi sp, sp, 16
1522; RV64I-NEXT:    ret
1523  %1 = sitofp i16 %a to half
1524  ret half %1
1525}
1526
1527define half @fcvt_h_si_signext(i16 signext %a) nounwind {
1528; RV32IZFH-LABEL: fcvt_h_si_signext:
1529; RV32IZFH:       # %bb.0:
1530; RV32IZFH-NEXT:    fcvt.h.w fa0, a0
1531; RV32IZFH-NEXT:    ret
1532;
1533; RV64IZFH-LABEL: fcvt_h_si_signext:
1534; RV64IZFH:       # %bb.0:
1535; RV64IZFH-NEXT:    fcvt.h.w fa0, a0
1536; RV64IZFH-NEXT:    ret
1537;
1538; RV32IDZFH-LABEL: fcvt_h_si_signext:
1539; RV32IDZFH:       # %bb.0:
1540; RV32IDZFH-NEXT:    fcvt.h.w fa0, a0
1541; RV32IDZFH-NEXT:    ret
1542;
1543; RV64IDZFH-LABEL: fcvt_h_si_signext:
1544; RV64IDZFH:       # %bb.0:
1545; RV64IDZFH-NEXT:    fcvt.h.w fa0, a0
1546; RV64IDZFH-NEXT:    ret
1547;
1548; RV32I-LABEL: fcvt_h_si_signext:
1549; RV32I:       # %bb.0:
1550; RV32I-NEXT:    addi sp, sp, -16
1551; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1552; RV32I-NEXT:    call __floatsisf@plt
1553; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1554; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1555; RV32I-NEXT:    addi sp, sp, 16
1556; RV32I-NEXT:    ret
1557;
1558; RV64I-LABEL: fcvt_h_si_signext:
1559; RV64I:       # %bb.0:
1560; RV64I-NEXT:    addi sp, sp, -16
1561; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1562; RV64I-NEXT:    call __floatsisf@plt
1563; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1564; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1565; RV64I-NEXT:    addi sp, sp, 16
1566; RV64I-NEXT:    ret
1567  %1 = sitofp i16 %a to half
1568  ret half %1
1569}
1570
1571define half @fcvt_h_ui(i16 %a) nounwind {
1572; RV32IZFH-LABEL: fcvt_h_ui:
1573; RV32IZFH:       # %bb.0:
1574; RV32IZFH-NEXT:    slli a0, a0, 16
1575; RV32IZFH-NEXT:    srli a0, a0, 16
1576; RV32IZFH-NEXT:    fcvt.h.wu fa0, a0
1577; RV32IZFH-NEXT:    ret
1578;
1579; RV64IZFH-LABEL: fcvt_h_ui:
1580; RV64IZFH:       # %bb.0:
1581; RV64IZFH-NEXT:    slli a0, a0, 48
1582; RV64IZFH-NEXT:    srli a0, a0, 48
1583; RV64IZFH-NEXT:    fcvt.h.wu fa0, a0
1584; RV64IZFH-NEXT:    ret
1585;
1586; RV32IDZFH-LABEL: fcvt_h_ui:
1587; RV32IDZFH:       # %bb.0:
1588; RV32IDZFH-NEXT:    slli a0, a0, 16
1589; RV32IDZFH-NEXT:    srli a0, a0, 16
1590; RV32IDZFH-NEXT:    fcvt.h.wu fa0, a0
1591; RV32IDZFH-NEXT:    ret
1592;
1593; RV64IDZFH-LABEL: fcvt_h_ui:
1594; RV64IDZFH:       # %bb.0:
1595; RV64IDZFH-NEXT:    slli a0, a0, 48
1596; RV64IDZFH-NEXT:    srli a0, a0, 48
1597; RV64IDZFH-NEXT:    fcvt.h.wu fa0, a0
1598; RV64IDZFH-NEXT:    ret
1599;
1600; RV32I-LABEL: fcvt_h_ui:
1601; RV32I:       # %bb.0:
1602; RV32I-NEXT:    addi sp, sp, -16
1603; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1604; RV32I-NEXT:    slli a0, a0, 16
1605; RV32I-NEXT:    srli a0, a0, 16
1606; RV32I-NEXT:    call __floatunsisf@plt
1607; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1608; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1609; RV32I-NEXT:    addi sp, sp, 16
1610; RV32I-NEXT:    ret
1611;
1612; RV64I-LABEL: fcvt_h_ui:
1613; RV64I:       # %bb.0:
1614; RV64I-NEXT:    addi sp, sp, -16
1615; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1616; RV64I-NEXT:    slli a0, a0, 48
1617; RV64I-NEXT:    srli a0, a0, 48
1618; RV64I-NEXT:    call __floatunsisf@plt
1619; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1620; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1621; RV64I-NEXT:    addi sp, sp, 16
1622; RV64I-NEXT:    ret
1623  %1 = uitofp i16 %a to half
1624  ret half %1
1625}
1626
1627define half @fcvt_h_ui_zeroext(i16 zeroext %a) nounwind {
1628; RV32IZFH-LABEL: fcvt_h_ui_zeroext:
1629; RV32IZFH:       # %bb.0:
1630; RV32IZFH-NEXT:    fcvt.h.wu fa0, a0
1631; RV32IZFH-NEXT:    ret
1632;
1633; RV64IZFH-LABEL: fcvt_h_ui_zeroext:
1634; RV64IZFH:       # %bb.0:
1635; RV64IZFH-NEXT:    fcvt.h.wu fa0, a0
1636; RV64IZFH-NEXT:    ret
1637;
1638; RV32IDZFH-LABEL: fcvt_h_ui_zeroext:
1639; RV32IDZFH:       # %bb.0:
1640; RV32IDZFH-NEXT:    fcvt.h.wu fa0, a0
1641; RV32IDZFH-NEXT:    ret
1642;
1643; RV64IDZFH-LABEL: fcvt_h_ui_zeroext:
1644; RV64IDZFH:       # %bb.0:
1645; RV64IDZFH-NEXT:    fcvt.h.wu fa0, a0
1646; RV64IDZFH-NEXT:    ret
1647;
1648; RV32I-LABEL: fcvt_h_ui_zeroext:
1649; RV32I:       # %bb.0:
1650; RV32I-NEXT:    addi sp, sp, -16
1651; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1652; RV32I-NEXT:    call __floatunsisf@plt
1653; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1654; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1655; RV32I-NEXT:    addi sp, sp, 16
1656; RV32I-NEXT:    ret
1657;
1658; RV64I-LABEL: fcvt_h_ui_zeroext:
1659; RV64I:       # %bb.0:
1660; RV64I-NEXT:    addi sp, sp, -16
1661; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1662; RV64I-NEXT:    call __floatunsisf@plt
1663; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1664; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1665; RV64I-NEXT:    addi sp, sp, 16
1666; RV64I-NEXT:    ret
1667  %1 = uitofp i16 %a to half
1668  ret half %1
1669}
1670
1671define half @fcvt_h_w(i32 %a) nounwind {
1672; RV32IZFH-LABEL: fcvt_h_w:
1673; RV32IZFH:       # %bb.0:
1674; RV32IZFH-NEXT:    fcvt.h.w fa0, a0
1675; RV32IZFH-NEXT:    ret
1676;
1677; RV64IZFH-LABEL: fcvt_h_w:
1678; RV64IZFH:       # %bb.0:
1679; RV64IZFH-NEXT:    fcvt.h.w fa0, a0
1680; RV64IZFH-NEXT:    ret
1681;
1682; RV32IDZFH-LABEL: fcvt_h_w:
1683; RV32IDZFH:       # %bb.0:
1684; RV32IDZFH-NEXT:    fcvt.h.w fa0, a0
1685; RV32IDZFH-NEXT:    ret
1686;
1687; RV64IDZFH-LABEL: fcvt_h_w:
1688; RV64IDZFH:       # %bb.0:
1689; RV64IDZFH-NEXT:    fcvt.h.w fa0, a0
1690; RV64IDZFH-NEXT:    ret
1691;
1692; RV32I-LABEL: fcvt_h_w:
1693; RV32I:       # %bb.0:
1694; RV32I-NEXT:    addi sp, sp, -16
1695; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1696; RV32I-NEXT:    call __floatsisf@plt
1697; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1698; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1699; RV32I-NEXT:    addi sp, sp, 16
1700; RV32I-NEXT:    ret
1701;
1702; RV64I-LABEL: fcvt_h_w:
1703; RV64I:       # %bb.0:
1704; RV64I-NEXT:    addi sp, sp, -16
1705; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1706; RV64I-NEXT:    sext.w a0, a0
1707; RV64I-NEXT:    call __floatsisf@plt
1708; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1709; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1710; RV64I-NEXT:    addi sp, sp, 16
1711; RV64I-NEXT:    ret
1712  %1 = sitofp i32 %a to half
1713  ret half %1
1714}
1715
1716define half @fcvt_h_w_load(i32* %p) nounwind {
1717; RV32IZFH-LABEL: fcvt_h_w_load:
1718; RV32IZFH:       # %bb.0:
1719; RV32IZFH-NEXT:    lw a0, 0(a0)
1720; RV32IZFH-NEXT:    fcvt.h.w fa0, a0
1721; RV32IZFH-NEXT:    ret
1722;
1723; RV64IZFH-LABEL: fcvt_h_w_load:
1724; RV64IZFH:       # %bb.0:
1725; RV64IZFH-NEXT:    lw a0, 0(a0)
1726; RV64IZFH-NEXT:    fcvt.h.w fa0, a0
1727; RV64IZFH-NEXT:    ret
1728;
1729; RV32IDZFH-LABEL: fcvt_h_w_load:
1730; RV32IDZFH:       # %bb.0:
1731; RV32IDZFH-NEXT:    lw a0, 0(a0)
1732; RV32IDZFH-NEXT:    fcvt.h.w fa0, a0
1733; RV32IDZFH-NEXT:    ret
1734;
1735; RV64IDZFH-LABEL: fcvt_h_w_load:
1736; RV64IDZFH:       # %bb.0:
1737; RV64IDZFH-NEXT:    lw a0, 0(a0)
1738; RV64IDZFH-NEXT:    fcvt.h.w fa0, a0
1739; RV64IDZFH-NEXT:    ret
1740;
1741; RV32I-LABEL: fcvt_h_w_load:
1742; RV32I:       # %bb.0:
1743; RV32I-NEXT:    addi sp, sp, -16
1744; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1745; RV32I-NEXT:    lw a0, 0(a0)
1746; RV32I-NEXT:    call __floatsisf@plt
1747; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1748; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1749; RV32I-NEXT:    addi sp, sp, 16
1750; RV32I-NEXT:    ret
1751;
1752; RV64I-LABEL: fcvt_h_w_load:
1753; RV64I:       # %bb.0:
1754; RV64I-NEXT:    addi sp, sp, -16
1755; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1756; RV64I-NEXT:    lw a0, 0(a0)
1757; RV64I-NEXT:    call __floatsisf@plt
1758; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1759; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1760; RV64I-NEXT:    addi sp, sp, 16
1761; RV64I-NEXT:    ret
1762  %a = load i32, i32* %p
1763  %1 = sitofp i32 %a to half
1764  ret half %1
1765}
1766
1767define half @fcvt_h_wu(i32 %a) nounwind {
1768; RV32IZFH-LABEL: fcvt_h_wu:
1769; RV32IZFH:       # %bb.0:
1770; RV32IZFH-NEXT:    fcvt.h.wu fa0, a0
1771; RV32IZFH-NEXT:    ret
1772;
1773; RV64IZFH-LABEL: fcvt_h_wu:
1774; RV64IZFH:       # %bb.0:
1775; RV64IZFH-NEXT:    fcvt.h.wu fa0, a0
1776; RV64IZFH-NEXT:    ret
1777;
1778; RV32IDZFH-LABEL: fcvt_h_wu:
1779; RV32IDZFH:       # %bb.0:
1780; RV32IDZFH-NEXT:    fcvt.h.wu fa0, a0
1781; RV32IDZFH-NEXT:    ret
1782;
1783; RV64IDZFH-LABEL: fcvt_h_wu:
1784; RV64IDZFH:       # %bb.0:
1785; RV64IDZFH-NEXT:    fcvt.h.wu fa0, a0
1786; RV64IDZFH-NEXT:    ret
1787;
1788; RV32I-LABEL: fcvt_h_wu:
1789; RV32I:       # %bb.0:
1790; RV32I-NEXT:    addi sp, sp, -16
1791; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1792; RV32I-NEXT:    call __floatunsisf@plt
1793; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1794; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1795; RV32I-NEXT:    addi sp, sp, 16
1796; RV32I-NEXT:    ret
1797;
1798; RV64I-LABEL: fcvt_h_wu:
1799; RV64I:       # %bb.0:
1800; RV64I-NEXT:    addi sp, sp, -16
1801; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1802; RV64I-NEXT:    sext.w a0, a0
1803; RV64I-NEXT:    call __floatunsisf@plt
1804; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1805; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1806; RV64I-NEXT:    addi sp, sp, 16
1807; RV64I-NEXT:    ret
1808  %1 = uitofp i32 %a to half
1809  ret half %1
1810}
1811
1812define half @fcvt_h_wu_load(i32* %p) nounwind {
1813; RV32IZFH-LABEL: fcvt_h_wu_load:
1814; RV32IZFH:       # %bb.0:
1815; RV32IZFH-NEXT:    lw a0, 0(a0)
1816; RV32IZFH-NEXT:    fcvt.h.wu fa0, a0
1817; RV32IZFH-NEXT:    ret
1818;
1819; RV64IZFH-LABEL: fcvt_h_wu_load:
1820; RV64IZFH:       # %bb.0:
1821; RV64IZFH-NEXT:    lwu a0, 0(a0)
1822; RV64IZFH-NEXT:    fcvt.h.wu fa0, a0
1823; RV64IZFH-NEXT:    ret
1824;
1825; RV32IDZFH-LABEL: fcvt_h_wu_load:
1826; RV32IDZFH:       # %bb.0:
1827; RV32IDZFH-NEXT:    lw a0, 0(a0)
1828; RV32IDZFH-NEXT:    fcvt.h.wu fa0, a0
1829; RV32IDZFH-NEXT:    ret
1830;
1831; RV64IDZFH-LABEL: fcvt_h_wu_load:
1832; RV64IDZFH:       # %bb.0:
1833; RV64IDZFH-NEXT:    lwu a0, 0(a0)
1834; RV64IDZFH-NEXT:    fcvt.h.wu fa0, a0
1835; RV64IDZFH-NEXT:    ret
1836;
1837; RV32I-LABEL: fcvt_h_wu_load:
1838; RV32I:       # %bb.0:
1839; RV32I-NEXT:    addi sp, sp, -16
1840; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1841; RV32I-NEXT:    lw a0, 0(a0)
1842; RV32I-NEXT:    call __floatunsisf@plt
1843; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1844; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1845; RV32I-NEXT:    addi sp, sp, 16
1846; RV32I-NEXT:    ret
1847;
1848; RV64I-LABEL: fcvt_h_wu_load:
1849; RV64I:       # %bb.0:
1850; RV64I-NEXT:    addi sp, sp, -16
1851; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1852; RV64I-NEXT:    lw a0, 0(a0)
1853; RV64I-NEXT:    call __floatunsisf@plt
1854; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1855; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1856; RV64I-NEXT:    addi sp, sp, 16
1857; RV64I-NEXT:    ret
1858  %a = load i32, i32* %p
1859  %1 = uitofp i32 %a to half
1860  ret half %1
1861}
1862
1863define half @fcvt_h_l(i64 %a) nounwind {
1864; RV32IZFH-LABEL: fcvt_h_l:
1865; RV32IZFH:       # %bb.0:
1866; RV32IZFH-NEXT:    addi sp, sp, -16
1867; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1868; RV32IZFH-NEXT:    call __floatdihf@plt
1869; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1870; RV32IZFH-NEXT:    addi sp, sp, 16
1871; RV32IZFH-NEXT:    ret
1872;
1873; RV64IZFH-LABEL: fcvt_h_l:
1874; RV64IZFH:       # %bb.0:
1875; RV64IZFH-NEXT:    fcvt.h.l fa0, a0
1876; RV64IZFH-NEXT:    ret
1877;
1878; RV32IDZFH-LABEL: fcvt_h_l:
1879; RV32IDZFH:       # %bb.0:
1880; RV32IDZFH-NEXT:    addi sp, sp, -16
1881; RV32IDZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1882; RV32IDZFH-NEXT:    call __floatdihf@plt
1883; RV32IDZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1884; RV32IDZFH-NEXT:    addi sp, sp, 16
1885; RV32IDZFH-NEXT:    ret
1886;
1887; RV64IDZFH-LABEL: fcvt_h_l:
1888; RV64IDZFH:       # %bb.0:
1889; RV64IDZFH-NEXT:    fcvt.h.l fa0, a0
1890; RV64IDZFH-NEXT:    ret
1891;
1892; RV32I-LABEL: fcvt_h_l:
1893; RV32I:       # %bb.0:
1894; RV32I-NEXT:    addi sp, sp, -16
1895; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1896; RV32I-NEXT:    call __floatdisf@plt
1897; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1898; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1899; RV32I-NEXT:    addi sp, sp, 16
1900; RV32I-NEXT:    ret
1901;
1902; RV64I-LABEL: fcvt_h_l:
1903; RV64I:       # %bb.0:
1904; RV64I-NEXT:    addi sp, sp, -16
1905; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1906; RV64I-NEXT:    call __floatdisf@plt
1907; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1908; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1909; RV64I-NEXT:    addi sp, sp, 16
1910; RV64I-NEXT:    ret
1911  %1 = sitofp i64 %a to half
1912  ret half %1
1913}
1914
1915define half @fcvt_h_lu(i64 %a) nounwind {
1916; RV32IZFH-LABEL: fcvt_h_lu:
1917; RV32IZFH:       # %bb.0:
1918; RV32IZFH-NEXT:    addi sp, sp, -16
1919; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1920; RV32IZFH-NEXT:    call __floatundihf@plt
1921; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1922; RV32IZFH-NEXT:    addi sp, sp, 16
1923; RV32IZFH-NEXT:    ret
1924;
1925; RV64IZFH-LABEL: fcvt_h_lu:
1926; RV64IZFH:       # %bb.0:
1927; RV64IZFH-NEXT:    fcvt.h.lu fa0, a0
1928; RV64IZFH-NEXT:    ret
1929;
1930; RV32IDZFH-LABEL: fcvt_h_lu:
1931; RV32IDZFH:       # %bb.0:
1932; RV32IDZFH-NEXT:    addi sp, sp, -16
1933; RV32IDZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1934; RV32IDZFH-NEXT:    call __floatundihf@plt
1935; RV32IDZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1936; RV32IDZFH-NEXT:    addi sp, sp, 16
1937; RV32IDZFH-NEXT:    ret
1938;
1939; RV64IDZFH-LABEL: fcvt_h_lu:
1940; RV64IDZFH:       # %bb.0:
1941; RV64IDZFH-NEXT:    fcvt.h.lu fa0, a0
1942; RV64IDZFH-NEXT:    ret
1943;
1944; RV32I-LABEL: fcvt_h_lu:
1945; RV32I:       # %bb.0:
1946; RV32I-NEXT:    addi sp, sp, -16
1947; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1948; RV32I-NEXT:    call __floatundisf@plt
1949; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1950; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1951; RV32I-NEXT:    addi sp, sp, 16
1952; RV32I-NEXT:    ret
1953;
1954; RV64I-LABEL: fcvt_h_lu:
1955; RV64I:       # %bb.0:
1956; RV64I-NEXT:    addi sp, sp, -16
1957; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
1958; RV64I-NEXT:    call __floatundisf@plt
1959; RV64I-NEXT:    call __gnu_f2h_ieee@plt
1960; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
1961; RV64I-NEXT:    addi sp, sp, 16
1962; RV64I-NEXT:    ret
1963  %1 = uitofp i64 %a to half
1964  ret half %1
1965}
1966
1967define half @fcvt_h_s(float %a) nounwind {
1968; RV32IZFH-LABEL: fcvt_h_s:
1969; RV32IZFH:       # %bb.0:
1970; RV32IZFH-NEXT:    fcvt.h.s fa0, fa0
1971; RV32IZFH-NEXT:    ret
1972;
1973; RV64IZFH-LABEL: fcvt_h_s:
1974; RV64IZFH:       # %bb.0:
1975; RV64IZFH-NEXT:    fcvt.h.s fa0, fa0
1976; RV64IZFH-NEXT:    ret
1977;
1978; RV32IDZFH-LABEL: fcvt_h_s:
1979; RV32IDZFH:       # %bb.0:
1980; RV32IDZFH-NEXT:    fcvt.h.s fa0, fa0
1981; RV32IDZFH-NEXT:    ret
1982;
1983; RV64IDZFH-LABEL: fcvt_h_s:
1984; RV64IDZFH:       # %bb.0:
1985; RV64IDZFH-NEXT:    fcvt.h.s fa0, fa0
1986; RV64IDZFH-NEXT:    ret
1987;
1988; RV32I-LABEL: fcvt_h_s:
1989; RV32I:       # %bb.0:
1990; RV32I-NEXT:    addi sp, sp, -16
1991; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
1992; RV32I-NEXT:    call __gnu_f2h_ieee@plt
1993; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
1994; RV32I-NEXT:    addi sp, sp, 16
1995; RV32I-NEXT:    ret
1996;
1997; RV64I-LABEL: fcvt_h_s:
1998; RV64I:       # %bb.0:
1999; RV64I-NEXT:    addi sp, sp, -16
2000; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2001; RV64I-NEXT:    call __gnu_f2h_ieee@plt
2002; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2003; RV64I-NEXT:    addi sp, sp, 16
2004; RV64I-NEXT:    ret
2005  %1 = fptrunc float %a to half
2006  ret half %1
2007}
2008
2009define float @fcvt_s_h(half %a) nounwind {
2010; RV32IZFH-LABEL: fcvt_s_h:
2011; RV32IZFH:       # %bb.0:
2012; RV32IZFH-NEXT:    fcvt.s.h fa0, fa0
2013; RV32IZFH-NEXT:    ret
2014;
2015; RV64IZFH-LABEL: fcvt_s_h:
2016; RV64IZFH:       # %bb.0:
2017; RV64IZFH-NEXT:    fcvt.s.h fa0, fa0
2018; RV64IZFH-NEXT:    ret
2019;
2020; RV32IDZFH-LABEL: fcvt_s_h:
2021; RV32IDZFH:       # %bb.0:
2022; RV32IDZFH-NEXT:    fcvt.s.h fa0, fa0
2023; RV32IDZFH-NEXT:    ret
2024;
2025; RV64IDZFH-LABEL: fcvt_s_h:
2026; RV64IDZFH:       # %bb.0:
2027; RV64IDZFH-NEXT:    fcvt.s.h fa0, fa0
2028; RV64IDZFH-NEXT:    ret
2029;
2030; RV32I-LABEL: fcvt_s_h:
2031; RV32I:       # %bb.0:
2032; RV32I-NEXT:    addi sp, sp, -16
2033; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2034; RV32I-NEXT:    slli a0, a0, 16
2035; RV32I-NEXT:    srli a0, a0, 16
2036; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2037; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2038; RV32I-NEXT:    addi sp, sp, 16
2039; RV32I-NEXT:    ret
2040;
2041; RV64I-LABEL: fcvt_s_h:
2042; RV64I:       # %bb.0:
2043; RV64I-NEXT:    addi sp, sp, -16
2044; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2045; RV64I-NEXT:    slli a0, a0, 48
2046; RV64I-NEXT:    srli a0, a0, 48
2047; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2048; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2049; RV64I-NEXT:    addi sp, sp, 16
2050; RV64I-NEXT:    ret
2051  %1 = fpext half %a to float
2052  ret float %1
2053}
2054
2055define half @fcvt_h_d(double %a) nounwind {
2056; RV32IZFH-LABEL: fcvt_h_d:
2057; RV32IZFH:       # %bb.0:
2058; RV32IZFH-NEXT:    addi sp, sp, -16
2059; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2060; RV32IZFH-NEXT:    call __truncdfhf2@plt
2061; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2062; RV32IZFH-NEXT:    addi sp, sp, 16
2063; RV32IZFH-NEXT:    ret
2064;
2065; RV64IZFH-LABEL: fcvt_h_d:
2066; RV64IZFH:       # %bb.0:
2067; RV64IZFH-NEXT:    addi sp, sp, -16
2068; RV64IZFH-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2069; RV64IZFH-NEXT:    call __truncdfhf2@plt
2070; RV64IZFH-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2071; RV64IZFH-NEXT:    addi sp, sp, 16
2072; RV64IZFH-NEXT:    ret
2073;
2074; RV32IDZFH-LABEL: fcvt_h_d:
2075; RV32IDZFH:       # %bb.0:
2076; RV32IDZFH-NEXT:    fcvt.h.d fa0, fa0
2077; RV32IDZFH-NEXT:    ret
2078;
2079; RV64IDZFH-LABEL: fcvt_h_d:
2080; RV64IDZFH:       # %bb.0:
2081; RV64IDZFH-NEXT:    fcvt.h.d fa0, fa0
2082; RV64IDZFH-NEXT:    ret
2083;
2084; RV32I-LABEL: fcvt_h_d:
2085; RV32I:       # %bb.0:
2086; RV32I-NEXT:    addi sp, sp, -16
2087; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2088; RV32I-NEXT:    call __truncdfhf2@plt
2089; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2090; RV32I-NEXT:    addi sp, sp, 16
2091; RV32I-NEXT:    ret
2092;
2093; RV64I-LABEL: fcvt_h_d:
2094; RV64I:       # %bb.0:
2095; RV64I-NEXT:    addi sp, sp, -16
2096; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2097; RV64I-NEXT:    call __truncdfhf2@plt
2098; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2099; RV64I-NEXT:    addi sp, sp, 16
2100; RV64I-NEXT:    ret
2101  %1 = fptrunc double %a to half
2102  ret half %1
2103}
2104
2105define double @fcvt_d_h(half %a) nounwind {
2106; RV32IZFH-LABEL: fcvt_d_h:
2107; RV32IZFH:       # %bb.0:
2108; RV32IZFH-NEXT:    addi sp, sp, -16
2109; RV32IZFH-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2110; RV32IZFH-NEXT:    fcvt.s.h fa0, fa0
2111; RV32IZFH-NEXT:    call __extendsfdf2@plt
2112; RV32IZFH-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2113; RV32IZFH-NEXT:    addi sp, sp, 16
2114; RV32IZFH-NEXT:    ret
2115;
2116; RV64IZFH-LABEL: fcvt_d_h:
2117; RV64IZFH:       # %bb.0:
2118; RV64IZFH-NEXT:    addi sp, sp, -16
2119; RV64IZFH-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2120; RV64IZFH-NEXT:    fcvt.s.h fa0, fa0
2121; RV64IZFH-NEXT:    call __extendsfdf2@plt
2122; RV64IZFH-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2123; RV64IZFH-NEXT:    addi sp, sp, 16
2124; RV64IZFH-NEXT:    ret
2125;
2126; RV32IDZFH-LABEL: fcvt_d_h:
2127; RV32IDZFH:       # %bb.0:
2128; RV32IDZFH-NEXT:    fcvt.d.h fa0, fa0
2129; RV32IDZFH-NEXT:    ret
2130;
2131; RV64IDZFH-LABEL: fcvt_d_h:
2132; RV64IDZFH:       # %bb.0:
2133; RV64IDZFH-NEXT:    fcvt.d.h fa0, fa0
2134; RV64IDZFH-NEXT:    ret
2135;
2136; RV32I-LABEL: fcvt_d_h:
2137; RV32I:       # %bb.0:
2138; RV32I-NEXT:    addi sp, sp, -16
2139; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2140; RV32I-NEXT:    slli a0, a0, 16
2141; RV32I-NEXT:    srli a0, a0, 16
2142; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2143; RV32I-NEXT:    call __extendsfdf2@plt
2144; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2145; RV32I-NEXT:    addi sp, sp, 16
2146; RV32I-NEXT:    ret
2147;
2148; RV64I-LABEL: fcvt_d_h:
2149; RV64I:       # %bb.0:
2150; RV64I-NEXT:    addi sp, sp, -16
2151; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2152; RV64I-NEXT:    slli a0, a0, 48
2153; RV64I-NEXT:    srli a0, a0, 48
2154; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2155; RV64I-NEXT:    slli a0, a0, 32
2156; RV64I-NEXT:    srli a0, a0, 32
2157; RV64I-NEXT:    call __extendsfdf2@plt
2158; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2159; RV64I-NEXT:    addi sp, sp, 16
2160; RV64I-NEXT:    ret
2161  %1 = fpext half %a to double
2162  ret double %1
2163}
2164
2165define half @bitcast_h_i16(i16 %a) nounwind {
2166; RV32IZFH-LABEL: bitcast_h_i16:
2167; RV32IZFH:       # %bb.0:
2168; RV32IZFH-NEXT:    fmv.h.x fa0, a0
2169; RV32IZFH-NEXT:    ret
2170;
2171; RV64IZFH-LABEL: bitcast_h_i16:
2172; RV64IZFH:       # %bb.0:
2173; RV64IZFH-NEXT:    fmv.h.x fa0, a0
2174; RV64IZFH-NEXT:    ret
2175;
2176; RV32IDZFH-LABEL: bitcast_h_i16:
2177; RV32IDZFH:       # %bb.0:
2178; RV32IDZFH-NEXT:    fmv.h.x fa0, a0
2179; RV32IDZFH-NEXT:    ret
2180;
2181; RV64IDZFH-LABEL: bitcast_h_i16:
2182; RV64IDZFH:       # %bb.0:
2183; RV64IDZFH-NEXT:    fmv.h.x fa0, a0
2184; RV64IDZFH-NEXT:    ret
2185;
2186; RV32I-LABEL: bitcast_h_i16:
2187; RV32I:       # %bb.0:
2188; RV32I-NEXT:    ret
2189;
2190; RV64I-LABEL: bitcast_h_i16:
2191; RV64I:       # %bb.0:
2192; RV64I-NEXT:    ret
2193  %1 = bitcast i16 %a to half
2194  ret half %1
2195}
2196
2197define i16 @bitcast_i16_h(half %a) nounwind {
2198; RV32IZFH-LABEL: bitcast_i16_h:
2199; RV32IZFH:       # %bb.0:
2200; RV32IZFH-NEXT:    fmv.x.h a0, fa0
2201; RV32IZFH-NEXT:    ret
2202;
2203; RV64IZFH-LABEL: bitcast_i16_h:
2204; RV64IZFH:       # %bb.0:
2205; RV64IZFH-NEXT:    fmv.x.h a0, fa0
2206; RV64IZFH-NEXT:    ret
2207;
2208; RV32IDZFH-LABEL: bitcast_i16_h:
2209; RV32IDZFH:       # %bb.0:
2210; RV32IDZFH-NEXT:    fmv.x.h a0, fa0
2211; RV32IDZFH-NEXT:    ret
2212;
2213; RV64IDZFH-LABEL: bitcast_i16_h:
2214; RV64IDZFH:       # %bb.0:
2215; RV64IDZFH-NEXT:    fmv.x.h a0, fa0
2216; RV64IDZFH-NEXT:    ret
2217;
2218; RV32I-LABEL: bitcast_i16_h:
2219; RV32I:       # %bb.0:
2220; RV32I-NEXT:    ret
2221;
2222; RV64I-LABEL: bitcast_i16_h:
2223; RV64I:       # %bb.0:
2224; RV64I-NEXT:    ret
2225  %1 = bitcast half %a to i16
2226  ret i16 %1
2227}
2228
2229; Make sure we select W version of addi on RV64.
2230define signext i32 @fcvt_h_w_demanded_bits(i32 signext %0, half* %1) nounwind {
2231; RV32IZFH-LABEL: fcvt_h_w_demanded_bits:
2232; RV32IZFH:       # %bb.0:
2233; RV32IZFH-NEXT:    addi a0, a0, 1
2234; RV32IZFH-NEXT:    fcvt.h.w ft0, a0
2235; RV32IZFH-NEXT:    fsh ft0, 0(a1)
2236; RV32IZFH-NEXT:    ret
2237;
2238; RV64IZFH-LABEL: fcvt_h_w_demanded_bits:
2239; RV64IZFH:       # %bb.0:
2240; RV64IZFH-NEXT:    addiw a0, a0, 1
2241; RV64IZFH-NEXT:    fcvt.h.w ft0, a0
2242; RV64IZFH-NEXT:    fsh ft0, 0(a1)
2243; RV64IZFH-NEXT:    ret
2244;
2245; RV32IDZFH-LABEL: fcvt_h_w_demanded_bits:
2246; RV32IDZFH:       # %bb.0:
2247; RV32IDZFH-NEXT:    addi a0, a0, 1
2248; RV32IDZFH-NEXT:    fcvt.h.w ft0, a0
2249; RV32IDZFH-NEXT:    fsh ft0, 0(a1)
2250; RV32IDZFH-NEXT:    ret
2251;
2252; RV64IDZFH-LABEL: fcvt_h_w_demanded_bits:
2253; RV64IDZFH:       # %bb.0:
2254; RV64IDZFH-NEXT:    addiw a0, a0, 1
2255; RV64IDZFH-NEXT:    fcvt.h.w ft0, a0
2256; RV64IDZFH-NEXT:    fsh ft0, 0(a1)
2257; RV64IDZFH-NEXT:    ret
2258;
2259; RV32I-LABEL: fcvt_h_w_demanded_bits:
2260; RV32I:       # %bb.0:
2261; RV32I-NEXT:    addi sp, sp, -16
2262; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2263; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
2264; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
2265; RV32I-NEXT:    mv s0, a1
2266; RV32I-NEXT:    addi s1, a0, 1
2267; RV32I-NEXT:    mv a0, s1
2268; RV32I-NEXT:    call __floatsisf@plt
2269; RV32I-NEXT:    call __gnu_f2h_ieee@plt
2270; RV32I-NEXT:    sh a0, 0(s0)
2271; RV32I-NEXT:    mv a0, s1
2272; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2273; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
2274; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
2275; RV32I-NEXT:    addi sp, sp, 16
2276; RV32I-NEXT:    ret
2277;
2278; RV64I-LABEL: fcvt_h_w_demanded_bits:
2279; RV64I:       # %bb.0:
2280; RV64I-NEXT:    addi sp, sp, -32
2281; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
2282; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
2283; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
2284; RV64I-NEXT:    mv s0, a1
2285; RV64I-NEXT:    addiw s1, a0, 1
2286; RV64I-NEXT:    mv a0, s1
2287; RV64I-NEXT:    call __floatsisf@plt
2288; RV64I-NEXT:    call __gnu_f2h_ieee@plt
2289; RV64I-NEXT:    sh a0, 0(s0)
2290; RV64I-NEXT:    mv a0, s1
2291; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
2292; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
2293; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
2294; RV64I-NEXT:    addi sp, sp, 32
2295; RV64I-NEXT:    ret
2296  %3 = add i32 %0, 1
2297  %4 = sitofp i32 %3 to half
2298  store half %4, half* %1, align 2
2299  ret i32 %3
2300}
2301
2302; Make sure we select W version of addi on RV64.
2303define signext i32 @fcvt_h_wu_demanded_bits(i32 signext %0, half* %1) nounwind {
2304; RV32IZFH-LABEL: fcvt_h_wu_demanded_bits:
2305; RV32IZFH:       # %bb.0:
2306; RV32IZFH-NEXT:    addi a0, a0, 1
2307; RV32IZFH-NEXT:    fcvt.h.wu ft0, a0
2308; RV32IZFH-NEXT:    fsh ft0, 0(a1)
2309; RV32IZFH-NEXT:    ret
2310;
2311; RV64IZFH-LABEL: fcvt_h_wu_demanded_bits:
2312; RV64IZFH:       # %bb.0:
2313; RV64IZFH-NEXT:    addiw a0, a0, 1
2314; RV64IZFH-NEXT:    fcvt.h.wu ft0, a0
2315; RV64IZFH-NEXT:    fsh ft0, 0(a1)
2316; RV64IZFH-NEXT:    ret
2317;
2318; RV32IDZFH-LABEL: fcvt_h_wu_demanded_bits:
2319; RV32IDZFH:       # %bb.0:
2320; RV32IDZFH-NEXT:    addi a0, a0, 1
2321; RV32IDZFH-NEXT:    fcvt.h.wu ft0, a0
2322; RV32IDZFH-NEXT:    fsh ft0, 0(a1)
2323; RV32IDZFH-NEXT:    ret
2324;
2325; RV64IDZFH-LABEL: fcvt_h_wu_demanded_bits:
2326; RV64IDZFH:       # %bb.0:
2327; RV64IDZFH-NEXT:    addiw a0, a0, 1
2328; RV64IDZFH-NEXT:    fcvt.h.wu ft0, a0
2329; RV64IDZFH-NEXT:    fsh ft0, 0(a1)
2330; RV64IDZFH-NEXT:    ret
2331;
2332; RV32I-LABEL: fcvt_h_wu_demanded_bits:
2333; RV32I:       # %bb.0:
2334; RV32I-NEXT:    addi sp, sp, -16
2335; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2336; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
2337; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
2338; RV32I-NEXT:    mv s0, a1
2339; RV32I-NEXT:    addi s1, a0, 1
2340; RV32I-NEXT:    mv a0, s1
2341; RV32I-NEXT:    call __floatunsisf@plt
2342; RV32I-NEXT:    call __gnu_f2h_ieee@plt
2343; RV32I-NEXT:    sh a0, 0(s0)
2344; RV32I-NEXT:    mv a0, s1
2345; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2346; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
2347; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
2348; RV32I-NEXT:    addi sp, sp, 16
2349; RV32I-NEXT:    ret
2350;
2351; RV64I-LABEL: fcvt_h_wu_demanded_bits:
2352; RV64I:       # %bb.0:
2353; RV64I-NEXT:    addi sp, sp, -32
2354; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
2355; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
2356; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
2357; RV64I-NEXT:    mv s0, a1
2358; RV64I-NEXT:    addiw s1, a0, 1
2359; RV64I-NEXT:    mv a0, s1
2360; RV64I-NEXT:    call __floatunsisf@plt
2361; RV64I-NEXT:    call __gnu_f2h_ieee@plt
2362; RV64I-NEXT:    sh a0, 0(s0)
2363; RV64I-NEXT:    mv a0, s1
2364; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
2365; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
2366; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
2367; RV64I-NEXT:    addi sp, sp, 32
2368; RV64I-NEXT:    ret
2369  %3 = add i32 %0, 1
2370  %4 = uitofp i32 %3 to half
2371  store half %4, half* %1, align 2
2372  ret i32 %3
2373}
2374
2375define signext i16 @fcvt_w_s_i16(half %a) nounwind {
2376; RV32IZFH-LABEL: fcvt_w_s_i16:
2377; RV32IZFH:       # %bb.0:
2378; RV32IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
2379; RV32IZFH-NEXT:    ret
2380;
2381; RV64IZFH-LABEL: fcvt_w_s_i16:
2382; RV64IZFH:       # %bb.0:
2383; RV64IZFH-NEXT:    fcvt.l.h a0, fa0, rtz
2384; RV64IZFH-NEXT:    ret
2385;
2386; RV32IDZFH-LABEL: fcvt_w_s_i16:
2387; RV32IDZFH:       # %bb.0:
2388; RV32IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
2389; RV32IDZFH-NEXT:    ret
2390;
2391; RV64IDZFH-LABEL: fcvt_w_s_i16:
2392; RV64IDZFH:       # %bb.0:
2393; RV64IDZFH-NEXT:    fcvt.l.h a0, fa0, rtz
2394; RV64IDZFH-NEXT:    ret
2395;
2396; RV32I-LABEL: fcvt_w_s_i16:
2397; RV32I:       # %bb.0:
2398; RV32I-NEXT:    addi sp, sp, -16
2399; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2400; RV32I-NEXT:    slli a0, a0, 16
2401; RV32I-NEXT:    srli a0, a0, 16
2402; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2403; RV32I-NEXT:    call __fixsfsi@plt
2404; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2405; RV32I-NEXT:    addi sp, sp, 16
2406; RV32I-NEXT:    ret
2407;
2408; RV64I-LABEL: fcvt_w_s_i16:
2409; RV64I:       # %bb.0:
2410; RV64I-NEXT:    addi sp, sp, -16
2411; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2412; RV64I-NEXT:    slli a0, a0, 48
2413; RV64I-NEXT:    srli a0, a0, 48
2414; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2415; RV64I-NEXT:    call __fixsfdi@plt
2416; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2417; RV64I-NEXT:    addi sp, sp, 16
2418; RV64I-NEXT:    ret
2419  %1 = fptosi half %a to i16
2420  ret i16 %1
2421}
2422
2423define signext i16 @fcvt_w_s_sat_i16(half %a) nounwind {
2424; RV32IZFH-LABEL: fcvt_w_s_sat_i16:
2425; RV32IZFH:       # %bb.0: # %start
2426; RV32IZFH-NEXT:    fcvt.s.h ft0, fa0
2427; RV32IZFH-NEXT:    feq.s a0, ft0, ft0
2428; RV32IZFH-NEXT:    bnez a0, .LBB32_2
2429; RV32IZFH-NEXT:  # %bb.1: # %start
2430; RV32IZFH-NEXT:    li a0, 0
2431; RV32IZFH-NEXT:    ret
2432; RV32IZFH-NEXT:  .LBB32_2:
2433; RV32IZFH-NEXT:    lui a0, %hi(.LCPI32_0)
2434; RV32IZFH-NEXT:    flw ft1, %lo(.LCPI32_0)(a0)
2435; RV32IZFH-NEXT:    lui a0, %hi(.LCPI32_1)
2436; RV32IZFH-NEXT:    flw ft2, %lo(.LCPI32_1)(a0)
2437; RV32IZFH-NEXT:    fmax.s ft0, ft0, ft1
2438; RV32IZFH-NEXT:    fmin.s ft0, ft0, ft2
2439; RV32IZFH-NEXT:    fcvt.w.s a0, ft0, rtz
2440; RV32IZFH-NEXT:    ret
2441;
2442; RV64IZFH-LABEL: fcvt_w_s_sat_i16:
2443; RV64IZFH:       # %bb.0: # %start
2444; RV64IZFH-NEXT:    fcvt.s.h ft0, fa0
2445; RV64IZFH-NEXT:    feq.s a0, ft0, ft0
2446; RV64IZFH-NEXT:    bnez a0, .LBB32_2
2447; RV64IZFH-NEXT:  # %bb.1: # %start
2448; RV64IZFH-NEXT:    li a0, 0
2449; RV64IZFH-NEXT:    ret
2450; RV64IZFH-NEXT:  .LBB32_2:
2451; RV64IZFH-NEXT:    lui a0, %hi(.LCPI32_0)
2452; RV64IZFH-NEXT:    flw ft1, %lo(.LCPI32_0)(a0)
2453; RV64IZFH-NEXT:    lui a0, %hi(.LCPI32_1)
2454; RV64IZFH-NEXT:    flw ft2, %lo(.LCPI32_1)(a0)
2455; RV64IZFH-NEXT:    fmax.s ft0, ft0, ft1
2456; RV64IZFH-NEXT:    fmin.s ft0, ft0, ft2
2457; RV64IZFH-NEXT:    fcvt.l.s a0, ft0, rtz
2458; RV64IZFH-NEXT:    ret
2459;
2460; RV32IDZFH-LABEL: fcvt_w_s_sat_i16:
2461; RV32IDZFH:       # %bb.0: # %start
2462; RV32IDZFH-NEXT:    fcvt.s.h ft0, fa0
2463; RV32IDZFH-NEXT:    feq.s a0, ft0, ft0
2464; RV32IDZFH-NEXT:    bnez a0, .LBB32_2
2465; RV32IDZFH-NEXT:  # %bb.1: # %start
2466; RV32IDZFH-NEXT:    li a0, 0
2467; RV32IDZFH-NEXT:    ret
2468; RV32IDZFH-NEXT:  .LBB32_2:
2469; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI32_0)
2470; RV32IDZFH-NEXT:    flw ft1, %lo(.LCPI32_0)(a0)
2471; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI32_1)
2472; RV32IDZFH-NEXT:    flw ft2, %lo(.LCPI32_1)(a0)
2473; RV32IDZFH-NEXT:    fmax.s ft0, ft0, ft1
2474; RV32IDZFH-NEXT:    fmin.s ft0, ft0, ft2
2475; RV32IDZFH-NEXT:    fcvt.w.s a0, ft0, rtz
2476; RV32IDZFH-NEXT:    ret
2477;
2478; RV64IDZFH-LABEL: fcvt_w_s_sat_i16:
2479; RV64IDZFH:       # %bb.0: # %start
2480; RV64IDZFH-NEXT:    fcvt.s.h ft0, fa0
2481; RV64IDZFH-NEXT:    feq.s a0, ft0, ft0
2482; RV64IDZFH-NEXT:    bnez a0, .LBB32_2
2483; RV64IDZFH-NEXT:  # %bb.1: # %start
2484; RV64IDZFH-NEXT:    li a0, 0
2485; RV64IDZFH-NEXT:    ret
2486; RV64IDZFH-NEXT:  .LBB32_2:
2487; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI32_0)
2488; RV64IDZFH-NEXT:    flw ft1, %lo(.LCPI32_0)(a0)
2489; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI32_1)
2490; RV64IDZFH-NEXT:    flw ft2, %lo(.LCPI32_1)(a0)
2491; RV64IDZFH-NEXT:    fmax.s ft0, ft0, ft1
2492; RV64IDZFH-NEXT:    fmin.s ft0, ft0, ft2
2493; RV64IDZFH-NEXT:    fcvt.l.s a0, ft0, rtz
2494; RV64IDZFH-NEXT:    ret
2495;
2496; RV32I-LABEL: fcvt_w_s_sat_i16:
2497; RV32I:       # %bb.0: # %start
2498; RV32I-NEXT:    addi sp, sp, -32
2499; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
2500; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
2501; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
2502; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
2503; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
2504; RV32I-NEXT:    slli a0, a0, 16
2505; RV32I-NEXT:    srli a0, a0, 16
2506; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2507; RV32I-NEXT:    mv s0, a0
2508; RV32I-NEXT:    lui a1, 815104
2509; RV32I-NEXT:    call __gesf2@plt
2510; RV32I-NEXT:    mv s2, a0
2511; RV32I-NEXT:    mv a0, s0
2512; RV32I-NEXT:    call __fixsfsi@plt
2513; RV32I-NEXT:    li s1, 0
2514; RV32I-NEXT:    lui s3, 1048568
2515; RV32I-NEXT:    bltz s2, .LBB32_2
2516; RV32I-NEXT:  # %bb.1: # %start
2517; RV32I-NEXT:    mv s3, a0
2518; RV32I-NEXT:  .LBB32_2: # %start
2519; RV32I-NEXT:    lui a0, 290816
2520; RV32I-NEXT:    addi a1, a0, -512
2521; RV32I-NEXT:    mv a0, s0
2522; RV32I-NEXT:    call __gtsf2@plt
2523; RV32I-NEXT:    bge s1, a0, .LBB32_4
2524; RV32I-NEXT:  # %bb.3:
2525; RV32I-NEXT:    lui a0, 8
2526; RV32I-NEXT:    addi s3, a0, -1
2527; RV32I-NEXT:  .LBB32_4: # %start
2528; RV32I-NEXT:    mv a0, s0
2529; RV32I-NEXT:    mv a1, s0
2530; RV32I-NEXT:    call __unordsf2@plt
2531; RV32I-NEXT:    bne a0, s1, .LBB32_6
2532; RV32I-NEXT:  # %bb.5: # %start
2533; RV32I-NEXT:    mv s1, s3
2534; RV32I-NEXT:  .LBB32_6: # %start
2535; RV32I-NEXT:    slli a0, s1, 16
2536; RV32I-NEXT:    srai a0, a0, 16
2537; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
2538; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
2539; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
2540; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
2541; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
2542; RV32I-NEXT:    addi sp, sp, 32
2543; RV32I-NEXT:    ret
2544;
2545; RV64I-LABEL: fcvt_w_s_sat_i16:
2546; RV64I:       # %bb.0: # %start
2547; RV64I-NEXT:    addi sp, sp, -48
2548; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
2549; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
2550; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
2551; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
2552; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
2553; RV64I-NEXT:    slli a0, a0, 48
2554; RV64I-NEXT:    srli a0, a0, 48
2555; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2556; RV64I-NEXT:    mv s0, a0
2557; RV64I-NEXT:    lui a1, 815104
2558; RV64I-NEXT:    call __gesf2@plt
2559; RV64I-NEXT:    mv s2, a0
2560; RV64I-NEXT:    mv a0, s0
2561; RV64I-NEXT:    call __fixsfdi@plt
2562; RV64I-NEXT:    li s1, 0
2563; RV64I-NEXT:    lui s3, 1048568
2564; RV64I-NEXT:    bltz s2, .LBB32_2
2565; RV64I-NEXT:  # %bb.1: # %start
2566; RV64I-NEXT:    mv s3, a0
2567; RV64I-NEXT:  .LBB32_2: # %start
2568; RV64I-NEXT:    lui a0, 290816
2569; RV64I-NEXT:    addiw a1, a0, -512
2570; RV64I-NEXT:    mv a0, s0
2571; RV64I-NEXT:    call __gtsf2@plt
2572; RV64I-NEXT:    bge s1, a0, .LBB32_4
2573; RV64I-NEXT:  # %bb.3:
2574; RV64I-NEXT:    lui a0, 8
2575; RV64I-NEXT:    addiw s3, a0, -1
2576; RV64I-NEXT:  .LBB32_4: # %start
2577; RV64I-NEXT:    mv a0, s0
2578; RV64I-NEXT:    mv a1, s0
2579; RV64I-NEXT:    call __unordsf2@plt
2580; RV64I-NEXT:    bne a0, s1, .LBB32_6
2581; RV64I-NEXT:  # %bb.5: # %start
2582; RV64I-NEXT:    mv s1, s3
2583; RV64I-NEXT:  .LBB32_6: # %start
2584; RV64I-NEXT:    slli a0, s1, 48
2585; RV64I-NEXT:    srai a0, a0, 48
2586; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
2587; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
2588; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
2589; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
2590; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
2591; RV64I-NEXT:    addi sp, sp, 48
2592; RV64I-NEXT:    ret
2593start:
2594  %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a)
2595  ret i16 %0
2596}
2597
2598define zeroext i16 @fcvt_wu_s_i16(half %a) nounwind {
2599; RV32IZFH-LABEL: fcvt_wu_s_i16:
2600; RV32IZFH:       # %bb.0:
2601; RV32IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
2602; RV32IZFH-NEXT:    ret
2603;
2604; RV64IZFH-LABEL: fcvt_wu_s_i16:
2605; RV64IZFH:       # %bb.0:
2606; RV64IZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
2607; RV64IZFH-NEXT:    ret
2608;
2609; RV32IDZFH-LABEL: fcvt_wu_s_i16:
2610; RV32IDZFH:       # %bb.0:
2611; RV32IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
2612; RV32IDZFH-NEXT:    ret
2613;
2614; RV64IDZFH-LABEL: fcvt_wu_s_i16:
2615; RV64IDZFH:       # %bb.0:
2616; RV64IDZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
2617; RV64IDZFH-NEXT:    ret
2618;
2619; RV32I-LABEL: fcvt_wu_s_i16:
2620; RV32I:       # %bb.0:
2621; RV32I-NEXT:    addi sp, sp, -16
2622; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2623; RV32I-NEXT:    slli a0, a0, 16
2624; RV32I-NEXT:    srli a0, a0, 16
2625; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2626; RV32I-NEXT:    call __fixunssfsi@plt
2627; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2628; RV32I-NEXT:    addi sp, sp, 16
2629; RV32I-NEXT:    ret
2630;
2631; RV64I-LABEL: fcvt_wu_s_i16:
2632; RV64I:       # %bb.0:
2633; RV64I-NEXT:    addi sp, sp, -16
2634; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2635; RV64I-NEXT:    slli a0, a0, 48
2636; RV64I-NEXT:    srli a0, a0, 48
2637; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2638; RV64I-NEXT:    call __fixunssfdi@plt
2639; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2640; RV64I-NEXT:    addi sp, sp, 16
2641; RV64I-NEXT:    ret
2642  %1 = fptoui half %a to i16
2643  ret i16 %1
2644}
2645
2646define zeroext i16 @fcvt_wu_s_sat_i16(half %a) nounwind {
2647; RV32IZFH-LABEL: fcvt_wu_s_sat_i16:
2648; RV32IZFH:       # %bb.0: # %start
2649; RV32IZFH-NEXT:    lui a0, %hi(.LCPI34_0)
2650; RV32IZFH-NEXT:    flw ft0, %lo(.LCPI34_0)(a0)
2651; RV32IZFH-NEXT:    fcvt.s.h ft1, fa0
2652; RV32IZFH-NEXT:    fmv.w.x ft2, zero
2653; RV32IZFH-NEXT:    fmax.s ft1, ft1, ft2
2654; RV32IZFH-NEXT:    fmin.s ft0, ft1, ft0
2655; RV32IZFH-NEXT:    fcvt.wu.s a0, ft0, rtz
2656; RV32IZFH-NEXT:    ret
2657;
2658; RV64IZFH-LABEL: fcvt_wu_s_sat_i16:
2659; RV64IZFH:       # %bb.0: # %start
2660; RV64IZFH-NEXT:    lui a0, %hi(.LCPI34_0)
2661; RV64IZFH-NEXT:    flw ft0, %lo(.LCPI34_0)(a0)
2662; RV64IZFH-NEXT:    fcvt.s.h ft1, fa0
2663; RV64IZFH-NEXT:    fmv.w.x ft2, zero
2664; RV64IZFH-NEXT:    fmax.s ft1, ft1, ft2
2665; RV64IZFH-NEXT:    fmin.s ft0, ft1, ft0
2666; RV64IZFH-NEXT:    fcvt.lu.s a0, ft0, rtz
2667; RV64IZFH-NEXT:    ret
2668;
2669; RV32IDZFH-LABEL: fcvt_wu_s_sat_i16:
2670; RV32IDZFH:       # %bb.0: # %start
2671; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI34_0)
2672; RV32IDZFH-NEXT:    flw ft0, %lo(.LCPI34_0)(a0)
2673; RV32IDZFH-NEXT:    fcvt.s.h ft1, fa0
2674; RV32IDZFH-NEXT:    fmv.w.x ft2, zero
2675; RV32IDZFH-NEXT:    fmax.s ft1, ft1, ft2
2676; RV32IDZFH-NEXT:    fmin.s ft0, ft1, ft0
2677; RV32IDZFH-NEXT:    fcvt.wu.s a0, ft0, rtz
2678; RV32IDZFH-NEXT:    ret
2679;
2680; RV64IDZFH-LABEL: fcvt_wu_s_sat_i16:
2681; RV64IDZFH:       # %bb.0: # %start
2682; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI34_0)
2683; RV64IDZFH-NEXT:    flw ft0, %lo(.LCPI34_0)(a0)
2684; RV64IDZFH-NEXT:    fcvt.s.h ft1, fa0
2685; RV64IDZFH-NEXT:    fmv.w.x ft2, zero
2686; RV64IDZFH-NEXT:    fmax.s ft1, ft1, ft2
2687; RV64IDZFH-NEXT:    fmin.s ft0, ft1, ft0
2688; RV64IDZFH-NEXT:    fcvt.lu.s a0, ft0, rtz
2689; RV64IDZFH-NEXT:    ret
2690;
2691; RV32I-LABEL: fcvt_wu_s_sat_i16:
2692; RV32I:       # %bb.0: # %start
2693; RV32I-NEXT:    addi sp, sp, -32
2694; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
2695; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
2696; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
2697; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
2698; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
2699; RV32I-NEXT:    lui a1, 16
2700; RV32I-NEXT:    addi s2, a1, -1
2701; RV32I-NEXT:    and a0, a0, s2
2702; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2703; RV32I-NEXT:    mv s0, a0
2704; RV32I-NEXT:    li a1, 0
2705; RV32I-NEXT:    call __gesf2@plt
2706; RV32I-NEXT:    mv s1, a0
2707; RV32I-NEXT:    mv a0, s0
2708; RV32I-NEXT:    call __fixunssfsi@plt
2709; RV32I-NEXT:    li s3, 0
2710; RV32I-NEXT:    bltz s1, .LBB34_2
2711; RV32I-NEXT:  # %bb.1: # %start
2712; RV32I-NEXT:    mv s3, a0
2713; RV32I-NEXT:  .LBB34_2: # %start
2714; RV32I-NEXT:    lui a0, 292864
2715; RV32I-NEXT:    addi a1, a0, -256
2716; RV32I-NEXT:    mv a0, s0
2717; RV32I-NEXT:    call __gtsf2@plt
2718; RV32I-NEXT:    mv a1, s2
2719; RV32I-NEXT:    bgtz a0, .LBB34_4
2720; RV32I-NEXT:  # %bb.3: # %start
2721; RV32I-NEXT:    mv a1, s3
2722; RV32I-NEXT:  .LBB34_4: # %start
2723; RV32I-NEXT:    and a0, a1, s2
2724; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
2725; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
2726; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
2727; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
2728; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
2729; RV32I-NEXT:    addi sp, sp, 32
2730; RV32I-NEXT:    ret
2731;
2732; RV64I-LABEL: fcvt_wu_s_sat_i16:
2733; RV64I:       # %bb.0: # %start
2734; RV64I-NEXT:    addi sp, sp, -48
2735; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
2736; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
2737; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
2738; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
2739; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
2740; RV64I-NEXT:    lui a1, 16
2741; RV64I-NEXT:    addiw s2, a1, -1
2742; RV64I-NEXT:    and a0, a0, s2
2743; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2744; RV64I-NEXT:    mv s0, a0
2745; RV64I-NEXT:    li a1, 0
2746; RV64I-NEXT:    call __gesf2@plt
2747; RV64I-NEXT:    mv s1, a0
2748; RV64I-NEXT:    mv a0, s0
2749; RV64I-NEXT:    call __fixunssfdi@plt
2750; RV64I-NEXT:    li s3, 0
2751; RV64I-NEXT:    bltz s1, .LBB34_2
2752; RV64I-NEXT:  # %bb.1: # %start
2753; RV64I-NEXT:    mv s3, a0
2754; RV64I-NEXT:  .LBB34_2: # %start
2755; RV64I-NEXT:    lui a0, 292864
2756; RV64I-NEXT:    addiw a1, a0, -256
2757; RV64I-NEXT:    mv a0, s0
2758; RV64I-NEXT:    call __gtsf2@plt
2759; RV64I-NEXT:    mv a1, s2
2760; RV64I-NEXT:    bgtz a0, .LBB34_4
2761; RV64I-NEXT:  # %bb.3: # %start
2762; RV64I-NEXT:    mv a1, s3
2763; RV64I-NEXT:  .LBB34_4: # %start
2764; RV64I-NEXT:    and a0, a1, s2
2765; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
2766; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
2767; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
2768; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
2769; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
2770; RV64I-NEXT:    addi sp, sp, 48
2771; RV64I-NEXT:    ret
2772start:
2773  %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a)
2774  ret i16 %0
2775}
2776
2777define signext i8 @fcvt_w_s_i8(half %a) nounwind {
2778; RV32IZFH-LABEL: fcvt_w_s_i8:
2779; RV32IZFH:       # %bb.0:
2780; RV32IZFH-NEXT:    fcvt.w.h a0, fa0, rtz
2781; RV32IZFH-NEXT:    ret
2782;
2783; RV64IZFH-LABEL: fcvt_w_s_i8:
2784; RV64IZFH:       # %bb.0:
2785; RV64IZFH-NEXT:    fcvt.l.h a0, fa0, rtz
2786; RV64IZFH-NEXT:    ret
2787;
2788; RV32IDZFH-LABEL: fcvt_w_s_i8:
2789; RV32IDZFH:       # %bb.0:
2790; RV32IDZFH-NEXT:    fcvt.w.h a0, fa0, rtz
2791; RV32IDZFH-NEXT:    ret
2792;
2793; RV64IDZFH-LABEL: fcvt_w_s_i8:
2794; RV64IDZFH:       # %bb.0:
2795; RV64IDZFH-NEXT:    fcvt.l.h a0, fa0, rtz
2796; RV64IDZFH-NEXT:    ret
2797;
2798; RV32I-LABEL: fcvt_w_s_i8:
2799; RV32I:       # %bb.0:
2800; RV32I-NEXT:    addi sp, sp, -16
2801; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
2802; RV32I-NEXT:    slli a0, a0, 16
2803; RV32I-NEXT:    srli a0, a0, 16
2804; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2805; RV32I-NEXT:    call __fixsfsi@plt
2806; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
2807; RV32I-NEXT:    addi sp, sp, 16
2808; RV32I-NEXT:    ret
2809;
2810; RV64I-LABEL: fcvt_w_s_i8:
2811; RV64I:       # %bb.0:
2812; RV64I-NEXT:    addi sp, sp, -16
2813; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
2814; RV64I-NEXT:    slli a0, a0, 48
2815; RV64I-NEXT:    srli a0, a0, 48
2816; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2817; RV64I-NEXT:    call __fixsfdi@plt
2818; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
2819; RV64I-NEXT:    addi sp, sp, 16
2820; RV64I-NEXT:    ret
2821  %1 = fptosi half %a to i8
2822  ret i8 %1
2823}
2824
2825define signext i8 @fcvt_w_s_sat_i8(half %a) nounwind {
2826; RV32IZFH-LABEL: fcvt_w_s_sat_i8:
2827; RV32IZFH:       # %bb.0: # %start
2828; RV32IZFH-NEXT:    fcvt.s.h ft0, fa0
2829; RV32IZFH-NEXT:    feq.s a0, ft0, ft0
2830; RV32IZFH-NEXT:    bnez a0, .LBB36_2
2831; RV32IZFH-NEXT:  # %bb.1: # %start
2832; RV32IZFH-NEXT:    li a0, 0
2833; RV32IZFH-NEXT:    ret
2834; RV32IZFH-NEXT:  .LBB36_2:
2835; RV32IZFH-NEXT:    lui a0, %hi(.LCPI36_0)
2836; RV32IZFH-NEXT:    flw ft1, %lo(.LCPI36_0)(a0)
2837; RV32IZFH-NEXT:    lui a0, %hi(.LCPI36_1)
2838; RV32IZFH-NEXT:    flw ft2, %lo(.LCPI36_1)(a0)
2839; RV32IZFH-NEXT:    fmax.s ft0, ft0, ft1
2840; RV32IZFH-NEXT:    fmin.s ft0, ft0, ft2
2841; RV32IZFH-NEXT:    fcvt.w.s a0, ft0, rtz
2842; RV32IZFH-NEXT:    ret
2843;
2844; RV64IZFH-LABEL: fcvt_w_s_sat_i8:
2845; RV64IZFH:       # %bb.0: # %start
2846; RV64IZFH-NEXT:    fcvt.s.h ft0, fa0
2847; RV64IZFH-NEXT:    feq.s a0, ft0, ft0
2848; RV64IZFH-NEXT:    bnez a0, .LBB36_2
2849; RV64IZFH-NEXT:  # %bb.1: # %start
2850; RV64IZFH-NEXT:    li a0, 0
2851; RV64IZFH-NEXT:    ret
2852; RV64IZFH-NEXT:  .LBB36_2:
2853; RV64IZFH-NEXT:    lui a0, %hi(.LCPI36_0)
2854; RV64IZFH-NEXT:    flw ft1, %lo(.LCPI36_0)(a0)
2855; RV64IZFH-NEXT:    lui a0, %hi(.LCPI36_1)
2856; RV64IZFH-NEXT:    flw ft2, %lo(.LCPI36_1)(a0)
2857; RV64IZFH-NEXT:    fmax.s ft0, ft0, ft1
2858; RV64IZFH-NEXT:    fmin.s ft0, ft0, ft2
2859; RV64IZFH-NEXT:    fcvt.l.s a0, ft0, rtz
2860; RV64IZFH-NEXT:    ret
2861;
2862; RV32IDZFH-LABEL: fcvt_w_s_sat_i8:
2863; RV32IDZFH:       # %bb.0: # %start
2864; RV32IDZFH-NEXT:    fcvt.s.h ft0, fa0
2865; RV32IDZFH-NEXT:    feq.s a0, ft0, ft0
2866; RV32IDZFH-NEXT:    bnez a0, .LBB36_2
2867; RV32IDZFH-NEXT:  # %bb.1: # %start
2868; RV32IDZFH-NEXT:    li a0, 0
2869; RV32IDZFH-NEXT:    ret
2870; RV32IDZFH-NEXT:  .LBB36_2:
2871; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI36_0)
2872; RV32IDZFH-NEXT:    flw ft1, %lo(.LCPI36_0)(a0)
2873; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI36_1)
2874; RV32IDZFH-NEXT:    flw ft2, %lo(.LCPI36_1)(a0)
2875; RV32IDZFH-NEXT:    fmax.s ft0, ft0, ft1
2876; RV32IDZFH-NEXT:    fmin.s ft0, ft0, ft2
2877; RV32IDZFH-NEXT:    fcvt.w.s a0, ft0, rtz
2878; RV32IDZFH-NEXT:    ret
2879;
2880; RV64IDZFH-LABEL: fcvt_w_s_sat_i8:
2881; RV64IDZFH:       # %bb.0: # %start
2882; RV64IDZFH-NEXT:    fcvt.s.h ft0, fa0
2883; RV64IDZFH-NEXT:    feq.s a0, ft0, ft0
2884; RV64IDZFH-NEXT:    bnez a0, .LBB36_2
2885; RV64IDZFH-NEXT:  # %bb.1: # %start
2886; RV64IDZFH-NEXT:    li a0, 0
2887; RV64IDZFH-NEXT:    ret
2888; RV64IDZFH-NEXT:  .LBB36_2:
2889; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI36_0)
2890; RV64IDZFH-NEXT:    flw ft1, %lo(.LCPI36_0)(a0)
2891; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI36_1)
2892; RV64IDZFH-NEXT:    flw ft2, %lo(.LCPI36_1)(a0)
2893; RV64IDZFH-NEXT:    fmax.s ft0, ft0, ft1
2894; RV64IDZFH-NEXT:    fmin.s ft0, ft0, ft2
2895; RV64IDZFH-NEXT:    fcvt.l.s a0, ft0, rtz
2896; RV64IDZFH-NEXT:    ret
2897;
2898; RV32I-LABEL: fcvt_w_s_sat_i8:
2899; RV32I:       # %bb.0: # %start
2900; RV32I-NEXT:    addi sp, sp, -32
2901; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
2902; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
2903; RV32I-NEXT:    sw s1, 20(sp) # 4-byte Folded Spill
2904; RV32I-NEXT:    sw s2, 16(sp) # 4-byte Folded Spill
2905; RV32I-NEXT:    sw s3, 12(sp) # 4-byte Folded Spill
2906; RV32I-NEXT:    slli a0, a0, 16
2907; RV32I-NEXT:    srli a0, a0, 16
2908; RV32I-NEXT:    call __gnu_h2f_ieee@plt
2909; RV32I-NEXT:    mv s0, a0
2910; RV32I-NEXT:    lui a1, 798720
2911; RV32I-NEXT:    call __gesf2@plt
2912; RV32I-NEXT:    mv s2, a0
2913; RV32I-NEXT:    mv a0, s0
2914; RV32I-NEXT:    call __fixsfsi@plt
2915; RV32I-NEXT:    li s1, 0
2916; RV32I-NEXT:    li s3, -128
2917; RV32I-NEXT:    bltz s2, .LBB36_2
2918; RV32I-NEXT:  # %bb.1: # %start
2919; RV32I-NEXT:    mv s3, a0
2920; RV32I-NEXT:  .LBB36_2: # %start
2921; RV32I-NEXT:    lui a1, 274400
2922; RV32I-NEXT:    mv a0, s0
2923; RV32I-NEXT:    call __gtsf2@plt
2924; RV32I-NEXT:    li s2, 127
2925; RV32I-NEXT:    blt s1, a0, .LBB36_4
2926; RV32I-NEXT:  # %bb.3: # %start
2927; RV32I-NEXT:    mv s2, s3
2928; RV32I-NEXT:  .LBB36_4: # %start
2929; RV32I-NEXT:    mv a0, s0
2930; RV32I-NEXT:    mv a1, s0
2931; RV32I-NEXT:    call __unordsf2@plt
2932; RV32I-NEXT:    bne a0, s1, .LBB36_6
2933; RV32I-NEXT:  # %bb.5: # %start
2934; RV32I-NEXT:    mv s1, s2
2935; RV32I-NEXT:  .LBB36_6: # %start
2936; RV32I-NEXT:    slli a0, s1, 24
2937; RV32I-NEXT:    srai a0, a0, 24
2938; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
2939; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
2940; RV32I-NEXT:    lw s1, 20(sp) # 4-byte Folded Reload
2941; RV32I-NEXT:    lw s2, 16(sp) # 4-byte Folded Reload
2942; RV32I-NEXT:    lw s3, 12(sp) # 4-byte Folded Reload
2943; RV32I-NEXT:    addi sp, sp, 32
2944; RV32I-NEXT:    ret
2945;
2946; RV64I-LABEL: fcvt_w_s_sat_i8:
2947; RV64I:       # %bb.0: # %start
2948; RV64I-NEXT:    addi sp, sp, -48
2949; RV64I-NEXT:    sd ra, 40(sp) # 8-byte Folded Spill
2950; RV64I-NEXT:    sd s0, 32(sp) # 8-byte Folded Spill
2951; RV64I-NEXT:    sd s1, 24(sp) # 8-byte Folded Spill
2952; RV64I-NEXT:    sd s2, 16(sp) # 8-byte Folded Spill
2953; RV64I-NEXT:    sd s3, 8(sp) # 8-byte Folded Spill
2954; RV64I-NEXT:    slli a0, a0, 48
2955; RV64I-NEXT:    srli a0, a0, 48
2956; RV64I-NEXT:    call __gnu_h2f_ieee@plt
2957; RV64I-NEXT:    mv s0, a0
2958; RV64I-NEXT:    lui a1, 798720
2959; RV64I-NEXT:    call __gesf2@plt
2960; RV64I-NEXT:    mv s2, a0
2961; RV64I-NEXT:    mv a0, s0
2962; RV64I-NEXT:    call __fixsfdi@plt
2963; RV64I-NEXT:    li s1, 0
2964; RV64I-NEXT:    li s3, -128
2965; RV64I-NEXT:    bltz s2, .LBB36_2
2966; RV64I-NEXT:  # %bb.1: # %start
2967; RV64I-NEXT:    mv s3, a0
2968; RV64I-NEXT:  .LBB36_2: # %start
2969; RV64I-NEXT:    lui a1, 274400
2970; RV64I-NEXT:    mv a0, s0
2971; RV64I-NEXT:    call __gtsf2@plt
2972; RV64I-NEXT:    li s2, 127
2973; RV64I-NEXT:    blt s1, a0, .LBB36_4
2974; RV64I-NEXT:  # %bb.3: # %start
2975; RV64I-NEXT:    mv s2, s3
2976; RV64I-NEXT:  .LBB36_4: # %start
2977; RV64I-NEXT:    mv a0, s0
2978; RV64I-NEXT:    mv a1, s0
2979; RV64I-NEXT:    call __unordsf2@plt
2980; RV64I-NEXT:    bne a0, s1, .LBB36_6
2981; RV64I-NEXT:  # %bb.5: # %start
2982; RV64I-NEXT:    mv s1, s2
2983; RV64I-NEXT:  .LBB36_6: # %start
2984; RV64I-NEXT:    slli a0, s1, 56
2985; RV64I-NEXT:    srai a0, a0, 56
2986; RV64I-NEXT:    ld ra, 40(sp) # 8-byte Folded Reload
2987; RV64I-NEXT:    ld s0, 32(sp) # 8-byte Folded Reload
2988; RV64I-NEXT:    ld s1, 24(sp) # 8-byte Folded Reload
2989; RV64I-NEXT:    ld s2, 16(sp) # 8-byte Folded Reload
2990; RV64I-NEXT:    ld s3, 8(sp) # 8-byte Folded Reload
2991; RV64I-NEXT:    addi sp, sp, 48
2992; RV64I-NEXT:    ret
2993start:
2994  %0 = tail call i8 @llvm.fptosi.sat.i8.f16(half %a)
2995  ret i8 %0
2996}
2997declare i8 @llvm.fptosi.sat.i8.f16(half)
2998
2999define zeroext i8 @fcvt_wu_s_i8(half %a) nounwind {
3000; RV32IZFH-LABEL: fcvt_wu_s_i8:
3001; RV32IZFH:       # %bb.0:
3002; RV32IZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
3003; RV32IZFH-NEXT:    ret
3004;
3005; RV64IZFH-LABEL: fcvt_wu_s_i8:
3006; RV64IZFH:       # %bb.0:
3007; RV64IZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
3008; RV64IZFH-NEXT:    ret
3009;
3010; RV32IDZFH-LABEL: fcvt_wu_s_i8:
3011; RV32IDZFH:       # %bb.0:
3012; RV32IDZFH-NEXT:    fcvt.wu.h a0, fa0, rtz
3013; RV32IDZFH-NEXT:    ret
3014;
3015; RV64IDZFH-LABEL: fcvt_wu_s_i8:
3016; RV64IDZFH:       # %bb.0:
3017; RV64IDZFH-NEXT:    fcvt.lu.h a0, fa0, rtz
3018; RV64IDZFH-NEXT:    ret
3019;
3020; RV32I-LABEL: fcvt_wu_s_i8:
3021; RV32I:       # %bb.0:
3022; RV32I-NEXT:    addi sp, sp, -16
3023; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
3024; RV32I-NEXT:    slli a0, a0, 16
3025; RV32I-NEXT:    srli a0, a0, 16
3026; RV32I-NEXT:    call __gnu_h2f_ieee@plt
3027; RV32I-NEXT:    call __fixunssfsi@plt
3028; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
3029; RV32I-NEXT:    addi sp, sp, 16
3030; RV32I-NEXT:    ret
3031;
3032; RV64I-LABEL: fcvt_wu_s_i8:
3033; RV64I:       # %bb.0:
3034; RV64I-NEXT:    addi sp, sp, -16
3035; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
3036; RV64I-NEXT:    slli a0, a0, 48
3037; RV64I-NEXT:    srli a0, a0, 48
3038; RV64I-NEXT:    call __gnu_h2f_ieee@plt
3039; RV64I-NEXT:    call __fixunssfdi@plt
3040; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
3041; RV64I-NEXT:    addi sp, sp, 16
3042; RV64I-NEXT:    ret
3043  %1 = fptoui half %a to i8
3044  ret i8 %1
3045}
3046
3047define zeroext i8 @fcvt_wu_s_sat_i8(half %a) nounwind {
3048; RV32IZFH-LABEL: fcvt_wu_s_sat_i8:
3049; RV32IZFH:       # %bb.0: # %start
3050; RV32IZFH-NEXT:    lui a0, %hi(.LCPI38_0)
3051; RV32IZFH-NEXT:    flw ft0, %lo(.LCPI38_0)(a0)
3052; RV32IZFH-NEXT:    fcvt.s.h ft1, fa0
3053; RV32IZFH-NEXT:    fmv.w.x ft2, zero
3054; RV32IZFH-NEXT:    fmax.s ft1, ft1, ft2
3055; RV32IZFH-NEXT:    fmin.s ft0, ft1, ft0
3056; RV32IZFH-NEXT:    fcvt.wu.s a0, ft0, rtz
3057; RV32IZFH-NEXT:    ret
3058;
3059; RV64IZFH-LABEL: fcvt_wu_s_sat_i8:
3060; RV64IZFH:       # %bb.0: # %start
3061; RV64IZFH-NEXT:    lui a0, %hi(.LCPI38_0)
3062; RV64IZFH-NEXT:    flw ft0, %lo(.LCPI38_0)(a0)
3063; RV64IZFH-NEXT:    fcvt.s.h ft1, fa0
3064; RV64IZFH-NEXT:    fmv.w.x ft2, zero
3065; RV64IZFH-NEXT:    fmax.s ft1, ft1, ft2
3066; RV64IZFH-NEXT:    fmin.s ft0, ft1, ft0
3067; RV64IZFH-NEXT:    fcvt.lu.s a0, ft0, rtz
3068; RV64IZFH-NEXT:    ret
3069;
3070; RV32IDZFH-LABEL: fcvt_wu_s_sat_i8:
3071; RV32IDZFH:       # %bb.0: # %start
3072; RV32IDZFH-NEXT:    lui a0, %hi(.LCPI38_0)
3073; RV32IDZFH-NEXT:    flw ft0, %lo(.LCPI38_0)(a0)
3074; RV32IDZFH-NEXT:    fcvt.s.h ft1, fa0
3075; RV32IDZFH-NEXT:    fmv.w.x ft2, zero
3076; RV32IDZFH-NEXT:    fmax.s ft1, ft1, ft2
3077; RV32IDZFH-NEXT:    fmin.s ft0, ft1, ft0
3078; RV32IDZFH-NEXT:    fcvt.wu.s a0, ft0, rtz
3079; RV32IDZFH-NEXT:    ret
3080;
3081; RV64IDZFH-LABEL: fcvt_wu_s_sat_i8:
3082; RV64IDZFH:       # %bb.0: # %start
3083; RV64IDZFH-NEXT:    lui a0, %hi(.LCPI38_0)
3084; RV64IDZFH-NEXT:    flw ft0, %lo(.LCPI38_0)(a0)
3085; RV64IDZFH-NEXT:    fcvt.s.h ft1, fa0
3086; RV64IDZFH-NEXT:    fmv.w.x ft2, zero
3087; RV64IDZFH-NEXT:    fmax.s ft1, ft1, ft2
3088; RV64IDZFH-NEXT:    fmin.s ft0, ft1, ft0
3089; RV64IDZFH-NEXT:    fcvt.lu.s a0, ft0, rtz
3090; RV64IDZFH-NEXT:    ret
3091;
3092; RV32I-LABEL: fcvt_wu_s_sat_i8:
3093; RV32I:       # %bb.0: # %start
3094; RV32I-NEXT:    addi sp, sp, -16
3095; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
3096; RV32I-NEXT:    sw s0, 8(sp) # 4-byte Folded Spill
3097; RV32I-NEXT:    sw s1, 4(sp) # 4-byte Folded Spill
3098; RV32I-NEXT:    sw s2, 0(sp) # 4-byte Folded Spill
3099; RV32I-NEXT:    slli a0, a0, 16
3100; RV32I-NEXT:    srli a0, a0, 16
3101; RV32I-NEXT:    call __gnu_h2f_ieee@plt
3102; RV32I-NEXT:    mv s0, a0
3103; RV32I-NEXT:    li a1, 0
3104; RV32I-NEXT:    call __gesf2@plt
3105; RV32I-NEXT:    mv s1, a0
3106; RV32I-NEXT:    mv a0, s0
3107; RV32I-NEXT:    call __fixunssfsi@plt
3108; RV32I-NEXT:    li s2, 0
3109; RV32I-NEXT:    bltz s1, .LBB38_2
3110; RV32I-NEXT:  # %bb.1: # %start
3111; RV32I-NEXT:    mv s2, a0
3112; RV32I-NEXT:  .LBB38_2: # %start
3113; RV32I-NEXT:    lui a1, 276464
3114; RV32I-NEXT:    mv a0, s0
3115; RV32I-NEXT:    call __gtsf2@plt
3116; RV32I-NEXT:    li a1, 255
3117; RV32I-NEXT:    bgtz a0, .LBB38_4
3118; RV32I-NEXT:  # %bb.3: # %start
3119; RV32I-NEXT:    mv a1, s2
3120; RV32I-NEXT:  .LBB38_4: # %start
3121; RV32I-NEXT:    andi a0, a1, 255
3122; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
3123; RV32I-NEXT:    lw s0, 8(sp) # 4-byte Folded Reload
3124; RV32I-NEXT:    lw s1, 4(sp) # 4-byte Folded Reload
3125; RV32I-NEXT:    lw s2, 0(sp) # 4-byte Folded Reload
3126; RV32I-NEXT:    addi sp, sp, 16
3127; RV32I-NEXT:    ret
3128;
3129; RV64I-LABEL: fcvt_wu_s_sat_i8:
3130; RV64I:       # %bb.0: # %start
3131; RV64I-NEXT:    addi sp, sp, -32
3132; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
3133; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
3134; RV64I-NEXT:    sd s1, 8(sp) # 8-byte Folded Spill
3135; RV64I-NEXT:    sd s2, 0(sp) # 8-byte Folded Spill
3136; RV64I-NEXT:    slli a0, a0, 48
3137; RV64I-NEXT:    srli a0, a0, 48
3138; RV64I-NEXT:    call __gnu_h2f_ieee@plt
3139; RV64I-NEXT:    mv s0, a0
3140; RV64I-NEXT:    li a1, 0
3141; RV64I-NEXT:    call __gesf2@plt
3142; RV64I-NEXT:    mv s1, a0
3143; RV64I-NEXT:    mv a0, s0
3144; RV64I-NEXT:    call __fixunssfdi@plt
3145; RV64I-NEXT:    li s2, 0
3146; RV64I-NEXT:    bltz s1, .LBB38_2
3147; RV64I-NEXT:  # %bb.1: # %start
3148; RV64I-NEXT:    mv s2, a0
3149; RV64I-NEXT:  .LBB38_2: # %start
3150; RV64I-NEXT:    lui a1, 276464
3151; RV64I-NEXT:    mv a0, s0
3152; RV64I-NEXT:    call __gtsf2@plt
3153; RV64I-NEXT:    li a1, 255
3154; RV64I-NEXT:    bgtz a0, .LBB38_4
3155; RV64I-NEXT:  # %bb.3: # %start
3156; RV64I-NEXT:    mv a1, s2
3157; RV64I-NEXT:  .LBB38_4: # %start
3158; RV64I-NEXT:    andi a0, a1, 255
3159; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
3160; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
3161; RV64I-NEXT:    ld s1, 8(sp) # 8-byte Folded Reload
3162; RV64I-NEXT:    ld s2, 0(sp) # 8-byte Folded Reload
3163; RV64I-NEXT:    addi sp, sp, 32
3164; RV64I-NEXT:    ret
3165start:
3166  %0 = tail call i8 @llvm.fptoui.sat.i8.f16(half %a)
3167  ret i8 %0
3168}
3169declare i8 @llvm.fptoui.sat.i8.f16(half)
3170