1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh -verify-machineinstrs \ 3; RUN: -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IZFH %s 4; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfh -verify-machineinstrs \ 5; RUN: -target-abi lp64f < %s | FileCheck -check-prefix=RV64IZFH %s 6; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh -verify-machineinstrs \ 7; RUN: -target-abi ilp32d < %s | FileCheck -check-prefix=RV32IDZFH %s 8; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh -verify-machineinstrs \ 9; RUN: -target-abi lp64d < %s | FileCheck -check-prefix=RV64IDZFH %s 10; RUN: llc -mtriple=riscv32 -verify-machineinstrs \ 11; RUN: < %s | FileCheck -check-prefix=RV32I %s 12; RUN: llc -mtriple=riscv64 -verify-machineinstrs \ 13; RUN: < %s | FileCheck -check-prefix=RV64I %s 14 15define i16 @fcvt_si_h(half %a) nounwind { 16; RV32IZFH-LABEL: fcvt_si_h: 17; RV32IZFH: # %bb.0: 18; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 19; RV32IZFH-NEXT: ret 20; 21; RV64IZFH-LABEL: fcvt_si_h: 22; RV64IZFH: # %bb.0: 23; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 24; RV64IZFH-NEXT: ret 25; 26; RV32IDZFH-LABEL: fcvt_si_h: 27; RV32IDZFH: # %bb.0: 28; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 29; RV32IDZFH-NEXT: ret 30; 31; RV64IDZFH-LABEL: fcvt_si_h: 32; RV64IDZFH: # %bb.0: 33; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 34; RV64IDZFH-NEXT: ret 35; 36; RV32I-LABEL: fcvt_si_h: 37; RV32I: # %bb.0: 38; RV32I-NEXT: addi sp, sp, -16 39; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 40; RV32I-NEXT: lui a1, 16 41; RV32I-NEXT: addi a1, a1, -1 42; RV32I-NEXT: and a0, a0, a1 43; RV32I-NEXT: call __gnu_h2f_ieee@plt 44; RV32I-NEXT: call __fixsfsi@plt 45; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 46; RV32I-NEXT: addi sp, sp, 16 47; RV32I-NEXT: ret 48; 49; RV64I-LABEL: fcvt_si_h: 50; RV64I: # %bb.0: 51; RV64I-NEXT: addi sp, sp, -16 52; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 53; RV64I-NEXT: lui a1, 16 54; RV64I-NEXT: addiw a1, a1, -1 55; RV64I-NEXT: and a0, a0, a1 56; RV64I-NEXT: call __gnu_h2f_ieee@plt 57; RV64I-NEXT: call __fixsfdi@plt 58; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 59; RV64I-NEXT: addi sp, sp, 16 60; RV64I-NEXT: ret 61 %1 = fptosi half %a to i16 62 ret i16 %1 63} 64 65define i16 @fcvt_si_h_sat(half %a) nounwind { 66; RV32IZFH-LABEL: fcvt_si_h_sat: 67; RV32IZFH: # %bb.0: # %start 68; RV32IZFH-NEXT: fcvt.s.h ft0, fa0 69; RV32IZFH-NEXT: feq.s a0, ft0, ft0 70; RV32IZFH-NEXT: bnez a0, .LBB1_2 71; RV32IZFH-NEXT: # %bb.1: # %start 72; RV32IZFH-NEXT: li a0, 0 73; RV32IZFH-NEXT: ret 74; RV32IZFH-NEXT: .LBB1_2: 75; RV32IZFH-NEXT: lui a0, %hi(.LCPI1_0) 76; RV32IZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 77; RV32IZFH-NEXT: lui a0, %hi(.LCPI1_1) 78; RV32IZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 79; RV32IZFH-NEXT: fmax.s ft0, ft0, ft1 80; RV32IZFH-NEXT: fmin.s ft0, ft0, ft2 81; RV32IZFH-NEXT: fcvt.w.s a0, ft0, rtz 82; RV32IZFH-NEXT: ret 83; 84; RV64IZFH-LABEL: fcvt_si_h_sat: 85; RV64IZFH: # %bb.0: # %start 86; RV64IZFH-NEXT: fcvt.s.h ft0, fa0 87; RV64IZFH-NEXT: feq.s a0, ft0, ft0 88; RV64IZFH-NEXT: bnez a0, .LBB1_2 89; RV64IZFH-NEXT: # %bb.1: # %start 90; RV64IZFH-NEXT: li a0, 0 91; RV64IZFH-NEXT: ret 92; RV64IZFH-NEXT: .LBB1_2: 93; RV64IZFH-NEXT: lui a0, %hi(.LCPI1_0) 94; RV64IZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 95; RV64IZFH-NEXT: lui a0, %hi(.LCPI1_1) 96; RV64IZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 97; RV64IZFH-NEXT: fmax.s ft0, ft0, ft1 98; RV64IZFH-NEXT: fmin.s ft0, ft0, ft2 99; RV64IZFH-NEXT: fcvt.l.s a0, ft0, rtz 100; RV64IZFH-NEXT: ret 101; 102; RV32IDZFH-LABEL: fcvt_si_h_sat: 103; RV32IDZFH: # %bb.0: # %start 104; RV32IDZFH-NEXT: fcvt.s.h ft0, fa0 105; RV32IDZFH-NEXT: feq.s a0, ft0, ft0 106; RV32IDZFH-NEXT: bnez a0, .LBB1_2 107; RV32IDZFH-NEXT: # %bb.1: # %start 108; RV32IDZFH-NEXT: li a0, 0 109; RV32IDZFH-NEXT: ret 110; RV32IDZFH-NEXT: .LBB1_2: 111; RV32IDZFH-NEXT: lui a0, %hi(.LCPI1_0) 112; RV32IDZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 113; RV32IDZFH-NEXT: lui a0, %hi(.LCPI1_1) 114; RV32IDZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 115; RV32IDZFH-NEXT: fmax.s ft0, ft0, ft1 116; RV32IDZFH-NEXT: fmin.s ft0, ft0, ft2 117; RV32IDZFH-NEXT: fcvt.w.s a0, ft0, rtz 118; RV32IDZFH-NEXT: ret 119; 120; RV64IDZFH-LABEL: fcvt_si_h_sat: 121; RV64IDZFH: # %bb.0: # %start 122; RV64IDZFH-NEXT: fcvt.s.h ft0, fa0 123; RV64IDZFH-NEXT: feq.s a0, ft0, ft0 124; RV64IDZFH-NEXT: bnez a0, .LBB1_2 125; RV64IDZFH-NEXT: # %bb.1: # %start 126; RV64IDZFH-NEXT: li a0, 0 127; RV64IDZFH-NEXT: ret 128; RV64IDZFH-NEXT: .LBB1_2: 129; RV64IDZFH-NEXT: lui a0, %hi(.LCPI1_0) 130; RV64IDZFH-NEXT: flw ft1, %lo(.LCPI1_0)(a0) 131; RV64IDZFH-NEXT: lui a0, %hi(.LCPI1_1) 132; RV64IDZFH-NEXT: flw ft2, %lo(.LCPI1_1)(a0) 133; RV64IDZFH-NEXT: fmax.s ft0, ft0, ft1 134; RV64IDZFH-NEXT: fmin.s ft0, ft0, ft2 135; RV64IDZFH-NEXT: fcvt.l.s a0, ft0, rtz 136; RV64IDZFH-NEXT: ret 137; 138; RV32I-LABEL: fcvt_si_h_sat: 139; RV32I: # %bb.0: # %start 140; RV32I-NEXT: addi sp, sp, -32 141; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 142; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 143; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 144; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 145; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 146; RV32I-NEXT: lui a1, 16 147; RV32I-NEXT: addi a1, a1, -1 148; RV32I-NEXT: and a0, a0, a1 149; RV32I-NEXT: call __gnu_h2f_ieee@plt 150; RV32I-NEXT: mv s0, a0 151; RV32I-NEXT: lui a1, 815104 152; RV32I-NEXT: call __gesf2@plt 153; RV32I-NEXT: mv s2, a0 154; RV32I-NEXT: mv a0, s0 155; RV32I-NEXT: call __fixsfsi@plt 156; RV32I-NEXT: li s1, 0 157; RV32I-NEXT: lui s3, 1048568 158; RV32I-NEXT: bltz s2, .LBB1_2 159; RV32I-NEXT: # %bb.1: # %start 160; RV32I-NEXT: mv s3, a0 161; RV32I-NEXT: .LBB1_2: # %start 162; RV32I-NEXT: lui a0, 290816 163; RV32I-NEXT: addi a1, a0, -512 164; RV32I-NEXT: mv a0, s0 165; RV32I-NEXT: call __gtsf2@plt 166; RV32I-NEXT: bge s1, a0, .LBB1_4 167; RV32I-NEXT: # %bb.3: 168; RV32I-NEXT: lui a0, 8 169; RV32I-NEXT: addi s3, a0, -1 170; RV32I-NEXT: .LBB1_4: # %start 171; RV32I-NEXT: mv a0, s0 172; RV32I-NEXT: mv a1, s0 173; RV32I-NEXT: call __unordsf2@plt 174; RV32I-NEXT: bne a0, s1, .LBB1_6 175; RV32I-NEXT: # %bb.5: # %start 176; RV32I-NEXT: mv s1, s3 177; RV32I-NEXT: .LBB1_6: # %start 178; RV32I-NEXT: mv a0, s1 179; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 180; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 181; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 182; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 183; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 184; RV32I-NEXT: addi sp, sp, 32 185; RV32I-NEXT: ret 186; 187; RV64I-LABEL: fcvt_si_h_sat: 188; RV64I: # %bb.0: # %start 189; RV64I-NEXT: addi sp, sp, -48 190; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 191; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 192; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 193; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 194; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 195; RV64I-NEXT: lui a1, 16 196; RV64I-NEXT: addiw a1, a1, -1 197; RV64I-NEXT: and a0, a0, a1 198; RV64I-NEXT: call __gnu_h2f_ieee@plt 199; RV64I-NEXT: mv s0, a0 200; RV64I-NEXT: lui a1, 815104 201; RV64I-NEXT: call __gesf2@plt 202; RV64I-NEXT: mv s2, a0 203; RV64I-NEXT: mv a0, s0 204; RV64I-NEXT: call __fixsfdi@plt 205; RV64I-NEXT: li s1, 0 206; RV64I-NEXT: lui s3, 1048568 207; RV64I-NEXT: bltz s2, .LBB1_2 208; RV64I-NEXT: # %bb.1: # %start 209; RV64I-NEXT: mv s3, a0 210; RV64I-NEXT: .LBB1_2: # %start 211; RV64I-NEXT: lui a0, 290816 212; RV64I-NEXT: addiw a1, a0, -512 213; RV64I-NEXT: mv a0, s0 214; RV64I-NEXT: call __gtsf2@plt 215; RV64I-NEXT: bge s1, a0, .LBB1_4 216; RV64I-NEXT: # %bb.3: 217; RV64I-NEXT: lui a0, 8 218; RV64I-NEXT: addiw s3, a0, -1 219; RV64I-NEXT: .LBB1_4: # %start 220; RV64I-NEXT: mv a0, s0 221; RV64I-NEXT: mv a1, s0 222; RV64I-NEXT: call __unordsf2@plt 223; RV64I-NEXT: bne a0, s1, .LBB1_6 224; RV64I-NEXT: # %bb.5: # %start 225; RV64I-NEXT: mv s1, s3 226; RV64I-NEXT: .LBB1_6: # %start 227; RV64I-NEXT: mv a0, s1 228; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 229; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 230; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 231; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 232; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 233; RV64I-NEXT: addi sp, sp, 48 234; RV64I-NEXT: ret 235start: 236 %0 = tail call i16 @llvm.fptosi.sat.i16.f16(half %a) 237 ret i16 %0 238} 239declare i16 @llvm.fptosi.sat.i16.f16(half) 240 241define i16 @fcvt_ui_h(half %a) nounwind { 242; RV32IZFH-LABEL: fcvt_ui_h: 243; RV32IZFH: # %bb.0: 244; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 245; RV32IZFH-NEXT: ret 246; 247; RV64IZFH-LABEL: fcvt_ui_h: 248; RV64IZFH: # %bb.0: 249; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 250; RV64IZFH-NEXT: ret 251; 252; RV32IDZFH-LABEL: fcvt_ui_h: 253; RV32IDZFH: # %bb.0: 254; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 255; RV32IDZFH-NEXT: ret 256; 257; RV64IDZFH-LABEL: fcvt_ui_h: 258; RV64IDZFH: # %bb.0: 259; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 260; RV64IDZFH-NEXT: ret 261; 262; RV32I-LABEL: fcvt_ui_h: 263; RV32I: # %bb.0: 264; RV32I-NEXT: addi sp, sp, -16 265; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 266; RV32I-NEXT: lui a1, 16 267; RV32I-NEXT: addi a1, a1, -1 268; RV32I-NEXT: and a0, a0, a1 269; RV32I-NEXT: call __gnu_h2f_ieee@plt 270; RV32I-NEXT: call __fixunssfsi@plt 271; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 272; RV32I-NEXT: addi sp, sp, 16 273; RV32I-NEXT: ret 274; 275; RV64I-LABEL: fcvt_ui_h: 276; RV64I: # %bb.0: 277; RV64I-NEXT: addi sp, sp, -16 278; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 279; RV64I-NEXT: lui a1, 16 280; RV64I-NEXT: addiw a1, a1, -1 281; RV64I-NEXT: and a0, a0, a1 282; RV64I-NEXT: call __gnu_h2f_ieee@plt 283; RV64I-NEXT: call __fixunssfdi@plt 284; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 285; RV64I-NEXT: addi sp, sp, 16 286; RV64I-NEXT: ret 287 %1 = fptoui half %a to i16 288 ret i16 %1 289} 290 291; Test where the fptoui has multiple uses, one of which causes a sext to be 292; inserted on RV64. 293; FIXME: We should not have an fcvt.wu.h and an fcvt.lu.h. 294define i32 @fcvt_ui_h_multiple_use(half %x, i32* %y) { 295; RV32IZFH-LABEL: fcvt_ui_h_multiple_use: 296; RV32IZFH: # %bb.0: 297; RV32IZFH-NEXT: fcvt.wu.h a1, fa0, rtz 298; RV32IZFH-NEXT: li a0, 1 299; RV32IZFH-NEXT: beqz a1, .LBB3_2 300; RV32IZFH-NEXT: # %bb.1: 301; RV32IZFH-NEXT: mv a0, a1 302; RV32IZFH-NEXT: .LBB3_2: 303; RV32IZFH-NEXT: ret 304; 305; RV64IZFH-LABEL: fcvt_ui_h_multiple_use: 306; RV64IZFH: # %bb.0: 307; RV64IZFH-NEXT: fcvt.wu.h a1, fa0, rtz 308; RV64IZFH-NEXT: li a0, 1 309; RV64IZFH-NEXT: beqz a1, .LBB3_2 310; RV64IZFH-NEXT: # %bb.1: 311; RV64IZFH-NEXT: mv a0, a1 312; RV64IZFH-NEXT: .LBB3_2: 313; RV64IZFH-NEXT: ret 314; 315; RV32IDZFH-LABEL: fcvt_ui_h_multiple_use: 316; RV32IDZFH: # %bb.0: 317; RV32IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz 318; RV32IDZFH-NEXT: li a0, 1 319; RV32IDZFH-NEXT: beqz a1, .LBB3_2 320; RV32IDZFH-NEXT: # %bb.1: 321; RV32IDZFH-NEXT: mv a0, a1 322; RV32IDZFH-NEXT: .LBB3_2: 323; RV32IDZFH-NEXT: ret 324; 325; RV64IDZFH-LABEL: fcvt_ui_h_multiple_use: 326; RV64IDZFH: # %bb.0: 327; RV64IDZFH-NEXT: fcvt.wu.h a1, fa0, rtz 328; RV64IDZFH-NEXT: li a0, 1 329; RV64IDZFH-NEXT: beqz a1, .LBB3_2 330; RV64IDZFH-NEXT: # %bb.1: 331; RV64IDZFH-NEXT: mv a0, a1 332; RV64IDZFH-NEXT: .LBB3_2: 333; RV64IDZFH-NEXT: ret 334; 335; RV32I-LABEL: fcvt_ui_h_multiple_use: 336; RV32I: # %bb.0: 337; RV32I-NEXT: addi sp, sp, -16 338; RV32I-NEXT: .cfi_def_cfa_offset 16 339; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 340; RV32I-NEXT: .cfi_offset ra, -4 341; RV32I-NEXT: lui a1, 16 342; RV32I-NEXT: addi a1, a1, -1 343; RV32I-NEXT: and a0, a0, a1 344; RV32I-NEXT: call __gnu_h2f_ieee@plt 345; RV32I-NEXT: call __fixunssfsi@plt 346; RV32I-NEXT: mv a1, a0 347; RV32I-NEXT: li a0, 1 348; RV32I-NEXT: beqz a1, .LBB3_2 349; RV32I-NEXT: # %bb.1: 350; RV32I-NEXT: mv a0, a1 351; RV32I-NEXT: .LBB3_2: 352; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 353; RV32I-NEXT: addi sp, sp, 16 354; RV32I-NEXT: ret 355; 356; RV64I-LABEL: fcvt_ui_h_multiple_use: 357; RV64I: # %bb.0: 358; RV64I-NEXT: addi sp, sp, -16 359; RV64I-NEXT: .cfi_def_cfa_offset 16 360; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 361; RV64I-NEXT: .cfi_offset ra, -8 362; RV64I-NEXT: lui a1, 16 363; RV64I-NEXT: addiw a1, a1, -1 364; RV64I-NEXT: and a0, a0, a1 365; RV64I-NEXT: call __gnu_h2f_ieee@plt 366; RV64I-NEXT: call __fixunssfdi@plt 367; RV64I-NEXT: sext.w a2, a0 368; RV64I-NEXT: li a1, 1 369; RV64I-NEXT: beqz a2, .LBB3_2 370; RV64I-NEXT: # %bb.1: 371; RV64I-NEXT: mv a1, a0 372; RV64I-NEXT: .LBB3_2: 373; RV64I-NEXT: mv a0, a1 374; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 375; RV64I-NEXT: addi sp, sp, 16 376; RV64I-NEXT: ret 377 %a = fptoui half %x to i32 378 %b = icmp eq i32 %a, 0 379 %c = select i1 %b, i32 1, i32 %a 380 ret i32 %c 381} 382 383define i16 @fcvt_ui_h_sat(half %a) nounwind { 384; RV32IZFH-LABEL: fcvt_ui_h_sat: 385; RV32IZFH: # %bb.0: # %start 386; RV32IZFH-NEXT: lui a0, %hi(.LCPI4_0) 387; RV32IZFH-NEXT: flw ft0, %lo(.LCPI4_0)(a0) 388; RV32IZFH-NEXT: fcvt.s.h ft1, fa0 389; RV32IZFH-NEXT: fmv.w.x ft2, zero 390; RV32IZFH-NEXT: fmax.s ft1, ft1, ft2 391; RV32IZFH-NEXT: fmin.s ft0, ft1, ft0 392; RV32IZFH-NEXT: fcvt.wu.s a0, ft0, rtz 393; RV32IZFH-NEXT: ret 394; 395; RV64IZFH-LABEL: fcvt_ui_h_sat: 396; RV64IZFH: # %bb.0: # %start 397; RV64IZFH-NEXT: lui a0, %hi(.LCPI4_0) 398; RV64IZFH-NEXT: flw ft0, %lo(.LCPI4_0)(a0) 399; RV64IZFH-NEXT: fcvt.s.h ft1, fa0 400; RV64IZFH-NEXT: fmv.w.x ft2, zero 401; RV64IZFH-NEXT: fmax.s ft1, ft1, ft2 402; RV64IZFH-NEXT: fmin.s ft0, ft1, ft0 403; RV64IZFH-NEXT: fcvt.lu.s a0, ft0, rtz 404; RV64IZFH-NEXT: ret 405; 406; RV32IDZFH-LABEL: fcvt_ui_h_sat: 407; RV32IDZFH: # %bb.0: # %start 408; RV32IDZFH-NEXT: lui a0, %hi(.LCPI4_0) 409; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI4_0)(a0) 410; RV32IDZFH-NEXT: fcvt.s.h ft1, fa0 411; RV32IDZFH-NEXT: fmv.w.x ft2, zero 412; RV32IDZFH-NEXT: fmax.s ft1, ft1, ft2 413; RV32IDZFH-NEXT: fmin.s ft0, ft1, ft0 414; RV32IDZFH-NEXT: fcvt.wu.s a0, ft0, rtz 415; RV32IDZFH-NEXT: ret 416; 417; RV64IDZFH-LABEL: fcvt_ui_h_sat: 418; RV64IDZFH: # %bb.0: # %start 419; RV64IDZFH-NEXT: lui a0, %hi(.LCPI4_0) 420; RV64IDZFH-NEXT: flw ft0, %lo(.LCPI4_0)(a0) 421; RV64IDZFH-NEXT: fcvt.s.h ft1, fa0 422; RV64IDZFH-NEXT: fmv.w.x ft2, zero 423; RV64IDZFH-NEXT: fmax.s ft1, ft1, ft2 424; RV64IDZFH-NEXT: fmin.s ft0, ft1, ft0 425; RV64IDZFH-NEXT: fcvt.lu.s a0, ft0, rtz 426; RV64IDZFH-NEXT: ret 427; 428; RV32I-LABEL: fcvt_ui_h_sat: 429; RV32I: # %bb.0: # %start 430; RV32I-NEXT: addi sp, sp, -32 431; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 432; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 433; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 434; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 435; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 436; RV32I-NEXT: lui a1, 16 437; RV32I-NEXT: addi s2, a1, -1 438; RV32I-NEXT: and a0, a0, s2 439; RV32I-NEXT: call __gnu_h2f_ieee@plt 440; RV32I-NEXT: mv s1, a0 441; RV32I-NEXT: li a1, 0 442; RV32I-NEXT: call __gesf2@plt 443; RV32I-NEXT: mv s0, a0 444; RV32I-NEXT: mv a0, s1 445; RV32I-NEXT: call __fixunssfsi@plt 446; RV32I-NEXT: li s3, 0 447; RV32I-NEXT: bltz s0, .LBB4_2 448; RV32I-NEXT: # %bb.1: # %start 449; RV32I-NEXT: mv s3, a0 450; RV32I-NEXT: .LBB4_2: # %start 451; RV32I-NEXT: lui a0, 292864 452; RV32I-NEXT: addi a1, a0, -256 453; RV32I-NEXT: mv a0, s1 454; RV32I-NEXT: call __gtsf2@plt 455; RV32I-NEXT: bgtz a0, .LBB4_4 456; RV32I-NEXT: # %bb.3: # %start 457; RV32I-NEXT: mv s2, s3 458; RV32I-NEXT: .LBB4_4: # %start 459; RV32I-NEXT: mv a0, s2 460; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 461; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 462; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 463; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 464; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 465; RV32I-NEXT: addi sp, sp, 32 466; RV32I-NEXT: ret 467; 468; RV64I-LABEL: fcvt_ui_h_sat: 469; RV64I: # %bb.0: # %start 470; RV64I-NEXT: addi sp, sp, -48 471; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 472; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 473; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 474; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 475; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 476; RV64I-NEXT: lui a1, 16 477; RV64I-NEXT: addiw s2, a1, -1 478; RV64I-NEXT: and a0, a0, s2 479; RV64I-NEXT: call __gnu_h2f_ieee@plt 480; RV64I-NEXT: mv s1, a0 481; RV64I-NEXT: li a1, 0 482; RV64I-NEXT: call __gesf2@plt 483; RV64I-NEXT: mv s0, a0 484; RV64I-NEXT: mv a0, s1 485; RV64I-NEXT: call __fixunssfdi@plt 486; RV64I-NEXT: li s3, 0 487; RV64I-NEXT: bltz s0, .LBB4_2 488; RV64I-NEXT: # %bb.1: # %start 489; RV64I-NEXT: mv s3, a0 490; RV64I-NEXT: .LBB4_2: # %start 491; RV64I-NEXT: lui a0, 292864 492; RV64I-NEXT: addiw a1, a0, -256 493; RV64I-NEXT: mv a0, s1 494; RV64I-NEXT: call __gtsf2@plt 495; RV64I-NEXT: bgtz a0, .LBB4_4 496; RV64I-NEXT: # %bb.3: # %start 497; RV64I-NEXT: mv s2, s3 498; RV64I-NEXT: .LBB4_4: # %start 499; RV64I-NEXT: mv a0, s2 500; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 501; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 502; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 503; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 504; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 505; RV64I-NEXT: addi sp, sp, 48 506; RV64I-NEXT: ret 507start: 508 %0 = tail call i16 @llvm.fptoui.sat.i16.f16(half %a) 509 ret i16 %0 510} 511declare i16 @llvm.fptoui.sat.i16.f16(half) 512 513define i32 @fcvt_w_h(half %a) nounwind { 514; RV32IZFH-LABEL: fcvt_w_h: 515; RV32IZFH: # %bb.0: 516; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 517; RV32IZFH-NEXT: ret 518; 519; RV64IZFH-LABEL: fcvt_w_h: 520; RV64IZFH: # %bb.0: 521; RV64IZFH-NEXT: fcvt.w.h a0, fa0, rtz 522; RV64IZFH-NEXT: ret 523; 524; RV32IDZFH-LABEL: fcvt_w_h: 525; RV32IDZFH: # %bb.0: 526; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 527; RV32IDZFH-NEXT: ret 528; 529; RV64IDZFH-LABEL: fcvt_w_h: 530; RV64IDZFH: # %bb.0: 531; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 532; RV64IDZFH-NEXT: ret 533; 534; RV32I-LABEL: fcvt_w_h: 535; RV32I: # %bb.0: 536; RV32I-NEXT: addi sp, sp, -16 537; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 538; RV32I-NEXT: lui a1, 16 539; RV32I-NEXT: addi a1, a1, -1 540; RV32I-NEXT: and a0, a0, a1 541; RV32I-NEXT: call __gnu_h2f_ieee@plt 542; RV32I-NEXT: call __fixsfsi@plt 543; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 544; RV32I-NEXT: addi sp, sp, 16 545; RV32I-NEXT: ret 546; 547; RV64I-LABEL: fcvt_w_h: 548; RV64I: # %bb.0: 549; RV64I-NEXT: addi sp, sp, -16 550; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 551; RV64I-NEXT: lui a1, 16 552; RV64I-NEXT: addiw a1, a1, -1 553; RV64I-NEXT: and a0, a0, a1 554; RV64I-NEXT: call __gnu_h2f_ieee@plt 555; RV64I-NEXT: call __fixsfdi@plt 556; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 557; RV64I-NEXT: addi sp, sp, 16 558; RV64I-NEXT: ret 559 %1 = fptosi half %a to i32 560 ret i32 %1 561} 562 563define i32 @fcvt_w_h_sat(half %a) nounwind { 564; RV32IZFH-LABEL: fcvt_w_h_sat: 565; RV32IZFH: # %bb.0: # %start 566; RV32IZFH-NEXT: feq.h a0, fa0, fa0 567; RV32IZFH-NEXT: bnez a0, .LBB6_2 568; RV32IZFH-NEXT: # %bb.1: # %start 569; RV32IZFH-NEXT: li a0, 0 570; RV32IZFH-NEXT: ret 571; RV32IZFH-NEXT: .LBB6_2: 572; RV32IZFH-NEXT: fcvt.w.h a0, fa0, rtz 573; RV32IZFH-NEXT: ret 574; 575; RV64IZFH-LABEL: fcvt_w_h_sat: 576; RV64IZFH: # %bb.0: # %start 577; RV64IZFH-NEXT: feq.h a0, fa0, fa0 578; RV64IZFH-NEXT: bnez a0, .LBB6_2 579; RV64IZFH-NEXT: # %bb.1: # %start 580; RV64IZFH-NEXT: li a0, 0 581; RV64IZFH-NEXT: ret 582; RV64IZFH-NEXT: .LBB6_2: 583; RV64IZFH-NEXT: fcvt.w.h a0, fa0, rtz 584; RV64IZFH-NEXT: ret 585; 586; RV32IDZFH-LABEL: fcvt_w_h_sat: 587; RV32IDZFH: # %bb.0: # %start 588; RV32IDZFH-NEXT: feq.h a0, fa0, fa0 589; RV32IDZFH-NEXT: bnez a0, .LBB6_2 590; RV32IDZFH-NEXT: # %bb.1: # %start 591; RV32IDZFH-NEXT: li a0, 0 592; RV32IDZFH-NEXT: ret 593; RV32IDZFH-NEXT: .LBB6_2: 594; RV32IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 595; RV32IDZFH-NEXT: ret 596; 597; RV64IDZFH-LABEL: fcvt_w_h_sat: 598; RV64IDZFH: # %bb.0: # %start 599; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 600; RV64IDZFH-NEXT: bnez a0, .LBB6_2 601; RV64IDZFH-NEXT: # %bb.1: # %start 602; RV64IDZFH-NEXT: li a0, 0 603; RV64IDZFH-NEXT: ret 604; RV64IDZFH-NEXT: .LBB6_2: 605; RV64IDZFH-NEXT: fcvt.w.h a0, fa0, rtz 606; RV64IDZFH-NEXT: ret 607; 608; RV32I-LABEL: fcvt_w_h_sat: 609; RV32I: # %bb.0: # %start 610; RV32I-NEXT: addi sp, sp, -32 611; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 612; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 613; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 614; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 615; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 616; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 617; RV32I-NEXT: lui a1, 16 618; RV32I-NEXT: addi a1, a1, -1 619; RV32I-NEXT: and a0, a0, a1 620; RV32I-NEXT: call __gnu_h2f_ieee@plt 621; RV32I-NEXT: mv s0, a0 622; RV32I-NEXT: lui a1, 847872 623; RV32I-NEXT: call __gesf2@plt 624; RV32I-NEXT: mv s2, a0 625; RV32I-NEXT: mv a0, s0 626; RV32I-NEXT: call __fixsfsi@plt 627; RV32I-NEXT: li s1, 0 628; RV32I-NEXT: lui s4, 524288 629; RV32I-NEXT: lui s3, 524288 630; RV32I-NEXT: bltz s2, .LBB6_2 631; RV32I-NEXT: # %bb.1: # %start 632; RV32I-NEXT: mv s3, a0 633; RV32I-NEXT: .LBB6_2: # %start 634; RV32I-NEXT: lui a0, 323584 635; RV32I-NEXT: addi a1, a0, -1 636; RV32I-NEXT: mv a0, s0 637; RV32I-NEXT: call __gtsf2@plt 638; RV32I-NEXT: bge s1, a0, .LBB6_4 639; RV32I-NEXT: # %bb.3: 640; RV32I-NEXT: addi s3, s4, -1 641; RV32I-NEXT: .LBB6_4: # %start 642; RV32I-NEXT: mv a0, s0 643; RV32I-NEXT: mv a1, s0 644; RV32I-NEXT: call __unordsf2@plt 645; RV32I-NEXT: bne a0, s1, .LBB6_6 646; RV32I-NEXT: # %bb.5: # %start 647; RV32I-NEXT: mv s1, s3 648; RV32I-NEXT: .LBB6_6: # %start 649; RV32I-NEXT: mv a0, s1 650; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 651; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 652; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 653; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 654; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 655; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 656; RV32I-NEXT: addi sp, sp, 32 657; RV32I-NEXT: ret 658; 659; RV64I-LABEL: fcvt_w_h_sat: 660; RV64I: # %bb.0: # %start 661; RV64I-NEXT: addi sp, sp, -48 662; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 663; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 664; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 665; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 666; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 667; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill 668; RV64I-NEXT: lui a1, 16 669; RV64I-NEXT: addiw a1, a1, -1 670; RV64I-NEXT: and a0, a0, a1 671; RV64I-NEXT: call __gnu_h2f_ieee@plt 672; RV64I-NEXT: mv s0, a0 673; RV64I-NEXT: lui a1, 847872 674; RV64I-NEXT: call __gesf2@plt 675; RV64I-NEXT: mv s2, a0 676; RV64I-NEXT: mv a0, s0 677; RV64I-NEXT: call __fixsfdi@plt 678; RV64I-NEXT: li s1, 0 679; RV64I-NEXT: lui s4, 524288 680; RV64I-NEXT: lui s3, 524288 681; RV64I-NEXT: bltz s2, .LBB6_2 682; RV64I-NEXT: # %bb.1: # %start 683; RV64I-NEXT: mv s3, a0 684; RV64I-NEXT: .LBB6_2: # %start 685; RV64I-NEXT: lui a0, 323584 686; RV64I-NEXT: addiw a1, a0, -1 687; RV64I-NEXT: mv a0, s0 688; RV64I-NEXT: call __gtsf2@plt 689; RV64I-NEXT: bge s1, a0, .LBB6_4 690; RV64I-NEXT: # %bb.3: 691; RV64I-NEXT: addiw s3, s4, -1 692; RV64I-NEXT: .LBB6_4: # %start 693; RV64I-NEXT: mv a0, s0 694; RV64I-NEXT: mv a1, s0 695; RV64I-NEXT: call __unordsf2@plt 696; RV64I-NEXT: bne a0, s1, .LBB6_6 697; RV64I-NEXT: # %bb.5: # %start 698; RV64I-NEXT: mv s1, s3 699; RV64I-NEXT: .LBB6_6: # %start 700; RV64I-NEXT: mv a0, s1 701; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 702; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 703; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 704; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 705; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 706; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload 707; RV64I-NEXT: addi sp, sp, 48 708; RV64I-NEXT: ret 709start: 710 %0 = tail call i32 @llvm.fptosi.sat.i32.f16(half %a) 711 ret i32 %0 712} 713declare i32 @llvm.fptosi.sat.i32.f16(half) 714 715define i32 @fcvt_wu_h(half %a) nounwind { 716; RV32IZFH-LABEL: fcvt_wu_h: 717; RV32IZFH: # %bb.0: 718; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 719; RV32IZFH-NEXT: ret 720; 721; RV64IZFH-LABEL: fcvt_wu_h: 722; RV64IZFH: # %bb.0: 723; RV64IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 724; RV64IZFH-NEXT: ret 725; 726; RV32IDZFH-LABEL: fcvt_wu_h: 727; RV32IDZFH: # %bb.0: 728; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 729; RV32IDZFH-NEXT: ret 730; 731; RV64IDZFH-LABEL: fcvt_wu_h: 732; RV64IDZFH: # %bb.0: 733; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 734; RV64IDZFH-NEXT: ret 735; 736; RV32I-LABEL: fcvt_wu_h: 737; RV32I: # %bb.0: 738; RV32I-NEXT: addi sp, sp, -16 739; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 740; RV32I-NEXT: lui a1, 16 741; RV32I-NEXT: addi a1, a1, -1 742; RV32I-NEXT: and a0, a0, a1 743; RV32I-NEXT: call __gnu_h2f_ieee@plt 744; RV32I-NEXT: call __fixunssfsi@plt 745; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 746; RV32I-NEXT: addi sp, sp, 16 747; RV32I-NEXT: ret 748; 749; RV64I-LABEL: fcvt_wu_h: 750; RV64I: # %bb.0: 751; RV64I-NEXT: addi sp, sp, -16 752; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 753; RV64I-NEXT: lui a1, 16 754; RV64I-NEXT: addiw a1, a1, -1 755; RV64I-NEXT: and a0, a0, a1 756; RV64I-NEXT: call __gnu_h2f_ieee@plt 757; RV64I-NEXT: call __fixunssfdi@plt 758; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 759; RV64I-NEXT: addi sp, sp, 16 760; RV64I-NEXT: ret 761 %1 = fptoui half %a to i32 762 ret i32 %1 763} 764 765define i32 @fcvt_wu_h_sat(half %a) nounwind { 766; RV32IZFH-LABEL: fcvt_wu_h_sat: 767; RV32IZFH: # %bb.0: # %start 768; RV32IZFH-NEXT: feq.h a0, fa0, fa0 769; RV32IZFH-NEXT: bnez a0, .LBB8_2 770; RV32IZFH-NEXT: # %bb.1: # %start 771; RV32IZFH-NEXT: li a0, 0 772; RV32IZFH-NEXT: ret 773; RV32IZFH-NEXT: .LBB8_2: 774; RV32IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 775; RV32IZFH-NEXT: ret 776; 777; RV64IZFH-LABEL: fcvt_wu_h_sat: 778; RV64IZFH: # %bb.0: # %start 779; RV64IZFH-NEXT: feq.h a0, fa0, fa0 780; RV64IZFH-NEXT: bnez a0, .LBB8_2 781; RV64IZFH-NEXT: # %bb.1: # %start 782; RV64IZFH-NEXT: li a0, 0 783; RV64IZFH-NEXT: ret 784; RV64IZFH-NEXT: .LBB8_2: 785; RV64IZFH-NEXT: fcvt.wu.h a0, fa0, rtz 786; RV64IZFH-NEXT: ret 787; 788; RV32IDZFH-LABEL: fcvt_wu_h_sat: 789; RV32IDZFH: # %bb.0: # %start 790; RV32IDZFH-NEXT: feq.h a0, fa0, fa0 791; RV32IDZFH-NEXT: bnez a0, .LBB8_2 792; RV32IDZFH-NEXT: # %bb.1: # %start 793; RV32IDZFH-NEXT: li a0, 0 794; RV32IDZFH-NEXT: ret 795; RV32IDZFH-NEXT: .LBB8_2: 796; RV32IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 797; RV32IDZFH-NEXT: ret 798; 799; RV64IDZFH-LABEL: fcvt_wu_h_sat: 800; RV64IDZFH: # %bb.0: # %start 801; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 802; RV64IDZFH-NEXT: bnez a0, .LBB8_2 803; RV64IDZFH-NEXT: # %bb.1: # %start 804; RV64IDZFH-NEXT: li a0, 0 805; RV64IDZFH-NEXT: ret 806; RV64IDZFH-NEXT: .LBB8_2: 807; RV64IDZFH-NEXT: fcvt.wu.h a0, fa0, rtz 808; RV64IDZFH-NEXT: ret 809; 810; RV32I-LABEL: fcvt_wu_h_sat: 811; RV32I: # %bb.0: # %start 812; RV32I-NEXT: addi sp, sp, -16 813; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 814; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 815; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 816; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill 817; RV32I-NEXT: lui a1, 16 818; RV32I-NEXT: addi a1, a1, -1 819; RV32I-NEXT: and a0, a0, a1 820; RV32I-NEXT: call __gnu_h2f_ieee@plt 821; RV32I-NEXT: mv s0, a0 822; RV32I-NEXT: li a1, 0 823; RV32I-NEXT: call __gesf2@plt 824; RV32I-NEXT: mv s1, a0 825; RV32I-NEXT: mv a0, s0 826; RV32I-NEXT: call __fixunssfsi@plt 827; RV32I-NEXT: li s2, 0 828; RV32I-NEXT: bltz s1, .LBB8_2 829; RV32I-NEXT: # %bb.1: # %start 830; RV32I-NEXT: mv s2, a0 831; RV32I-NEXT: .LBB8_2: # %start 832; RV32I-NEXT: lui a0, 325632 833; RV32I-NEXT: addi a1, a0, -1 834; RV32I-NEXT: mv a0, s0 835; RV32I-NEXT: call __gtsf2@plt 836; RV32I-NEXT: mv a1, a0 837; RV32I-NEXT: li a0, -1 838; RV32I-NEXT: bgtz a1, .LBB8_4 839; RV32I-NEXT: # %bb.3: # %start 840; RV32I-NEXT: mv a0, s2 841; RV32I-NEXT: .LBB8_4: # %start 842; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 843; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 844; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 845; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload 846; RV32I-NEXT: addi sp, sp, 16 847; RV32I-NEXT: ret 848; 849; RV64I-LABEL: fcvt_wu_h_sat: 850; RV64I: # %bb.0: # %start 851; RV64I-NEXT: addi sp, sp, -32 852; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 853; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 854; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 855; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 856; RV64I-NEXT: lui a1, 16 857; RV64I-NEXT: addiw a1, a1, -1 858; RV64I-NEXT: and a0, a0, a1 859; RV64I-NEXT: call __gnu_h2f_ieee@plt 860; RV64I-NEXT: mv s0, a0 861; RV64I-NEXT: li a1, 0 862; RV64I-NEXT: call __gesf2@plt 863; RV64I-NEXT: mv s2, a0 864; RV64I-NEXT: mv a0, s0 865; RV64I-NEXT: call __fixunssfdi@plt 866; RV64I-NEXT: li s1, 0 867; RV64I-NEXT: bltz s2, .LBB8_2 868; RV64I-NEXT: # %bb.1: # %start 869; RV64I-NEXT: mv s1, a0 870; RV64I-NEXT: .LBB8_2: # %start 871; RV64I-NEXT: lui a0, 325632 872; RV64I-NEXT: addiw a1, a0, -1 873; RV64I-NEXT: mv a0, s0 874; RV64I-NEXT: call __gtsf2@plt 875; RV64I-NEXT: blez a0, .LBB8_4 876; RV64I-NEXT: # %bb.3: 877; RV64I-NEXT: li a0, -1 878; RV64I-NEXT: srli s1, a0, 32 879; RV64I-NEXT: .LBB8_4: # %start 880; RV64I-NEXT: mv a0, s1 881; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 882; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 883; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 884; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 885; RV64I-NEXT: addi sp, sp, 32 886; RV64I-NEXT: ret 887start: 888 %0 = tail call i32 @llvm.fptoui.sat.i32.f16(half %a) 889 ret i32 %0 890} 891declare i32 @llvm.fptoui.sat.i32.f16(half) 892 893define i64 @fcvt_l_h(half %a) nounwind { 894; RV32IZFH-LABEL: fcvt_l_h: 895; RV32IZFH: # %bb.0: 896; RV32IZFH-NEXT: addi sp, sp, -16 897; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 898; RV32IZFH-NEXT: call __fixhfdi@plt 899; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 900; RV32IZFH-NEXT: addi sp, sp, 16 901; RV32IZFH-NEXT: ret 902; 903; RV64IZFH-LABEL: fcvt_l_h: 904; RV64IZFH: # %bb.0: 905; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 906; RV64IZFH-NEXT: ret 907; 908; RV32IDZFH-LABEL: fcvt_l_h: 909; RV32IDZFH: # %bb.0: 910; RV32IDZFH-NEXT: addi sp, sp, -16 911; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 912; RV32IDZFH-NEXT: call __fixhfdi@plt 913; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 914; RV32IDZFH-NEXT: addi sp, sp, 16 915; RV32IDZFH-NEXT: ret 916; 917; RV64IDZFH-LABEL: fcvt_l_h: 918; RV64IDZFH: # %bb.0: 919; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 920; RV64IDZFH-NEXT: ret 921; 922; RV32I-LABEL: fcvt_l_h: 923; RV32I: # %bb.0: 924; RV32I-NEXT: addi sp, sp, -16 925; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 926; RV32I-NEXT: lui a1, 16 927; RV32I-NEXT: addi a1, a1, -1 928; RV32I-NEXT: and a0, a0, a1 929; RV32I-NEXT: call __gnu_h2f_ieee@plt 930; RV32I-NEXT: call __fixsfdi@plt 931; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 932; RV32I-NEXT: addi sp, sp, 16 933; RV32I-NEXT: ret 934; 935; RV64I-LABEL: fcvt_l_h: 936; RV64I: # %bb.0: 937; RV64I-NEXT: addi sp, sp, -16 938; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 939; RV64I-NEXT: lui a1, 16 940; RV64I-NEXT: addiw a1, a1, -1 941; RV64I-NEXT: and a0, a0, a1 942; RV64I-NEXT: call __gnu_h2f_ieee@plt 943; RV64I-NEXT: call __fixsfdi@plt 944; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 945; RV64I-NEXT: addi sp, sp, 16 946; RV64I-NEXT: ret 947 %1 = fptosi half %a to i64 948 ret i64 %1 949} 950 951define i64 @fcvt_l_h_sat(half %a) nounwind { 952; RV32IZFH-LABEL: fcvt_l_h_sat: 953; RV32IZFH: # %bb.0: # %start 954; RV32IZFH-NEXT: addi sp, sp, -16 955; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 956; RV32IZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 957; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 958; RV32IZFH-NEXT: lui a0, %hi(.LCPI10_0) 959; RV32IZFH-NEXT: flw ft0, %lo(.LCPI10_0)(a0) 960; RV32IZFH-NEXT: fcvt.s.h fs0, fa0 961; RV32IZFH-NEXT: fle.s s0, ft0, fs0 962; RV32IZFH-NEXT: fmv.s fa0, fs0 963; RV32IZFH-NEXT: call __fixsfdi@plt 964; RV32IZFH-NEXT: mv a2, a0 965; RV32IZFH-NEXT: bnez s0, .LBB10_2 966; RV32IZFH-NEXT: # %bb.1: # %start 967; RV32IZFH-NEXT: li a2, 0 968; RV32IZFH-NEXT: .LBB10_2: # %start 969; RV32IZFH-NEXT: lui a0, %hi(.LCPI10_1) 970; RV32IZFH-NEXT: flw ft0, %lo(.LCPI10_1)(a0) 971; RV32IZFH-NEXT: flt.s a3, ft0, fs0 972; RV32IZFH-NEXT: li a0, -1 973; RV32IZFH-NEXT: beqz a3, .LBB10_9 974; RV32IZFH-NEXT: # %bb.3: # %start 975; RV32IZFH-NEXT: feq.s a2, fs0, fs0 976; RV32IZFH-NEXT: beqz a2, .LBB10_10 977; RV32IZFH-NEXT: .LBB10_4: # %start 978; RV32IZFH-NEXT: lui a4, 524288 979; RV32IZFH-NEXT: beqz s0, .LBB10_11 980; RV32IZFH-NEXT: .LBB10_5: # %start 981; RV32IZFH-NEXT: bnez a3, .LBB10_12 982; RV32IZFH-NEXT: .LBB10_6: # %start 983; RV32IZFH-NEXT: bnez a2, .LBB10_8 984; RV32IZFH-NEXT: .LBB10_7: # %start 985; RV32IZFH-NEXT: li a1, 0 986; RV32IZFH-NEXT: .LBB10_8: # %start 987; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 988; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 989; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 990; RV32IZFH-NEXT: addi sp, sp, 16 991; RV32IZFH-NEXT: ret 992; RV32IZFH-NEXT: .LBB10_9: # %start 993; RV32IZFH-NEXT: mv a0, a2 994; RV32IZFH-NEXT: feq.s a2, fs0, fs0 995; RV32IZFH-NEXT: bnez a2, .LBB10_4 996; RV32IZFH-NEXT: .LBB10_10: # %start 997; RV32IZFH-NEXT: li a0, 0 998; RV32IZFH-NEXT: lui a4, 524288 999; RV32IZFH-NEXT: bnez s0, .LBB10_5 1000; RV32IZFH-NEXT: .LBB10_11: # %start 1001; RV32IZFH-NEXT: lui a1, 524288 1002; RV32IZFH-NEXT: beqz a3, .LBB10_6 1003; RV32IZFH-NEXT: .LBB10_12: 1004; RV32IZFH-NEXT: addi a1, a4, -1 1005; RV32IZFH-NEXT: beqz a2, .LBB10_7 1006; RV32IZFH-NEXT: j .LBB10_8 1007; 1008; RV64IZFH-LABEL: fcvt_l_h_sat: 1009; RV64IZFH: # %bb.0: # %start 1010; RV64IZFH-NEXT: feq.h a0, fa0, fa0 1011; RV64IZFH-NEXT: bnez a0, .LBB10_2 1012; RV64IZFH-NEXT: # %bb.1: # %start 1013; RV64IZFH-NEXT: li a0, 0 1014; RV64IZFH-NEXT: ret 1015; RV64IZFH-NEXT: .LBB10_2: 1016; RV64IZFH-NEXT: fcvt.l.h a0, fa0, rtz 1017; RV64IZFH-NEXT: ret 1018; 1019; RV32IDZFH-LABEL: fcvt_l_h_sat: 1020; RV32IDZFH: # %bb.0: # %start 1021; RV32IDZFH-NEXT: addi sp, sp, -16 1022; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1023; RV32IDZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1024; RV32IDZFH-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill 1025; RV32IDZFH-NEXT: lui a0, %hi(.LCPI10_0) 1026; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI10_0)(a0) 1027; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 1028; RV32IDZFH-NEXT: fle.s s0, ft0, fs0 1029; RV32IDZFH-NEXT: fmv.s fa0, fs0 1030; RV32IDZFH-NEXT: call __fixsfdi@plt 1031; RV32IDZFH-NEXT: mv a2, a0 1032; RV32IDZFH-NEXT: bnez s0, .LBB10_2 1033; RV32IDZFH-NEXT: # %bb.1: # %start 1034; RV32IDZFH-NEXT: li a2, 0 1035; RV32IDZFH-NEXT: .LBB10_2: # %start 1036; RV32IDZFH-NEXT: lui a0, %hi(.LCPI10_1) 1037; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI10_1)(a0) 1038; RV32IDZFH-NEXT: flt.s a3, ft0, fs0 1039; RV32IDZFH-NEXT: li a0, -1 1040; RV32IDZFH-NEXT: beqz a3, .LBB10_9 1041; RV32IDZFH-NEXT: # %bb.3: # %start 1042; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 1043; RV32IDZFH-NEXT: beqz a2, .LBB10_10 1044; RV32IDZFH-NEXT: .LBB10_4: # %start 1045; RV32IDZFH-NEXT: lui a4, 524288 1046; RV32IDZFH-NEXT: beqz s0, .LBB10_11 1047; RV32IDZFH-NEXT: .LBB10_5: # %start 1048; RV32IDZFH-NEXT: bnez a3, .LBB10_12 1049; RV32IDZFH-NEXT: .LBB10_6: # %start 1050; RV32IDZFH-NEXT: bnez a2, .LBB10_8 1051; RV32IDZFH-NEXT: .LBB10_7: # %start 1052; RV32IDZFH-NEXT: li a1, 0 1053; RV32IDZFH-NEXT: .LBB10_8: # %start 1054; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1055; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1056; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload 1057; RV32IDZFH-NEXT: addi sp, sp, 16 1058; RV32IDZFH-NEXT: ret 1059; RV32IDZFH-NEXT: .LBB10_9: # %start 1060; RV32IDZFH-NEXT: mv a0, a2 1061; RV32IDZFH-NEXT: feq.s a2, fs0, fs0 1062; RV32IDZFH-NEXT: bnez a2, .LBB10_4 1063; RV32IDZFH-NEXT: .LBB10_10: # %start 1064; RV32IDZFH-NEXT: li a0, 0 1065; RV32IDZFH-NEXT: lui a4, 524288 1066; RV32IDZFH-NEXT: bnez s0, .LBB10_5 1067; RV32IDZFH-NEXT: .LBB10_11: # %start 1068; RV32IDZFH-NEXT: lui a1, 524288 1069; RV32IDZFH-NEXT: beqz a3, .LBB10_6 1070; RV32IDZFH-NEXT: .LBB10_12: 1071; RV32IDZFH-NEXT: addi a1, a4, -1 1072; RV32IDZFH-NEXT: beqz a2, .LBB10_7 1073; RV32IDZFH-NEXT: j .LBB10_8 1074; 1075; RV64IDZFH-LABEL: fcvt_l_h_sat: 1076; RV64IDZFH: # %bb.0: # %start 1077; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 1078; RV64IDZFH-NEXT: bnez a0, .LBB10_2 1079; RV64IDZFH-NEXT: # %bb.1: # %start 1080; RV64IDZFH-NEXT: li a0, 0 1081; RV64IDZFH-NEXT: ret 1082; RV64IDZFH-NEXT: .LBB10_2: 1083; RV64IDZFH-NEXT: fcvt.l.h a0, fa0, rtz 1084; RV64IDZFH-NEXT: ret 1085; 1086; RV32I-LABEL: fcvt_l_h_sat: 1087; RV32I: # %bb.0: # %start 1088; RV32I-NEXT: addi sp, sp, -32 1089; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1090; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1091; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1092; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1093; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1094; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 1095; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill 1096; RV32I-NEXT: sw s6, 0(sp) # 4-byte Folded Spill 1097; RV32I-NEXT: lui a1, 16 1098; RV32I-NEXT: addi a1, a1, -1 1099; RV32I-NEXT: and a0, a0, a1 1100; RV32I-NEXT: call __gnu_h2f_ieee@plt 1101; RV32I-NEXT: mv s0, a0 1102; RV32I-NEXT: lui a1, 913408 1103; RV32I-NEXT: call __gesf2@plt 1104; RV32I-NEXT: mv s3, a0 1105; RV32I-NEXT: mv a0, s0 1106; RV32I-NEXT: call __fixsfdi@plt 1107; RV32I-NEXT: mv s2, a1 1108; RV32I-NEXT: li s1, 0 1109; RV32I-NEXT: li s5, 0 1110; RV32I-NEXT: bltz s3, .LBB10_2 1111; RV32I-NEXT: # %bb.1: # %start 1112; RV32I-NEXT: mv s5, a0 1113; RV32I-NEXT: .LBB10_2: # %start 1114; RV32I-NEXT: lui a0, 389120 1115; RV32I-NEXT: addi s4, a0, -1 1116; RV32I-NEXT: mv a0, s0 1117; RV32I-NEXT: mv a1, s4 1118; RV32I-NEXT: call __gtsf2@plt 1119; RV32I-NEXT: li s6, -1 1120; RV32I-NEXT: blt s1, a0, .LBB10_4 1121; RV32I-NEXT: # %bb.3: # %start 1122; RV32I-NEXT: mv s6, s5 1123; RV32I-NEXT: .LBB10_4: # %start 1124; RV32I-NEXT: mv a0, s0 1125; RV32I-NEXT: mv a1, s0 1126; RV32I-NEXT: call __unordsf2@plt 1127; RV32I-NEXT: mv s3, s1 1128; RV32I-NEXT: bne a0, s1, .LBB10_6 1129; RV32I-NEXT: # %bb.5: # %start 1130; RV32I-NEXT: mv s3, s6 1131; RV32I-NEXT: .LBB10_6: # %start 1132; RV32I-NEXT: lui a1, 913408 1133; RV32I-NEXT: mv a0, s0 1134; RV32I-NEXT: call __gesf2@plt 1135; RV32I-NEXT: lui s6, 524288 1136; RV32I-NEXT: lui s5, 524288 1137; RV32I-NEXT: blt a0, s1, .LBB10_8 1138; RV32I-NEXT: # %bb.7: # %start 1139; RV32I-NEXT: mv s5, s2 1140; RV32I-NEXT: .LBB10_8: # %start 1141; RV32I-NEXT: mv a0, s0 1142; RV32I-NEXT: mv a1, s4 1143; RV32I-NEXT: call __gtsf2@plt 1144; RV32I-NEXT: bge s1, a0, .LBB10_10 1145; RV32I-NEXT: # %bb.9: 1146; RV32I-NEXT: addi s5, s6, -1 1147; RV32I-NEXT: .LBB10_10: # %start 1148; RV32I-NEXT: mv a0, s0 1149; RV32I-NEXT: mv a1, s0 1150; RV32I-NEXT: call __unordsf2@plt 1151; RV32I-NEXT: bne a0, s1, .LBB10_12 1152; RV32I-NEXT: # %bb.11: # %start 1153; RV32I-NEXT: mv s1, s5 1154; RV32I-NEXT: .LBB10_12: # %start 1155; RV32I-NEXT: mv a0, s3 1156; RV32I-NEXT: mv a1, s1 1157; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1158; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1159; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1160; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1161; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1162; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 1163; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload 1164; RV32I-NEXT: lw s6, 0(sp) # 4-byte Folded Reload 1165; RV32I-NEXT: addi sp, sp, 32 1166; RV32I-NEXT: ret 1167; 1168; RV64I-LABEL: fcvt_l_h_sat: 1169; RV64I: # %bb.0: # %start 1170; RV64I-NEXT: addi sp, sp, -48 1171; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill 1172; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill 1173; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill 1174; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill 1175; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill 1176; RV64I-NEXT: sd s4, 0(sp) # 8-byte Folded Spill 1177; RV64I-NEXT: lui a1, 16 1178; RV64I-NEXT: addiw a1, a1, -1 1179; RV64I-NEXT: and a0, a0, a1 1180; RV64I-NEXT: call __gnu_h2f_ieee@plt 1181; RV64I-NEXT: mv s0, a0 1182; RV64I-NEXT: lui a1, 913408 1183; RV64I-NEXT: call __gesf2@plt 1184; RV64I-NEXT: mv s3, a0 1185; RV64I-NEXT: mv a0, s0 1186; RV64I-NEXT: call __fixsfdi@plt 1187; RV64I-NEXT: li s1, 0 1188; RV64I-NEXT: li s4, -1 1189; RV64I-NEXT: bltz s3, .LBB10_2 1190; RV64I-NEXT: # %bb.1: # %start 1191; RV64I-NEXT: mv s2, a0 1192; RV64I-NEXT: j .LBB10_3 1193; RV64I-NEXT: .LBB10_2: 1194; RV64I-NEXT: slli s2, s4, 63 1195; RV64I-NEXT: .LBB10_3: # %start 1196; RV64I-NEXT: lui a0, 389120 1197; RV64I-NEXT: addiw a1, a0, -1 1198; RV64I-NEXT: mv a0, s0 1199; RV64I-NEXT: call __gtsf2@plt 1200; RV64I-NEXT: bge s1, a0, .LBB10_5 1201; RV64I-NEXT: # %bb.4: 1202; RV64I-NEXT: srli s2, s4, 1 1203; RV64I-NEXT: .LBB10_5: # %start 1204; RV64I-NEXT: mv a0, s0 1205; RV64I-NEXT: mv a1, s0 1206; RV64I-NEXT: call __unordsf2@plt 1207; RV64I-NEXT: bne a0, s1, .LBB10_7 1208; RV64I-NEXT: # %bb.6: # %start 1209; RV64I-NEXT: mv s1, s2 1210; RV64I-NEXT: .LBB10_7: # %start 1211; RV64I-NEXT: mv a0, s1 1212; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload 1213; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload 1214; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload 1215; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload 1216; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload 1217; RV64I-NEXT: ld s4, 0(sp) # 8-byte Folded Reload 1218; RV64I-NEXT: addi sp, sp, 48 1219; RV64I-NEXT: ret 1220start: 1221 %0 = tail call i64 @llvm.fptosi.sat.i64.f16(half %a) 1222 ret i64 %0 1223} 1224declare i64 @llvm.fptosi.sat.i64.f16(half) 1225 1226define i64 @fcvt_lu_h(half %a) nounwind { 1227; RV32IZFH-LABEL: fcvt_lu_h: 1228; RV32IZFH: # %bb.0: 1229; RV32IZFH-NEXT: addi sp, sp, -16 1230; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1231; RV32IZFH-NEXT: call __fixunshfdi@plt 1232; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1233; RV32IZFH-NEXT: addi sp, sp, 16 1234; RV32IZFH-NEXT: ret 1235; 1236; RV64IZFH-LABEL: fcvt_lu_h: 1237; RV64IZFH: # %bb.0: 1238; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1239; RV64IZFH-NEXT: ret 1240; 1241; RV32IDZFH-LABEL: fcvt_lu_h: 1242; RV32IDZFH: # %bb.0: 1243; RV32IDZFH-NEXT: addi sp, sp, -16 1244; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1245; RV32IDZFH-NEXT: call __fixunshfdi@plt 1246; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1247; RV32IDZFH-NEXT: addi sp, sp, 16 1248; RV32IDZFH-NEXT: ret 1249; 1250; RV64IDZFH-LABEL: fcvt_lu_h: 1251; RV64IDZFH: # %bb.0: 1252; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1253; RV64IDZFH-NEXT: ret 1254; 1255; RV32I-LABEL: fcvt_lu_h: 1256; RV32I: # %bb.0: 1257; RV32I-NEXT: addi sp, sp, -16 1258; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1259; RV32I-NEXT: lui a1, 16 1260; RV32I-NEXT: addi a1, a1, -1 1261; RV32I-NEXT: and a0, a0, a1 1262; RV32I-NEXT: call __gnu_h2f_ieee@plt 1263; RV32I-NEXT: call __fixunssfdi@plt 1264; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1265; RV32I-NEXT: addi sp, sp, 16 1266; RV32I-NEXT: ret 1267; 1268; RV64I-LABEL: fcvt_lu_h: 1269; RV64I: # %bb.0: 1270; RV64I-NEXT: addi sp, sp, -16 1271; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1272; RV64I-NEXT: lui a1, 16 1273; RV64I-NEXT: addiw a1, a1, -1 1274; RV64I-NEXT: and a0, a0, a1 1275; RV64I-NEXT: call __gnu_h2f_ieee@plt 1276; RV64I-NEXT: call __fixunssfdi@plt 1277; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1278; RV64I-NEXT: addi sp, sp, 16 1279; RV64I-NEXT: ret 1280 %1 = fptoui half %a to i64 1281 ret i64 %1 1282} 1283 1284define i64 @fcvt_lu_h_sat(half %a) nounwind { 1285; RV32IZFH-LABEL: fcvt_lu_h_sat: 1286; RV32IZFH: # %bb.0: # %start 1287; RV32IZFH-NEXT: addi sp, sp, -16 1288; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1289; RV32IZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1290; RV32IZFH-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill 1291; RV32IZFH-NEXT: fcvt.s.h fs0, fa0 1292; RV32IZFH-NEXT: fmv.w.x ft0, zero 1293; RV32IZFH-NEXT: fle.s s0, ft0, fs0 1294; RV32IZFH-NEXT: fmv.s fa0, fs0 1295; RV32IZFH-NEXT: call __fixunssfdi@plt 1296; RV32IZFH-NEXT: mv a3, a0 1297; RV32IZFH-NEXT: bnez s0, .LBB12_2 1298; RV32IZFH-NEXT: # %bb.1: # %start 1299; RV32IZFH-NEXT: li a3, 0 1300; RV32IZFH-NEXT: .LBB12_2: # %start 1301; RV32IZFH-NEXT: lui a0, %hi(.LCPI12_0) 1302; RV32IZFH-NEXT: flw ft0, %lo(.LCPI12_0)(a0) 1303; RV32IZFH-NEXT: flt.s a4, ft0, fs0 1304; RV32IZFH-NEXT: li a2, -1 1305; RV32IZFH-NEXT: li a0, -1 1306; RV32IZFH-NEXT: beqz a4, .LBB12_7 1307; RV32IZFH-NEXT: # %bb.3: # %start 1308; RV32IZFH-NEXT: beqz s0, .LBB12_8 1309; RV32IZFH-NEXT: .LBB12_4: # %start 1310; RV32IZFH-NEXT: bnez a4, .LBB12_6 1311; RV32IZFH-NEXT: .LBB12_5: # %start 1312; RV32IZFH-NEXT: mv a2, a1 1313; RV32IZFH-NEXT: .LBB12_6: # %start 1314; RV32IZFH-NEXT: mv a1, a2 1315; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1316; RV32IZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1317; RV32IZFH-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload 1318; RV32IZFH-NEXT: addi sp, sp, 16 1319; RV32IZFH-NEXT: ret 1320; RV32IZFH-NEXT: .LBB12_7: # %start 1321; RV32IZFH-NEXT: mv a0, a3 1322; RV32IZFH-NEXT: bnez s0, .LBB12_4 1323; RV32IZFH-NEXT: .LBB12_8: # %start 1324; RV32IZFH-NEXT: li a1, 0 1325; RV32IZFH-NEXT: beqz a4, .LBB12_5 1326; RV32IZFH-NEXT: j .LBB12_6 1327; 1328; RV64IZFH-LABEL: fcvt_lu_h_sat: 1329; RV64IZFH: # %bb.0: # %start 1330; RV64IZFH-NEXT: feq.h a0, fa0, fa0 1331; RV64IZFH-NEXT: bnez a0, .LBB12_2 1332; RV64IZFH-NEXT: # %bb.1: # %start 1333; RV64IZFH-NEXT: li a0, 0 1334; RV64IZFH-NEXT: ret 1335; RV64IZFH-NEXT: .LBB12_2: 1336; RV64IZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1337; RV64IZFH-NEXT: ret 1338; 1339; RV32IDZFH-LABEL: fcvt_lu_h_sat: 1340; RV32IDZFH: # %bb.0: # %start 1341; RV32IDZFH-NEXT: addi sp, sp, -16 1342; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1343; RV32IDZFH-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 1344; RV32IDZFH-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill 1345; RV32IDZFH-NEXT: fcvt.s.h fs0, fa0 1346; RV32IDZFH-NEXT: fmv.w.x ft0, zero 1347; RV32IDZFH-NEXT: fle.s s0, ft0, fs0 1348; RV32IDZFH-NEXT: fmv.s fa0, fs0 1349; RV32IDZFH-NEXT: call __fixunssfdi@plt 1350; RV32IDZFH-NEXT: mv a3, a0 1351; RV32IDZFH-NEXT: bnez s0, .LBB12_2 1352; RV32IDZFH-NEXT: # %bb.1: # %start 1353; RV32IDZFH-NEXT: li a3, 0 1354; RV32IDZFH-NEXT: .LBB12_2: # %start 1355; RV32IDZFH-NEXT: lui a0, %hi(.LCPI12_0) 1356; RV32IDZFH-NEXT: flw ft0, %lo(.LCPI12_0)(a0) 1357; RV32IDZFH-NEXT: flt.s a4, ft0, fs0 1358; RV32IDZFH-NEXT: li a2, -1 1359; RV32IDZFH-NEXT: li a0, -1 1360; RV32IDZFH-NEXT: beqz a4, .LBB12_7 1361; RV32IDZFH-NEXT: # %bb.3: # %start 1362; RV32IDZFH-NEXT: beqz s0, .LBB12_8 1363; RV32IDZFH-NEXT: .LBB12_4: # %start 1364; RV32IDZFH-NEXT: bnez a4, .LBB12_6 1365; RV32IDZFH-NEXT: .LBB12_5: # %start 1366; RV32IDZFH-NEXT: mv a2, a1 1367; RV32IDZFH-NEXT: .LBB12_6: # %start 1368; RV32IDZFH-NEXT: mv a1, a2 1369; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1370; RV32IDZFH-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 1371; RV32IDZFH-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload 1372; RV32IDZFH-NEXT: addi sp, sp, 16 1373; RV32IDZFH-NEXT: ret 1374; RV32IDZFH-NEXT: .LBB12_7: # %start 1375; RV32IDZFH-NEXT: mv a0, a3 1376; RV32IDZFH-NEXT: bnez s0, .LBB12_4 1377; RV32IDZFH-NEXT: .LBB12_8: # %start 1378; RV32IDZFH-NEXT: li a1, 0 1379; RV32IDZFH-NEXT: beqz a4, .LBB12_5 1380; RV32IDZFH-NEXT: j .LBB12_6 1381; 1382; RV64IDZFH-LABEL: fcvt_lu_h_sat: 1383; RV64IDZFH: # %bb.0: # %start 1384; RV64IDZFH-NEXT: feq.h a0, fa0, fa0 1385; RV64IDZFH-NEXT: bnez a0, .LBB12_2 1386; RV64IDZFH-NEXT: # %bb.1: # %start 1387; RV64IDZFH-NEXT: li a0, 0 1388; RV64IDZFH-NEXT: ret 1389; RV64IDZFH-NEXT: .LBB12_2: 1390; RV64IDZFH-NEXT: fcvt.lu.h a0, fa0, rtz 1391; RV64IDZFH-NEXT: ret 1392; 1393; RV32I-LABEL: fcvt_lu_h_sat: 1394; RV32I: # %bb.0: # %start 1395; RV32I-NEXT: addi sp, sp, -32 1396; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill 1397; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill 1398; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill 1399; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill 1400; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill 1401; RV32I-NEXT: sw s4, 8(sp) # 4-byte Folded Spill 1402; RV32I-NEXT: sw s5, 4(sp) # 4-byte Folded Spill 1403; RV32I-NEXT: lui a1, 16 1404; RV32I-NEXT: addi a1, a1, -1 1405; RV32I-NEXT: and a0, a0, a1 1406; RV32I-NEXT: call __gnu_h2f_ieee@plt 1407; RV32I-NEXT: mv s0, a0 1408; RV32I-NEXT: li a1, 0 1409; RV32I-NEXT: call __gesf2@plt 1410; RV32I-NEXT: mv s1, a0 1411; RV32I-NEXT: mv a0, s0 1412; RV32I-NEXT: call __fixunssfdi@plt 1413; RV32I-NEXT: mv s2, a1 1414; RV32I-NEXT: li s5, 0 1415; RV32I-NEXT: bltz s1, .LBB12_2 1416; RV32I-NEXT: # %bb.1: # %start 1417; RV32I-NEXT: mv s5, a0 1418; RV32I-NEXT: .LBB12_2: # %start 1419; RV32I-NEXT: lui a0, 391168 1420; RV32I-NEXT: addi s1, a0, -1 1421; RV32I-NEXT: mv a0, s0 1422; RV32I-NEXT: mv a1, s1 1423; RV32I-NEXT: call __gtsf2@plt 1424; RV32I-NEXT: li s3, -1 1425; RV32I-NEXT: li s4, -1 1426; RV32I-NEXT: bgtz a0, .LBB12_4 1427; RV32I-NEXT: # %bb.3: # %start 1428; RV32I-NEXT: mv s4, s5 1429; RV32I-NEXT: .LBB12_4: # %start 1430; RV32I-NEXT: mv a0, s0 1431; RV32I-NEXT: li a1, 0 1432; RV32I-NEXT: call __gesf2@plt 1433; RV32I-NEXT: li s5, 0 1434; RV32I-NEXT: bltz a0, .LBB12_6 1435; RV32I-NEXT: # %bb.5: # %start 1436; RV32I-NEXT: mv s5, s2 1437; RV32I-NEXT: .LBB12_6: # %start 1438; RV32I-NEXT: mv a0, s0 1439; RV32I-NEXT: mv a1, s1 1440; RV32I-NEXT: call __gtsf2@plt 1441; RV32I-NEXT: bgtz a0, .LBB12_8 1442; RV32I-NEXT: # %bb.7: # %start 1443; RV32I-NEXT: mv s3, s5 1444; RV32I-NEXT: .LBB12_8: # %start 1445; RV32I-NEXT: mv a0, s4 1446; RV32I-NEXT: mv a1, s3 1447; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload 1448; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload 1449; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload 1450; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload 1451; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload 1452; RV32I-NEXT: lw s4, 8(sp) # 4-byte Folded Reload 1453; RV32I-NEXT: lw s5, 4(sp) # 4-byte Folded Reload 1454; RV32I-NEXT: addi sp, sp, 32 1455; RV32I-NEXT: ret 1456; 1457; RV64I-LABEL: fcvt_lu_h_sat: 1458; RV64I: # %bb.0: # %start 1459; RV64I-NEXT: addi sp, sp, -32 1460; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 1461; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 1462; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 1463; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill 1464; RV64I-NEXT: lui a1, 16 1465; RV64I-NEXT: addiw a1, a1, -1 1466; RV64I-NEXT: and a0, a0, a1 1467; RV64I-NEXT: call __gnu_h2f_ieee@plt 1468; RV64I-NEXT: mv s0, a0 1469; RV64I-NEXT: li a1, 0 1470; RV64I-NEXT: call __gesf2@plt 1471; RV64I-NEXT: mv s1, a0 1472; RV64I-NEXT: mv a0, s0 1473; RV64I-NEXT: call __fixunssfdi@plt 1474; RV64I-NEXT: li s2, 0 1475; RV64I-NEXT: bltz s1, .LBB12_2 1476; RV64I-NEXT: # %bb.1: # %start 1477; RV64I-NEXT: mv s2, a0 1478; RV64I-NEXT: .LBB12_2: # %start 1479; RV64I-NEXT: lui a0, 391168 1480; RV64I-NEXT: addiw a1, a0, -1 1481; RV64I-NEXT: mv a0, s0 1482; RV64I-NEXT: call __gtsf2@plt 1483; RV64I-NEXT: mv a1, a0 1484; RV64I-NEXT: li a0, -1 1485; RV64I-NEXT: bgtz a1, .LBB12_4 1486; RV64I-NEXT: # %bb.3: # %start 1487; RV64I-NEXT: mv a0, s2 1488; RV64I-NEXT: .LBB12_4: # %start 1489; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 1490; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 1491; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 1492; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload 1493; RV64I-NEXT: addi sp, sp, 32 1494; RV64I-NEXT: ret 1495start: 1496 %0 = tail call i64 @llvm.fptoui.sat.i64.f16(half %a) 1497 ret i64 %0 1498} 1499declare i64 @llvm.fptoui.sat.i64.f16(half) 1500 1501define half @fcvt_h_si(i16 %a) nounwind { 1502; RV32IZFH-LABEL: fcvt_h_si: 1503; RV32IZFH: # %bb.0: 1504; RV32IZFH-NEXT: slli a0, a0, 16 1505; RV32IZFH-NEXT: srai a0, a0, 16 1506; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1507; RV32IZFH-NEXT: ret 1508; 1509; RV64IZFH-LABEL: fcvt_h_si: 1510; RV64IZFH: # %bb.0: 1511; RV64IZFH-NEXT: slli a0, a0, 48 1512; RV64IZFH-NEXT: srai a0, a0, 48 1513; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1514; RV64IZFH-NEXT: ret 1515; 1516; RV32IDZFH-LABEL: fcvt_h_si: 1517; RV32IDZFH: # %bb.0: 1518; RV32IDZFH-NEXT: slli a0, a0, 16 1519; RV32IDZFH-NEXT: srai a0, a0, 16 1520; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1521; RV32IDZFH-NEXT: ret 1522; 1523; RV64IDZFH-LABEL: fcvt_h_si: 1524; RV64IDZFH: # %bb.0: 1525; RV64IDZFH-NEXT: slli a0, a0, 48 1526; RV64IDZFH-NEXT: srai a0, a0, 48 1527; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1528; RV64IDZFH-NEXT: ret 1529; 1530; RV32I-LABEL: fcvt_h_si: 1531; RV32I: # %bb.0: 1532; RV32I-NEXT: addi sp, sp, -16 1533; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1534; RV32I-NEXT: slli a0, a0, 16 1535; RV32I-NEXT: srai a0, a0, 16 1536; RV32I-NEXT: call __floatsisf@plt 1537; RV32I-NEXT: call __gnu_f2h_ieee@plt 1538; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1539; RV32I-NEXT: addi sp, sp, 16 1540; RV32I-NEXT: ret 1541; 1542; RV64I-LABEL: fcvt_h_si: 1543; RV64I: # %bb.0: 1544; RV64I-NEXT: addi sp, sp, -16 1545; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1546; RV64I-NEXT: slli a0, a0, 48 1547; RV64I-NEXT: srai a0, a0, 48 1548; RV64I-NEXT: call __floatsisf@plt 1549; RV64I-NEXT: call __gnu_f2h_ieee@plt 1550; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1551; RV64I-NEXT: addi sp, sp, 16 1552; RV64I-NEXT: ret 1553 %1 = sitofp i16 %a to half 1554 ret half %1 1555} 1556 1557define half @fcvt_h_si_signext(i16 signext %a) nounwind { 1558; RV32IZFH-LABEL: fcvt_h_si_signext: 1559; RV32IZFH: # %bb.0: 1560; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1561; RV32IZFH-NEXT: ret 1562; 1563; RV64IZFH-LABEL: fcvt_h_si_signext: 1564; RV64IZFH: # %bb.0: 1565; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1566; RV64IZFH-NEXT: ret 1567; 1568; RV32IDZFH-LABEL: fcvt_h_si_signext: 1569; RV32IDZFH: # %bb.0: 1570; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1571; RV32IDZFH-NEXT: ret 1572; 1573; RV64IDZFH-LABEL: fcvt_h_si_signext: 1574; RV64IDZFH: # %bb.0: 1575; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1576; RV64IDZFH-NEXT: ret 1577; 1578; RV32I-LABEL: fcvt_h_si_signext: 1579; RV32I: # %bb.0: 1580; RV32I-NEXT: addi sp, sp, -16 1581; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1582; RV32I-NEXT: call __floatsisf@plt 1583; RV32I-NEXT: call __gnu_f2h_ieee@plt 1584; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1585; RV32I-NEXT: addi sp, sp, 16 1586; RV32I-NEXT: ret 1587; 1588; RV64I-LABEL: fcvt_h_si_signext: 1589; RV64I: # %bb.0: 1590; RV64I-NEXT: addi sp, sp, -16 1591; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1592; RV64I-NEXT: call __floatsisf@plt 1593; RV64I-NEXT: call __gnu_f2h_ieee@plt 1594; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1595; RV64I-NEXT: addi sp, sp, 16 1596; RV64I-NEXT: ret 1597 %1 = sitofp i16 %a to half 1598 ret half %1 1599} 1600 1601define half @fcvt_h_ui(i16 %a) nounwind { 1602; RV32IZFH-LABEL: fcvt_h_ui: 1603; RV32IZFH: # %bb.0: 1604; RV32IZFH-NEXT: lui a1, 16 1605; RV32IZFH-NEXT: addi a1, a1, -1 1606; RV32IZFH-NEXT: and a0, a0, a1 1607; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1608; RV32IZFH-NEXT: ret 1609; 1610; RV64IZFH-LABEL: fcvt_h_ui: 1611; RV64IZFH: # %bb.0: 1612; RV64IZFH-NEXT: lui a1, 16 1613; RV64IZFH-NEXT: addiw a1, a1, -1 1614; RV64IZFH-NEXT: and a0, a0, a1 1615; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1616; RV64IZFH-NEXT: ret 1617; 1618; RV32IDZFH-LABEL: fcvt_h_ui: 1619; RV32IDZFH: # %bb.0: 1620; RV32IDZFH-NEXT: lui a1, 16 1621; RV32IDZFH-NEXT: addi a1, a1, -1 1622; RV32IDZFH-NEXT: and a0, a0, a1 1623; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1624; RV32IDZFH-NEXT: ret 1625; 1626; RV64IDZFH-LABEL: fcvt_h_ui: 1627; RV64IDZFH: # %bb.0: 1628; RV64IDZFH-NEXT: lui a1, 16 1629; RV64IDZFH-NEXT: addiw a1, a1, -1 1630; RV64IDZFH-NEXT: and a0, a0, a1 1631; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1632; RV64IDZFH-NEXT: ret 1633; 1634; RV32I-LABEL: fcvt_h_ui: 1635; RV32I: # %bb.0: 1636; RV32I-NEXT: addi sp, sp, -16 1637; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1638; RV32I-NEXT: lui a1, 16 1639; RV32I-NEXT: addi a1, a1, -1 1640; RV32I-NEXT: and a0, a0, a1 1641; RV32I-NEXT: call __floatunsisf@plt 1642; RV32I-NEXT: call __gnu_f2h_ieee@plt 1643; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1644; RV32I-NEXT: addi sp, sp, 16 1645; RV32I-NEXT: ret 1646; 1647; RV64I-LABEL: fcvt_h_ui: 1648; RV64I: # %bb.0: 1649; RV64I-NEXT: addi sp, sp, -16 1650; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1651; RV64I-NEXT: lui a1, 16 1652; RV64I-NEXT: addiw a1, a1, -1 1653; RV64I-NEXT: and a0, a0, a1 1654; RV64I-NEXT: call __floatunsisf@plt 1655; RV64I-NEXT: call __gnu_f2h_ieee@plt 1656; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1657; RV64I-NEXT: addi sp, sp, 16 1658; RV64I-NEXT: ret 1659 %1 = uitofp i16 %a to half 1660 ret half %1 1661} 1662 1663define half @fcvt_h_ui_zeroext(i16 zeroext %a) nounwind { 1664; RV32IZFH-LABEL: fcvt_h_ui_zeroext: 1665; RV32IZFH: # %bb.0: 1666; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1667; RV32IZFH-NEXT: ret 1668; 1669; RV64IZFH-LABEL: fcvt_h_ui_zeroext: 1670; RV64IZFH: # %bb.0: 1671; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1672; RV64IZFH-NEXT: ret 1673; 1674; RV32IDZFH-LABEL: fcvt_h_ui_zeroext: 1675; RV32IDZFH: # %bb.0: 1676; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1677; RV32IDZFH-NEXT: ret 1678; 1679; RV64IDZFH-LABEL: fcvt_h_ui_zeroext: 1680; RV64IDZFH: # %bb.0: 1681; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1682; RV64IDZFH-NEXT: ret 1683; 1684; RV32I-LABEL: fcvt_h_ui_zeroext: 1685; RV32I: # %bb.0: 1686; RV32I-NEXT: addi sp, sp, -16 1687; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1688; RV32I-NEXT: call __floatunsisf@plt 1689; RV32I-NEXT: call __gnu_f2h_ieee@plt 1690; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1691; RV32I-NEXT: addi sp, sp, 16 1692; RV32I-NEXT: ret 1693; 1694; RV64I-LABEL: fcvt_h_ui_zeroext: 1695; RV64I: # %bb.0: 1696; RV64I-NEXT: addi sp, sp, -16 1697; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1698; RV64I-NEXT: call __floatunsisf@plt 1699; RV64I-NEXT: call __gnu_f2h_ieee@plt 1700; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1701; RV64I-NEXT: addi sp, sp, 16 1702; RV64I-NEXT: ret 1703 %1 = uitofp i16 %a to half 1704 ret half %1 1705} 1706 1707define half @fcvt_h_w(i32 %a) nounwind { 1708; RV32IZFH-LABEL: fcvt_h_w: 1709; RV32IZFH: # %bb.0: 1710; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1711; RV32IZFH-NEXT: ret 1712; 1713; RV64IZFH-LABEL: fcvt_h_w: 1714; RV64IZFH: # %bb.0: 1715; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1716; RV64IZFH-NEXT: ret 1717; 1718; RV32IDZFH-LABEL: fcvt_h_w: 1719; RV32IDZFH: # %bb.0: 1720; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1721; RV32IDZFH-NEXT: ret 1722; 1723; RV64IDZFH-LABEL: fcvt_h_w: 1724; RV64IDZFH: # %bb.0: 1725; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1726; RV64IDZFH-NEXT: ret 1727; 1728; RV32I-LABEL: fcvt_h_w: 1729; RV32I: # %bb.0: 1730; RV32I-NEXT: addi sp, sp, -16 1731; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1732; RV32I-NEXT: call __floatsisf@plt 1733; RV32I-NEXT: call __gnu_f2h_ieee@plt 1734; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1735; RV32I-NEXT: addi sp, sp, 16 1736; RV32I-NEXT: ret 1737; 1738; RV64I-LABEL: fcvt_h_w: 1739; RV64I: # %bb.0: 1740; RV64I-NEXT: addi sp, sp, -16 1741; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1742; RV64I-NEXT: sext.w a0, a0 1743; RV64I-NEXT: call __floatsisf@plt 1744; RV64I-NEXT: call __gnu_f2h_ieee@plt 1745; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1746; RV64I-NEXT: addi sp, sp, 16 1747; RV64I-NEXT: ret 1748 %1 = sitofp i32 %a to half 1749 ret half %1 1750} 1751 1752define half @fcvt_h_w_load(i32* %p) nounwind { 1753; RV32IZFH-LABEL: fcvt_h_w_load: 1754; RV32IZFH: # %bb.0: 1755; RV32IZFH-NEXT: lw a0, 0(a0) 1756; RV32IZFH-NEXT: fcvt.h.w fa0, a0 1757; RV32IZFH-NEXT: ret 1758; 1759; RV64IZFH-LABEL: fcvt_h_w_load: 1760; RV64IZFH: # %bb.0: 1761; RV64IZFH-NEXT: lw a0, 0(a0) 1762; RV64IZFH-NEXT: fcvt.h.w fa0, a0 1763; RV64IZFH-NEXT: ret 1764; 1765; RV32IDZFH-LABEL: fcvt_h_w_load: 1766; RV32IDZFH: # %bb.0: 1767; RV32IDZFH-NEXT: lw a0, 0(a0) 1768; RV32IDZFH-NEXT: fcvt.h.w fa0, a0 1769; RV32IDZFH-NEXT: ret 1770; 1771; RV64IDZFH-LABEL: fcvt_h_w_load: 1772; RV64IDZFH: # %bb.0: 1773; RV64IDZFH-NEXT: lw a0, 0(a0) 1774; RV64IDZFH-NEXT: fcvt.h.w fa0, a0 1775; RV64IDZFH-NEXT: ret 1776; 1777; RV32I-LABEL: fcvt_h_w_load: 1778; RV32I: # %bb.0: 1779; RV32I-NEXT: addi sp, sp, -16 1780; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1781; RV32I-NEXT: lw a0, 0(a0) 1782; RV32I-NEXT: call __floatsisf@plt 1783; RV32I-NEXT: call __gnu_f2h_ieee@plt 1784; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1785; RV32I-NEXT: addi sp, sp, 16 1786; RV32I-NEXT: ret 1787; 1788; RV64I-LABEL: fcvt_h_w_load: 1789; RV64I: # %bb.0: 1790; RV64I-NEXT: addi sp, sp, -16 1791; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1792; RV64I-NEXT: lw a0, 0(a0) 1793; RV64I-NEXT: call __floatsisf@plt 1794; RV64I-NEXT: call __gnu_f2h_ieee@plt 1795; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1796; RV64I-NEXT: addi sp, sp, 16 1797; RV64I-NEXT: ret 1798 %a = load i32, i32* %p 1799 %1 = sitofp i32 %a to half 1800 ret half %1 1801} 1802 1803define half @fcvt_h_wu(i32 %a) nounwind { 1804; RV32IZFH-LABEL: fcvt_h_wu: 1805; RV32IZFH: # %bb.0: 1806; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1807; RV32IZFH-NEXT: ret 1808; 1809; RV64IZFH-LABEL: fcvt_h_wu: 1810; RV64IZFH: # %bb.0: 1811; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1812; RV64IZFH-NEXT: ret 1813; 1814; RV32IDZFH-LABEL: fcvt_h_wu: 1815; RV32IDZFH: # %bb.0: 1816; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1817; RV32IDZFH-NEXT: ret 1818; 1819; RV64IDZFH-LABEL: fcvt_h_wu: 1820; RV64IDZFH: # %bb.0: 1821; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1822; RV64IDZFH-NEXT: ret 1823; 1824; RV32I-LABEL: fcvt_h_wu: 1825; RV32I: # %bb.0: 1826; RV32I-NEXT: addi sp, sp, -16 1827; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1828; RV32I-NEXT: call __floatunsisf@plt 1829; RV32I-NEXT: call __gnu_f2h_ieee@plt 1830; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1831; RV32I-NEXT: addi sp, sp, 16 1832; RV32I-NEXT: ret 1833; 1834; RV64I-LABEL: fcvt_h_wu: 1835; RV64I: # %bb.0: 1836; RV64I-NEXT: addi sp, sp, -16 1837; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1838; RV64I-NEXT: sext.w a0, a0 1839; RV64I-NEXT: call __floatunsisf@plt 1840; RV64I-NEXT: call __gnu_f2h_ieee@plt 1841; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1842; RV64I-NEXT: addi sp, sp, 16 1843; RV64I-NEXT: ret 1844 %1 = uitofp i32 %a to half 1845 ret half %1 1846} 1847 1848define half @fcvt_h_wu_load(i32* %p) nounwind { 1849; RV32IZFH-LABEL: fcvt_h_wu_load: 1850; RV32IZFH: # %bb.0: 1851; RV32IZFH-NEXT: lw a0, 0(a0) 1852; RV32IZFH-NEXT: fcvt.h.wu fa0, a0 1853; RV32IZFH-NEXT: ret 1854; 1855; RV64IZFH-LABEL: fcvt_h_wu_load: 1856; RV64IZFH: # %bb.0: 1857; RV64IZFH-NEXT: lwu a0, 0(a0) 1858; RV64IZFH-NEXT: fcvt.h.wu fa0, a0 1859; RV64IZFH-NEXT: ret 1860; 1861; RV32IDZFH-LABEL: fcvt_h_wu_load: 1862; RV32IDZFH: # %bb.0: 1863; RV32IDZFH-NEXT: lw a0, 0(a0) 1864; RV32IDZFH-NEXT: fcvt.h.wu fa0, a0 1865; RV32IDZFH-NEXT: ret 1866; 1867; RV64IDZFH-LABEL: fcvt_h_wu_load: 1868; RV64IDZFH: # %bb.0: 1869; RV64IDZFH-NEXT: lwu a0, 0(a0) 1870; RV64IDZFH-NEXT: fcvt.h.wu fa0, a0 1871; RV64IDZFH-NEXT: ret 1872; 1873; RV32I-LABEL: fcvt_h_wu_load: 1874; RV32I: # %bb.0: 1875; RV32I-NEXT: addi sp, sp, -16 1876; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1877; RV32I-NEXT: lw a0, 0(a0) 1878; RV32I-NEXT: call __floatunsisf@plt 1879; RV32I-NEXT: call __gnu_f2h_ieee@plt 1880; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1881; RV32I-NEXT: addi sp, sp, 16 1882; RV32I-NEXT: ret 1883; 1884; RV64I-LABEL: fcvt_h_wu_load: 1885; RV64I: # %bb.0: 1886; RV64I-NEXT: addi sp, sp, -16 1887; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1888; RV64I-NEXT: lw a0, 0(a0) 1889; RV64I-NEXT: call __floatunsisf@plt 1890; RV64I-NEXT: call __gnu_f2h_ieee@plt 1891; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1892; RV64I-NEXT: addi sp, sp, 16 1893; RV64I-NEXT: ret 1894 %a = load i32, i32* %p 1895 %1 = uitofp i32 %a to half 1896 ret half %1 1897} 1898 1899define half @fcvt_h_l(i64 %a) nounwind { 1900; RV32IZFH-LABEL: fcvt_h_l: 1901; RV32IZFH: # %bb.0: 1902; RV32IZFH-NEXT: addi sp, sp, -16 1903; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1904; RV32IZFH-NEXT: call __floatdihf@plt 1905; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1906; RV32IZFH-NEXT: addi sp, sp, 16 1907; RV32IZFH-NEXT: ret 1908; 1909; RV64IZFH-LABEL: fcvt_h_l: 1910; RV64IZFH: # %bb.0: 1911; RV64IZFH-NEXT: fcvt.h.l fa0, a0 1912; RV64IZFH-NEXT: ret 1913; 1914; RV32IDZFH-LABEL: fcvt_h_l: 1915; RV32IDZFH: # %bb.0: 1916; RV32IDZFH-NEXT: addi sp, sp, -16 1917; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1918; RV32IDZFH-NEXT: call __floatdihf@plt 1919; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1920; RV32IDZFH-NEXT: addi sp, sp, 16 1921; RV32IDZFH-NEXT: ret 1922; 1923; RV64IDZFH-LABEL: fcvt_h_l: 1924; RV64IDZFH: # %bb.0: 1925; RV64IDZFH-NEXT: fcvt.h.l fa0, a0 1926; RV64IDZFH-NEXT: ret 1927; 1928; RV32I-LABEL: fcvt_h_l: 1929; RV32I: # %bb.0: 1930; RV32I-NEXT: addi sp, sp, -16 1931; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1932; RV32I-NEXT: call __floatdisf@plt 1933; RV32I-NEXT: call __gnu_f2h_ieee@plt 1934; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1935; RV32I-NEXT: addi sp, sp, 16 1936; RV32I-NEXT: ret 1937; 1938; RV64I-LABEL: fcvt_h_l: 1939; RV64I: # %bb.0: 1940; RV64I-NEXT: addi sp, sp, -16 1941; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1942; RV64I-NEXT: call __floatdisf@plt 1943; RV64I-NEXT: call __gnu_f2h_ieee@plt 1944; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1945; RV64I-NEXT: addi sp, sp, 16 1946; RV64I-NEXT: ret 1947 %1 = sitofp i64 %a to half 1948 ret half %1 1949} 1950 1951define half @fcvt_h_lu(i64 %a) nounwind { 1952; RV32IZFH-LABEL: fcvt_h_lu: 1953; RV32IZFH: # %bb.0: 1954; RV32IZFH-NEXT: addi sp, sp, -16 1955; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1956; RV32IZFH-NEXT: call __floatundihf@plt 1957; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1958; RV32IZFH-NEXT: addi sp, sp, 16 1959; RV32IZFH-NEXT: ret 1960; 1961; RV64IZFH-LABEL: fcvt_h_lu: 1962; RV64IZFH: # %bb.0: 1963; RV64IZFH-NEXT: fcvt.h.lu fa0, a0 1964; RV64IZFH-NEXT: ret 1965; 1966; RV32IDZFH-LABEL: fcvt_h_lu: 1967; RV32IDZFH: # %bb.0: 1968; RV32IDZFH-NEXT: addi sp, sp, -16 1969; RV32IDZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1970; RV32IDZFH-NEXT: call __floatundihf@plt 1971; RV32IDZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1972; RV32IDZFH-NEXT: addi sp, sp, 16 1973; RV32IDZFH-NEXT: ret 1974; 1975; RV64IDZFH-LABEL: fcvt_h_lu: 1976; RV64IDZFH: # %bb.0: 1977; RV64IDZFH-NEXT: fcvt.h.lu fa0, a0 1978; RV64IDZFH-NEXT: ret 1979; 1980; RV32I-LABEL: fcvt_h_lu: 1981; RV32I: # %bb.0: 1982; RV32I-NEXT: addi sp, sp, -16 1983; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 1984; RV32I-NEXT: call __floatundisf@plt 1985; RV32I-NEXT: call __gnu_f2h_ieee@plt 1986; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 1987; RV32I-NEXT: addi sp, sp, 16 1988; RV32I-NEXT: ret 1989; 1990; RV64I-LABEL: fcvt_h_lu: 1991; RV64I: # %bb.0: 1992; RV64I-NEXT: addi sp, sp, -16 1993; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 1994; RV64I-NEXT: call __floatundisf@plt 1995; RV64I-NEXT: call __gnu_f2h_ieee@plt 1996; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 1997; RV64I-NEXT: addi sp, sp, 16 1998; RV64I-NEXT: ret 1999 %1 = uitofp i64 %a to half 2000 ret half %1 2001} 2002 2003define half @fcvt_h_s(float %a) nounwind { 2004; RV32IZFH-LABEL: fcvt_h_s: 2005; RV32IZFH: # %bb.0: 2006; RV32IZFH-NEXT: fcvt.h.s fa0, fa0 2007; RV32IZFH-NEXT: ret 2008; 2009; RV64IZFH-LABEL: fcvt_h_s: 2010; RV64IZFH: # %bb.0: 2011; RV64IZFH-NEXT: fcvt.h.s fa0, fa0 2012; RV64IZFH-NEXT: ret 2013; 2014; RV32IDZFH-LABEL: fcvt_h_s: 2015; RV32IDZFH: # %bb.0: 2016; RV32IDZFH-NEXT: fcvt.h.s fa0, fa0 2017; RV32IDZFH-NEXT: ret 2018; 2019; RV64IDZFH-LABEL: fcvt_h_s: 2020; RV64IDZFH: # %bb.0: 2021; RV64IDZFH-NEXT: fcvt.h.s fa0, fa0 2022; RV64IDZFH-NEXT: ret 2023; 2024; RV32I-LABEL: fcvt_h_s: 2025; RV32I: # %bb.0: 2026; RV32I-NEXT: addi sp, sp, -16 2027; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2028; RV32I-NEXT: call __gnu_f2h_ieee@plt 2029; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2030; RV32I-NEXT: addi sp, sp, 16 2031; RV32I-NEXT: ret 2032; 2033; RV64I-LABEL: fcvt_h_s: 2034; RV64I: # %bb.0: 2035; RV64I-NEXT: addi sp, sp, -16 2036; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2037; RV64I-NEXT: call __gnu_f2h_ieee@plt 2038; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2039; RV64I-NEXT: addi sp, sp, 16 2040; RV64I-NEXT: ret 2041 %1 = fptrunc float %a to half 2042 ret half %1 2043} 2044 2045define float @fcvt_s_h(half %a) nounwind { 2046; RV32IZFH-LABEL: fcvt_s_h: 2047; RV32IZFH: # %bb.0: 2048; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2049; RV32IZFH-NEXT: ret 2050; 2051; RV64IZFH-LABEL: fcvt_s_h: 2052; RV64IZFH: # %bb.0: 2053; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2054; RV64IZFH-NEXT: ret 2055; 2056; RV32IDZFH-LABEL: fcvt_s_h: 2057; RV32IDZFH: # %bb.0: 2058; RV32IDZFH-NEXT: fcvt.s.h fa0, fa0 2059; RV32IDZFH-NEXT: ret 2060; 2061; RV64IDZFH-LABEL: fcvt_s_h: 2062; RV64IDZFH: # %bb.0: 2063; RV64IDZFH-NEXT: fcvt.s.h fa0, fa0 2064; RV64IDZFH-NEXT: ret 2065; 2066; RV32I-LABEL: fcvt_s_h: 2067; RV32I: # %bb.0: 2068; RV32I-NEXT: addi sp, sp, -16 2069; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2070; RV32I-NEXT: lui a1, 16 2071; RV32I-NEXT: addi a1, a1, -1 2072; RV32I-NEXT: and a0, a0, a1 2073; RV32I-NEXT: call __gnu_h2f_ieee@plt 2074; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2075; RV32I-NEXT: addi sp, sp, 16 2076; RV32I-NEXT: ret 2077; 2078; RV64I-LABEL: fcvt_s_h: 2079; RV64I: # %bb.0: 2080; RV64I-NEXT: addi sp, sp, -16 2081; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2082; RV64I-NEXT: lui a1, 16 2083; RV64I-NEXT: addiw a1, a1, -1 2084; RV64I-NEXT: and a0, a0, a1 2085; RV64I-NEXT: call __gnu_h2f_ieee@plt 2086; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2087; RV64I-NEXT: addi sp, sp, 16 2088; RV64I-NEXT: ret 2089 %1 = fpext half %a to float 2090 ret float %1 2091} 2092 2093define half @fcvt_h_d(double %a) nounwind { 2094; RV32IZFH-LABEL: fcvt_h_d: 2095; RV32IZFH: # %bb.0: 2096; RV32IZFH-NEXT: addi sp, sp, -16 2097; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2098; RV32IZFH-NEXT: call __truncdfhf2@plt 2099; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2100; RV32IZFH-NEXT: addi sp, sp, 16 2101; RV32IZFH-NEXT: ret 2102; 2103; RV64IZFH-LABEL: fcvt_h_d: 2104; RV64IZFH: # %bb.0: 2105; RV64IZFH-NEXT: addi sp, sp, -16 2106; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2107; RV64IZFH-NEXT: call __truncdfhf2@plt 2108; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2109; RV64IZFH-NEXT: addi sp, sp, 16 2110; RV64IZFH-NEXT: ret 2111; 2112; RV32IDZFH-LABEL: fcvt_h_d: 2113; RV32IDZFH: # %bb.0: 2114; RV32IDZFH-NEXT: fcvt.h.d fa0, fa0 2115; RV32IDZFH-NEXT: ret 2116; 2117; RV64IDZFH-LABEL: fcvt_h_d: 2118; RV64IDZFH: # %bb.0: 2119; RV64IDZFH-NEXT: fcvt.h.d fa0, fa0 2120; RV64IDZFH-NEXT: ret 2121; 2122; RV32I-LABEL: fcvt_h_d: 2123; RV32I: # %bb.0: 2124; RV32I-NEXT: addi sp, sp, -16 2125; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2126; RV32I-NEXT: call __truncdfhf2@plt 2127; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2128; RV32I-NEXT: addi sp, sp, 16 2129; RV32I-NEXT: ret 2130; 2131; RV64I-LABEL: fcvt_h_d: 2132; RV64I: # %bb.0: 2133; RV64I-NEXT: addi sp, sp, -16 2134; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2135; RV64I-NEXT: call __truncdfhf2@plt 2136; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2137; RV64I-NEXT: addi sp, sp, 16 2138; RV64I-NEXT: ret 2139 %1 = fptrunc double %a to half 2140 ret half %1 2141} 2142 2143define double @fcvt_d_h(half %a) nounwind { 2144; RV32IZFH-LABEL: fcvt_d_h: 2145; RV32IZFH: # %bb.0: 2146; RV32IZFH-NEXT: addi sp, sp, -16 2147; RV32IZFH-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2148; RV32IZFH-NEXT: fcvt.s.h fa0, fa0 2149; RV32IZFH-NEXT: call __extendsfdf2@plt 2150; RV32IZFH-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2151; RV32IZFH-NEXT: addi sp, sp, 16 2152; RV32IZFH-NEXT: ret 2153; 2154; RV64IZFH-LABEL: fcvt_d_h: 2155; RV64IZFH: # %bb.0: 2156; RV64IZFH-NEXT: addi sp, sp, -16 2157; RV64IZFH-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2158; RV64IZFH-NEXT: fcvt.s.h fa0, fa0 2159; RV64IZFH-NEXT: call __extendsfdf2@plt 2160; RV64IZFH-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2161; RV64IZFH-NEXT: addi sp, sp, 16 2162; RV64IZFH-NEXT: ret 2163; 2164; RV32IDZFH-LABEL: fcvt_d_h: 2165; RV32IDZFH: # %bb.0: 2166; RV32IDZFH-NEXT: fcvt.d.h fa0, fa0 2167; RV32IDZFH-NEXT: ret 2168; 2169; RV64IDZFH-LABEL: fcvt_d_h: 2170; RV64IDZFH: # %bb.0: 2171; RV64IDZFH-NEXT: fcvt.d.h fa0, fa0 2172; RV64IDZFH-NEXT: ret 2173; 2174; RV32I-LABEL: fcvt_d_h: 2175; RV32I: # %bb.0: 2176; RV32I-NEXT: addi sp, sp, -16 2177; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2178; RV32I-NEXT: lui a1, 16 2179; RV32I-NEXT: addi a1, a1, -1 2180; RV32I-NEXT: and a0, a0, a1 2181; RV32I-NEXT: call __gnu_h2f_ieee@plt 2182; RV32I-NEXT: call __extendsfdf2@plt 2183; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2184; RV32I-NEXT: addi sp, sp, 16 2185; RV32I-NEXT: ret 2186; 2187; RV64I-LABEL: fcvt_d_h: 2188; RV64I: # %bb.0: 2189; RV64I-NEXT: addi sp, sp, -16 2190; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill 2191; RV64I-NEXT: lui a1, 16 2192; RV64I-NEXT: addiw a1, a1, -1 2193; RV64I-NEXT: and a0, a0, a1 2194; RV64I-NEXT: call __gnu_h2f_ieee@plt 2195; RV64I-NEXT: slli a0, a0, 32 2196; RV64I-NEXT: srli a0, a0, 32 2197; RV64I-NEXT: call __extendsfdf2@plt 2198; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload 2199; RV64I-NEXT: addi sp, sp, 16 2200; RV64I-NEXT: ret 2201 %1 = fpext half %a to double 2202 ret double %1 2203} 2204 2205define half @bitcast_h_i16(i16 %a) nounwind { 2206; RV32IZFH-LABEL: bitcast_h_i16: 2207; RV32IZFH: # %bb.0: 2208; RV32IZFH-NEXT: fmv.h.x fa0, a0 2209; RV32IZFH-NEXT: ret 2210; 2211; RV64IZFH-LABEL: bitcast_h_i16: 2212; RV64IZFH: # %bb.0: 2213; RV64IZFH-NEXT: fmv.h.x fa0, a0 2214; RV64IZFH-NEXT: ret 2215; 2216; RV32IDZFH-LABEL: bitcast_h_i16: 2217; RV32IDZFH: # %bb.0: 2218; RV32IDZFH-NEXT: fmv.h.x fa0, a0 2219; RV32IDZFH-NEXT: ret 2220; 2221; RV64IDZFH-LABEL: bitcast_h_i16: 2222; RV64IDZFH: # %bb.0: 2223; RV64IDZFH-NEXT: fmv.h.x fa0, a0 2224; RV64IDZFH-NEXT: ret 2225; 2226; RV32I-LABEL: bitcast_h_i16: 2227; RV32I: # %bb.0: 2228; RV32I-NEXT: ret 2229; 2230; RV64I-LABEL: bitcast_h_i16: 2231; RV64I: # %bb.0: 2232; RV64I-NEXT: ret 2233 %1 = bitcast i16 %a to half 2234 ret half %1 2235} 2236 2237define i16 @bitcast_i16_h(half %a) nounwind { 2238; RV32IZFH-LABEL: bitcast_i16_h: 2239; RV32IZFH: # %bb.0: 2240; RV32IZFH-NEXT: fmv.x.h a0, fa0 2241; RV32IZFH-NEXT: ret 2242; 2243; RV64IZFH-LABEL: bitcast_i16_h: 2244; RV64IZFH: # %bb.0: 2245; RV64IZFH-NEXT: fmv.x.h a0, fa0 2246; RV64IZFH-NEXT: ret 2247; 2248; RV32IDZFH-LABEL: bitcast_i16_h: 2249; RV32IDZFH: # %bb.0: 2250; RV32IDZFH-NEXT: fmv.x.h a0, fa0 2251; RV32IDZFH-NEXT: ret 2252; 2253; RV64IDZFH-LABEL: bitcast_i16_h: 2254; RV64IDZFH: # %bb.0: 2255; RV64IDZFH-NEXT: fmv.x.h a0, fa0 2256; RV64IDZFH-NEXT: ret 2257; 2258; RV32I-LABEL: bitcast_i16_h: 2259; RV32I: # %bb.0: 2260; RV32I-NEXT: ret 2261; 2262; RV64I-LABEL: bitcast_i16_h: 2263; RV64I: # %bb.0: 2264; RV64I-NEXT: ret 2265 %1 = bitcast half %a to i16 2266 ret i16 %1 2267} 2268 2269; Make sure we select W version of addi on RV64. 2270define signext i32 @fcvt_h_w_demanded_bits(i32 signext %0, half* %1) { 2271; RV32IZFH-LABEL: fcvt_h_w_demanded_bits: 2272; RV32IZFH: # %bb.0: 2273; RV32IZFH-NEXT: addi a0, a0, 1 2274; RV32IZFH-NEXT: fcvt.h.w ft0, a0 2275; RV32IZFH-NEXT: fsh ft0, 0(a1) 2276; RV32IZFH-NEXT: ret 2277; 2278; RV64IZFH-LABEL: fcvt_h_w_demanded_bits: 2279; RV64IZFH: # %bb.0: 2280; RV64IZFH-NEXT: addiw a0, a0, 1 2281; RV64IZFH-NEXT: fcvt.h.w ft0, a0 2282; RV64IZFH-NEXT: fsh ft0, 0(a1) 2283; RV64IZFH-NEXT: ret 2284; 2285; RV32IDZFH-LABEL: fcvt_h_w_demanded_bits: 2286; RV32IDZFH: # %bb.0: 2287; RV32IDZFH-NEXT: addi a0, a0, 1 2288; RV32IDZFH-NEXT: fcvt.h.w ft0, a0 2289; RV32IDZFH-NEXT: fsh ft0, 0(a1) 2290; RV32IDZFH-NEXT: ret 2291; 2292; RV64IDZFH-LABEL: fcvt_h_w_demanded_bits: 2293; RV64IDZFH: # %bb.0: 2294; RV64IDZFH-NEXT: addiw a0, a0, 1 2295; RV64IDZFH-NEXT: fcvt.h.w ft0, a0 2296; RV64IDZFH-NEXT: fsh ft0, 0(a1) 2297; RV64IDZFH-NEXT: ret 2298; 2299; RV32I-LABEL: fcvt_h_w_demanded_bits: 2300; RV32I: # %bb.0: 2301; RV32I-NEXT: addi sp, sp, -16 2302; RV32I-NEXT: .cfi_def_cfa_offset 16 2303; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2304; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2305; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2306; RV32I-NEXT: .cfi_offset ra, -4 2307; RV32I-NEXT: .cfi_offset s0, -8 2308; RV32I-NEXT: .cfi_offset s1, -12 2309; RV32I-NEXT: mv s0, a1 2310; RV32I-NEXT: addi s1, a0, 1 2311; RV32I-NEXT: mv a0, s1 2312; RV32I-NEXT: call __floatsisf@plt 2313; RV32I-NEXT: call __gnu_f2h_ieee@plt 2314; RV32I-NEXT: sh a0, 0(s0) 2315; RV32I-NEXT: mv a0, s1 2316; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2317; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2318; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2319; RV32I-NEXT: addi sp, sp, 16 2320; RV32I-NEXT: ret 2321; 2322; RV64I-LABEL: fcvt_h_w_demanded_bits: 2323; RV64I: # %bb.0: 2324; RV64I-NEXT: addi sp, sp, -32 2325; RV64I-NEXT: .cfi_def_cfa_offset 32 2326; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2327; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2328; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2329; RV64I-NEXT: .cfi_offset ra, -8 2330; RV64I-NEXT: .cfi_offset s0, -16 2331; RV64I-NEXT: .cfi_offset s1, -24 2332; RV64I-NEXT: mv s0, a1 2333; RV64I-NEXT: addiw s1, a0, 1 2334; RV64I-NEXT: mv a0, s1 2335; RV64I-NEXT: call __floatsisf@plt 2336; RV64I-NEXT: call __gnu_f2h_ieee@plt 2337; RV64I-NEXT: sh a0, 0(s0) 2338; RV64I-NEXT: mv a0, s1 2339; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2340; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2341; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2342; RV64I-NEXT: addi sp, sp, 32 2343; RV64I-NEXT: ret 2344 %3 = add i32 %0, 1 2345 %4 = sitofp i32 %3 to half 2346 store half %4, half* %1, align 2 2347 ret i32 %3 2348} 2349 2350; Make sure we select W version of addi on RV64. 2351define signext i32 @fcvt_h_wu_demanded_bits(i32 signext %0, half* %1) { 2352; RV32IZFH-LABEL: fcvt_h_wu_demanded_bits: 2353; RV32IZFH: # %bb.0: 2354; RV32IZFH-NEXT: addi a0, a0, 1 2355; RV32IZFH-NEXT: fcvt.h.wu ft0, a0 2356; RV32IZFH-NEXT: fsh ft0, 0(a1) 2357; RV32IZFH-NEXT: ret 2358; 2359; RV64IZFH-LABEL: fcvt_h_wu_demanded_bits: 2360; RV64IZFH: # %bb.0: 2361; RV64IZFH-NEXT: addiw a0, a0, 1 2362; RV64IZFH-NEXT: fcvt.h.wu ft0, a0 2363; RV64IZFH-NEXT: fsh ft0, 0(a1) 2364; RV64IZFH-NEXT: ret 2365; 2366; RV32IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2367; RV32IDZFH: # %bb.0: 2368; RV32IDZFH-NEXT: addi a0, a0, 1 2369; RV32IDZFH-NEXT: fcvt.h.wu ft0, a0 2370; RV32IDZFH-NEXT: fsh ft0, 0(a1) 2371; RV32IDZFH-NEXT: ret 2372; 2373; RV64IDZFH-LABEL: fcvt_h_wu_demanded_bits: 2374; RV64IDZFH: # %bb.0: 2375; RV64IDZFH-NEXT: addiw a0, a0, 1 2376; RV64IDZFH-NEXT: fcvt.h.wu ft0, a0 2377; RV64IDZFH-NEXT: fsh ft0, 0(a1) 2378; RV64IDZFH-NEXT: ret 2379; 2380; RV32I-LABEL: fcvt_h_wu_demanded_bits: 2381; RV32I: # %bb.0: 2382; RV32I-NEXT: addi sp, sp, -16 2383; RV32I-NEXT: .cfi_def_cfa_offset 16 2384; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill 2385; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill 2386; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill 2387; RV32I-NEXT: .cfi_offset ra, -4 2388; RV32I-NEXT: .cfi_offset s0, -8 2389; RV32I-NEXT: .cfi_offset s1, -12 2390; RV32I-NEXT: mv s0, a1 2391; RV32I-NEXT: addi s1, a0, 1 2392; RV32I-NEXT: mv a0, s1 2393; RV32I-NEXT: call __floatunsisf@plt 2394; RV32I-NEXT: call __gnu_f2h_ieee@plt 2395; RV32I-NEXT: sh a0, 0(s0) 2396; RV32I-NEXT: mv a0, s1 2397; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload 2398; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload 2399; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload 2400; RV32I-NEXT: addi sp, sp, 16 2401; RV32I-NEXT: ret 2402; 2403; RV64I-LABEL: fcvt_h_wu_demanded_bits: 2404; RV64I: # %bb.0: 2405; RV64I-NEXT: addi sp, sp, -32 2406; RV64I-NEXT: .cfi_def_cfa_offset 32 2407; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill 2408; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill 2409; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill 2410; RV64I-NEXT: .cfi_offset ra, -8 2411; RV64I-NEXT: .cfi_offset s0, -16 2412; RV64I-NEXT: .cfi_offset s1, -24 2413; RV64I-NEXT: mv s0, a1 2414; RV64I-NEXT: addiw s1, a0, 1 2415; RV64I-NEXT: mv a0, s1 2416; RV64I-NEXT: call __floatunsisf@plt 2417; RV64I-NEXT: call __gnu_f2h_ieee@plt 2418; RV64I-NEXT: sh a0, 0(s0) 2419; RV64I-NEXT: mv a0, s1 2420; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload 2421; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload 2422; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload 2423; RV64I-NEXT: addi sp, sp, 32 2424; RV64I-NEXT: ret 2425 %3 = add i32 %0, 1 2426 %4 = uitofp i32 %3 to half 2427 store half %4, half* %1, align 2 2428 ret i32 %3 2429} 2430