1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
4; RUN:  -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-LE-P7
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
7; RUN:  -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE-P8
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
9; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
10; RUN:  -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-LE-P9
11; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
12; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
13; RUN:  -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-BE-P7
14; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
15; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
16; RUN:  -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE-P8
17; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
18; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
19; RUN:  -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-BE-P9
20; xscvdpsxws and xscvdpsxws is only available on Power7 and above
21; Codgen is different for Power7, Power8, and Power9.
22
23define dso_local <4 x i32> @test(<4 x i32> %a, double %b) {
24; CHECK-LE-P7-LABEL: test:
25; CHECK-LE-P7:       # %bb.0: # %entry
26; CHECK-LE-P7-NEXT:    xscvdpsxws f0, f1
27; CHECK-LE-P7-NEXT:    addi r3, r1, -4
28; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
29; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI0_0@toc@l
30; CHECK-LE-P7-NEXT:    lvx v3, 0, r4
31; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
32; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
33; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
34; CHECK-LE-P7-NEXT:    addi r3, r1, -32
35; CHECK-LE-P7-NEXT:    lvx v4, 0, r3
36; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
37; CHECK-LE-P7-NEXT:    blr
38;
39; CHECK-LE-P8-LABEL: test:
40; CHECK-LE-P8:       # %bb.0: # %entry
41; CHECK-LE-P8-NEXT:    xscvdpsxws v3, f1
42; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
43; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI0_0@toc@l
44; CHECK-LE-P8-NEXT:    lvx v4, 0, r3
45; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
46; CHECK-LE-P8-NEXT:    blr
47;
48; CHECK-LE-P9-LABEL: test:
49; CHECK-LE-P9:       # %bb.0: # %entry
50; CHECK-LE-P9-NEXT:    xscvdpsxws f0, f1
51; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
52; CHECK-LE-P9-NEXT:    blr
53;
54; CHECK-BE-P7-LABEL: test:
55; CHECK-BE-P7:       # %bb.0: # %entry
56; CHECK-BE-P7-NEXT:    xscvdpsxws f0, f1
57; CHECK-BE-P7-NEXT:    addi r3, r1, -4
58; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
59; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
60; CHECK-BE-P7-NEXT:    xxsldwi vs0, v2, v2, 3
61; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
62; CHECK-BE-P7-NEXT:    addi r3, r1, -32
63; CHECK-BE-P7-NEXT:    lxvw4x vs1, 0, r3
64; CHECK-BE-P7-NEXT:    xxsldwi v2, vs0, vs1, 1
65; CHECK-BE-P7-NEXT:    blr
66;
67; CHECK-BE-P8-LABEL: test:
68; CHECK-BE-P8:       # %bb.0: # %entry
69; CHECK-BE-P8-NEXT:    xscvdpsxws v3, f1
70; CHECK-BE-P8-NEXT:    vmrghw v3, v2, v3
71; CHECK-BE-P8-NEXT:    xxsldwi vs0, v3, v2, 3
72; CHECK-BE-P8-NEXT:    xxsldwi v2, vs0, vs0, 1
73; CHECK-BE-P8-NEXT:    blr
74;
75; CHECK-BE-P9-LABEL: test:
76; CHECK-BE-P9:       # %bb.0: # %entry
77; CHECK-BE-P9-NEXT:    xscvdpsxws f0, f1
78; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
79; CHECK-BE-P9-NEXT:    blr
80entry:
81  %conv = fptosi double %b to i32
82  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
83  ret <4 x i32> %vecins
84}
85
86define dso_local <4 x i32> @test2(<4 x i32> %a, float %b) {
87; CHECK-LE-P7-LABEL: test2:
88; CHECK-LE-P7:       # %bb.0: # %entry
89; CHECK-LE-P7-NEXT:    xscvdpsxws f0, f1
90; CHECK-LE-P7-NEXT:    addi r3, r1, -4
91; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI1_0@toc@ha
92; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI1_0@toc@l
93; CHECK-LE-P7-NEXT:    lvx v3, 0, r4
94; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
95; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
96; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
97; CHECK-LE-P7-NEXT:    addi r3, r1, -32
98; CHECK-LE-P7-NEXT:    lvx v4, 0, r3
99; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
100; CHECK-LE-P7-NEXT:    blr
101;
102; CHECK-LE-P8-LABEL: test2:
103; CHECK-LE-P8:       # %bb.0: # %entry
104; CHECK-LE-P8-NEXT:    xscvdpsxws v3, f1
105; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
106; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI1_0@toc@l
107; CHECK-LE-P8-NEXT:    lvx v4, 0, r3
108; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
109; CHECK-LE-P8-NEXT:    blr
110;
111; CHECK-LE-P9-LABEL: test2:
112; CHECK-LE-P9:       # %bb.0: # %entry
113; CHECK-LE-P9-NEXT:    xscvdpsxws f0, f1
114; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
115; CHECK-LE-P9-NEXT:    blr
116;
117; CHECK-BE-P7-LABEL: test2:
118; CHECK-BE-P7:       # %bb.0: # %entry
119; CHECK-BE-P7-NEXT:    xscvdpsxws f0, f1
120; CHECK-BE-P7-NEXT:    addi r3, r1, -4
121; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
122; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
123; CHECK-BE-P7-NEXT:    xxsldwi vs0, v2, v2, 3
124; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
125; CHECK-BE-P7-NEXT:    addi r3, r1, -32
126; CHECK-BE-P7-NEXT:    lxvw4x vs1, 0, r3
127; CHECK-BE-P7-NEXT:    xxsldwi v2, vs0, vs1, 1
128; CHECK-BE-P7-NEXT:    blr
129;
130; CHECK-BE-P8-LABEL: test2:
131; CHECK-BE-P8:       # %bb.0: # %entry
132; CHECK-BE-P8-NEXT:    xscvdpsxws v3, f1
133; CHECK-BE-P8-NEXT:    vmrghw v3, v2, v3
134; CHECK-BE-P8-NEXT:    xxsldwi vs0, v3, v2, 3
135; CHECK-BE-P8-NEXT:    xxsldwi v2, vs0, vs0, 1
136; CHECK-BE-P8-NEXT:    blr
137;
138; CHECK-BE-P9-LABEL: test2:
139; CHECK-BE-P9:       # %bb.0: # %entry
140; CHECK-BE-P9-NEXT:    xscvdpsxws f0, f1
141; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
142; CHECK-BE-P9-NEXT:    blr
143entry:
144  %conv = fptosi float %b to i32
145  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
146  ret <4 x i32> %vecins
147}
148
149define dso_local <4 x i32> @test3(<4 x i32> %a, double %b) {
150; CHECK-LE-P7-LABEL: test3:
151; CHECK-LE-P7:       # %bb.0: # %entry
152; CHECK-LE-P7-NEXT:    xscvdpuxws f0, f1
153; CHECK-LE-P7-NEXT:    addi r3, r1, -4
154; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
155; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI2_0@toc@l
156; CHECK-LE-P7-NEXT:    lvx v3, 0, r4
157; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
158; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
159; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
160; CHECK-LE-P7-NEXT:    addi r3, r1, -32
161; CHECK-LE-P7-NEXT:    lvx v4, 0, r3
162; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
163; CHECK-LE-P7-NEXT:    blr
164;
165; CHECK-LE-P8-LABEL: test3:
166; CHECK-LE-P8:       # %bb.0: # %entry
167; CHECK-LE-P8-NEXT:    xscvdpuxws v3, f1
168; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
169; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI2_0@toc@l
170; CHECK-LE-P8-NEXT:    lvx v4, 0, r3
171; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
172; CHECK-LE-P8-NEXT:    blr
173;
174; CHECK-LE-P9-LABEL: test3:
175; CHECK-LE-P9:       # %bb.0: # %entry
176; CHECK-LE-P9-NEXT:    xscvdpuxws f0, f1
177; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
178; CHECK-LE-P9-NEXT:    blr
179;
180; CHECK-BE-P7-LABEL: test3:
181; CHECK-BE-P7:       # %bb.0: # %entry
182; CHECK-BE-P7-NEXT:    xscvdpuxws f0, f1
183; CHECK-BE-P7-NEXT:    addi r3, r1, -4
184; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
185; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
186; CHECK-BE-P7-NEXT:    xxsldwi vs0, v2, v2, 3
187; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
188; CHECK-BE-P7-NEXT:    addi r3, r1, -32
189; CHECK-BE-P7-NEXT:    lxvw4x vs1, 0, r3
190; CHECK-BE-P7-NEXT:    xxsldwi v2, vs0, vs1, 1
191; CHECK-BE-P7-NEXT:    blr
192;
193; CHECK-BE-P8-LABEL: test3:
194; CHECK-BE-P8:       # %bb.0: # %entry
195; CHECK-BE-P8-NEXT:    xscvdpuxws v3, f1
196; CHECK-BE-P8-NEXT:    vmrghw v3, v2, v3
197; CHECK-BE-P8-NEXT:    xxsldwi vs0, v3, v2, 3
198; CHECK-BE-P8-NEXT:    xxsldwi v2, vs0, vs0, 1
199; CHECK-BE-P8-NEXT:    blr
200;
201; CHECK-BE-P9-LABEL: test3:
202; CHECK-BE-P9:       # %bb.0: # %entry
203; CHECK-BE-P9-NEXT:    xscvdpuxws f0, f1
204; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
205; CHECK-BE-P9-NEXT:    blr
206entry:
207  %conv = fptoui double %b to i32
208  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
209  ret <4 x i32> %vecins
210}
211
212define dso_local <4 x i32> @test4(<4 x i32> %a, float %b) {
213; CHECK-LE-P7-LABEL: test4:
214; CHECK-LE-P7:       # %bb.0: # %entry
215; CHECK-LE-P7-NEXT:    xscvdpuxws f0, f1
216; CHECK-LE-P7-NEXT:    addi r3, r1, -4
217; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
218; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI3_0@toc@l
219; CHECK-LE-P7-NEXT:    lvx v3, 0, r4
220; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
221; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
222; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
223; CHECK-LE-P7-NEXT:    addi r3, r1, -32
224; CHECK-LE-P7-NEXT:    lvx v4, 0, r3
225; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
226; CHECK-LE-P7-NEXT:    blr
227;
228; CHECK-LE-P8-LABEL: test4:
229; CHECK-LE-P8:       # %bb.0: # %entry
230; CHECK-LE-P8-NEXT:    xscvdpuxws v3, f1
231; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
232; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI3_0@toc@l
233; CHECK-LE-P8-NEXT:    lvx v4, 0, r3
234; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
235; CHECK-LE-P8-NEXT:    blr
236;
237; CHECK-LE-P9-LABEL: test4:
238; CHECK-LE-P9:       # %bb.0: # %entry
239; CHECK-LE-P9-NEXT:    xscvdpuxws f0, f1
240; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
241; CHECK-LE-P9-NEXT:    blr
242;
243; CHECK-BE-P7-LABEL: test4:
244; CHECK-BE-P7:       # %bb.0: # %entry
245; CHECK-BE-P7-NEXT:    xscvdpuxws f0, f1
246; CHECK-BE-P7-NEXT:    addi r3, r1, -4
247; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
248; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
249; CHECK-BE-P7-NEXT:    xxsldwi vs0, v2, v2, 3
250; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
251; CHECK-BE-P7-NEXT:    addi r3, r1, -32
252; CHECK-BE-P7-NEXT:    lxvw4x vs1, 0, r3
253; CHECK-BE-P7-NEXT:    xxsldwi v2, vs0, vs1, 1
254; CHECK-BE-P7-NEXT:    blr
255;
256; CHECK-BE-P8-LABEL: test4:
257; CHECK-BE-P8:       # %bb.0: # %entry
258; CHECK-BE-P8-NEXT:    xscvdpuxws v3, f1
259; CHECK-BE-P8-NEXT:    vmrghw v3, v2, v3
260; CHECK-BE-P8-NEXT:    xxsldwi vs0, v3, v2, 3
261; CHECK-BE-P8-NEXT:    xxsldwi v2, vs0, vs0, 1
262; CHECK-BE-P8-NEXT:    blr
263;
264; CHECK-BE-P9-LABEL: test4:
265; CHECK-BE-P9:       # %bb.0: # %entry
266; CHECK-BE-P9-NEXT:    xscvdpuxws f0, f1
267; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
268; CHECK-BE-P9-NEXT:    blr
269entry:
270  %conv = fptoui float %b to i32
271  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
272  ret <4 x i32> %vecins
273}
274