1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
4; RUN:  -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-LE-P7
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
7; RUN:  -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE-P8
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
9; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
10; RUN:  -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-LE-P9
11; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
12; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
13; RUN:  -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-BE-P7
14; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
15; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
16; RUN:  -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE-P8
17; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
18; RUN:  -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
19; RUN:  -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-BE-P9
20; xscvdpsxws and xscvdpsxws is only available on Power7 and above
21; Codgen is different for Power7, Power8, and Power9.
22
23define dso_local <4 x i32> @test(<4 x i32> %a, double %b) {
24; CHECK-LE-P7-LABEL: test:
25; CHECK-LE-P7:       # %bb.0: # %entry
26; CHECK-LE-P7-NEXT:    xscvdpsxws f0, f1
27; CHECK-LE-P7-NEXT:    addi r3, r1, -4
28; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
29; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI0_0@toc@l
30; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
31; CHECK-LE-P7-NEXT:    lxvd2x vs0, 0, r4
32; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
33; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
34; CHECK-LE-P7-NEXT:    addi r3, r1, -32
35; CHECK-LE-P7-NEXT:    xxswapd v3, vs0
36; CHECK-LE-P7-NEXT:    lxvd2x vs1, 0, r3
37; CHECK-LE-P7-NEXT:    xxswapd v4, vs1
38; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
39; CHECK-LE-P7-NEXT:    blr
40;
41; CHECK-LE-P8-LABEL: test:
42; CHECK-LE-P8:       # %bb.0: # %entry
43; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
44; CHECK-LE-P8-NEXT:    xscvdpsxws v3, f1
45; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI0_0@toc@l
46; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
47; CHECK-LE-P8-NEXT:    xxswapd v4, vs0
48; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
49; CHECK-LE-P8-NEXT:    blr
50;
51; CHECK-LE-P9-LABEL: test:
52; CHECK-LE-P9:       # %bb.0: # %entry
53; CHECK-LE-P9-NEXT:    xscvdpsxws f0, f1
54; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
55; CHECK-LE-P9-NEXT:    blr
56;
57; CHECK-BE-P7-LABEL: test:
58; CHECK-BE-P7:       # %bb.0: # %entry
59; CHECK-BE-P7-NEXT:    xscvdpsxws f0, f1
60; CHECK-BE-P7-NEXT:    addi r3, r1, -4
61; CHECK-BE-P7-NEXT:    addis r4, r2, .LCPI0_0@toc@ha
62; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
63; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
64; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
65; CHECK-BE-P7-NEXT:    addi r3, r4, .LCPI0_0@toc@l
66; CHECK-BE-P7-NEXT:    addi r4, r1, -32
67; CHECK-BE-P7-NEXT:    lxvw4x v3, 0, r3
68; CHECK-BE-P7-NEXT:    lxvw4x v4, 0, r4
69; CHECK-BE-P7-NEXT:    vperm v2, v2, v4, v3
70; CHECK-BE-P7-NEXT:    blr
71;
72; CHECK-BE-P8-LABEL: test:
73; CHECK-BE-P8:       # %bb.0: # %entry
74; CHECK-BE-P8-NEXT:    xscvdpsxws v3, f1
75; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
76; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI0_0@toc@l
77; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
78; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
79; CHECK-BE-P8-NEXT:    blr
80;
81; CHECK-BE-P9-LABEL: test:
82; CHECK-BE-P9:       # %bb.0: # %entry
83; CHECK-BE-P9-NEXT:    xscvdpsxws f0, f1
84; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
85; CHECK-BE-P9-NEXT:    blr
86entry:
87  %conv = fptosi double %b to i32
88  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
89  ret <4 x i32> %vecins
90}
91
92define dso_local <4 x i32> @test2(<4 x i32> %a, float %b) {
93; CHECK-LE-P7-LABEL: test2:
94; CHECK-LE-P7:       # %bb.0: # %entry
95; CHECK-LE-P7-NEXT:    xscvdpsxws f0, f1
96; CHECK-LE-P7-NEXT:    addi r3, r1, -4
97; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI1_0@toc@ha
98; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI1_0@toc@l
99; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
100; CHECK-LE-P7-NEXT:    lxvd2x vs0, 0, r4
101; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
102; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
103; CHECK-LE-P7-NEXT:    addi r3, r1, -32
104; CHECK-LE-P7-NEXT:    xxswapd v3, vs0
105; CHECK-LE-P7-NEXT:    lxvd2x vs1, 0, r3
106; CHECK-LE-P7-NEXT:    xxswapd v4, vs1
107; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
108; CHECK-LE-P7-NEXT:    blr
109;
110; CHECK-LE-P8-LABEL: test2:
111; CHECK-LE-P8:       # %bb.0: # %entry
112; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
113; CHECK-LE-P8-NEXT:    xscvdpsxws v3, f1
114; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI1_0@toc@l
115; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
116; CHECK-LE-P8-NEXT:    xxswapd v4, vs0
117; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
118; CHECK-LE-P8-NEXT:    blr
119;
120; CHECK-LE-P9-LABEL: test2:
121; CHECK-LE-P9:       # %bb.0: # %entry
122; CHECK-LE-P9-NEXT:    xscvdpsxws f0, f1
123; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
124; CHECK-LE-P9-NEXT:    blr
125;
126; CHECK-BE-P7-LABEL: test2:
127; CHECK-BE-P7:       # %bb.0: # %entry
128; CHECK-BE-P7-NEXT:    xscvdpsxws f0, f1
129; CHECK-BE-P7-NEXT:    addi r3, r1, -4
130; CHECK-BE-P7-NEXT:    addis r4, r2, .LCPI1_0@toc@ha
131; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
132; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
133; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
134; CHECK-BE-P7-NEXT:    addi r3, r4, .LCPI1_0@toc@l
135; CHECK-BE-P7-NEXT:    addi r4, r1, -32
136; CHECK-BE-P7-NEXT:    lxvw4x v3, 0, r3
137; CHECK-BE-P7-NEXT:    lxvw4x v4, 0, r4
138; CHECK-BE-P7-NEXT:    vperm v2, v2, v4, v3
139; CHECK-BE-P7-NEXT:    blr
140;
141; CHECK-BE-P8-LABEL: test2:
142; CHECK-BE-P8:       # %bb.0: # %entry
143; CHECK-BE-P8-NEXT:    xscvdpsxws v3, f1
144; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI1_0@toc@ha
145; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI1_0@toc@l
146; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
147; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
148; CHECK-BE-P8-NEXT:    blr
149;
150; CHECK-BE-P9-LABEL: test2:
151; CHECK-BE-P9:       # %bb.0: # %entry
152; CHECK-BE-P9-NEXT:    xscvdpsxws f0, f1
153; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
154; CHECK-BE-P9-NEXT:    blr
155entry:
156  %conv = fptosi float %b to i32
157  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
158  ret <4 x i32> %vecins
159}
160
161define dso_local <4 x i32> @test3(<4 x i32> %a, double %b) {
162; CHECK-LE-P7-LABEL: test3:
163; CHECK-LE-P7:       # %bb.0: # %entry
164; CHECK-LE-P7-NEXT:    xscvdpuxws f0, f1
165; CHECK-LE-P7-NEXT:    addi r3, r1, -4
166; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
167; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI2_0@toc@l
168; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
169; CHECK-LE-P7-NEXT:    lxvd2x vs0, 0, r4
170; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
171; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
172; CHECK-LE-P7-NEXT:    addi r3, r1, -32
173; CHECK-LE-P7-NEXT:    xxswapd v3, vs0
174; CHECK-LE-P7-NEXT:    lxvd2x vs1, 0, r3
175; CHECK-LE-P7-NEXT:    xxswapd v4, vs1
176; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
177; CHECK-LE-P7-NEXT:    blr
178;
179; CHECK-LE-P8-LABEL: test3:
180; CHECK-LE-P8:       # %bb.0: # %entry
181; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
182; CHECK-LE-P8-NEXT:    xscvdpuxws v3, f1
183; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI2_0@toc@l
184; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
185; CHECK-LE-P8-NEXT:    xxswapd v4, vs0
186; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
187; CHECK-LE-P8-NEXT:    blr
188;
189; CHECK-LE-P9-LABEL: test3:
190; CHECK-LE-P9:       # %bb.0: # %entry
191; CHECK-LE-P9-NEXT:    xscvdpuxws f0, f1
192; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
193; CHECK-LE-P9-NEXT:    blr
194;
195; CHECK-BE-P7-LABEL: test3:
196; CHECK-BE-P7:       # %bb.0: # %entry
197; CHECK-BE-P7-NEXT:    xscvdpuxws f0, f1
198; CHECK-BE-P7-NEXT:    addi r3, r1, -4
199; CHECK-BE-P7-NEXT:    addis r4, r2, .LCPI2_0@toc@ha
200; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
201; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
202; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
203; CHECK-BE-P7-NEXT:    addi r3, r4, .LCPI2_0@toc@l
204; CHECK-BE-P7-NEXT:    addi r4, r1, -32
205; CHECK-BE-P7-NEXT:    lxvw4x v3, 0, r3
206; CHECK-BE-P7-NEXT:    lxvw4x v4, 0, r4
207; CHECK-BE-P7-NEXT:    vperm v2, v2, v4, v3
208; CHECK-BE-P7-NEXT:    blr
209;
210; CHECK-BE-P8-LABEL: test3:
211; CHECK-BE-P8:       # %bb.0: # %entry
212; CHECK-BE-P8-NEXT:    xscvdpuxws v3, f1
213; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI2_0@toc@ha
214; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI2_0@toc@l
215; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
216; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
217; CHECK-BE-P8-NEXT:    blr
218;
219; CHECK-BE-P9-LABEL: test3:
220; CHECK-BE-P9:       # %bb.0: # %entry
221; CHECK-BE-P9-NEXT:    xscvdpuxws f0, f1
222; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
223; CHECK-BE-P9-NEXT:    blr
224entry:
225  %conv = fptoui double %b to i32
226  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
227  ret <4 x i32> %vecins
228}
229
230define dso_local <4 x i32> @test4(<4 x i32> %a, float %b) {
231; CHECK-LE-P7-LABEL: test4:
232; CHECK-LE-P7:       # %bb.0: # %entry
233; CHECK-LE-P7-NEXT:    xscvdpuxws f0, f1
234; CHECK-LE-P7-NEXT:    addi r3, r1, -4
235; CHECK-LE-P7-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
236; CHECK-LE-P7-NEXT:    addi r4, r4, .LCPI3_0@toc@l
237; CHECK-LE-P7-NEXT:    stfiwx f0, 0, r3
238; CHECK-LE-P7-NEXT:    lxvd2x vs0, 0, r4
239; CHECK-LE-P7-NEXT:    lwz r3, -4(r1)
240; CHECK-LE-P7-NEXT:    stw r3, -32(r1)
241; CHECK-LE-P7-NEXT:    addi r3, r1, -32
242; CHECK-LE-P7-NEXT:    xxswapd v3, vs0
243; CHECK-LE-P7-NEXT:    lxvd2x vs1, 0, r3
244; CHECK-LE-P7-NEXT:    xxswapd v4, vs1
245; CHECK-LE-P7-NEXT:    vperm v2, v4, v2, v3
246; CHECK-LE-P7-NEXT:    blr
247;
248; CHECK-LE-P8-LABEL: test4:
249; CHECK-LE-P8:       # %bb.0: # %entry
250; CHECK-LE-P8-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
251; CHECK-LE-P8-NEXT:    xscvdpuxws v3, f1
252; CHECK-LE-P8-NEXT:    addi r3, r3, .LCPI3_0@toc@l
253; CHECK-LE-P8-NEXT:    lxvd2x vs0, 0, r3
254; CHECK-LE-P8-NEXT:    xxswapd v4, vs0
255; CHECK-LE-P8-NEXT:    vperm v2, v3, v2, v4
256; CHECK-LE-P8-NEXT:    blr
257;
258; CHECK-LE-P9-LABEL: test4:
259; CHECK-LE-P9:       # %bb.0: # %entry
260; CHECK-LE-P9-NEXT:    xscvdpuxws f0, f1
261; CHECK-LE-P9-NEXT:    xxinsertw v2, vs0, 0
262; CHECK-LE-P9-NEXT:    blr
263;
264; CHECK-BE-P7-LABEL: test4:
265; CHECK-BE-P7:       # %bb.0: # %entry
266; CHECK-BE-P7-NEXT:    xscvdpuxws f0, f1
267; CHECK-BE-P7-NEXT:    addi r3, r1, -4
268; CHECK-BE-P7-NEXT:    addis r4, r2, .LCPI3_0@toc@ha
269; CHECK-BE-P7-NEXT:    stfiwx f0, 0, r3
270; CHECK-BE-P7-NEXT:    lwz r3, -4(r1)
271; CHECK-BE-P7-NEXT:    stw r3, -32(r1)
272; CHECK-BE-P7-NEXT:    addi r3, r4, .LCPI3_0@toc@l
273; CHECK-BE-P7-NEXT:    addi r4, r1, -32
274; CHECK-BE-P7-NEXT:    lxvw4x v3, 0, r3
275; CHECK-BE-P7-NEXT:    lxvw4x v4, 0, r4
276; CHECK-BE-P7-NEXT:    vperm v2, v2, v4, v3
277; CHECK-BE-P7-NEXT:    blr
278;
279; CHECK-BE-P8-LABEL: test4:
280; CHECK-BE-P8:       # %bb.0: # %entry
281; CHECK-BE-P8-NEXT:    xscvdpuxws v3, f1
282; CHECK-BE-P8-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
283; CHECK-BE-P8-NEXT:    addi r3, r3, .LCPI3_0@toc@l
284; CHECK-BE-P8-NEXT:    lxvw4x v4, 0, r3
285; CHECK-BE-P8-NEXT:    vperm v2, v2, v3, v4
286; CHECK-BE-P8-NEXT:    blr
287;
288; CHECK-BE-P9-LABEL: test4:
289; CHECK-BE-P9:       # %bb.0: # %entry
290; CHECK-BE-P9-NEXT:    xscvdpuxws f0, f1
291; CHECK-BE-P9-NEXT:    xxinsertw v2, vs0, 12
292; CHECK-BE-P9-NEXT:    blr
293entry:
294  %conv = fptoui float %b to i32
295  %vecins = insertelement <4 x i32> %a, i32 %conv, i32 3
296  ret <4 x i32> %vecins
297}
298