1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
3; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
4; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
5; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
6; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
7; RUN:    -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
8; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
9; RUN:    -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
10
11define i8 @scalar_to_vector_half(i16* nocapture readonly %ad) {
12; P9LE-LABEL: scalar_to_vector_half:
13; P9LE:       # %bb.0: # %entry
14; P9LE-NEXT:    lhz r3, 0(r3)
15; P9LE-NEXT:    blr
16;
17; P9BE-LABEL: scalar_to_vector_half:
18; P9BE:       # %bb.0: # %entry
19; P9BE-NEXT:    lxsihzx v2, 0, r3
20; P9BE-NEXT:    li r3, 0
21; P9BE-NEXT:    vsplth v2, v2, 3
22; P9BE-NEXT:    vextublx r3, r3, v2
23; P9BE-NEXT:    blr
24;
25; P8LE-LABEL: scalar_to_vector_half:
26; P8LE:       # %bb.0: # %entry
27; P8LE-NEXT:    lhz r3, 0(r3)
28; P8LE-NEXT:    blr
29;
30; P8BE-LABEL: scalar_to_vector_half:
31; P8BE:       # %bb.0: # %entry
32; P8BE-NEXT:    lhz r3, 0(r3)
33; P8BE-NEXT:    sldi r3, r3, 48
34; P8BE-NEXT:    mtfprd f0, r3
35; P8BE-NEXT:    mffprd r3, f0
36; P8BE-NEXT:    rldicl r3, r3, 8, 56
37; P8BE-NEXT:    blr
38entry:
39    %0 = bitcast i16* %ad to <2 x i8>*
40    %1 = load <2 x i8>, <2 x i8>* %0, align 1
41    %2 = extractelement <2 x i8> %1, i32 0
42    ret i8 %2
43}
44
45