1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -simplify-mir -verify-machineinstrs < %s | FileCheck %s
3
4target datalayout = "e-m:e-i64:64-n32:64"
5target triple = "powerpc64le-grtev4-linux-gnu"
6
7define void @foo(i64* %p1, i64 %v1, i8 %v2, i64 %v3) {
8; CHECK-LABEL: foo:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    mr 7, 5
11; CHECK-NEXT:    rldimi. 7, 4, 8, 0
12; CHECK-NEXT:    mcrf 1, 0
13; CHECK-NEXT:    andi. 5, 5, 1
14; CHECK-NEXT:    li 5, 0
15; CHECK-NEXT:    std 5, 0(3)
16; CHECK-NEXT:    crnot 20, 6
17; CHECK-NEXT:    bc 4, 1, .LBB0_2
18; CHECK-NEXT:  # %bb.1: # %bb1
19; CHECK-NEXT:    std 4, 0(3)
20; CHECK-NEXT:  .LBB0_2: # %bb2
21; CHECK-NEXT:    bclr 12, 20, 0
22; CHECK-NEXT:  # %bb.3: # %bb3
23; CHECK-NEXT:    std 6, 0(3)
24; CHECK-NEXT:    blr
25  store i64 0, i64* %p1, align 8
26  %ext = zext i8 %v2 to i64
27  %shift = shl nuw i64 %v1, 8
28  %merge = or i64 %shift, %ext
29  %not0 = icmp ne i64 %merge, 0
30  %bit0 = and i64 %ext, 1                 ; and & icmp instructions can be combined
31  %cond1 = icmp eq i64 %bit0, 0           ; to and. and generates condition code to
32  br i1 %cond1, label %bb2, label %bb1    ; be used by this conditional branch
33
34bb1:
35  store i64 %v1, i64* %p1, align 8
36  br label %bb2
37
38bb2:
39  br i1 %not0, label %exit, label %bb3
40
41bb3:
42  store i64 %v3, i64* %p1, align 8
43  br label %exit
44
45exit:
46  ret void
47}
48