1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi -mcpu=pwr9 < %s | FileCheck %s -check-prefix=CHECK-64 3; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff -vec-extabi -mcpu=pwr9 < %s | FileCheck %s -check-prefix=CHECK-32 4 5; Byte indexed 6 7define <16 x i8> @testByte(<16 x i8> %a, i64 %b, i64 %idx) { 8; CHECK-64-LABEL: testByte: 9; CHECK-64: # %bb.0: # %entry 10; CHECK-64-NEXT: addi 5, 1, -16 11; CHECK-64-NEXT: clrldi 4, 4, 60 12; CHECK-64-NEXT: stxv 34, -16(1) 13; CHECK-64-NEXT: stbx 3, 5, 4 14; CHECK-64-NEXT: lxv 34, -16(1) 15; CHECK-64-NEXT: blr 16; 17; CHECK-32-LABEL: testByte: 18; CHECK-32: # %bb.0: # %entry 19; CHECK-32-NEXT: addi 5, 1, -16 20; CHECK-32-NEXT: clrlwi 3, 6, 28 21; CHECK-32-NEXT: stxv 34, -16(1) 22; CHECK-32-NEXT: stbx 4, 5, 3 23; CHECK-32-NEXT: lxv 34, -16(1) 24; CHECK-32-NEXT: blr 25entry: 26 %conv = trunc i64 %b to i8 27 %vecins = insertelement <16 x i8> %a, i8 %conv, i64 %idx 28 ret <16 x i8> %vecins 29} 30 31; Halfword indexed 32 33define <8 x i16> @testHalf(<8 x i16> %a, i64 %b, i64 %idx) { 34; CHECK-64-LABEL: testHalf: 35; CHECK-64: # %bb.0: # %entry 36; CHECK-64-NEXT: addi 5, 1, -16 37; CHECK-64-NEXT: rlwinm 4, 4, 1, 28, 30 38; CHECK-64-NEXT: stxv 34, -16(1) 39; CHECK-64-NEXT: sthx 3, 5, 4 40; CHECK-64-NEXT: lxv 34, -16(1) 41; CHECK-64-NEXT: blr 42; 43; CHECK-32-LABEL: testHalf: 44; CHECK-32: # %bb.0: # %entry 45; CHECK-32-NEXT: addi 5, 1, -16 46; CHECK-32-NEXT: rlwinm 3, 6, 1, 28, 30 47; CHECK-32-NEXT: stxv 34, -16(1) 48; CHECK-32-NEXT: sthx 4, 5, 3 49; CHECK-32-NEXT: lxv 34, -16(1) 50; CHECK-32-NEXT: blr 51entry: 52 %conv = trunc i64 %b to i16 53 %vecins = insertelement <8 x i16> %a, i16 %conv, i64 %idx 54 ret <8 x i16> %vecins 55} 56 57; Word indexed 58 59define <4 x i32> @testWord(<4 x i32> %a, i64 %b, i64 %idx) { 60; CHECK-64-LABEL: testWord: 61; CHECK-64: # %bb.0: # %entry 62; CHECK-64-NEXT: addi 5, 1, -16 63; CHECK-64-NEXT: rlwinm 4, 4, 2, 28, 29 64; CHECK-64-NEXT: stxv 34, -16(1) 65; CHECK-64-NEXT: stwx 3, 5, 4 66; CHECK-64-NEXT: lxv 34, -16(1) 67; CHECK-64-NEXT: blr 68; 69; CHECK-32-LABEL: testWord: 70; CHECK-32: # %bb.0: # %entry 71; CHECK-32-NEXT: addi 5, 1, -16 72; CHECK-32-NEXT: rlwinm 3, 6, 2, 28, 29 73; CHECK-32-NEXT: stxv 34, -16(1) 74; CHECK-32-NEXT: stwx 4, 5, 3 75; CHECK-32-NEXT: lxv 34, -16(1) 76; CHECK-32-NEXT: blr 77entry: 78 %conv = trunc i64 %b to i32 79 %vecins = insertelement <4 x i32> %a, i32 %conv, i64 %idx 80 ret <4 x i32> %vecins 81} 82 83; Word immediate 84 85define <4 x i32> @testWordImm(<4 x i32> %a, i64 %b) { 86; CHECK-64-LABEL: testWordImm: 87; CHECK-64: # %bb.0: # %entry 88; CHECK-64-NEXT: mtfprwz 0, 3 89; CHECK-64-NEXT: xxinsertw 34, 0, 4 90; CHECK-64-NEXT: xxinsertw 34, 0, 12 91; CHECK-64-NEXT: blr 92; 93; CHECK-32-LABEL: testWordImm: 94; CHECK-32: # %bb.0: # %entry 95; CHECK-32-NEXT: mtfprwz 0, 4 96; CHECK-32-NEXT: xxinsertw 34, 0, 4 97; CHECK-32-NEXT: xxinsertw 34, 0, 12 98; CHECK-32-NEXT: blr 99entry: 100 %conv = trunc i64 %b to i32 101 %vecins = insertelement <4 x i32> %a, i32 %conv, i32 1 102 %vecins2 = insertelement <4 x i32> %vecins, i32 %conv, i32 3 103 ret <4 x i32> %vecins2 104} 105 106; Doubleword indexed 107 108define <2 x i64> @testDoubleword(<2 x i64> %a, i64 %b, i64 %idx) { 109; CHECK-64-LABEL: testDoubleword: 110; CHECK-64: # %bb.0: # %entry 111; CHECK-64-NEXT: addi 5, 1, -16 112; CHECK-64-NEXT: rlwinm 4, 4, 3, 28, 28 113; CHECK-64-NEXT: stxv 34, -16(1) 114; CHECK-64-NEXT: stdx 3, 5, 4 115; CHECK-64-NEXT: lxv 34, -16(1) 116; CHECK-64-NEXT: blr 117; 118; CHECK-32-LABEL: testDoubleword: 119; CHECK-32: # %bb.0: # %entry 120; CHECK-32-NEXT: add 5, 6, 6 121; CHECK-32-NEXT: addi 7, 1, -32 122; CHECK-32-NEXT: stxv 34, -32(1) 123; CHECK-32-NEXT: rlwinm 6, 5, 2, 28, 29 124; CHECK-32-NEXT: stwx 3, 7, 6 125; CHECK-32-NEXT: addi 3, 5, 1 126; CHECK-32-NEXT: addi 5, 1, -16 127; CHECK-32-NEXT: lxv 0, -32(1) 128; CHECK-32-NEXT: rlwinm 3, 3, 2, 28, 29 129; CHECK-32-NEXT: stxv 0, -16(1) 130; CHECK-32-NEXT: stwx 4, 5, 3 131; CHECK-32-NEXT: lxv 34, -16(1) 132; CHECK-32-NEXT: blr 133entry: 134 %vecins = insertelement <2 x i64> %a, i64 %b, i64 %idx 135 ret <2 x i64> %vecins 136} 137 138; Doubleword immediate 139 140define <2 x i64> @testDoublewordImm(<2 x i64> %a, i64 %b) { 141; CHECK-64-LABEL: testDoublewordImm: 142; CHECK-64: # %bb.0: # %entry 143; CHECK-64-NEXT: mtfprd 0, 3 144; CHECK-64-NEXT: xxmrghd 34, 34, 0 145; CHECK-64-NEXT: blr 146; 147; CHECK-32-LABEL: testDoublewordImm: 148; CHECK-32: # %bb.0: # %entry 149; CHECK-32-NEXT: mtfprwz 0, 3 150; CHECK-32-NEXT: xxinsertw 34, 0, 8 151; CHECK-32-NEXT: mtfprwz 0, 4 152; CHECK-32-NEXT: xxinsertw 34, 0, 12 153; CHECK-32-NEXT: blr 154entry: 155 %vecins = insertelement <2 x i64> %a, i64 %b, i32 1 156 ret <2 x i64> %vecins 157} 158 159define <2 x i64> @testDoublewordImm2(<2 x i64> %a, i64 %b) { 160; CHECK-64-LABEL: testDoublewordImm2: 161; CHECK-64: # %bb.0: # %entry 162; CHECK-64-NEXT: mtfprd 0, 3 163; CHECK-64-NEXT: xxpermdi 34, 0, 34, 1 164; CHECK-64-NEXT: blr 165; 166; CHECK-32-LABEL: testDoublewordImm2: 167; CHECK-32: # %bb.0: # %entry 168; CHECK-32-NEXT: mtfprwz 0, 3 169; CHECK-32-NEXT: xxinsertw 34, 0, 0 170; CHECK-32-NEXT: mtfprwz 0, 4 171; CHECK-32-NEXT: xxinsertw 34, 0, 4 172; CHECK-32-NEXT: blr 173entry: 174 %vecins = insertelement <2 x i64> %a, i64 %b, i32 0 175 ret <2 x i64> %vecins 176} 177 178; Float indexed 179 180define <4 x float> @testFloat1(<4 x float> %a, float %b, i32 zeroext %idx1) { 181; CHECK-64-LABEL: testFloat1: 182; CHECK-64: # %bb.0: # %entry 183; CHECK-64-NEXT: rlwinm 3, 4, 2, 28, 29 184; CHECK-64-NEXT: addi 4, 1, -16 185; CHECK-64-NEXT: stxv 34, -16(1) 186; CHECK-64-NEXT: stfsx 1, 4, 3 187; CHECK-64-NEXT: lxv 34, -16(1) 188; CHECK-64-NEXT: blr 189; 190; CHECK-32-LABEL: testFloat1: 191; CHECK-32: # %bb.0: # %entry 192; CHECK-32-NEXT: rlwinm 3, 4, 2, 28, 29 193; CHECK-32-NEXT: addi 4, 1, -16 194; CHECK-32-NEXT: stxv 34, -16(1) 195; CHECK-32-NEXT: stfsx 1, 4, 3 196; CHECK-32-NEXT: lxv 34, -16(1) 197; CHECK-32-NEXT: blr 198entry: 199 %vecins = insertelement <4 x float> %a, float %b, i32 %idx1 200 ret <4 x float> %vecins 201} 202 203define <4 x float> @testFloat2(<4 x float> %a, i8* %b, i32 zeroext %idx1, i32 zeroext %idx2) { 204; CHECK-64-LABEL: testFloat2: 205; CHECK-64: # %bb.0: # %entry 206; CHECK-64-DAG: lwz 6, 0(3) 207; CHECK-64-DAG: rlwinm 4, 4, 2, 28, 29 208; CHECK-64-DAG: addi 7, 1, -32 209; CHECK-64-DAG: stxv 34, -32(1) 210; CHECK-64-DAG: stwx 6, 7, 4 211; CHECK-64-DAG: rlwinm 4, 5, 2, 28, 29 212; CHECK-64-DAG: addi 5, 1, -16 213; CHECK-64-DAG: lxv 0, -32(1) 214; CHECK-64-DAG: lwz 3, 1(3) 215; CHECK-64-DAG: stxv 0, -16(1) 216; CHECK-64-DAG: stwx 3, 5, 4 217; CHECK-64-DAG: lxv 34, -16(1) 218; CHECK-64-NEXT: blr 219; 220; CHECK-32-LABEL: testFloat2: 221; CHECK-32: # %bb.0: # %entry 222; CHECK-32-NEXT: lwz 6, 0(3) 223; CHECK-32-NEXT: addi 7, 1, -32 224; CHECK-32-NEXT: rlwinm 4, 4, 2, 28, 29 225; CHECK-32-NEXT: stxv 34, -32(1) 226; CHECK-32-NEXT: rlwinm 5, 5, 2, 28, 29 227; CHECK-32-NEXT: stwx 6, 7, 4 228; CHECK-32-NEXT: addi 4, 1, -16 229; CHECK-32-NEXT: lxv 0, -32(1) 230; CHECK-32-NEXT: lwz 3, 1(3) 231; CHECK-32-NEXT: stxv 0, -16(1) 232; CHECK-32-NEXT: stwx 3, 4, 5 233; CHECK-32-NEXT: lxv 34, -16(1) 234; CHECK-32-NEXT: blr 235entry: 236 %0 = bitcast i8* %b to float* 237 %add.ptr1 = getelementptr inbounds i8, i8* %b, i64 1 238 %1 = bitcast i8* %add.ptr1 to float* 239 %2 = load float, float* %0, align 4 240 %vecins = insertelement <4 x float> %a, float %2, i32 %idx1 241 %3 = load float, float* %1, align 4 242 %vecins2 = insertelement <4 x float> %vecins, float %3, i32 %idx2 243 ret <4 x float> %vecins2 244} 245 246define <4 x float> @testFloat3(<4 x float> %a, i8* %b, i32 zeroext %idx1, i32 zeroext %idx2) { 247; CHECK-64-LABEL: testFloat3: 248; CHECK-64: # %bb.0: # %entry 249; CHECK-64-DAG: lis 6, 1 250; CHECK-64-DAG: rlwinm 4, 4, 2, 28, 29 251; CHECK-64-DAG: addi 7, 1, -32 252; CHECK-64-DAG: lwzx 6, 3, 6 253; CHECK-64-DAG: stxv 34, -32(1) 254; CHECK-64-DAG: stwx 6, 7, 4 255; CHECK-64-DAG: li 4, 1 256; CHECK-64-DAG: lxv 0, -32(1) 257; CHECK-64-DAG: rldic 4, 4, 36, 27 258; CHECK-64-DAG: lwzx 3, 3, 4 259; CHECK-64-DAG: rlwinm 4, 5, 2, 28, 29 260; CHECK-64-DAG: addi 5, 1, -16 261; CHECK-64-DAG: stxv 0, -16(1) 262; CHECK-64-DAG: stwx 3, 5, 4 263; CHECK-64-DAG: lxv 34, -16(1) 264; CHECK-64-NEXT: blr 265; 266; CHECK-32-LABEL: testFloat3: 267; CHECK-32: # %bb.0: # %entry 268; CHECK-32-NEXT: lis 6, 1 269; CHECK-32-NEXT: addi 7, 1, -32 270; CHECK-32-NEXT: rlwinm 4, 4, 2, 28, 29 271; CHECK-32-NEXT: rlwinm 5, 5, 2, 28, 29 272; CHECK-32-NEXT: lwzx 6, 3, 6 273; CHECK-32-NEXT: stxv 34, -32(1) 274; CHECK-32-NEXT: stwx 6, 7, 4 275; CHECK-32-NEXT: addi 4, 1, -16 276; CHECK-32-NEXT: lxv 0, -32(1) 277; CHECK-32-NEXT: lwz 3, 0(3) 278; CHECK-32-NEXT: stxv 0, -16(1) 279; CHECK-32-NEXT: stwx 3, 4, 5 280; CHECK-32-NEXT: lxv 34, -16(1) 281; CHECK-32-NEXT: blr 282entry: 283 %add.ptr = getelementptr inbounds i8, i8* %b, i64 65536 284 %0 = bitcast i8* %add.ptr to float* 285 %add.ptr1 = getelementptr inbounds i8, i8* %b, i64 68719476736 286 %1 = bitcast i8* %add.ptr1 to float* 287 %2 = load float, float* %0, align 4 288 %vecins = insertelement <4 x float> %a, float %2, i32 %idx1 289 %3 = load float, float* %1, align 4 290 %vecins2 = insertelement <4 x float> %vecins, float %3, i32 %idx2 291 ret <4 x float> %vecins2 292} 293 294; Float immediate 295 296define <4 x float> @testFloatImm1(<4 x float> %a, float %b) { 297; CHECK-64-LABEL: testFloatImm1: 298; CHECK-64: # %bb.0: # %entry 299; CHECK-64-NEXT: xscvdpspn 0, 1 300; CHECK-64-NEXT: xxsldwi 0, 0, 0, 3 301; CHECK-64-NEXT: xxinsertw 34, 0, 0 302; CHECK-64-NEXT: xxinsertw 34, 0, 8 303; CHECK-64-NEXT: blr 304; 305; CHECK-32-LABEL: testFloatImm1: 306; CHECK-32: # %bb.0: # %entry 307; CHECK-32-NEXT: xscvdpspn 0, 1 308; CHECK-32-NEXT: xxsldwi 0, 0, 0, 3 309; CHECK-32-NEXT: xxinsertw 34, 0, 0 310; CHECK-32-NEXT: xxinsertw 34, 0, 8 311; CHECK-32-NEXT: blr 312entry: 313 %vecins = insertelement <4 x float> %a, float %b, i32 0 314 %vecins1 = insertelement <4 x float> %vecins, float %b, i32 2 315 ret <4 x float> %vecins1 316} 317 318define <4 x float> @testFloatImm2(<4 x float> %a, i32* %b) { 319; CHECK-64-LABEL: testFloatImm2: 320; CHECK-64: # %bb.0: # %entry 321; CHECK-64-NEXT: lfs 0, 0(3) 322; CHECK-64-NEXT: xscvdpspn 0, 0 323; CHECK-64-NEXT: xxsldwi 0, 0, 0, 3 324; CHECK-64-NEXT: xxinsertw 34, 0, 0 325; CHECK-64-NEXT: lfs 0, 4(3) 326; CHECK-64-NEXT: xscvdpspn 0, 0 327; CHECK-64-NEXT: xxsldwi 0, 0, 0, 3 328; CHECK-64-NEXT: xxinsertw 34, 0, 8 329; CHECK-64-NEXT: blr 330; 331; CHECK-32-LABEL: testFloatImm2: 332; CHECK-32: # %bb.0: # %entry 333; CHECK-32-NEXT: lfs 0, 0(3) 334; CHECK-32-NEXT: xscvdpspn 0, 0 335; CHECK-32-NEXT: xxsldwi 0, 0, 0, 3 336; CHECK-32-NEXT: xxinsertw 34, 0, 0 337; CHECK-32-NEXT: lfs 0, 4(3) 338; CHECK-32-NEXT: xscvdpspn 0, 0 339; CHECK-32-NEXT: xxsldwi 0, 0, 0, 3 340; CHECK-32-NEXT: xxinsertw 34, 0, 8 341; CHECK-32-NEXT: blr 342entry: 343 %0 = bitcast i32* %b to float* 344 %add.ptr1 = getelementptr inbounds i32, i32* %b, i64 1 345 %1 = bitcast i32* %add.ptr1 to float* 346 %2 = load float, float* %0, align 4 347 %vecins = insertelement <4 x float> %a, float %2, i32 0 348 %3 = load float, float* %1, align 4 349 %vecins2 = insertelement <4 x float> %vecins, float %3, i32 2 350 ret <4 x float> %vecins2 351} 352 353define <4 x float> @testFloatImm3(<4 x float> %a, i32* %b) { 354; CHECK-64-LABEL: testFloatImm3: 355; CHECK-64: # %bb.0: # %entry 356; CHECK-64-NEXT: lis 4, 4 357; CHECK-64-NEXT: lfsx 0, 3, 4 358; CHECK-64-NEXT: li 4, 1 359; CHECK-64-NEXT: rldic 4, 4, 38, 25 360; CHECK-64-NEXT: xscvdpspn 0, 0 361; CHECK-64-NEXT: xxsldwi 0, 0, 0, 3 362; CHECK-64-NEXT: xxinsertw 34, 0, 0 363; CHECK-64-NEXT: lfsx 0, 3, 4 364; CHECK-64-NEXT: xscvdpspn 0, 0 365; CHECK-64-NEXT: xxsldwi 0, 0, 0, 3 366; CHECK-64-NEXT: xxinsertw 34, 0, 8 367; CHECK-64-NEXT: blr 368; 369; CHECK-32-LABEL: testFloatImm3: 370; CHECK-32: # %bb.0: # %entry 371; CHECK-32-NEXT: lis 4, 4 372; CHECK-32-NEXT: lfsx 0, 3, 4 373; CHECK-32-NEXT: xscvdpspn 0, 0 374; CHECK-32-NEXT: xxsldwi 0, 0, 0, 3 375; CHECK-32-NEXT: xxinsertw 34, 0, 0 376; CHECK-32-NEXT: lfs 0, 0(3) 377; CHECK-32-NEXT: xscvdpspn 0, 0 378; CHECK-32-NEXT: xxsldwi 0, 0, 0, 3 379; CHECK-32-NEXT: xxinsertw 34, 0, 8 380; CHECK-32-NEXT: blr 381entry: 382 %add.ptr = getelementptr inbounds i32, i32* %b, i64 65536 383 %0 = bitcast i32* %add.ptr to float* 384 %add.ptr1 = getelementptr inbounds i32, i32* %b, i64 68719476736 385 %1 = bitcast i32* %add.ptr1 to float* 386 %2 = load float, float* %0, align 4 387 %vecins = insertelement <4 x float> %a, float %2, i32 0 388 %3 = load float, float* %1, align 4 389 %vecins2 = insertelement <4 x float> %vecins, float %3, i32 2 390 ret <4 x float> %vecins2 391} 392 393; Double indexed 394 395define <2 x double> @testDouble1(<2 x double> %a, double %b, i32 zeroext %idx1) { 396; CHECK-64-LABEL: testDouble1: 397; CHECK-64: # %bb.0: # %entry 398; CHECK-64-NEXT: rlwinm 3, 4, 3, 28, 28 399; CHECK-64-NEXT: addi 4, 1, -16 400; CHECK-64-NEXT: stxv 34, -16(1) 401; CHECK-64-NEXT: stfdx 1, 4, 3 402; CHECK-64-NEXT: lxv 34, -16(1) 403; CHECK-64-NEXT: blr 404; 405; CHECK-32-LABEL: testDouble1: 406; CHECK-32: # %bb.0: # %entry 407; CHECK-32-NEXT: addi 4, 1, -16 408; CHECK-32-NEXT: rlwinm 3, 5, 3, 28, 28 409; CHECK-32-NEXT: stxv 34, -16(1) 410; CHECK-32-NEXT: stfdx 1, 4, 3 411; CHECK-32-NEXT: lxv 34, -16(1) 412; CHECK-32-NEXT: blr 413entry: 414 %vecins = insertelement <2 x double> %a, double %b, i32 %idx1 415 ret <2 x double> %vecins 416} 417 418define <2 x double> @testDouble2(<2 x double> %a, i8* %b, i32 zeroext %idx1, i32 zeroext %idx2) { 419; CHECK-64-LABEL: testDouble2: 420; CHECK-64: # %bb.0: # %entry 421; CHECK-64-DAG: ld 6, 0(3) 422; CHECK-64-DAG: rlwinm 4, 4, 3, 28, 28 423; CHECK-64-DAG: addi 7, 1, -32 424; CHECK-64-DAG: stxv 34, -32(1) 425; CHECK-64-DAG: stdx 6, 7, 4 426; CHECK-64-DAG: li 4, 1 427; CHECK-64-DAG: lxv 0, -32(1) 428; CHECK-64-DAG: ldx 3, 3, 4 429; CHECK-64-DAG: rlwinm 4, 5, 3, 28, 28 430; CHECK-64-DAG: addi 5, 1, -16 431; CHECK-64-DAG: stxv 0, -16(1) 432; CHECK-64-DAG: stdx 3, 5, 4 433; CHECK-64-DAG: lxv 34, -16(1) 434; CHECK-64-NEXT: blr 435; 436; CHECK-32-LABEL: testDouble2: 437; CHECK-32: # %bb.0: # %entry 438; CHECK-32-NEXT: lfd 0, 0(3) 439; CHECK-32-NEXT: addi 6, 1, -32 440; CHECK-32-NEXT: rlwinm 4, 4, 3, 28, 28 441; CHECK-32-NEXT: stxv 34, -32(1) 442; CHECK-32-NEXT: rlwinm 5, 5, 3, 28, 28 443; CHECK-32-NEXT: stfdx 0, 6, 4 444; CHECK-32-NEXT: lxv 0, -32(1) 445; CHECK-32-NEXT: lfd 1, 1(3) 446; CHECK-32-NEXT: addi 3, 1, -16 447; CHECK-32-NEXT: stxv 0, -16(1) 448; CHECK-32-NEXT: stfdx 1, 3, 5 449; CHECK-32-NEXT: lxv 34, -16(1) 450; CHECK-32-NEXT: blr 451entry: 452 %0 = bitcast i8* %b to double* 453 %add.ptr1 = getelementptr inbounds i8, i8* %b, i64 1 454 %1 = bitcast i8* %add.ptr1 to double* 455 %2 = load double, double* %0, align 8 456 %vecins = insertelement <2 x double> %a, double %2, i32 %idx1 457 %3 = load double, double* %1, align 8 458 %vecins2 = insertelement <2 x double> %vecins, double %3, i32 %idx2 459 ret <2 x double> %vecins2 460} 461 462define <2 x double> @testDouble3(<2 x double> %a, i8* %b, i32 zeroext %idx1, i32 zeroext %idx2) { 463; CHECK-64-LABEL: testDouble3: 464; CHECK-64: # %bb.0: # %entry 465; CHECK-64-DAG: lis 6, 1 466; CHECK-64-DAG: rlwinm 4, 4, 3, 28, 28 467; CHECK-64-DAG: addi 7, 1, -32 468; CHECK-64-DAG: ldx 6, 3, 6 469; CHECK-64-DAG: stxv 34, -32(1) 470; CHECK-64-DAG: stdx 6, 7, 4 471; CHECK-64-DAG: li 4, 1 472; CHECK-64-DAG: lxv 0, -32(1) 473; CHECK-64-DAG: rldic 4, 4, 36, 27 474; CHECK-64-DAG: ldx 3, 3, 4 475; CHECK-64-DAG: rlwinm 4, 5, 3, 28, 28 476; CHECK-64-DAG: addi 5, 1, -16 477; CHECK-64-DAG: stxv 0, -16(1) 478; CHECK-64-DAG: stdx 3, 5, 4 479; CHECK-64-DAG: lxv 34, -16(1) 480; CHECK-64-NEXT: blr 481; 482; CHECK-32-LABEL: testDouble3: 483; CHECK-32: # %bb.0: # %entry 484; CHECK-32-NEXT: lis 6, 1 485; CHECK-32-NEXT: rlwinm 4, 4, 3, 28, 28 486; CHECK-32-NEXT: rlwinm 5, 5, 3, 28, 28 487; CHECK-32-NEXT: lfdx 0, 3, 6 488; CHECK-32-NEXT: addi 6, 1, -32 489; CHECK-32-NEXT: stxv 34, -32(1) 490; CHECK-32-NEXT: stfdx 0, 6, 4 491; CHECK-32-NEXT: lxv 0, -32(1) 492; CHECK-32-NEXT: lfd 1, 0(3) 493; CHECK-32-NEXT: addi 3, 1, -16 494; CHECK-32-NEXT: stxv 0, -16(1) 495; CHECK-32-NEXT: stfdx 1, 3, 5 496; CHECK-32-NEXT: lxv 34, -16(1) 497; CHECK-32-NEXT: blr 498entry: 499 %add.ptr = getelementptr inbounds i8, i8* %b, i64 65536 500 %0 = bitcast i8* %add.ptr to double* 501 %add.ptr1 = getelementptr inbounds i8, i8* %b, i64 68719476736 502 %1 = bitcast i8* %add.ptr1 to double* 503 %2 = load double, double* %0, align 8 504 %vecins = insertelement <2 x double> %a, double %2, i32 %idx1 505 %3 = load double, double* %1, align 8 506 %vecins2 = insertelement <2 x double> %vecins, double %3, i32 %idx2 507 ret <2 x double> %vecins2 508} 509 510; Double immediate 511 512define <2 x double> @testDoubleImm1(<2 x double> %a, double %b) { 513; CHECK-64-LABEL: testDoubleImm1: 514; CHECK-64: # %bb.0: # %entry 515; CHECK-64-NEXT: # kill: def $f1 killed $f1 def $vsl1 516; CHECK-64-NEXT: xxpermdi 34, 1, 34, 1 517; CHECK-64-NEXT: blr 518; 519; CHECK-32-LABEL: testDoubleImm1: 520; CHECK-32: # %bb.0: # %entry 521; CHECK-32-NEXT: # kill: def $f1 killed $f1 def $vsl1 522; CHECK-32-NEXT: xxpermdi 34, 1, 34, 1 523; CHECK-32-NEXT: blr 524entry: 525 %vecins = insertelement <2 x double> %a, double %b, i32 0 526 ret <2 x double> %vecins 527} 528 529define <2 x double> @testDoubleImm2(<2 x double> %a, i32* %b) { 530; CHECK-64-LABEL: testDoubleImm2: 531; CHECK-64: # %bb.0: # %entry 532; CHECK-64-NEXT: lfd 0, 0(3) 533; CHECK-64-NEXT: xxpermdi 34, 0, 34, 1 534; CHECK-64-NEXT: blr 535; 536; CHECK-32-LABEL: testDoubleImm2: 537; CHECK-32: # %bb.0: # %entry 538; CHECK-32-NEXT: lfd 0, 0(3) 539; CHECK-32-NEXT: xxpermdi 34, 0, 34, 1 540; CHECK-32-NEXT: blr 541entry: 542 %0 = bitcast i32* %b to double* 543 %1 = load double, double* %0, align 8 544 %vecins = insertelement <2 x double> %a, double %1, i32 0 545 ret <2 x double> %vecins 546} 547 548define <2 x double> @testDoubleImm3(<2 x double> %a, i32* %b) { 549; CHECK-64-LABEL: testDoubleImm3: 550; CHECK-64: # %bb.0: # %entry 551; CHECK-64-NEXT: lfd 0, 4(3) 552; CHECK-64-NEXT: xxpermdi 34, 0, 34, 1 553; CHECK-64-NEXT: blr 554; 555; CHECK-32-LABEL: testDoubleImm3: 556; CHECK-32: # %bb.0: # %entry 557; CHECK-32-NEXT: lfd 0, 4(3) 558; CHECK-32-NEXT: xxpermdi 34, 0, 34, 1 559; CHECK-32-NEXT: blr 560entry: 561 %add.ptr = getelementptr inbounds i32, i32* %b, i64 1 562 %0 = bitcast i32* %add.ptr to double* 563 %1 = load double, double* %0, align 8 564 %vecins = insertelement <2 x double> %a, double %1, i32 0 565 ret <2 x double> %vecins 566} 567 568define <2 x double> @testDoubleImm4(<2 x double> %a, i32* %b) { 569; CHECK-64-LABEL: testDoubleImm4: 570; CHECK-64: # %bb.0: # %entry 571; CHECK-64-NEXT: lis 4, 4 572; CHECK-64-NEXT: lfdx 0, 3, 4 573; CHECK-64-NEXT: xxpermdi 34, 0, 34, 1 574; CHECK-64-NEXT: blr 575; 576; CHECK-32-LABEL: testDoubleImm4: 577; CHECK-32: # %bb.0: # %entry 578; CHECK-32-NEXT: lis 4, 4 579; CHECK-32-NEXT: lfdx 0, 3, 4 580; CHECK-32-NEXT: xxpermdi 34, 0, 34, 1 581; CHECK-32-NEXT: blr 582entry: 583 %add.ptr = getelementptr inbounds i32, i32* %b, i64 65536 584 %0 = bitcast i32* %add.ptr to double* 585 %1 = load double, double* %0, align 8 586 %vecins = insertelement <2 x double> %a, double %1, i32 0 587 ret <2 x double> %vecins 588} 589 590define <2 x double> @testDoubleImm5(<2 x double> %a, i32* %b) { 591; CHECK-64-LABEL: testDoubleImm5: 592; CHECK-64: # %bb.0: # %entry 593; CHECK-64-NEXT: li 4, 1 594; CHECK-64-NEXT: rldic 4, 4, 38, 25 595; CHECK-64-NEXT: lfdx 0, 3, 4 596; CHECK-64-NEXT: xxpermdi 34, 0, 34, 1 597; CHECK-64-NEXT: blr 598; 599; CHECK-32-LABEL: testDoubleImm5: 600; CHECK-32: # %bb.0: # %entry 601; CHECK-32-NEXT: lfd 0, 0(3) 602; CHECK-32-NEXT: xxpermdi 34, 0, 34, 1 603; CHECK-32-NEXT: blr 604entry: 605 %add.ptr = getelementptr inbounds i32, i32* %b, i64 68719476736 606 %0 = bitcast i32* %add.ptr to double* 607 %1 = load double, double* %0, align 8 608 %vecins = insertelement <2 x double> %a, double %1, i32 0 609 ret <2 x double> %vecins 610} 611 612