1; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
2; RUN:   -mattr=-altivec -filetype=obj -xcoff-traceback-table=false -o %t.o < %s
3
4; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s
5
6; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \
7; RUN:   --check-prefix=32-REL %s
8
9; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s
10
11; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff \
12; RUN:   -mcpu=pwr4 -mattr=-altivec < %s | FileCheck %s
13
14;; FIXME: currently only fileHeader and sectionHeaders are supported in XCOFF64.
15
16; Test verifies:
17; If there exists a user-defined function whose name is the same as the
18; "memcpy" ExternalSymbol's, we pick up the user-defined version, even if this
19; may lead to some undefined behavior.
20
21define dso_local signext i32 @memcpy(i8* %destination, i32 signext %num) {
22entry:
23  ret i32 3
24}
25
26define void @call_memcpy(i8* %p, i8* %q, i32 %n) {
27entry:
28  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
29  ret void
30}
31
32declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
33
34; This test check
35; 1. The symbol table for .o file to verify .memcpy is a defined external label.
36; 2. There is no relocation associated with the call, since callee is defined.
37; 3. Branch instruction in raw data is branching back to the right callee location.
38
39; CHECK-NOT: .extern .memcpy
40
41; 32-SYM:      Symbol {{[{][[:space:]] *}}Index: [[#Index:]]{{[[:space:]] *}}Name: .memcpy
42; 32-SYM-NEXT:    Value (RelocatableAddress): 0x0
43; 32-SYM-NEXT:    Section: .text
44; 32-SYM-NEXT:    Type: 0x0
45; 32-SYM-NEXT:    StorageClass: C_EXT (0x2)
46; 32-SYM-NEXT:    NumberOfAuxEntries: 1
47; 32-SYM-NEXT:    CSECT Auxiliary Entry {
48; 32-SYM-NEXT:      Index: 4
49; 32-SYM-NEXT:      ContainingCsectSymbolIndex: 1
50; 32-SYM-NEXT:      ParameterHashIndex: 0x0
51; 32-SYM-NEXT:      TypeChkSectNum: 0x0
52; 32-SYM-NEXT:      SymbolAlignmentLog2: 0
53; 32-SYM-NEXT:      SymbolType: XTY_LD (0x2)
54; 32-SYM-NEXT:      StorageMappingClass: XMC_PR (0x0)
55; 32-SYM-NEXT:      StabInfoIndex: 0x0
56; 32-SYM-NEXT:      StabSectNum: 0x0
57; 32-SYM-NEXT:    }
58; 32-SYM-NEXT:  }
59
60; 32-SYM-NOT: .memcpy
61
62; 32-REL:      Relocations [
63; 32-REL-NEXT:  Section (index: 2) .data {
64; 32-REL-NEXT:  Relocation {
65; 32-REL-NEXT:    Virtual Address: 0x34
66; 32-REL-NEXT:    Symbol: .memcpy (3)
67; 32-REL-NEXT:    IsSigned: No
68; 32-REL-NEXT:    FixupBitValue: 0
69; 32-REL-NEXT:    Length: 32
70; 32-REL-NEXT:    Type: R_POS (0x0)
71; 32-REL-NEXT:  }
72; 32-REL-NEXT:  Relocation {
73; 32-REL-NEXT:    Virtual Address: 0x38
74; 32-REL-NEXT:    Symbol: TOC (11)
75; 32-REL-NEXT:    IsSigned: No
76; 32-REL-NEXT:    FixupBitValue: 0
77; 32-REL-NEXT:    Length: 32
78; 32-REL-NEXT:    Type: R_POS (0x0)
79; 32-REL-NEXT:  }
80; 32-REL-NEXT:  Relocation {
81; 32-REL-NEXT:    Virtual Address: 0x40
82; 32-REL-NEXT:    Symbol: .call_memcpy (5)
83; 32-REL-NEXT:    IsSigned: No
84; 32-REL-NEXT:    FixupBitValue: 0
85; 32-REL-NEXT:    Length: 32
86; 32-REL-NEXT:    Type: R_POS (0x0)
87; 32-REL-NEXT:  }
88; 32-REL-NEXT:  Relocation {
89; 32-REL-NEXT:    Virtual Address: 0x44
90; 32-REL-NEXT:    Symbol: TOC (11)
91; 32-REL-NEXT:    IsSigned: No
92; 32-REL-NEXT:    FixupBitValue: 0
93; 32-REL-NEXT:    Length: 32
94; 32-REL-NEXT:    Type: R_POS (0x0)
95; 32-REL-NEXT:  }
96; 32-REL-NEXT:  }
97; 32-REL-NEXT: ]
98
99; 32-REL-NOT:  Type: R_RBR (0x1A)
100
101; 32-DIS:      Disassembly of section .text:
102; 32-DIS:      00000000 <.memcpy>:
103; 32-DIS-NEXT:        0: 38 60 00 03                   li 3, 3
104; 32-DIS-NEXT:        4: 4e 80 00 20                   blr
105; 32-DIS-NEXT:        8: 60 00 00 00                   nop
106; 32-DIS-NEXT:        c: 60 00 00 00                   nop
107; 32-DIS:      00000010 <.call_memcpy>:
108; 32-DIS-NEXT:       10: 7c 08 02 a6                   mflr 0
109; 32-DIS-NEXT:       14: 90 01 00 08                   stw 0, 8(1)
110; 32-DIS-NEXT:       18: 94 21 ff c0                   stwu 1, -64(1)
111; 32-DIS-NEXT:       1c: 4b ff ff e5                   bl 0x0
112; 32-DIS-NEXT:       20: 60 00 00 00                   nop
113; 32-DIS-NEXT:       24: 38 21 00 40                   addi 1, 1, 64
114; 32-DIS-NEXT:       28: 80 01 00 08                   lwz 0, 8(1)
115; 32-DIS-NEXT:       2c: 7c 08 03 a6                   mtlr 0
116; 32-DIS-NEXT:       30: 4e 80 00 20                   blr
117