1cd564c6bSJustin Lebar; RUN: llc < %s | FileCheck -check-prefix=ENABLED %s 2cd564c6bSJustin Lebar; RUN: llc -disable-nvptx-load-store-vectorizer < %s | FileCheck -check-prefix=DISABLED %s 3*0f1b5f11SAndrew Savonichev; RUN: %if ptxas %{ llc < %s | %ptxas-verify %} 4*0f1b5f11SAndrew Savonichev; RUN: %if ptxas %{ llc -disable-nvptx-load-store-vectorizer < %s | %ptxas-verify %} 5*0f1b5f11SAndrew Savonichev 6cd564c6bSJustin Lebartarget triple = "nvptx64-nvidia-cuda" 7cd564c6bSJustin Lebar 8cd564c6bSJustin Lebar; Check that the load-store vectorizer is enabled by default for nvptx, and 9cd564c6bSJustin Lebar; that it's disabled by the appropriate flag. 10cd564c6bSJustin Lebar 11cd564c6bSJustin Lebar; ENABLED: ld.v2.{{.}}32 12cd564c6bSJustin Lebar; DISABLED: ld.{{.}}32 13cd564c6bSJustin Lebar; DISABLED: ld.{{.}}32 14cd564c6bSJustin Lebardefine i32 @f(i32* %p) { 15cd564c6bSJustin Lebar %p.1 = getelementptr i32, i32* %p, i32 1 16cd564c6bSJustin Lebar %v0 = load i32, i32* %p, align 8 17cd564c6bSJustin Lebar %v1 = load i32, i32* %p.1, align 4 18cd564c6bSJustin Lebar %sum = add i32 %v0, %v1 19cd564c6bSJustin Lebar ret i32 %sum 20cd564c6bSJustin Lebar} 21620db1f3SArtem Belevich 22620db1f3SArtem Belevichdefine half @fh(half* %p) { 23620db1f3SArtem Belevich %p.1 = getelementptr half, half* %p, i32 1 24620db1f3SArtem Belevich %p.2 = getelementptr half, half* %p, i32 2 25620db1f3SArtem Belevich %p.3 = getelementptr half, half* %p, i32 3 26620db1f3SArtem Belevich %p.4 = getelementptr half, half* %p, i32 4 27620db1f3SArtem Belevich %v0 = load half, half* %p, align 64 28620db1f3SArtem Belevich %v1 = load half, half* %p.1, align 4 29620db1f3SArtem Belevich %v2 = load half, half* %p.2, align 4 30620db1f3SArtem Belevich %v3 = load half, half* %p.3, align 4 31620db1f3SArtem Belevich %v4 = load half, half* %p.4, align 4 32620db1f3SArtem Belevich %sum1 = fadd half %v0, %v1 33620db1f3SArtem Belevich %sum2 = fadd half %v2, %v3 34620db1f3SArtem Belevich %sum3 = fadd half %sum1, %sum2 35620db1f3SArtem Belevich %sum = fadd half %sum3, %v4 36620db1f3SArtem Belevich ret half %sum 37620db1f3SArtem Belevich} 38620db1f3SArtem Belevich 39620db1f3SArtem Belevichdefine float @ff(float* %p) { 40620db1f3SArtem Belevich %p.1 = getelementptr float, float* %p, i32 1 41620db1f3SArtem Belevich %p.2 = getelementptr float, float* %p, i32 2 42620db1f3SArtem Belevich %p.3 = getelementptr float, float* %p, i32 3 43620db1f3SArtem Belevich %p.4 = getelementptr float, float* %p, i32 4 44620db1f3SArtem Belevich %v0 = load float, float* %p, align 64 45620db1f3SArtem Belevich %v1 = load float, float* %p.1, align 4 46620db1f3SArtem Belevich %v2 = load float, float* %p.2, align 4 47620db1f3SArtem Belevich %v3 = load float, float* %p.3, align 4 48620db1f3SArtem Belevich %v4 = load float, float* %p.4, align 4 49620db1f3SArtem Belevich %sum1 = fadd float %v0, %v1 50620db1f3SArtem Belevich %sum2 = fadd float %v2, %v3 51620db1f3SArtem Belevich %sum3 = fadd float %sum1, %sum2 52620db1f3SArtem Belevich %sum = fadd float %sum3, %v4 53620db1f3SArtem Belevich ret float %sum 54620db1f3SArtem Belevich} 55