1; RUN: llc < %s | FileCheck -check-prefix=ENABLED %s
2; RUN: llc -disable-nvptx-load-store-vectorizer < %s | FileCheck -check-prefix=DISABLED %s
3; RUN: %if ptxas %{ llc < %s | %ptxas-verify %}
4; RUN: %if ptxas %{ llc -disable-nvptx-load-store-vectorizer < %s | %ptxas-verify %}
5
6target triple = "nvptx64-nvidia-cuda"
7
8; Check that the load-store vectorizer is enabled by default for nvptx, and
9; that it's disabled by the appropriate flag.
10
11; ENABLED: ld.v2.{{.}}32
12; DISABLED: ld.{{.}}32
13; DISABLED: ld.{{.}}32
14define i32 @f(i32* %p) {
15  %p.1 = getelementptr i32, i32* %p, i32 1
16  %v0 = load i32, i32* %p, align 8
17  %v1 = load i32, i32* %p.1, align 4
18  %sum = add i32 %v0, %v1
19  ret i32 %sum
20}
21
22define half @fh(half* %p) {
23  %p.1 = getelementptr half, half* %p, i32 1
24  %p.2 = getelementptr half, half* %p, i32 2
25  %p.3 = getelementptr half, half* %p, i32 3
26  %p.4 = getelementptr half, half* %p, i32 4
27  %v0 = load half, half* %p, align 64
28  %v1 = load half, half* %p.1, align 4
29  %v2 = load half, half* %p.2, align 4
30  %v3 = load half, half* %p.3, align 4
31  %v4 = load half, half* %p.4, align 4
32  %sum1 = fadd half %v0, %v1
33  %sum2 = fadd half %v2, %v3
34  %sum3 = fadd half %sum1, %sum2
35  %sum = fadd half %sum3, %v4
36  ret half %sum
37}
38
39define float @ff(float* %p) {
40  %p.1 = getelementptr float, float* %p, i32 1
41  %p.2 = getelementptr float, float* %p, i32 2
42  %p.3 = getelementptr float, float* %p, i32 3
43  %p.4 = getelementptr float, float* %p, i32 4
44  %v0 = load float, float* %p, align 64
45  %v1 = load float, float* %p.1, align 4
46  %v2 = load float, float* %p.2, align 4
47  %v3 = load float, float* %p.3, align 4
48  %v4 = load float, float* %p.4, align 4
49  %sum1 = fadd float %v0, %v1
50  %sum2 = fadd float %v2, %v3
51  %sum3 = fadd float %sum1, %sum2
52  %sum = fadd float %sum3, %v4
53  ret float %sum
54}
55