1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=mipsel-unknown-linux-musl-gnu < %s | FileCheck %s
3
4; Check that in microMIPSr5 with a 64 bit fpu configuration, the following
5; code can be compiled. This previously failed due to missing load/store
6; patterns and instructions to handle the 64 bit FPU case for microMIPS.
7
8%union.anon = type { { double, double } }
9
10define dso_local void @foo() #0 {
11; CHECK-LABEL: foo:
12; CHECK:       # %bb.0: # %entry
13; CHECK-NEXT:    addiusp -24
14; CHECK-NEXT:    li16 $2, 0
15; CHECK-NEXT:    sw $2, 4($sp)
16; CHECK-NEXT:    sw $2, 0($sp)
17; CHECK-NEXT:    sw $2, 12($sp)
18; CHECK-NEXT:    sw $2, 8($sp)
19; CHECK-NEXT:    ldc1 $f0, 0($sp)
20; CHECK-NEXT:    sdc1 $f0, 16($sp)
21; CHECK-NEXT:    addiusp 24
22; CHECK-NEXT:    jrc $ra
23entry:
24  %bleh = alloca double, align 8
25  %.compoundliteral = alloca %union.anon, align 8
26  %arrayinit.begin = getelementptr inbounds [2 x double], ptr %.compoundliteral, i32 0, i32 0
27  store double 0.000000e+00, ptr %arrayinit.begin, align 8
28  %arrayinit.element = getelementptr inbounds double, ptr %arrayinit.begin, i32 1
29  store double 0.000000e+00, ptr %arrayinit.element, align 8
30  %.compoundliteral.realp = getelementptr inbounds { double, double }, ptr %.compoundliteral, i32 0, i32 0
31  %.compoundliteral.real = load double, ptr %.compoundliteral.realp, align 8
32  store double %.compoundliteral.real, ptr %bleh, align 8
33  ret void
34}
35attributes #0 = { noinline nounwind optnone "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="mips32r5" "target-features"="+dspr2,+fp64,+mips32r5,-noabicalls,+micromips" }
36