1; RUN: llc < %s -verify-machineinstrs -march=mipsel -mcpu=mips32 \ 2; RUN: | FileCheck %s -check-prefix=32 3; RUN: llc < %s -verify-machineinstrs -march=mipsel -mcpu=mips32r2 \ 4; RUN: | FileCheck %s -check-prefix=32R2 5; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips4 -target-abi=n64 \ 6; RUN: | FileCheck %s -check-prefix=64 7; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64 -target-abi=n64 \ 8; RUN: | FileCheck %s -check-prefix=64 9; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64r2 -target-abi=n64 \ 10; RUN: | FileCheck %s -check-prefix=64R2 11 12define double @func0(double %d0, double %d1) nounwind readnone { 13entry: 14; 15; 32: lui $[[MSK1:[0-9]+]], 32768 16; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] 17; 32: lui $[[T0:[0-9]+]], 32767 18; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 19; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] 20; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] 21; 32: mtc1 $[[OR]], $f1 22 23; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 1 24; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1 25; 32R2: mthc1 $[[INS]], $f0 26 27; 64: daddiu $[[T0:[0-9]+]], $zero, 1 28; 64: dsll $[[MSK1:[0-9]+]], $[[T0]], 63 29; 64: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] 30; 64: daddiu $[[MSK0:[0-9]+]], $[[MSK1]], -1 31; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] 32; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] 33; 64: dmtc1 $[[OR]], $f0 34 35; 64R2: dextu $[[EXT:[0-9]+]], ${{[0-9]+}}, 63, 1 36; 64R2: dinsu $[[INS:[0-9]+]], $[[EXT]], 63, 1 37; 64R2: dmtc1 $[[INS]], $f0 38 39 %call = tail call double @copysign(double %d0, double %d1) nounwind readnone 40 ret double %call 41} 42 43declare double @copysign(double, double) nounwind readnone 44 45define float @func1(float %f0, float %f1) nounwind readnone { 46entry: 47 48; 32: lui $[[MSK1:[0-9]+]], 32768 49; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] 50; 32: lui $[[T0:[0-9]+]], 32767 51; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 52; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] 53; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] 54; 32: mtc1 $[[OR]], $f0 55 56; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 1 57; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1 58; 32R2: mtc1 $[[INS]], $f0 59 60 %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone 61 ret float %call 62} 63 64declare float @copysignf(float, float) nounwind readnone 65 66