1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s \
3; RUN:    -check-prefix=MIPS
4; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s \
5; RUN:    -check-prefix=MIPS
6; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \
7; RUN:    -check-prefix=MIPS32R2
8; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \
9; RUN:    -check-prefix=MIPS32R2
10; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \
11; RUN:    -check-prefix=MIPS32R2
12; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \
13; RUN:    -check-prefix=MIPS32R6
14; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \
15; RUN:    -check-prefix=MIPS64
16; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \
17; RUN:    -check-prefix=MIPS64
18; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
19; RUN:    -check-prefix=MIPS64
20; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
21; RUN:    -check-prefix=MIPS64R2
22; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \
23; RUN:    -check-prefix=MIPS64R2
24; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \
25; RUN:    -check-prefix=MIPS64R2
26; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \
27; RUN:    -check-prefix=MIPS64R6
28; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
29; RUN:    -check-prefix=MM32R3
30; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
31; RUN:    -check-prefix=MM32R6
32
33define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
34; MIPS-LABEL: bittest_10_i32:
35; MIPS:       # %bb.0:
36; MIPS-NEXT:    andi $1, $4, 1024
37; MIPS-NEXT:    jr $ra
38; MIPS-NEXT:    sltiu $2, $1, 1
39;
40; MIPS32R2-LABEL: bittest_10_i32:
41; MIPS32R2:       # %bb.0:
42; MIPS32R2-NEXT:    andi $1, $4, 1024
43; MIPS32R2-NEXT:    jr $ra
44; MIPS32R2-NEXT:    sltiu $2, $1, 1
45;
46; MIPS32R6-LABEL: bittest_10_i32:
47; MIPS32R6:       # %bb.0:
48; MIPS32R6-NEXT:    andi $1, $4, 1024
49; MIPS32R6-NEXT:    jr $ra
50; MIPS32R6-NEXT:    sltiu $2, $1, 1
51;
52; MIPS64-LABEL: bittest_10_i32:
53; MIPS64:       # %bb.0:
54; MIPS64-NEXT:    andi $1, $4, 1024
55; MIPS64-NEXT:    sltiu $1, $1, 1
56; MIPS64-NEXT:    dsll $1, $1, 32
57; MIPS64-NEXT:    jr $ra
58; MIPS64-NEXT:    dsrl $2, $1, 32
59;
60; MIPS64R2-LABEL: bittest_10_i32:
61; MIPS64R2:       # %bb.0:
62; MIPS64R2-NEXT:    andi $1, $4, 1024
63; MIPS64R2-NEXT:    sltiu $1, $1, 1
64; MIPS64R2-NEXT:    jr $ra
65; MIPS64R2-NEXT:    dext $2, $1, 0, 32
66;
67; MIPS64R6-LABEL: bittest_10_i32:
68; MIPS64R6:       # %bb.0:
69; MIPS64R6-NEXT:    andi $1, $4, 1024
70; MIPS64R6-NEXT:    sltiu $1, $1, 1
71; MIPS64R6-NEXT:    jr $ra
72; MIPS64R6-NEXT:    dext $2, $1, 0, 32
73;
74; MM32R3-LABEL: bittest_10_i32:
75; MM32R3:       # %bb.0:
76; MM32R3-NEXT:    andi $1, $4, 1024
77; MM32R3-NEXT:    jr $ra
78; MM32R3-NEXT:    sltiu $2, $1, 1
79;
80; MM32R6-LABEL: bittest_10_i32:
81; MM32R6:       # %bb.0:
82; MM32R6-NEXT:    andi $1, $4, 1024
83; MM32R6-NEXT:    sltiu $2, $1, 1
84; MM32R6-NEXT:    jrc $ra
85  %shr = lshr i32 %a, 10
86  %not = xor i32 %shr, -1
87  %and = and i32 %not, 1
88  ret i32 %and
89}
90
91define signext i32 @bittest_15_i32(i32 signext %a) nounwind {
92; MIPS-LABEL: bittest_15_i32:
93; MIPS:       # %bb.0:
94; MIPS-NEXT:    andi $1, $4, 32768
95; MIPS-NEXT:    jr $ra
96; MIPS-NEXT:    sltiu $2, $1, 1
97;
98; MIPS32R2-LABEL: bittest_15_i32:
99; MIPS32R2:       # %bb.0:
100; MIPS32R2-NEXT:    andi $1, $4, 32768
101; MIPS32R2-NEXT:    jr $ra
102; MIPS32R2-NEXT:    sltiu $2, $1, 1
103;
104; MIPS32R6-LABEL: bittest_15_i32:
105; MIPS32R6:       # %bb.0:
106; MIPS32R6-NEXT:    andi $1, $4, 32768
107; MIPS32R6-NEXT:    jr $ra
108; MIPS32R6-NEXT:    sltiu $2, $1, 1
109;
110; MIPS64-LABEL: bittest_15_i32:
111; MIPS64:       # %bb.0:
112; MIPS64-NEXT:    andi $1, $4, 32768
113; MIPS64-NEXT:    sltiu $1, $1, 1
114; MIPS64-NEXT:    dsll $1, $1, 32
115; MIPS64-NEXT:    jr $ra
116; MIPS64-NEXT:    dsrl $2, $1, 32
117;
118; MIPS64R2-LABEL: bittest_15_i32:
119; MIPS64R2:       # %bb.0:
120; MIPS64R2-NEXT:    andi $1, $4, 32768
121; MIPS64R2-NEXT:    sltiu $1, $1, 1
122; MIPS64R2-NEXT:    jr $ra
123; MIPS64R2-NEXT:    dext $2, $1, 0, 32
124;
125; MIPS64R6-LABEL: bittest_15_i32:
126; MIPS64R6:       # %bb.0:
127; MIPS64R6-NEXT:    andi $1, $4, 32768
128; MIPS64R6-NEXT:    sltiu $1, $1, 1
129; MIPS64R6-NEXT:    jr $ra
130; MIPS64R6-NEXT:    dext $2, $1, 0, 32
131;
132; MM32R3-LABEL: bittest_15_i32:
133; MM32R3:       # %bb.0:
134; MM32R3-NEXT:    andi16 $2, $4, 32768
135; MM32R3-NEXT:    jr $ra
136; MM32R3-NEXT:    sltiu $2, $2, 1
137;
138; MM32R6-LABEL: bittest_15_i32:
139; MM32R6:       # %bb.0:
140; MM32R6-NEXT:    andi16 $2, $4, 32768
141; MM32R6-NEXT:    sltiu $2, $2, 1
142; MM32R6-NEXT:    jrc $ra
143  %shr = lshr i32 %a, 15
144  %not = xor i32 %shr, -1
145  %and = and i32 %not, 1
146  ret i32 %and
147}
148
149define signext i32 @bittest_16_i32(i32 signext %a) nounwind {
150; MIPS-LABEL: bittest_16_i32:
151; MIPS:       # %bb.0:
152; MIPS-NEXT:    srl $1, $4, 16
153; MIPS-NEXT:    not $1, $1
154; MIPS-NEXT:    jr $ra
155; MIPS-NEXT:    andi $2, $1, 1
156;
157; MIPS32R2-LABEL: bittest_16_i32:
158; MIPS32R2:       # %bb.0:
159; MIPS32R2-NEXT:    srl $1, $4, 16
160; MIPS32R2-NEXT:    not $1, $1
161; MIPS32R2-NEXT:    jr $ra
162; MIPS32R2-NEXT:    andi $2, $1, 1
163;
164; MIPS32R6-LABEL: bittest_16_i32:
165; MIPS32R6:       # %bb.0:
166; MIPS32R6-NEXT:    srl $1, $4, 16
167; MIPS32R6-NEXT:    not $1, $1
168; MIPS32R6-NEXT:    jr $ra
169; MIPS32R6-NEXT:    andi $2, $1, 1
170;
171; MIPS64-LABEL: bittest_16_i32:
172; MIPS64:       # %bb.0:
173; MIPS64-NEXT:    srl $1, $4, 16
174; MIPS64-NEXT:    not $1, $1
175; MIPS64-NEXT:    andi $1, $1, 1
176; MIPS64-NEXT:    dsll $1, $1, 32
177; MIPS64-NEXT:    jr $ra
178; MIPS64-NEXT:    dsrl $2, $1, 32
179;
180; MIPS64R2-LABEL: bittest_16_i32:
181; MIPS64R2:       # %bb.0:
182; MIPS64R2-NEXT:    srl $1, $4, 16
183; MIPS64R2-NEXT:    not $1, $1
184; MIPS64R2-NEXT:    andi $1, $1, 1
185; MIPS64R2-NEXT:    jr $ra
186; MIPS64R2-NEXT:    dext $2, $1, 0, 32
187;
188; MIPS64R6-LABEL: bittest_16_i32:
189; MIPS64R6:       # %bb.0:
190; MIPS64R6-NEXT:    srl $1, $4, 16
191; MIPS64R6-NEXT:    not $1, $1
192; MIPS64R6-NEXT:    andi $1, $1, 1
193; MIPS64R6-NEXT:    jr $ra
194; MIPS64R6-NEXT:    dext $2, $1, 0, 32
195;
196; MM32R3-LABEL: bittest_16_i32:
197; MM32R3:       # %bb.0:
198; MM32R3-NEXT:    srl $2, $4, 16
199; MM32R3-NEXT:    not16 $2, $2
200; MM32R3-NEXT:    andi16 $2, $2, 1
201; MM32R3-NEXT:    jrc $ra
202;
203; MM32R6-LABEL: bittest_16_i32:
204; MM32R6:       # %bb.0:
205; MM32R6-NEXT:    srl $2, $4, 16
206; MM32R6-NEXT:    not16 $2, $2
207; MM32R6-NEXT:    andi16 $2, $2, 1
208; MM32R6-NEXT:    jrc $ra
209  %shr = lshr i32 %a, 16
210  %not = xor i32 %shr, -1
211  %and = and i32 %not, 1
212  ret i32 %and
213}
214
215define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
216; MIPS-LABEL: bittest_31_i32:
217; MIPS:       # %bb.0:
218; MIPS-NEXT:    not $1, $4
219; MIPS-NEXT:    jr $ra
220; MIPS-NEXT:    srl $2, $1, 31
221;
222; MIPS32R2-LABEL: bittest_31_i32:
223; MIPS32R2:       # %bb.0:
224; MIPS32R2-NEXT:    not $1, $4
225; MIPS32R2-NEXT:    jr $ra
226; MIPS32R2-NEXT:    srl $2, $1, 31
227;
228; MIPS32R6-LABEL: bittest_31_i32:
229; MIPS32R6:       # %bb.0:
230; MIPS32R6-NEXT:    not $1, $4
231; MIPS32R6-NEXT:    jr $ra
232; MIPS32R6-NEXT:    srl $2, $1, 31
233;
234; MIPS64-LABEL: bittest_31_i32:
235; MIPS64:       # %bb.0:
236; MIPS64-NEXT:    not $1, $4
237; MIPS64-NEXT:    srl $1, $1, 31
238; MIPS64-NEXT:    dsll $1, $1, 32
239; MIPS64-NEXT:    jr $ra
240; MIPS64-NEXT:    dsrl $2, $1, 32
241;
242; MIPS64R2-LABEL: bittest_31_i32:
243; MIPS64R2:       # %bb.0:
244; MIPS64R2-NEXT:    not $1, $4
245; MIPS64R2-NEXT:    srl $1, $1, 31
246; MIPS64R2-NEXT:    jr $ra
247; MIPS64R2-NEXT:    dext $2, $1, 0, 32
248;
249; MIPS64R6-LABEL: bittest_31_i32:
250; MIPS64R6:       # %bb.0:
251; MIPS64R6-NEXT:    not $1, $4
252; MIPS64R6-NEXT:    srl $1, $1, 31
253; MIPS64R6-NEXT:    jr $ra
254; MIPS64R6-NEXT:    dext $2, $1, 0, 32
255;
256; MM32R3-LABEL: bittest_31_i32:
257; MM32R3:       # %bb.0:
258; MM32R3-NEXT:    not16 $2, $4
259; MM32R3-NEXT:    jr $ra
260; MM32R3-NEXT:    srl $2, $2, 31
261;
262; MM32R6-LABEL: bittest_31_i32:
263; MM32R6:       # %bb.0:
264; MM32R6-NEXT:    not16 $2, $4
265; MM32R6-NEXT:    srl $2, $2, 31
266; MM32R6-NEXT:    jrc $ra
267  %shr = lshr i32 %a, 31
268  %not = xor i32 %shr, -1
269  %and = and i32 %not, 1
270  ret i32 %and
271}
272
273define i64 @bittest_10_i64(i64 %a) nounwind {
274; MIPS-LABEL: bittest_10_i64:
275; MIPS:       # %bb.0:
276; MIPS-NEXT:    andi $1, $5, 1024
277; MIPS-NEXT:    sltiu $3, $1, 1
278; MIPS-NEXT:    jr $ra
279; MIPS-NEXT:    addiu $2, $zero, 0
280;
281; MIPS32R2-LABEL: bittest_10_i64:
282; MIPS32R2:       # %bb.0:
283; MIPS32R2-NEXT:    andi $1, $5, 1024
284; MIPS32R2-NEXT:    sltiu $3, $1, 1
285; MIPS32R2-NEXT:    jr $ra
286; MIPS32R2-NEXT:    addiu $2, $zero, 0
287;
288; MIPS32R6-LABEL: bittest_10_i64:
289; MIPS32R6:       # %bb.0:
290; MIPS32R6-NEXT:    andi $1, $5, 1024
291; MIPS32R6-NEXT:    sltiu $3, $1, 1
292; MIPS32R6-NEXT:    jr $ra
293; MIPS32R6-NEXT:    addiu $2, $zero, 0
294;
295; MIPS64-LABEL: bittest_10_i64:
296; MIPS64:       # %bb.0:
297; MIPS64-NEXT:    andi $1, $4, 1024
298; MIPS64-NEXT:    sltiu $1, $1, 1
299; MIPS64-NEXT:    dsll $1, $1, 32
300; MIPS64-NEXT:    jr $ra
301; MIPS64-NEXT:    dsrl $2, $1, 32
302;
303; MIPS64R2-LABEL: bittest_10_i64:
304; MIPS64R2:       # %bb.0:
305; MIPS64R2-NEXT:    andi $1, $4, 1024
306; MIPS64R2-NEXT:    sltiu $1, $1, 1
307; MIPS64R2-NEXT:    jr $ra
308; MIPS64R2-NEXT:    dext $2, $1, 0, 32
309;
310; MIPS64R6-LABEL: bittest_10_i64:
311; MIPS64R6:       # %bb.0:
312; MIPS64R6-NEXT:    andi $1, $4, 1024
313; MIPS64R6-NEXT:    sltiu $1, $1, 1
314; MIPS64R6-NEXT:    jr $ra
315; MIPS64R6-NEXT:    dext $2, $1, 0, 32
316;
317; MM32R3-LABEL: bittest_10_i64:
318; MM32R3:       # %bb.0:
319; MM32R3-NEXT:    andi $1, $5, 1024
320; MM32R3-NEXT:    li16 $2, 0
321; MM32R3-NEXT:    jr $ra
322; MM32R3-NEXT:    sltiu $3, $1, 1
323;
324; MM32R6-LABEL: bittest_10_i64:
325; MM32R6:       # %bb.0:
326; MM32R6-NEXT:    andi $1, $5, 1024
327; MM32R6-NEXT:    sltiu $3, $1, 1
328; MM32R6-NEXT:    li16 $2, 0
329; MM32R6-NEXT:    jrc $ra
330  %shr = lshr i64 %a, 10
331  %not = xor i64 %shr, -1
332  %and = and i64 %not, 1
333  ret i64 %and
334}
335
336define i64 @bittest_15_i64(i64 %a) nounwind {
337; MIPS-LABEL: bittest_15_i64:
338; MIPS:       # %bb.0:
339; MIPS-NEXT:    andi $1, $5, 32768
340; MIPS-NEXT:    sltiu $3, $1, 1
341; MIPS-NEXT:    jr $ra
342; MIPS-NEXT:    addiu $2, $zero, 0
343;
344; MIPS32R2-LABEL: bittest_15_i64:
345; MIPS32R2:       # %bb.0:
346; MIPS32R2-NEXT:    andi $1, $5, 32768
347; MIPS32R2-NEXT:    sltiu $3, $1, 1
348; MIPS32R2-NEXT:    jr $ra
349; MIPS32R2-NEXT:    addiu $2, $zero, 0
350;
351; MIPS32R6-LABEL: bittest_15_i64:
352; MIPS32R6:       # %bb.0:
353; MIPS32R6-NEXT:    andi $1, $5, 32768
354; MIPS32R6-NEXT:    sltiu $3, $1, 1
355; MIPS32R6-NEXT:    jr $ra
356; MIPS32R6-NEXT:    addiu $2, $zero, 0
357;
358; MIPS64-LABEL: bittest_15_i64:
359; MIPS64:       # %bb.0:
360; MIPS64-NEXT:    andi $1, $4, 32768
361; MIPS64-NEXT:    sltiu $1, $1, 1
362; MIPS64-NEXT:    dsll $1, $1, 32
363; MIPS64-NEXT:    jr $ra
364; MIPS64-NEXT:    dsrl $2, $1, 32
365;
366; MIPS64R2-LABEL: bittest_15_i64:
367; MIPS64R2:       # %bb.0:
368; MIPS64R2-NEXT:    andi $1, $4, 32768
369; MIPS64R2-NEXT:    sltiu $1, $1, 1
370; MIPS64R2-NEXT:    jr $ra
371; MIPS64R2-NEXT:    dext $2, $1, 0, 32
372;
373; MIPS64R6-LABEL: bittest_15_i64:
374; MIPS64R6:       # %bb.0:
375; MIPS64R6-NEXT:    andi $1, $4, 32768
376; MIPS64R6-NEXT:    sltiu $1, $1, 1
377; MIPS64R6-NEXT:    jr $ra
378; MIPS64R6-NEXT:    dext $2, $1, 0, 32
379;
380; MM32R3-LABEL: bittest_15_i64:
381; MM32R3:       # %bb.0:
382; MM32R3-NEXT:    andi16 $2, $5, 32768
383; MM32R3-NEXT:    sltiu $3, $2, 1
384; MM32R3-NEXT:    li16 $2, 0
385; MM32R3-NEXT:    jrc $ra
386;
387; MM32R6-LABEL: bittest_15_i64:
388; MM32R6:       # %bb.0:
389; MM32R6-NEXT:    andi16 $2, $5, 32768
390; MM32R6-NEXT:    sltiu $3, $2, 1
391; MM32R6-NEXT:    li16 $2, 0
392; MM32R6-NEXT:    jrc $ra
393  %shr = lshr i64 %a, 15
394  %not = xor i64 %shr, -1
395  %and = and i64 %not, 1
396  ret i64 %and
397}
398
399define i64 @bittest_16_i64(i64 %a) nounwind {
400; MIPS-LABEL: bittest_16_i64:
401; MIPS:       # %bb.0:
402; MIPS-NEXT:    srl $1, $5, 16
403; MIPS-NEXT:    not $1, $1
404; MIPS-NEXT:    andi $3, $1, 1
405; MIPS-NEXT:    jr $ra
406; MIPS-NEXT:    addiu $2, $zero, 0
407;
408; MIPS32R2-LABEL: bittest_16_i64:
409; MIPS32R2:       # %bb.0:
410; MIPS32R2-NEXT:    srl $1, $5, 16
411; MIPS32R2-NEXT:    not $1, $1
412; MIPS32R2-NEXT:    andi $3, $1, 1
413; MIPS32R2-NEXT:    jr $ra
414; MIPS32R2-NEXT:    addiu $2, $zero, 0
415;
416; MIPS32R6-LABEL: bittest_16_i64:
417; MIPS32R6:       # %bb.0:
418; MIPS32R6-NEXT:    srl $1, $5, 16
419; MIPS32R6-NEXT:    not $1, $1
420; MIPS32R6-NEXT:    andi $3, $1, 1
421; MIPS32R6-NEXT:    jr $ra
422; MIPS32R6-NEXT:    addiu $2, $zero, 0
423;
424; MIPS64-LABEL: bittest_16_i64:
425; MIPS64:       # %bb.0:
426; MIPS64-NEXT:    dsrl $1, $4, 16
427; MIPS64-NEXT:    daddiu $2, $zero, -1
428; MIPS64-NEXT:    xor $1, $1, $2
429; MIPS64-NEXT:    jr $ra
430; MIPS64-NEXT:    andi $2, $1, 1
431;
432; MIPS64R2-LABEL: bittest_16_i64:
433; MIPS64R2:       # %bb.0:
434; MIPS64R2-NEXT:    dsrl $1, $4, 16
435; MIPS64R2-NEXT:    daddiu $2, $zero, -1
436; MIPS64R2-NEXT:    xor $1, $1, $2
437; MIPS64R2-NEXT:    jr $ra
438; MIPS64R2-NEXT:    andi $2, $1, 1
439;
440; MIPS64R6-LABEL: bittest_16_i64:
441; MIPS64R6:       # %bb.0:
442; MIPS64R6-NEXT:    dsrl $1, $4, 16
443; MIPS64R6-NEXT:    daddiu $2, $zero, -1
444; MIPS64R6-NEXT:    xor $1, $1, $2
445; MIPS64R6-NEXT:    jr $ra
446; MIPS64R6-NEXT:    andi $2, $1, 1
447;
448; MM32R3-LABEL: bittest_16_i64:
449; MM32R3:       # %bb.0:
450; MM32R3-NEXT:    srl $2, $5, 16
451; MM32R3-NEXT:    not16 $2, $2
452; MM32R3-NEXT:    andi16 $3, $2, 1
453; MM32R3-NEXT:    li16 $2, 0
454; MM32R3-NEXT:    jrc $ra
455;
456; MM32R6-LABEL: bittest_16_i64:
457; MM32R6:       # %bb.0:
458; MM32R6-NEXT:    srl $2, $5, 16
459; MM32R6-NEXT:    not16 $2, $2
460; MM32R6-NEXT:    andi16 $3, $2, 1
461; MM32R6-NEXT:    li16 $2, 0
462; MM32R6-NEXT:    jrc $ra
463  %shr = lshr i64 %a, 16
464  %not = xor i64 %shr, -1
465  %and = and i64 %not, 1
466  ret i64 %and
467}
468
469define i64 @bittest_31_i64(i64 %a) nounwind {
470; MIPS-LABEL: bittest_31_i64:
471; MIPS:       # %bb.0:
472; MIPS-NEXT:    not $1, $5
473; MIPS-NEXT:    srl $3, $1, 31
474; MIPS-NEXT:    jr $ra
475; MIPS-NEXT:    addiu $2, $zero, 0
476;
477; MIPS32R2-LABEL: bittest_31_i64:
478; MIPS32R2:       # %bb.0:
479; MIPS32R2-NEXT:    not $1, $5
480; MIPS32R2-NEXT:    srl $3, $1, 31
481; MIPS32R2-NEXT:    jr $ra
482; MIPS32R2-NEXT:    addiu $2, $zero, 0
483;
484; MIPS32R6-LABEL: bittest_31_i64:
485; MIPS32R6:       # %bb.0:
486; MIPS32R6-NEXT:    not $1, $5
487; MIPS32R6-NEXT:    srl $3, $1, 31
488; MIPS32R6-NEXT:    jr $ra
489; MIPS32R6-NEXT:    addiu $2, $zero, 0
490;
491; MIPS64-LABEL: bittest_31_i64:
492; MIPS64:       # %bb.0:
493; MIPS64-NEXT:    dsrl $1, $4, 31
494; MIPS64-NEXT:    daddiu $2, $zero, -1
495; MIPS64-NEXT:    xor $1, $1, $2
496; MIPS64-NEXT:    jr $ra
497; MIPS64-NEXT:    andi $2, $1, 1
498;
499; MIPS64R2-LABEL: bittest_31_i64:
500; MIPS64R2:       # %bb.0:
501; MIPS64R2-NEXT:    dsrl $1, $4, 31
502; MIPS64R2-NEXT:    daddiu $2, $zero, -1
503; MIPS64R2-NEXT:    xor $1, $1, $2
504; MIPS64R2-NEXT:    jr $ra
505; MIPS64R2-NEXT:    andi $2, $1, 1
506;
507; MIPS64R6-LABEL: bittest_31_i64:
508; MIPS64R6:       # %bb.0:
509; MIPS64R6-NEXT:    dsrl $1, $4, 31
510; MIPS64R6-NEXT:    daddiu $2, $zero, -1
511; MIPS64R6-NEXT:    xor $1, $1, $2
512; MIPS64R6-NEXT:    jr $ra
513; MIPS64R6-NEXT:    andi $2, $1, 1
514;
515; MM32R3-LABEL: bittest_31_i64:
516; MM32R3:       # %bb.0:
517; MM32R3-NEXT:    not16 $2, $5
518; MM32R3-NEXT:    srl $3, $2, 31
519; MM32R3-NEXT:    li16 $2, 0
520; MM32R3-NEXT:    jrc $ra
521;
522; MM32R6-LABEL: bittest_31_i64:
523; MM32R6:       # %bb.0:
524; MM32R6-NEXT:    not16 $2, $5
525; MM32R6-NEXT:    srl $3, $2, 31
526; MM32R6-NEXT:    li16 $2, 0
527; MM32R6-NEXT:    jrc $ra
528  %shr = lshr i64 %a, 31
529  %not = xor i64 %shr, -1
530  %and = and i64 %not, 1
531  ret i64 %and
532}
533
534define i64 @bittest_32_i64(i64 %a) nounwind {
535; MIPS-LABEL: bittest_32_i64:
536; MIPS:       # %bb.0:
537; MIPS-NEXT:    not $1, $4
538; MIPS-NEXT:    andi $3, $1, 1
539; MIPS-NEXT:    jr $ra
540; MIPS-NEXT:    addiu $2, $zero, 0
541;
542; MIPS32R2-LABEL: bittest_32_i64:
543; MIPS32R2:       # %bb.0:
544; MIPS32R2-NEXT:    not $1, $4
545; MIPS32R2-NEXT:    andi $3, $1, 1
546; MIPS32R2-NEXT:    jr $ra
547; MIPS32R2-NEXT:    addiu $2, $zero, 0
548;
549; MIPS32R6-LABEL: bittest_32_i64:
550; MIPS32R6:       # %bb.0:
551; MIPS32R6-NEXT:    not $1, $4
552; MIPS32R6-NEXT:    andi $3, $1, 1
553; MIPS32R6-NEXT:    jr $ra
554; MIPS32R6-NEXT:    addiu $2, $zero, 0
555;
556; MIPS64-LABEL: bittest_32_i64:
557; MIPS64:       # %bb.0:
558; MIPS64-NEXT:    dsrl $1, $4, 32
559; MIPS64-NEXT:    daddiu $2, $zero, -1
560; MIPS64-NEXT:    xor $1, $1, $2
561; MIPS64-NEXT:    jr $ra
562; MIPS64-NEXT:    andi $2, $1, 1
563;
564; MIPS64R2-LABEL: bittest_32_i64:
565; MIPS64R2:       # %bb.0:
566; MIPS64R2-NEXT:    dsrl $1, $4, 32
567; MIPS64R2-NEXT:    daddiu $2, $zero, -1
568; MIPS64R2-NEXT:    xor $1, $1, $2
569; MIPS64R2-NEXT:    jr $ra
570; MIPS64R2-NEXT:    andi $2, $1, 1
571;
572; MIPS64R6-LABEL: bittest_32_i64:
573; MIPS64R6:       # %bb.0:
574; MIPS64R6-NEXT:    dsrl $1, $4, 32
575; MIPS64R6-NEXT:    daddiu $2, $zero, -1
576; MIPS64R6-NEXT:    xor $1, $1, $2
577; MIPS64R6-NEXT:    jr $ra
578; MIPS64R6-NEXT:    andi $2, $1, 1
579;
580; MM32R3-LABEL: bittest_32_i64:
581; MM32R3:       # %bb.0:
582; MM32R3-NEXT:    not16 $2, $4
583; MM32R3-NEXT:    andi16 $3, $2, 1
584; MM32R3-NEXT:    li16 $2, 0
585; MM32R3-NEXT:    jrc $ra
586;
587; MM32R6-LABEL: bittest_32_i64:
588; MM32R6:       # %bb.0:
589; MM32R6-NEXT:    not16 $2, $4
590; MM32R6-NEXT:    andi16 $3, $2, 1
591; MM32R6-NEXT:    li16 $2, 0
592; MM32R6-NEXT:    jrc $ra
593  %shr = lshr i64 %a, 32
594  %not = xor i64 %shr, -1
595  %and = and i64 %not, 1
596  ret i64 %and
597}
598
599define i64 @bittest_63_i64(i64 %a) nounwind {
600; MIPS-LABEL: bittest_63_i64:
601; MIPS:       # %bb.0:
602; MIPS-NEXT:    not $1, $4
603; MIPS-NEXT:    srl $3, $1, 31
604; MIPS-NEXT:    jr $ra
605; MIPS-NEXT:    addiu $2, $zero, 0
606;
607; MIPS32R2-LABEL: bittest_63_i64:
608; MIPS32R2:       # %bb.0:
609; MIPS32R2-NEXT:    not $1, $4
610; MIPS32R2-NEXT:    srl $3, $1, 31
611; MIPS32R2-NEXT:    jr $ra
612; MIPS32R2-NEXT:    addiu $2, $zero, 0
613;
614; MIPS32R6-LABEL: bittest_63_i64:
615; MIPS32R6:       # %bb.0:
616; MIPS32R6-NEXT:    not $1, $4
617; MIPS32R6-NEXT:    srl $3, $1, 31
618; MIPS32R6-NEXT:    jr $ra
619; MIPS32R6-NEXT:    addiu $2, $zero, 0
620;
621; MIPS64-LABEL: bittest_63_i64:
622; MIPS64:       # %bb.0:
623; MIPS64-NEXT:    daddiu $1, $zero, -1
624; MIPS64-NEXT:    xor $1, $4, $1
625; MIPS64-NEXT:    jr $ra
626; MIPS64-NEXT:    dsrl $2, $1, 63
627;
628; MIPS64R2-LABEL: bittest_63_i64:
629; MIPS64R2:       # %bb.0:
630; MIPS64R2-NEXT:    daddiu $1, $zero, -1
631; MIPS64R2-NEXT:    xor $1, $4, $1
632; MIPS64R2-NEXT:    jr $ra
633; MIPS64R2-NEXT:    dsrl $2, $1, 63
634;
635; MIPS64R6-LABEL: bittest_63_i64:
636; MIPS64R6:       # %bb.0:
637; MIPS64R6-NEXT:    daddiu $1, $zero, -1
638; MIPS64R6-NEXT:    xor $1, $4, $1
639; MIPS64R6-NEXT:    jr $ra
640; MIPS64R6-NEXT:    dsrl $2, $1, 63
641;
642; MM32R3-LABEL: bittest_63_i64:
643; MM32R3:       # %bb.0:
644; MM32R3-NEXT:    not16 $2, $4
645; MM32R3-NEXT:    srl $3, $2, 31
646; MM32R3-NEXT:    li16 $2, 0
647; MM32R3-NEXT:    jrc $ra
648;
649; MM32R6-LABEL: bittest_63_i64:
650; MM32R6:       # %bb.0:
651; MM32R6-NEXT:    not16 $2, $4
652; MM32R6-NEXT:    srl $3, $2, 31
653; MM32R6-NEXT:    li16 $2, 0
654; MM32R6-NEXT:    jrc $ra
655  %shr = lshr i64 %a, 63
656  %not = xor i64 %shr, -1
657  %and = and i64 %not, 1
658  ret i64 %and
659}
660