1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s \
3; RUN:    -check-prefix=MIPS
4; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s \
5; RUN:    -check-prefix=MIPS
6; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \
7; RUN:    -check-prefix=MIPS32R2
8; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \
9; RUN:    -check-prefix=MIPS32R2
10; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \
11; RUN:    -check-prefix=MIPS32R2
12; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \
13; RUN:    -check-prefix=MIPS32R6
14; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \
15; RUN:    -check-prefix=MIPS64
16; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \
17; RUN:    -check-prefix=MIPS64
18; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
19; RUN:    -check-prefix=MIPS64
20; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
21; RUN:    -check-prefix=MIPS64R2
22; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \
23; RUN:    -check-prefix=MIPS64R2
24; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \
25; RUN:    -check-prefix=MIPS64R2
26; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \
27; RUN:    -check-prefix=MIPS64R6
28; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
29; RUN:    -check-prefix=MM32R3
30; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
31; RUN:    -check-prefix=MM32R6
32
33define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
34; MIPS-LABEL: bittest_10_i32:
35; MIPS:       # %bb.0:
36; MIPS-NEXT:    andi $1, $4, 1024
37; MIPS-NEXT:    jr $ra
38; MIPS-NEXT:    sltiu $2, $1, 1
39;
40; MIPS32R2-LABEL: bittest_10_i32:
41; MIPS32R2:       # %bb.0:
42; MIPS32R2-NEXT:    andi $1, $4, 1024
43; MIPS32R2-NEXT:    jr $ra
44; MIPS32R2-NEXT:    sltiu $2, $1, 1
45;
46; MIPS32R6-LABEL: bittest_10_i32:
47; MIPS32R6:       # %bb.0:
48; MIPS32R6-NEXT:    andi $1, $4, 1024
49; MIPS32R6-NEXT:    jr $ra
50; MIPS32R6-NEXT:    sltiu $2, $1, 1
51;
52; MIPS64-LABEL: bittest_10_i32:
53; MIPS64:       # %bb.0:
54; MIPS64-NEXT:    andi $1, $4, 1024
55; MIPS64-NEXT:    sltiu $1, $1, 1
56; MIPS64-NEXT:    dsll $1, $1, 32
57; MIPS64-NEXT:    jr $ra
58; MIPS64-NEXT:    dsrl $2, $1, 32
59;
60; MIPS64R2-LABEL: bittest_10_i32:
61; MIPS64R2:       # %bb.0:
62; MIPS64R2-NEXT:    andi $1, $4, 1024
63; MIPS64R2-NEXT:    sltiu $1, $1, 1
64; MIPS64R2-NEXT:    jr $ra
65; MIPS64R2-NEXT:    dext $2, $1, 0, 32
66;
67; MIPS64R6-LABEL: bittest_10_i32:
68; MIPS64R6:       # %bb.0:
69; MIPS64R6-NEXT:    andi $1, $4, 1024
70; MIPS64R6-NEXT:    sltiu $1, $1, 1
71; MIPS64R6-NEXT:    jr $ra
72; MIPS64R6-NEXT:    dext $2, $1, 0, 32
73;
74; MM32R3-LABEL: bittest_10_i32:
75; MM32R3:       # %bb.0:
76; MM32R3-NEXT:    andi $1, $4, 1024
77; MM32R3-NEXT:    jr $ra
78; MM32R3-NEXT:    sltiu $2, $1, 1
79;
80; MM32R6-LABEL: bittest_10_i32:
81; MM32R6:       # %bb.0:
82; MM32R6-NEXT:    andi $1, $4, 1024
83; MM32R6-NEXT:    sltiu $2, $1, 1
84; MM32R6-NEXT:    jrc $ra
85  %shr = lshr i32 %a, 10
86  %not = xor i32 %shr, -1
87  %and = and i32 %not, 1
88  ret i32 %and
89}
90
91define signext i32 @bittest_15_i32(i32 signext %a) nounwind {
92; MIPS-LABEL: bittest_15_i32:
93; MIPS:       # %bb.0:
94; MIPS-NEXT:    andi $1, $4, 32768
95; MIPS-NEXT:    jr $ra
96; MIPS-NEXT:    sltiu $2, $1, 1
97;
98; MIPS32R2-LABEL: bittest_15_i32:
99; MIPS32R2:       # %bb.0:
100; MIPS32R2-NEXT:    andi $1, $4, 32768
101; MIPS32R2-NEXT:    jr $ra
102; MIPS32R2-NEXT:    sltiu $2, $1, 1
103;
104; MIPS32R6-LABEL: bittest_15_i32:
105; MIPS32R6:       # %bb.0:
106; MIPS32R6-NEXT:    andi $1, $4, 32768
107; MIPS32R6-NEXT:    jr $ra
108; MIPS32R6-NEXT:    sltiu $2, $1, 1
109;
110; MIPS64-LABEL: bittest_15_i32:
111; MIPS64:       # %bb.0:
112; MIPS64-NEXT:    andi $1, $4, 32768
113; MIPS64-NEXT:    sltiu $1, $1, 1
114; MIPS64-NEXT:    dsll $1, $1, 32
115; MIPS64-NEXT:    jr $ra
116; MIPS64-NEXT:    dsrl $2, $1, 32
117;
118; MIPS64R2-LABEL: bittest_15_i32:
119; MIPS64R2:       # %bb.0:
120; MIPS64R2-NEXT:    andi $1, $4, 32768
121; MIPS64R2-NEXT:    sltiu $1, $1, 1
122; MIPS64R2-NEXT:    jr $ra
123; MIPS64R2-NEXT:    dext $2, $1, 0, 32
124;
125; MIPS64R6-LABEL: bittest_15_i32:
126; MIPS64R6:       # %bb.0:
127; MIPS64R6-NEXT:    andi $1, $4, 32768
128; MIPS64R6-NEXT:    sltiu $1, $1, 1
129; MIPS64R6-NEXT:    jr $ra
130; MIPS64R6-NEXT:    dext $2, $1, 0, 32
131;
132; MM32R3-LABEL: bittest_15_i32:
133; MM32R3:       # %bb.0:
134; MM32R3-NEXT:    andi16 $2, $4, 32768
135; MM32R3-NEXT:    jr $ra
136; MM32R3-NEXT:    sltiu $2, $2, 1
137;
138; MM32R6-LABEL: bittest_15_i32:
139; MM32R6:       # %bb.0:
140; MM32R6-NEXT:    andi16 $2, $4, 32768
141; MM32R6-NEXT:    sltiu $2, $2, 1
142; MM32R6-NEXT:    jrc $ra
143  %shr = lshr i32 %a, 15
144  %not = xor i32 %shr, -1
145  %and = and i32 %not, 1
146  ret i32 %and
147}
148
149define signext i32 @bittest_16_i32(i32 signext %a) nounwind {
150; MIPS-LABEL: bittest_16_i32:
151; MIPS:       # %bb.0:
152; MIPS-NEXT:    not $1, $4
153; MIPS-NEXT:    srl $1, $1, 16
154; MIPS-NEXT:    jr $ra
155; MIPS-NEXT:    andi $2, $1, 1
156;
157; MIPS32R2-LABEL: bittest_16_i32:
158; MIPS32R2:       # %bb.0:
159; MIPS32R2-NEXT:    not $1, $4
160; MIPS32R2-NEXT:    jr $ra
161; MIPS32R2-NEXT:    ext $2, $1, 16, 1
162;
163; MIPS32R6-LABEL: bittest_16_i32:
164; MIPS32R6:       # %bb.0:
165; MIPS32R6-NEXT:    not $1, $4
166; MIPS32R6-NEXT:    jr $ra
167; MIPS32R6-NEXT:    ext $2, $1, 16, 1
168;
169; MIPS64-LABEL: bittest_16_i32:
170; MIPS64:       # %bb.0:
171; MIPS64-NEXT:    not $1, $4
172; MIPS64-NEXT:    srl $1, $1, 16
173; MIPS64-NEXT:    andi $1, $1, 1
174; MIPS64-NEXT:    dsll $1, $1, 32
175; MIPS64-NEXT:    jr $ra
176; MIPS64-NEXT:    dsrl $2, $1, 32
177;
178; MIPS64R2-LABEL: bittest_16_i32:
179; MIPS64R2:       # %bb.0:
180; MIPS64R2-NEXT:    not $1, $4
181; MIPS64R2-NEXT:    ext $1, $1, 16, 1
182; MIPS64R2-NEXT:    jr $ra
183; MIPS64R2-NEXT:    dext $2, $1, 0, 32
184;
185; MIPS64R6-LABEL: bittest_16_i32:
186; MIPS64R6:       # %bb.0:
187; MIPS64R6-NEXT:    not $1, $4
188; MIPS64R6-NEXT:    ext $1, $1, 16, 1
189; MIPS64R6-NEXT:    jr $ra
190; MIPS64R6-NEXT:    dext $2, $1, 0, 32
191;
192; MM32R3-LABEL: bittest_16_i32:
193; MM32R3:       # %bb.0:
194; MM32R3-NEXT:    not16 $2, $4
195; MM32R3-NEXT:    jr $ra
196; MM32R3-NEXT:    ext $2, $2, 16, 1
197;
198; MM32R6-LABEL: bittest_16_i32:
199; MM32R6:       # %bb.0:
200; MM32R6-NEXT:    not16 $2, $4
201; MM32R6-NEXT:    ext $2, $2, 16, 1
202; MM32R6-NEXT:    jrc $ra
203  %shr = lshr i32 %a, 16
204  %not = xor i32 %shr, -1
205  %and = and i32 %not, 1
206  ret i32 %and
207}
208
209define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
210; MIPS-LABEL: bittest_31_i32:
211; MIPS:       # %bb.0:
212; MIPS-NEXT:    not $1, $4
213; MIPS-NEXT:    jr $ra
214; MIPS-NEXT:    srl $2, $1, 31
215;
216; MIPS32R2-LABEL: bittest_31_i32:
217; MIPS32R2:       # %bb.0:
218; MIPS32R2-NEXT:    not $1, $4
219; MIPS32R2-NEXT:    jr $ra
220; MIPS32R2-NEXT:    srl $2, $1, 31
221;
222; MIPS32R6-LABEL: bittest_31_i32:
223; MIPS32R6:       # %bb.0:
224; MIPS32R6-NEXT:    not $1, $4
225; MIPS32R6-NEXT:    jr $ra
226; MIPS32R6-NEXT:    srl $2, $1, 31
227;
228; MIPS64-LABEL: bittest_31_i32:
229; MIPS64:       # %bb.0:
230; MIPS64-NEXT:    not $1, $4
231; MIPS64-NEXT:    srl $1, $1, 31
232; MIPS64-NEXT:    dsll $1, $1, 32
233; MIPS64-NEXT:    jr $ra
234; MIPS64-NEXT:    dsrl $2, $1, 32
235;
236; MIPS64R2-LABEL: bittest_31_i32:
237; MIPS64R2:       # %bb.0:
238; MIPS64R2-NEXT:    not $1, $4
239; MIPS64R2-NEXT:    srl $1, $1, 31
240; MIPS64R2-NEXT:    jr $ra
241; MIPS64R2-NEXT:    dext $2, $1, 0, 32
242;
243; MIPS64R6-LABEL: bittest_31_i32:
244; MIPS64R6:       # %bb.0:
245; MIPS64R6-NEXT:    not $1, $4
246; MIPS64R6-NEXT:    srl $1, $1, 31
247; MIPS64R6-NEXT:    jr $ra
248; MIPS64R6-NEXT:    dext $2, $1, 0, 32
249;
250; MM32R3-LABEL: bittest_31_i32:
251; MM32R3:       # %bb.0:
252; MM32R3-NEXT:    not16 $2, $4
253; MM32R3-NEXT:    jr $ra
254; MM32R3-NEXT:    srl $2, $2, 31
255;
256; MM32R6-LABEL: bittest_31_i32:
257; MM32R6:       # %bb.0:
258; MM32R6-NEXT:    not16 $2, $4
259; MM32R6-NEXT:    srl $2, $2, 31
260; MM32R6-NEXT:    jrc $ra
261  %shr = lshr i32 %a, 31
262  %not = xor i32 %shr, -1
263  %and = and i32 %not, 1
264  ret i32 %and
265}
266
267define i64 @bittest_10_i64(i64 %a) nounwind {
268; MIPS-LABEL: bittest_10_i64:
269; MIPS:       # %bb.0:
270; MIPS-NEXT:    andi $1, $5, 1024
271; MIPS-NEXT:    sltiu $3, $1, 1
272; MIPS-NEXT:    jr $ra
273; MIPS-NEXT:    addiu $2, $zero, 0
274;
275; MIPS32R2-LABEL: bittest_10_i64:
276; MIPS32R2:       # %bb.0:
277; MIPS32R2-NEXT:    andi $1, $5, 1024
278; MIPS32R2-NEXT:    sltiu $3, $1, 1
279; MIPS32R2-NEXT:    jr $ra
280; MIPS32R2-NEXT:    addiu $2, $zero, 0
281;
282; MIPS32R6-LABEL: bittest_10_i64:
283; MIPS32R6:       # %bb.0:
284; MIPS32R6-NEXT:    andi $1, $5, 1024
285; MIPS32R6-NEXT:    sltiu $3, $1, 1
286; MIPS32R6-NEXT:    jr $ra
287; MIPS32R6-NEXT:    addiu $2, $zero, 0
288;
289; MIPS64-LABEL: bittest_10_i64:
290; MIPS64:       # %bb.0:
291; MIPS64-NEXT:    andi $1, $4, 1024
292; MIPS64-NEXT:    sltiu $1, $1, 1
293; MIPS64-NEXT:    dsll $1, $1, 32
294; MIPS64-NEXT:    jr $ra
295; MIPS64-NEXT:    dsrl $2, $1, 32
296;
297; MIPS64R2-LABEL: bittest_10_i64:
298; MIPS64R2:       # %bb.0:
299; MIPS64R2-NEXT:    andi $1, $4, 1024
300; MIPS64R2-NEXT:    sltiu $1, $1, 1
301; MIPS64R2-NEXT:    jr $ra
302; MIPS64R2-NEXT:    dext $2, $1, 0, 32
303;
304; MIPS64R6-LABEL: bittest_10_i64:
305; MIPS64R6:       # %bb.0:
306; MIPS64R6-NEXT:    andi $1, $4, 1024
307; MIPS64R6-NEXT:    sltiu $1, $1, 1
308; MIPS64R6-NEXT:    jr $ra
309; MIPS64R6-NEXT:    dext $2, $1, 0, 32
310;
311; MM32R3-LABEL: bittest_10_i64:
312; MM32R3:       # %bb.0:
313; MM32R3-NEXT:    andi $1, $5, 1024
314; MM32R3-NEXT:    li16 $2, 0
315; MM32R3-NEXT:    jr $ra
316; MM32R3-NEXT:    sltiu $3, $1, 1
317;
318; MM32R6-LABEL: bittest_10_i64:
319; MM32R6:       # %bb.0:
320; MM32R6-NEXT:    andi $1, $5, 1024
321; MM32R6-NEXT:    sltiu $3, $1, 1
322; MM32R6-NEXT:    li16 $2, 0
323; MM32R6-NEXT:    jrc $ra
324  %shr = lshr i64 %a, 10
325  %not = xor i64 %shr, -1
326  %and = and i64 %not, 1
327  ret i64 %and
328}
329
330define i64 @bittest_15_i64(i64 %a) nounwind {
331; MIPS-LABEL: bittest_15_i64:
332; MIPS:       # %bb.0:
333; MIPS-NEXT:    andi $1, $5, 32768
334; MIPS-NEXT:    sltiu $3, $1, 1
335; MIPS-NEXT:    jr $ra
336; MIPS-NEXT:    addiu $2, $zero, 0
337;
338; MIPS32R2-LABEL: bittest_15_i64:
339; MIPS32R2:       # %bb.0:
340; MIPS32R2-NEXT:    andi $1, $5, 32768
341; MIPS32R2-NEXT:    sltiu $3, $1, 1
342; MIPS32R2-NEXT:    jr $ra
343; MIPS32R2-NEXT:    addiu $2, $zero, 0
344;
345; MIPS32R6-LABEL: bittest_15_i64:
346; MIPS32R6:       # %bb.0:
347; MIPS32R6-NEXT:    andi $1, $5, 32768
348; MIPS32R6-NEXT:    sltiu $3, $1, 1
349; MIPS32R6-NEXT:    jr $ra
350; MIPS32R6-NEXT:    addiu $2, $zero, 0
351;
352; MIPS64-LABEL: bittest_15_i64:
353; MIPS64:       # %bb.0:
354; MIPS64-NEXT:    andi $1, $4, 32768
355; MIPS64-NEXT:    sltiu $1, $1, 1
356; MIPS64-NEXT:    dsll $1, $1, 32
357; MIPS64-NEXT:    jr $ra
358; MIPS64-NEXT:    dsrl $2, $1, 32
359;
360; MIPS64R2-LABEL: bittest_15_i64:
361; MIPS64R2:       # %bb.0:
362; MIPS64R2-NEXT:    andi $1, $4, 32768
363; MIPS64R2-NEXT:    sltiu $1, $1, 1
364; MIPS64R2-NEXT:    jr $ra
365; MIPS64R2-NEXT:    dext $2, $1, 0, 32
366;
367; MIPS64R6-LABEL: bittest_15_i64:
368; MIPS64R6:       # %bb.0:
369; MIPS64R6-NEXT:    andi $1, $4, 32768
370; MIPS64R6-NEXT:    sltiu $1, $1, 1
371; MIPS64R6-NEXT:    jr $ra
372; MIPS64R6-NEXT:    dext $2, $1, 0, 32
373;
374; MM32R3-LABEL: bittest_15_i64:
375; MM32R3:       # %bb.0:
376; MM32R3-NEXT:    andi16 $2, $5, 32768
377; MM32R3-NEXT:    sltiu $3, $2, 1
378; MM32R3-NEXT:    li16 $2, 0
379; MM32R3-NEXT:    jrc $ra
380;
381; MM32R6-LABEL: bittest_15_i64:
382; MM32R6:       # %bb.0:
383; MM32R6-NEXT:    andi16 $2, $5, 32768
384; MM32R6-NEXT:    sltiu $3, $2, 1
385; MM32R6-NEXT:    li16 $2, 0
386; MM32R6-NEXT:    jrc $ra
387  %shr = lshr i64 %a, 15
388  %not = xor i64 %shr, -1
389  %and = and i64 %not, 1
390  ret i64 %and
391}
392
393define i64 @bittest_16_i64(i64 %a) nounwind {
394; MIPS-LABEL: bittest_16_i64:
395; MIPS:       # %bb.0:
396; MIPS-NEXT:    not $1, $5
397; MIPS-NEXT:    srl $1, $1, 16
398; MIPS-NEXT:    andi $3, $1, 1
399; MIPS-NEXT:    jr $ra
400; MIPS-NEXT:    addiu $2, $zero, 0
401;
402; MIPS32R2-LABEL: bittest_16_i64:
403; MIPS32R2:       # %bb.0:
404; MIPS32R2-NEXT:    not $1, $5
405; MIPS32R2-NEXT:    ext $3, $1, 16, 1
406; MIPS32R2-NEXT:    jr $ra
407; MIPS32R2-NEXT:    addiu $2, $zero, 0
408;
409; MIPS32R6-LABEL: bittest_16_i64:
410; MIPS32R6:       # %bb.0:
411; MIPS32R6-NEXT:    not $1, $5
412; MIPS32R6-NEXT:    ext $3, $1, 16, 1
413; MIPS32R6-NEXT:    jr $ra
414; MIPS32R6-NEXT:    addiu $2, $zero, 0
415;
416; MIPS64-LABEL: bittest_16_i64:
417; MIPS64:       # %bb.0:
418; MIPS64-NEXT:    daddiu $1, $zero, -1
419; MIPS64-NEXT:    xor $1, $4, $1
420; MIPS64-NEXT:    dsrl $1, $1, 16
421; MIPS64-NEXT:    jr $ra
422; MIPS64-NEXT:    andi $2, $1, 1
423;
424; MIPS64R2-LABEL: bittest_16_i64:
425; MIPS64R2:       # %bb.0:
426; MIPS64R2-NEXT:    daddiu $1, $zero, -1
427; MIPS64R2-NEXT:    xor $1, $4, $1
428; MIPS64R2-NEXT:    jr $ra
429; MIPS64R2-NEXT:    dext $2, $1, 16, 1
430;
431; MIPS64R6-LABEL: bittest_16_i64:
432; MIPS64R6:       # %bb.0:
433; MIPS64R6-NEXT:    daddiu $1, $zero, -1
434; MIPS64R6-NEXT:    xor $1, $4, $1
435; MIPS64R6-NEXT:    jr $ra
436; MIPS64R6-NEXT:    dext $2, $1, 16, 1
437;
438; MM32R3-LABEL: bittest_16_i64:
439; MM32R3:       # %bb.0:
440; MM32R3-NEXT:    not16 $2, $5
441; MM32R3-NEXT:    ext $3, $2, 16, 1
442; MM32R3-NEXT:    li16 $2, 0
443; MM32R3-NEXT:    jrc $ra
444;
445; MM32R6-LABEL: bittest_16_i64:
446; MM32R6:       # %bb.0:
447; MM32R6-NEXT:    not16 $2, $5
448; MM32R6-NEXT:    ext $3, $2, 16, 1
449; MM32R6-NEXT:    li16 $2, 0
450; MM32R6-NEXT:    jrc $ra
451  %shr = lshr i64 %a, 16
452  %not = xor i64 %shr, -1
453  %and = and i64 %not, 1
454  ret i64 %and
455}
456
457define i64 @bittest_31_i64(i64 %a) nounwind {
458; MIPS-LABEL: bittest_31_i64:
459; MIPS:       # %bb.0:
460; MIPS-NEXT:    not $1, $5
461; MIPS-NEXT:    srl $3, $1, 31
462; MIPS-NEXT:    jr $ra
463; MIPS-NEXT:    addiu $2, $zero, 0
464;
465; MIPS32R2-LABEL: bittest_31_i64:
466; MIPS32R2:       # %bb.0:
467; MIPS32R2-NEXT:    not $1, $5
468; MIPS32R2-NEXT:    srl $3, $1, 31
469; MIPS32R2-NEXT:    jr $ra
470; MIPS32R2-NEXT:    addiu $2, $zero, 0
471;
472; MIPS32R6-LABEL: bittest_31_i64:
473; MIPS32R6:       # %bb.0:
474; MIPS32R6-NEXT:    not $1, $5
475; MIPS32R6-NEXT:    srl $3, $1, 31
476; MIPS32R6-NEXT:    jr $ra
477; MIPS32R6-NEXT:    addiu $2, $zero, 0
478;
479; MIPS64-LABEL: bittest_31_i64:
480; MIPS64:       # %bb.0:
481; MIPS64-NEXT:    daddiu $1, $zero, -1
482; MIPS64-NEXT:    xor $1, $4, $1
483; MIPS64-NEXT:    dsrl $1, $1, 31
484; MIPS64-NEXT:    jr $ra
485; MIPS64-NEXT:    andi $2, $1, 1
486;
487; MIPS64R2-LABEL: bittest_31_i64:
488; MIPS64R2:       # %bb.0:
489; MIPS64R2-NEXT:    daddiu $1, $zero, -1
490; MIPS64R2-NEXT:    xor $1, $4, $1
491; MIPS64R2-NEXT:    jr $ra
492; MIPS64R2-NEXT:    dext $2, $1, 31, 1
493;
494; MIPS64R6-LABEL: bittest_31_i64:
495; MIPS64R6:       # %bb.0:
496; MIPS64R6-NEXT:    daddiu $1, $zero, -1
497; MIPS64R6-NEXT:    xor $1, $4, $1
498; MIPS64R6-NEXT:    jr $ra
499; MIPS64R6-NEXT:    dext $2, $1, 31, 1
500;
501; MM32R3-LABEL: bittest_31_i64:
502; MM32R3:       # %bb.0:
503; MM32R3-NEXT:    not16 $2, $5
504; MM32R3-NEXT:    srl $3, $2, 31
505; MM32R3-NEXT:    li16 $2, 0
506; MM32R3-NEXT:    jrc $ra
507;
508; MM32R6-LABEL: bittest_31_i64:
509; MM32R6:       # %bb.0:
510; MM32R6-NEXT:    not16 $2, $5
511; MM32R6-NEXT:    srl $3, $2, 31
512; MM32R6-NEXT:    li16 $2, 0
513; MM32R6-NEXT:    jrc $ra
514  %shr = lshr i64 %a, 31
515  %not = xor i64 %shr, -1
516  %and = and i64 %not, 1
517  ret i64 %and
518}
519
520define i64 @bittest_32_i64(i64 %a) nounwind {
521; MIPS-LABEL: bittest_32_i64:
522; MIPS:       # %bb.0:
523; MIPS-NEXT:    not $1, $4
524; MIPS-NEXT:    andi $3, $1, 1
525; MIPS-NEXT:    jr $ra
526; MIPS-NEXT:    addiu $2, $zero, 0
527;
528; MIPS32R2-LABEL: bittest_32_i64:
529; MIPS32R2:       # %bb.0:
530; MIPS32R2-NEXT:    not $1, $4
531; MIPS32R2-NEXT:    andi $3, $1, 1
532; MIPS32R2-NEXT:    jr $ra
533; MIPS32R2-NEXT:    addiu $2, $zero, 0
534;
535; MIPS32R6-LABEL: bittest_32_i64:
536; MIPS32R6:       # %bb.0:
537; MIPS32R6-NEXT:    not $1, $4
538; MIPS32R6-NEXT:    andi $3, $1, 1
539; MIPS32R6-NEXT:    jr $ra
540; MIPS32R6-NEXT:    addiu $2, $zero, 0
541;
542; MIPS64-LABEL: bittest_32_i64:
543; MIPS64:       # %bb.0:
544; MIPS64-NEXT:    daddiu $1, $zero, -1
545; MIPS64-NEXT:    xor $1, $4, $1
546; MIPS64-NEXT:    dsrl $1, $1, 32
547; MIPS64-NEXT:    jr $ra
548; MIPS64-NEXT:    andi $2, $1, 1
549;
550; MIPS64R2-LABEL: bittest_32_i64:
551; MIPS64R2:       # %bb.0:
552; MIPS64R2-NEXT:    daddiu $1, $zero, -1
553; MIPS64R2-NEXT:    xor $1, $4, $1
554; MIPS64R2-NEXT:    jr $ra
555; MIPS64R2-NEXT:    dextu $2, $1, 32, 1
556;
557; MIPS64R6-LABEL: bittest_32_i64:
558; MIPS64R6:       # %bb.0:
559; MIPS64R6-NEXT:    daddiu $1, $zero, -1
560; MIPS64R6-NEXT:    xor $1, $4, $1
561; MIPS64R6-NEXT:    jr $ra
562; MIPS64R6-NEXT:    dextu $2, $1, 32, 1
563;
564; MM32R3-LABEL: bittest_32_i64:
565; MM32R3:       # %bb.0:
566; MM32R3-NEXT:    not16 $2, $4
567; MM32R3-NEXT:    andi16 $3, $2, 1
568; MM32R3-NEXT:    li16 $2, 0
569; MM32R3-NEXT:    jrc $ra
570;
571; MM32R6-LABEL: bittest_32_i64:
572; MM32R6:       # %bb.0:
573; MM32R6-NEXT:    not16 $2, $4
574; MM32R6-NEXT:    andi16 $3, $2, 1
575; MM32R6-NEXT:    li16 $2, 0
576; MM32R6-NEXT:    jrc $ra
577  %shr = lshr i64 %a, 32
578  %not = xor i64 %shr, -1
579  %and = and i64 %not, 1
580  ret i64 %and
581}
582
583define i64 @bittest_63_i64(i64 %a) nounwind {
584; MIPS-LABEL: bittest_63_i64:
585; MIPS:       # %bb.0:
586; MIPS-NEXT:    not $1, $4
587; MIPS-NEXT:    srl $3, $1, 31
588; MIPS-NEXT:    jr $ra
589; MIPS-NEXT:    addiu $2, $zero, 0
590;
591; MIPS32R2-LABEL: bittest_63_i64:
592; MIPS32R2:       # %bb.0:
593; MIPS32R2-NEXT:    not $1, $4
594; MIPS32R2-NEXT:    srl $3, $1, 31
595; MIPS32R2-NEXT:    jr $ra
596; MIPS32R2-NEXT:    addiu $2, $zero, 0
597;
598; MIPS32R6-LABEL: bittest_63_i64:
599; MIPS32R6:       # %bb.0:
600; MIPS32R6-NEXT:    not $1, $4
601; MIPS32R6-NEXT:    srl $3, $1, 31
602; MIPS32R6-NEXT:    jr $ra
603; MIPS32R6-NEXT:    addiu $2, $zero, 0
604;
605; MIPS64-LABEL: bittest_63_i64:
606; MIPS64:       # %bb.0:
607; MIPS64-NEXT:    daddiu $1, $zero, -1
608; MIPS64-NEXT:    xor $1, $4, $1
609; MIPS64-NEXT:    jr $ra
610; MIPS64-NEXT:    dsrl $2, $1, 63
611;
612; MIPS64R2-LABEL: bittest_63_i64:
613; MIPS64R2:       # %bb.0:
614; MIPS64R2-NEXT:    daddiu $1, $zero, -1
615; MIPS64R2-NEXT:    xor $1, $4, $1
616; MIPS64R2-NEXT:    jr $ra
617; MIPS64R2-NEXT:    dsrl $2, $1, 63
618;
619; MIPS64R6-LABEL: bittest_63_i64:
620; MIPS64R6:       # %bb.0:
621; MIPS64R6-NEXT:    daddiu $1, $zero, -1
622; MIPS64R6-NEXT:    xor $1, $4, $1
623; MIPS64R6-NEXT:    jr $ra
624; MIPS64R6-NEXT:    dsrl $2, $1, 63
625;
626; MM32R3-LABEL: bittest_63_i64:
627; MM32R3:       # %bb.0:
628; MM32R3-NEXT:    not16 $2, $4
629; MM32R3-NEXT:    srl $3, $2, 31
630; MM32R3-NEXT:    li16 $2, 0
631; MM32R3-NEXT:    jrc $ra
632;
633; MM32R6-LABEL: bittest_63_i64:
634; MM32R6:       # %bb.0:
635; MM32R6-NEXT:    not16 $2, $4
636; MM32R6-NEXT:    srl $3, $2, 31
637; MM32R6-NEXT:    li16 $2, 0
638; MM32R6-NEXT:    jrc $ra
639  %shr = lshr i64 %a, 63
640  %not = xor i64 %shr, -1
641  %and = and i64 %not, 1
642  ret i64 %and
643}
644