1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=msa,+fp64 -mattr=nan2008 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600 3--- | 4 5 define void @load_store_v16i8(<16 x i8>* %a, <16 x i8>* %b) { entry: ret void } 6 define void @load_store_v8i16(<8 x i16>* %a, <8 x i16>* %b) { entry: ret void } 7 define void @load_store_v4i32(<4 x i32>* %a, <4 x i32>* %b) { entry: ret void } 8 define void @load_store_v2i64(<2 x i64>* %a, <2 x i64>* %b) { entry: ret void } 9 define void @load_store_v4f32(<4 x float>* %a, <4 x float>* %b) { entry: ret void } 10 define void @load_store_v2f64(<2 x double>* %a, <2 x double>* %b) { entry: ret void } 11 12... 13--- 14name: load_store_v16i8 15alignment: 4 16legalized: true 17tracksRegLiveness: true 18body: | 19 bb.1.entry: 20 liveins: $a0, $a1 21 22 ; P5600-LABEL: name: load_store_v16i8 23 ; P5600: liveins: $a0, $a1 24 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 25 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 26 ; P5600: [[LOAD:%[0-9]+]]:fprb(<16 x s8>) = G_LOAD [[COPY1]](p0) :: (load (<16 x s8>) from %ir.b) 27 ; P5600: G_STORE [[LOAD]](<16 x s8>), [[COPY]](p0) :: (store (<16 x s8>) into %ir.a) 28 ; P5600: RetRA 29 %0:_(p0) = COPY $a0 30 %1:_(p0) = COPY $a1 31 %2:_(<16 x s8>) = G_LOAD %1(p0) :: (load (<16 x s8>) from %ir.b) 32 G_STORE %2(<16 x s8>), %0(p0) :: (store (<16 x s8>) into %ir.a) 33 RetRA 34 35... 36--- 37name: load_store_v8i16 38alignment: 4 39legalized: true 40tracksRegLiveness: true 41body: | 42 bb.1.entry: 43 liveins: $a0, $a1 44 45 ; P5600-LABEL: name: load_store_v8i16 46 ; P5600: liveins: $a0, $a1 47 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 48 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 49 ; P5600: [[LOAD:%[0-9]+]]:fprb(<8 x s16>) = G_LOAD [[COPY1]](p0) :: (load (<8 x s16>) from %ir.b) 50 ; P5600: G_STORE [[LOAD]](<8 x s16>), [[COPY]](p0) :: (store (<8 x s16>) into %ir.a) 51 ; P5600: RetRA 52 %0:_(p0) = COPY $a0 53 %1:_(p0) = COPY $a1 54 %2:_(<8 x s16>) = G_LOAD %1(p0) :: (load (<8 x s16>) from %ir.b) 55 G_STORE %2(<8 x s16>), %0(p0) :: (store (<8 x s16>) into %ir.a) 56 RetRA 57 58... 59--- 60name: load_store_v4i32 61alignment: 4 62legalized: true 63tracksRegLiveness: true 64body: | 65 bb.1.entry: 66 liveins: $a0, $a1 67 68 ; P5600-LABEL: name: load_store_v4i32 69 ; P5600: liveins: $a0, $a1 70 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 71 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 72 ; P5600: [[LOAD:%[0-9]+]]:fprb(<4 x s32>) = G_LOAD [[COPY1]](p0) :: (load (<4 x s32>) from %ir.b) 73 ; P5600: G_STORE [[LOAD]](<4 x s32>), [[COPY]](p0) :: (store (<4 x s32>) into %ir.a) 74 ; P5600: RetRA 75 %0:_(p0) = COPY $a0 76 %1:_(p0) = COPY $a1 77 %2:_(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>) from %ir.b) 78 G_STORE %2(<4 x s32>), %0(p0) :: (store (<4 x s32>) into %ir.a) 79 RetRA 80 81... 82--- 83name: load_store_v2i64 84alignment: 4 85legalized: true 86tracksRegLiveness: true 87body: | 88 bb.1.entry: 89 liveins: $a0, $a1 90 91 ; P5600-LABEL: name: load_store_v2i64 92 ; P5600: liveins: $a0, $a1 93 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 94 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 95 ; P5600: [[LOAD:%[0-9]+]]:fprb(<2 x s64>) = G_LOAD [[COPY1]](p0) :: (load (<2 x s64>) from %ir.b) 96 ; P5600: G_STORE [[LOAD]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>) into %ir.a) 97 ; P5600: RetRA 98 %0:_(p0) = COPY $a0 99 %1:_(p0) = COPY $a1 100 %2:_(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>) from %ir.b) 101 G_STORE %2(<2 x s64>), %0(p0) :: (store (<2 x s64>) into %ir.a) 102 RetRA 103 104... 105--- 106name: load_store_v4f32 107alignment: 4 108legalized: true 109tracksRegLiveness: true 110body: | 111 bb.1.entry: 112 liveins: $a0, $a1 113 114 ; P5600-LABEL: name: load_store_v4f32 115 ; P5600: liveins: $a0, $a1 116 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 117 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 118 ; P5600: [[LOAD:%[0-9]+]]:fprb(<4 x s32>) = G_LOAD [[COPY1]](p0) :: (load (<4 x s32>) from %ir.b) 119 ; P5600: G_STORE [[LOAD]](<4 x s32>), [[COPY]](p0) :: (store (<4 x s32>) into %ir.a) 120 ; P5600: RetRA 121 %0:_(p0) = COPY $a0 122 %1:_(p0) = COPY $a1 123 %2:_(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>) from %ir.b) 124 G_STORE %2(<4 x s32>), %0(p0) :: (store (<4 x s32>) into %ir.a) 125 RetRA 126 127... 128--- 129name: load_store_v2f64 130alignment: 4 131legalized: true 132tracksRegLiveness: true 133body: | 134 bb.1.entry: 135 liveins: $a0, $a1 136 137 ; P5600-LABEL: name: load_store_v2f64 138 ; P5600: liveins: $a0, $a1 139 ; P5600: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0 140 ; P5600: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 141 ; P5600: [[LOAD:%[0-9]+]]:fprb(<2 x s64>) = G_LOAD [[COPY1]](p0) :: (load (<2 x s64>) from %ir.b) 142 ; P5600: G_STORE [[LOAD]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>) into %ir.a) 143 ; P5600: RetRA 144 %0:_(p0) = COPY $a0 145 %1:_(p0) = COPY $a1 146 %2:_(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>) from %ir.b) 147 G_STORE %2(<2 x s64>), %0(p0) :: (store (<2 x s64>) into %ir.a) 148 RetRA 149 150... 151