1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32 3# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64 4 5--- | 6 7 define void @float_add() {entry: ret void} 8 define void @float_sub() {entry: ret void} 9 define void @float_mul() {entry: ret void} 10 define void @float_div() {entry: ret void} 11 define void @double_add() {entry: ret void} 12 define void @double_sub() {entry: ret void} 13 define void @double_mul() {entry: ret void} 14 define void @double_div() {entry: ret void} 15 16... 17--- 18name: float_add 19alignment: 4 20tracksRegLiveness: true 21body: | 22 bb.1.entry: 23 liveins: $f12, $f14 24 25 ; FP32-LABEL: name: float_add 26 ; FP32: liveins: $f12, $f14 27 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 28 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 29 ; FP32: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[COPY]], [[COPY1]] 30 ; FP32: $f0 = COPY [[FADD]](s32) 31 ; FP32: RetRA implicit $f0 32 ; FP64-LABEL: name: float_add 33 ; FP64: liveins: $f12, $f14 34 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 35 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 36 ; FP64: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[COPY]], [[COPY1]] 37 ; FP64: $f0 = COPY [[FADD]](s32) 38 ; FP64: RetRA implicit $f0 39 %0:_(s32) = COPY $f12 40 %1:_(s32) = COPY $f14 41 %2:_(s32) = G_FADD %0, %1 42 $f0 = COPY %2(s32) 43 RetRA implicit $f0 44 45... 46--- 47name: float_sub 48alignment: 4 49tracksRegLiveness: true 50body: | 51 bb.1.entry: 52 liveins: $f12, $f14 53 54 ; FP32-LABEL: name: float_sub 55 ; FP32: liveins: $f12, $f14 56 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 57 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 58 ; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[COPY1]] 59 ; FP32: $f0 = COPY [[FSUB]](s32) 60 ; FP32: RetRA implicit $f0 61 ; FP64-LABEL: name: float_sub 62 ; FP64: liveins: $f12, $f14 63 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 64 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 65 ; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[COPY1]] 66 ; FP64: $f0 = COPY [[FSUB]](s32) 67 ; FP64: RetRA implicit $f0 68 %0:_(s32) = COPY $f12 69 %1:_(s32) = COPY $f14 70 %2:_(s32) = G_FSUB %0, %1 71 $f0 = COPY %2(s32) 72 RetRA implicit $f0 73 74... 75--- 76name: float_mul 77alignment: 4 78tracksRegLiveness: true 79body: | 80 bb.1.entry: 81 liveins: $f12, $f14 82 83 ; FP32-LABEL: name: float_mul 84 ; FP32: liveins: $f12, $f14 85 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 86 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 87 ; FP32: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[COPY1]] 88 ; FP32: $f0 = COPY [[FMUL]](s32) 89 ; FP32: RetRA implicit $f0 90 ; FP64-LABEL: name: float_mul 91 ; FP64: liveins: $f12, $f14 92 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 93 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 94 ; FP64: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[COPY1]] 95 ; FP64: $f0 = COPY [[FMUL]](s32) 96 ; FP64: RetRA implicit $f0 97 %0:_(s32) = COPY $f12 98 %1:_(s32) = COPY $f14 99 %2:_(s32) = G_FMUL %0, %1 100 $f0 = COPY %2(s32) 101 RetRA implicit $f0 102 103... 104--- 105name: float_div 106alignment: 4 107tracksRegLiveness: true 108body: | 109 bb.1.entry: 110 liveins: $f12, $f14 111 112 ; FP32-LABEL: name: float_div 113 ; FP32: liveins: $f12, $f14 114 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 115 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 116 ; FP32: [[FDIV:%[0-9]+]]:_(s32) = G_FDIV [[COPY]], [[COPY1]] 117 ; FP32: $f0 = COPY [[FDIV]](s32) 118 ; FP32: RetRA implicit $f0 119 ; FP64-LABEL: name: float_div 120 ; FP64: liveins: $f12, $f14 121 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12 122 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f14 123 ; FP64: [[FDIV:%[0-9]+]]:_(s32) = G_FDIV [[COPY]], [[COPY1]] 124 ; FP64: $f0 = COPY [[FDIV]](s32) 125 ; FP64: RetRA implicit $f0 126 %0:_(s32) = COPY $f12 127 %1:_(s32) = COPY $f14 128 %2:_(s32) = G_FDIV %0, %1 129 $f0 = COPY %2(s32) 130 RetRA implicit $f0 131 132... 133--- 134name: double_add 135alignment: 4 136tracksRegLiveness: true 137body: | 138 bb.1.entry: 139 liveins: $d6, $d7 140 141 ; FP32-LABEL: name: double_add 142 ; FP32: liveins: $d6, $d7 143 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 144 ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 145 ; FP32: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[COPY1]] 146 ; FP32: $d0 = COPY [[FADD]](s64) 147 ; FP32: RetRA implicit $d0 148 ; FP64-LABEL: name: double_add 149 ; FP64: liveins: $d6, $d7 150 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 151 ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 152 ; FP64: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[COPY]], [[COPY1]] 153 ; FP64: $d0 = COPY [[FADD]](s64) 154 ; FP64: RetRA implicit $d0 155 %0:_(s64) = COPY $d6 156 %1:_(s64) = COPY $d7 157 %2:_(s64) = G_FADD %0, %1 158 $d0 = COPY %2(s64) 159 RetRA implicit $d0 160 161... 162--- 163name: double_sub 164alignment: 4 165tracksRegLiveness: true 166body: | 167 bb.1.entry: 168 liveins: $d6, $d7 169 170 ; FP32-LABEL: name: double_sub 171 ; FP32: liveins: $d6, $d7 172 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 173 ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 174 ; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[COPY1]] 175 ; FP32: $d0 = COPY [[FSUB]](s64) 176 ; FP32: RetRA implicit $d0 177 ; FP64-LABEL: name: double_sub 178 ; FP64: liveins: $d6, $d7 179 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 180 ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 181 ; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[COPY1]] 182 ; FP64: $d0 = COPY [[FSUB]](s64) 183 ; FP64: RetRA implicit $d0 184 %0:_(s64) = COPY $d6 185 %1:_(s64) = COPY $d7 186 %2:_(s64) = G_FSUB %0, %1 187 $d0 = COPY %2(s64) 188 RetRA implicit $d0 189 190... 191--- 192name: double_mul 193alignment: 4 194tracksRegLiveness: true 195body: | 196 bb.1.entry: 197 liveins: $d6, $d7 198 199 ; FP32-LABEL: name: double_mul 200 ; FP32: liveins: $d6, $d7 201 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 202 ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 203 ; FP32: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY1]] 204 ; FP32: $d0 = COPY [[FMUL]](s64) 205 ; FP32: RetRA implicit $d0 206 ; FP64-LABEL: name: double_mul 207 ; FP64: liveins: $d6, $d7 208 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 209 ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 210 ; FP64: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL [[COPY]], [[COPY1]] 211 ; FP64: $d0 = COPY [[FMUL]](s64) 212 ; FP64: RetRA implicit $d0 213 %0:_(s64) = COPY $d6 214 %1:_(s64) = COPY $d7 215 %2:_(s64) = G_FMUL %0, %1 216 $d0 = COPY %2(s64) 217 RetRA implicit $d0 218 219... 220--- 221name: double_div 222alignment: 4 223tracksRegLiveness: true 224body: | 225 bb.1.entry: 226 liveins: $d6, $d7 227 228 ; FP32-LABEL: name: double_div 229 ; FP32: liveins: $d6, $d7 230 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 231 ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 232 ; FP32: [[FDIV:%[0-9]+]]:_(s64) = G_FDIV [[COPY]], [[COPY1]] 233 ; FP32: $d0 = COPY [[FDIV]](s64) 234 ; FP32: RetRA implicit $d0 235 ; FP64-LABEL: name: double_div 236 ; FP64: liveins: $d6, $d7 237 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6 238 ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d7 239 ; FP64: [[FDIV:%[0-9]+]]:_(s64) = G_FDIV [[COPY]], [[COPY1]] 240 ; FP64: $d0 = COPY [[FDIV]](s64) 241 ; FP64: RetRA implicit $d0 242 %0:_(s64) = COPY $d6 243 %1:_(s64) = COPY $d7 244 %2:_(s64) = G_FDIV %0, %1 245 $d0 = COPY %2(s64) 246 RetRA implicit $d0 247 248... 249