1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after finalize-isel -o %t.mir %s 2; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s 3 4; Test that SIMachineFunctionInfo can be round trip serialized through 5; MIR. 6 7@lds = addrspace(3) global [512 x float] undef, align 4 8 9; CHECK-LABEL: {{^}}name: kernel 10; CHECK: machineFunctionInfo: 11; CHECK-NEXT: explicitKernArgSize: 128 12; CHECK-NEXT: maxKernArgAlign: 64 13; CHECK-NEXT: ldsSize: 0 14; CHECK-NEXT: dynLDSAlign: 1 15; CHECK-NEXT: isEntryFunction: true 16; CHECK-NEXT: noSignedZerosFPMath: false 17; CHECK-NEXT: memoryBound: false 18; CHECK-NEXT: waveLimiter: false 19; CHECK-NEXT: hasSpilledSGPRs: false 20; CHECK-NEXT: hasSpilledVGPRs: false 21; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 22; CHECK-NEXT: frameOffsetReg: '$fp_reg' 23; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 24; CHECK-NEXT: argumentInfo: 25; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 26; CHECK-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' } 27; CHECK-NEXT: workGroupIDX: { reg: '$sgpr6' } 28; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' } 29; CHECK-NEXT: workItemIDX: { reg: '$vgpr0' } 30; CHECK-NEXT: mode: 31; CHECK-NEXT: ieee: true 32; CHECK-NEXT: dx10-clamp: true 33; CHECK-NEXT: fp32-input-denormals: true 34; CHECK-NEXT: fp32-output-denormals: true 35; CHECK-NEXT: fp64-fp16-input-denormals: true 36; CHECK-NEXT: fp64-fp16-output-denormals: true 37; CHECK-NEXT: highBitsOf32BitAddress: 0 38; CHECK-NEXT: body: 39define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) { 40 %gep = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %arg0 41 store float 0.0, float addrspace(3)* %gep, align 4 42 ret void 43} 44 45; CHECK-LABEL: {{^}}name: ps_shader 46; CHECK: machineFunctionInfo: 47; CHECK-NEXT: explicitKernArgSize: 0 48; CHECK-NEXT: maxKernArgAlign: 1 49; CHECK-NEXT: ldsSize: 0 50; CHECK-NEXT: dynLDSAlign: 1 51; CHECK-NEXT: isEntryFunction: true 52; CHECK-NEXT: noSignedZerosFPMath: false 53; CHECK-NEXT: memoryBound: false 54; CHECK-NEXT: waveLimiter: false 55; CHECK-NEXT: hasSpilledSGPRs: false 56; CHECK-NEXT: hasSpilledVGPRs: false 57; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 58; CHECK-NEXT: frameOffsetReg: '$fp_reg' 59; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 60; CHECK-NEXT: argumentInfo: 61; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr3' } 62; CHECK-NEXT: implicitBufferPtr: { reg: '$sgpr0_sgpr1' } 63; CHECK-NEXT: mode: 64; CHECK-NEXT: ieee: false 65; CHECK-NEXT: dx10-clamp: true 66; CHECK-NEXT: fp32-input-denormals: true 67; CHECK-NEXT: fp32-output-denormals: true 68; CHECK-NEXT: fp64-fp16-input-denormals: true 69; CHECK-NEXT: fp64-fp16-output-denormals: true 70; CHECK-NEXT: highBitsOf32BitAddress: 0 71; CHECK-NEXT: body: 72define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) { 73 ret void 74} 75 76; CHECK-LABEL: {{^}}name: function 77; CHECK: machineFunctionInfo: 78; CHECK-NEXT: explicitKernArgSize: 0 79; CHECK-NEXT: maxKernArgAlign: 1 80; CHECK-NEXT: ldsSize: 0 81; CHECK-NEXT: dynLDSAlign: 1 82; CHECK-NEXT: isEntryFunction: false 83; CHECK-NEXT: noSignedZerosFPMath: false 84; CHECK-NEXT: memoryBound: false 85; CHECK-NEXT: waveLimiter: false 86; CHECK-NEXT: hasSpilledSGPRs: false 87; CHECK-NEXT: hasSpilledVGPRs: false 88; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 89; CHECK-NEXT: frameOffsetReg: '$sgpr33' 90; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 91; CHECK-NEXT: argumentInfo: 92; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 93; CHECK-NEXT: mode: 94; CHECK-NEXT: ieee: true 95; CHECK-NEXT: dx10-clamp: true 96; CHECK-NEXT: fp32-input-denormals: true 97; CHECK-NEXT: fp32-output-denormals: true 98; CHECK-NEXT: fp64-fp16-input-denormals: true 99; CHECK-NEXT: fp64-fp16-output-denormals: true 100; CHECK-NEXT: highBitsOf32BitAddress: 0 101; CHECK-NEXT: body: 102define void @function() { 103 ret void 104} 105 106; CHECK-LABEL: {{^}}name: function_nsz 107; CHECK: machineFunctionInfo: 108; CHECK-NEXT: explicitKernArgSize: 0 109; CHECK-NEXT: maxKernArgAlign: 1 110; CHECK-NEXT: ldsSize: 0 111; CHECK-NEXT: dynLDSAlign: 1 112; CHECK-NEXT: isEntryFunction: false 113; CHECK-NEXT: noSignedZerosFPMath: true 114; CHECK-NEXT: memoryBound: false 115; CHECK-NEXT: waveLimiter: false 116; CHECK-NEXT: hasSpilledSGPRs: false 117; CHECK-NEXT: hasSpilledVGPRs: false 118; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 119; CHECK-NEXT: frameOffsetReg: '$sgpr33' 120; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 121; CHECK-NEXT: argumentInfo: 122; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 123; CHECK-NEXT: mode: 124; CHECK-NEXT: ieee: true 125; CHECK-NEXT: dx10-clamp: true 126; CHECK-NEXT: fp32-input-denormals: true 127; CHECK-NEXT: fp32-output-denormals: true 128; CHECK-NEXT: fp64-fp16-input-denormals: true 129; CHECK-NEXT: fp64-fp16-output-denormals: true 130; CHECK-NEXT: highBitsOf32BitAddress: 0 131; CHECK-NEXT: body: 132define void @function_nsz() #0 { 133 ret void 134} 135 136; CHECK-LABEL: {{^}}name: function_dx10_clamp_off 137; CHECK: mode: 138; CHECK-NEXT: ieee: true 139; CHECK-NEXT: dx10-clamp: false 140; CHECK-NEXT: fp32-input-denormals: true 141; CHECK-NEXT: fp32-output-denormals: true 142; CHECK-NEXT: fp64-fp16-input-denormals: true 143; CHECK-NEXT: fp64-fp16-output-denormals: true 144define void @function_dx10_clamp_off() #1 { 145 ret void 146} 147 148; CHECK-LABEL: {{^}}name: function_ieee_off 149; CHECK: mode: 150; CHECK-NEXT: ieee: false 151; CHECK-NEXT: dx10-clamp: true 152; CHECK-NEXT: fp32-input-denormals: true 153; CHECK-NEXT: fp32-output-denormals: true 154; CHECK-NEXT: fp64-fp16-input-denormals: true 155; CHECK-NEXT: fp64-fp16-output-denormals: true 156define void @function_ieee_off() #2 { 157 ret void 158} 159 160; CHECK-LABEL: {{^}}name: function_ieee_off_dx10_clamp_off 161; CHECK: mode: 162; CHECK-NEXT: ieee: false 163; CHECK-NEXT: dx10-clamp: false 164; CHECK-NEXT: fp32-input-denormals: true 165; CHECK-NEXT: fp32-output-denormals: true 166; CHECK-NEXT: fp64-fp16-input-denormals: true 167; CHECK-NEXT: fp64-fp16-output-denormals: true 168define void @function_ieee_off_dx10_clamp_off() #3 { 169 ret void 170} 171 172; CHECK-LABEL: {{^}}name: high_address_bits 173; CHECK: machineFunctionInfo: 174; CHECK: highBitsOf32BitAddress: 4294934528 175define amdgpu_ps void @high_address_bits() #4 { 176 ret void 177} 178 179attributes #0 = { "no-signed-zeros-fp-math" = "true" } 180attributes #1 = { "amdgpu-dx10-clamp" = "false" } 181attributes #2 = { "amdgpu-ieee" = "false" } 182attributes #3 = { "amdgpu-dx10-clamp" = "false" "amdgpu-ieee" = "false" } 183attributes #4 = { "amdgpu-32bit-address-high-bits"="0xffff8000" } 184