1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after finalize-isel -o %t.mir %s 2; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s 3 4; Test that SIMachineFunctionInfo can be round trip serialized through 5; MIR. 6 7@lds = addrspace(3) global [512 x float] undef, align 4 8 9; CHECK-LABEL: {{^}}name: kernel 10; CHECK: machineFunctionInfo: 11; CHECK-NEXT: explicitKernArgSize: 128 12; CHECK-NEXT: maxKernArgAlign: 64 13; CHECK-NEXT: ldsSize: 0 14; CHECK-NEXT: isEntryFunction: true 15; CHECK-NEXT: noSignedZerosFPMath: false 16; CHECK-NEXT: memoryBound: false 17; CHECK-NEXT: waveLimiter: false 18; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 19; CHECK-NEXT: frameOffsetReg: '$fp_reg' 20; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 21; CHECK-NEXT: argumentInfo: 22; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 23; CHECK-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' } 24; CHECK-NEXT: workGroupIDX: { reg: '$sgpr6' } 25; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' } 26; CHECK-NEXT: workItemIDX: { reg: '$vgpr0' } 27; CHECK-NEXT: mode: 28; CHECK-NEXT: ieee: true 29; CHECK-NEXT: dx10-clamp: true 30; CHECK-NEXT: fp32-input-denormals: true 31; CHECK-NEXT: fp32-output-denormals: true 32; CHECK-NEXT: fp64-fp16-input-denormals: true 33; CHECK-NEXT: fp64-fp16-output-denormals: true 34; CHECK-NEXT: highBitsOf32BitAddress: 0 35; CHECK-NEXT: body: 36define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) { 37 %gep = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %arg0 38 store float 0.0, float addrspace(3)* %gep, align 4 39 ret void 40} 41 42; CHECK-LABEL: {{^}}name: ps_shader 43; CHECK: machineFunctionInfo: 44; CHECK-NEXT: explicitKernArgSize: 0 45; CHECK-NEXT: maxKernArgAlign: 1 46; CHECK-NEXT: ldsSize: 0 47; CHECK-NEXT: isEntryFunction: true 48; CHECK-NEXT: noSignedZerosFPMath: false 49; CHECK-NEXT: memoryBound: false 50; CHECK-NEXT: waveLimiter: false 51; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 52; CHECK-NEXT: frameOffsetReg: '$fp_reg' 53; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 54; CHECK-NEXT: argumentInfo: 55; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr3' } 56; CHECK-NEXT: implicitBufferPtr: { reg: '$sgpr0_sgpr1' } 57; CHECK-NEXT: mode: 58; CHECK-NEXT: ieee: false 59; CHECK-NEXT: dx10-clamp: true 60; CHECK-NEXT: fp32-input-denormals: true 61; CHECK-NEXT: fp32-output-denormals: true 62; CHECK-NEXT: fp64-fp16-input-denormals: true 63; CHECK-NEXT: fp64-fp16-output-denormals: true 64; CHECK-NEXT: highBitsOf32BitAddress: 0 65; CHECK-NEXT: body: 66define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) { 67 ret void 68} 69 70; CHECK-LABEL: {{^}}name: function 71; CHECK: machineFunctionInfo: 72; CHECK-NEXT: explicitKernArgSize: 0 73; CHECK-NEXT: maxKernArgAlign: 1 74; CHECK-NEXT: ldsSize: 0 75; CHECK-NEXT: isEntryFunction: false 76; CHECK-NEXT: noSignedZerosFPMath: false 77; CHECK-NEXT: memoryBound: false 78; CHECK-NEXT: waveLimiter: false 79; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 80; CHECK-NEXT: frameOffsetReg: '$sgpr33' 81; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 82; CHECK-NEXT: argumentInfo: 83; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 84; CHECK-NEXT: mode: 85; CHECK-NEXT: ieee: true 86; CHECK-NEXT: dx10-clamp: true 87; CHECK-NEXT: fp32-input-denormals: true 88; CHECK-NEXT: fp32-output-denormals: true 89; CHECK-NEXT: fp64-fp16-input-denormals: true 90; CHECK-NEXT: fp64-fp16-output-denormals: true 91; CHECK-NEXT: highBitsOf32BitAddress: 0 92; CHECK-NEXT: body: 93define void @function() { 94 ret void 95} 96 97; CHECK-LABEL: {{^}}name: function_nsz 98; CHECK: machineFunctionInfo: 99; CHECK-NEXT: explicitKernArgSize: 0 100; CHECK-NEXT: maxKernArgAlign: 1 101; CHECK-NEXT: ldsSize: 0 102; CHECK-NEXT: isEntryFunction: false 103; CHECK-NEXT: noSignedZerosFPMath: true 104; CHECK-NEXT: memoryBound: false 105; CHECK-NEXT: waveLimiter: false 106; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 107; CHECK-NEXT: frameOffsetReg: '$sgpr33' 108; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 109; CHECK-NEXT: argumentInfo: 110; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 111; CHECK-NEXT: mode: 112; CHECK-NEXT: ieee: true 113; CHECK-NEXT: dx10-clamp: true 114; CHECK-NEXT: fp32-input-denormals: true 115; CHECK-NEXT: fp32-output-denormals: true 116; CHECK-NEXT: fp64-fp16-input-denormals: true 117; CHECK-NEXT: fp64-fp16-output-denormals: true 118; CHECK-NEXT: highBitsOf32BitAddress: 0 119; CHECK-NEXT: body: 120define void @function_nsz() #0 { 121 ret void 122} 123 124; CHECK-LABEL: {{^}}name: function_dx10_clamp_off 125; CHECK: mode: 126; CHECK-NEXT: ieee: true 127; CHECK-NEXT: dx10-clamp: false 128; CHECK-NEXT: fp32-input-denormals: true 129; CHECK-NEXT: fp32-output-denormals: true 130; CHECK-NEXT: fp64-fp16-input-denormals: true 131; CHECK-NEXT: fp64-fp16-output-denormals: true 132define void @function_dx10_clamp_off() #1 { 133 ret void 134} 135 136; CHECK-LABEL: {{^}}name: function_ieee_off 137; CHECK: mode: 138; CHECK-NEXT: ieee: false 139; CHECK-NEXT: dx10-clamp: true 140; CHECK-NEXT: fp32-input-denormals: true 141; CHECK-NEXT: fp32-output-denormals: true 142; CHECK-NEXT: fp64-fp16-input-denormals: true 143; CHECK-NEXT: fp64-fp16-output-denormals: true 144define void @function_ieee_off() #2 { 145 ret void 146} 147 148; CHECK-LABEL: {{^}}name: function_ieee_off_dx10_clamp_off 149; CHECK: mode: 150; CHECK-NEXT: ieee: false 151; CHECK-NEXT: dx10-clamp: false 152; CHECK-NEXT: fp32-input-denormals: true 153; CHECK-NEXT: fp32-output-denormals: true 154; CHECK-NEXT: fp64-fp16-input-denormals: true 155; CHECK-NEXT: fp64-fp16-output-denormals: true 156define void @function_ieee_off_dx10_clamp_off() #3 { 157 ret void 158} 159 160; CHECK-LABEL: {{^}}name: high_address_bits 161; CHECK: machineFunctionInfo: 162; CHECK: highBitsOf32BitAddress: 4294934528 163define amdgpu_ps void @high_address_bits() #4 { 164 ret void 165} 166 167attributes #0 = { "no-signed-zeros-fp-math" = "true" } 168attributes #1 = { "amdgpu-dx10-clamp" = "false" } 169attributes #2 = { "amdgpu-ieee" = "false" } 170attributes #3 = { "amdgpu-dx10-clamp" = "false" "amdgpu-ieee" = "false" } 171attributes #4 = { "amdgpu-32bit-address-high-bits"="0xffff8000" } 172