1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -stop-after finalize-isel -o %t.mir %s 2; RUN: llc -run-pass=none -verify-machineinstrs %t.mir -o - | FileCheck %s 3 4; Test that SIMachineFunctionInfo can be round trip serialized through 5; MIR. 6 7@lds = addrspace(3) global [512 x float] undef, align 4 8 9; CHECK-LABEL: {{^}}name: kernel 10; CHECK: machineFunctionInfo: 11; CHECK-NEXT: explicitKernArgSize: 128 12; CHECK-NEXT: maxKernArgAlign: 64 13; CHECK-NEXT: ldsSize: 0 14; CHECK-NEXT: isEntryFunction: true 15; CHECK-NEXT: noSignedZerosFPMath: false 16; CHECK-NEXT: memoryBound: false 17; CHECK-NEXT: waveLimiter: false 18; CHECK-NEXT: hasSpilledSGPRs: false 19; CHECK-NEXT: hasSpilledVGPRs: false 20; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 21; CHECK-NEXT: frameOffsetReg: '$fp_reg' 22; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 23; CHECK-NEXT: argumentInfo: 24; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 25; CHECK-NEXT: kernargSegmentPtr: { reg: '$sgpr4_sgpr5' } 26; CHECK-NEXT: workGroupIDX: { reg: '$sgpr6' } 27; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr7' } 28; CHECK-NEXT: workItemIDX: { reg: '$vgpr0' } 29; CHECK-NEXT: mode: 30; CHECK-NEXT: ieee: true 31; CHECK-NEXT: dx10-clamp: true 32; CHECK-NEXT: fp32-input-denormals: true 33; CHECK-NEXT: fp32-output-denormals: true 34; CHECK-NEXT: fp64-fp16-input-denormals: true 35; CHECK-NEXT: fp64-fp16-output-denormals: true 36; CHECK-NEXT: highBitsOf32BitAddress: 0 37; CHECK-NEXT: body: 38define amdgpu_kernel void @kernel(i32 %arg0, i64 %arg1, <16 x i32> %arg2) { 39 %gep = getelementptr inbounds [512 x float], [512 x float] addrspace(3)* @lds, i32 0, i32 %arg0 40 store float 0.0, float addrspace(3)* %gep, align 4 41 ret void 42} 43 44; CHECK-LABEL: {{^}}name: ps_shader 45; CHECK: machineFunctionInfo: 46; CHECK-NEXT: explicitKernArgSize: 0 47; CHECK-NEXT: maxKernArgAlign: 1 48; CHECK-NEXT: ldsSize: 0 49; CHECK-NEXT: isEntryFunction: true 50; CHECK-NEXT: noSignedZerosFPMath: false 51; CHECK-NEXT: memoryBound: false 52; CHECK-NEXT: waveLimiter: false 53; CHECK-NEXT: hasSpilledSGPRs: false 54; CHECK-NEXT: hasSpilledVGPRs: false 55; CHECK-NEXT: scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 56; CHECK-NEXT: frameOffsetReg: '$fp_reg' 57; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 58; CHECK-NEXT: argumentInfo: 59; CHECK-NEXT: privateSegmentWaveByteOffset: { reg: '$sgpr3' } 60; CHECK-NEXT: implicitBufferPtr: { reg: '$sgpr0_sgpr1' } 61; CHECK-NEXT: mode: 62; CHECK-NEXT: ieee: false 63; CHECK-NEXT: dx10-clamp: true 64; CHECK-NEXT: fp32-input-denormals: true 65; CHECK-NEXT: fp32-output-denormals: true 66; CHECK-NEXT: fp64-fp16-input-denormals: true 67; CHECK-NEXT: fp64-fp16-output-denormals: true 68; CHECK-NEXT: highBitsOf32BitAddress: 0 69; CHECK-NEXT: body: 70define amdgpu_ps void @ps_shader(i32 %arg0, i32 inreg %arg1) { 71 ret void 72} 73 74; CHECK-LABEL: {{^}}name: function 75; CHECK: machineFunctionInfo: 76; CHECK-NEXT: explicitKernArgSize: 0 77; CHECK-NEXT: maxKernArgAlign: 1 78; CHECK-NEXT: ldsSize: 0 79; CHECK-NEXT: isEntryFunction: false 80; CHECK-NEXT: noSignedZerosFPMath: false 81; CHECK-NEXT: memoryBound: false 82; CHECK-NEXT: waveLimiter: false 83; CHECK-NEXT: hasSpilledSGPRs: false 84; CHECK-NEXT: hasSpilledVGPRs: false 85; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 86; CHECK-NEXT: frameOffsetReg: '$sgpr33' 87; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 88; CHECK-NEXT: argumentInfo: 89; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 90; CHECK-NEXT: mode: 91; CHECK-NEXT: ieee: true 92; CHECK-NEXT: dx10-clamp: true 93; CHECK-NEXT: fp32-input-denormals: true 94; CHECK-NEXT: fp32-output-denormals: true 95; CHECK-NEXT: fp64-fp16-input-denormals: true 96; CHECK-NEXT: fp64-fp16-output-denormals: true 97; CHECK-NEXT: highBitsOf32BitAddress: 0 98; CHECK-NEXT: body: 99define void @function() { 100 ret void 101} 102 103; CHECK-LABEL: {{^}}name: function_nsz 104; CHECK: machineFunctionInfo: 105; CHECK-NEXT: explicitKernArgSize: 0 106; CHECK-NEXT: maxKernArgAlign: 1 107; CHECK-NEXT: ldsSize: 0 108; CHECK-NEXT: isEntryFunction: false 109; CHECK-NEXT: noSignedZerosFPMath: true 110; CHECK-NEXT: memoryBound: false 111; CHECK-NEXT: waveLimiter: false 112; CHECK-NEXT: hasSpilledSGPRs: false 113; CHECK-NEXT: hasSpilledVGPRs: false 114; CHECK-NEXT: scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 115; CHECK-NEXT: frameOffsetReg: '$sgpr33' 116; CHECK-NEXT: stackPtrOffsetReg: '$sgpr32' 117; CHECK-NEXT: argumentInfo: 118; CHECK-NEXT: privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } 119; CHECK-NEXT: mode: 120; CHECK-NEXT: ieee: true 121; CHECK-NEXT: dx10-clamp: true 122; CHECK-NEXT: fp32-input-denormals: true 123; CHECK-NEXT: fp32-output-denormals: true 124; CHECK-NEXT: fp64-fp16-input-denormals: true 125; CHECK-NEXT: fp64-fp16-output-denormals: true 126; CHECK-NEXT: highBitsOf32BitAddress: 0 127; CHECK-NEXT: body: 128define void @function_nsz() #0 { 129 ret void 130} 131 132; CHECK-LABEL: {{^}}name: function_dx10_clamp_off 133; CHECK: mode: 134; CHECK-NEXT: ieee: true 135; CHECK-NEXT: dx10-clamp: false 136; CHECK-NEXT: fp32-input-denormals: true 137; CHECK-NEXT: fp32-output-denormals: true 138; CHECK-NEXT: fp64-fp16-input-denormals: true 139; CHECK-NEXT: fp64-fp16-output-denormals: true 140define void @function_dx10_clamp_off() #1 { 141 ret void 142} 143 144; CHECK-LABEL: {{^}}name: function_ieee_off 145; CHECK: mode: 146; CHECK-NEXT: ieee: false 147; CHECK-NEXT: dx10-clamp: true 148; CHECK-NEXT: fp32-input-denormals: true 149; CHECK-NEXT: fp32-output-denormals: true 150; CHECK-NEXT: fp64-fp16-input-denormals: true 151; CHECK-NEXT: fp64-fp16-output-denormals: true 152define void @function_ieee_off() #2 { 153 ret void 154} 155 156; CHECK-LABEL: {{^}}name: function_ieee_off_dx10_clamp_off 157; CHECK: mode: 158; CHECK-NEXT: ieee: false 159; CHECK-NEXT: dx10-clamp: false 160; CHECK-NEXT: fp32-input-denormals: true 161; CHECK-NEXT: fp32-output-denormals: true 162; CHECK-NEXT: fp64-fp16-input-denormals: true 163; CHECK-NEXT: fp64-fp16-output-denormals: true 164define void @function_ieee_off_dx10_clamp_off() #3 { 165 ret void 166} 167 168; CHECK-LABEL: {{^}}name: high_address_bits 169; CHECK: machineFunctionInfo: 170; CHECK: highBitsOf32BitAddress: 4294934528 171define amdgpu_ps void @high_address_bits() #4 { 172 ret void 173} 174 175attributes #0 = { "no-signed-zeros-fp-math" = "true" } 176attributes #1 = { "amdgpu-dx10-clamp" = "false" } 177attributes #2 = { "amdgpu-ieee" = "false" } 178attributes #3 = { "amdgpu-dx10-clamp" = "false" "amdgpu-ieee" = "false" } 179attributes #4 = { "amdgpu-32bit-address-high-bits"="0xffff8000" } 180