1; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32 2; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64 3 4;; Exercise the 'and' LLVM IR: https://llvm.org/docs/LangRef.html#and-instruction 5 6define i1 @and_i1(i1 %a, i1 %b) { 7; LA32-LABEL: and_i1: 8; LA32: # %bb.0: # %entry 9; LA32-NEXT: and $a0, $a0, $a1 10; LA32-NEXT: jirl $zero, $ra, 0 11; 12; LA64-LABEL: and_i1: 13; LA64: # %bb.0: # %entry 14; LA64-NEXT: and $a0, $a0, $a1 15; LA64-NEXT: jirl $zero, $ra, 0 16entry: 17 %r = and i1 %a, %b 18 ret i1 %r 19} 20 21define i8 @and_i8(i8 %a, i8 %b) { 22; LA32-LABEL: and_i8: 23; LA32: # %bb.0: # %entry 24; LA32-NEXT: and $a0, $a0, $a1 25; LA32-NEXT: jirl $zero, $ra, 0 26; 27; LA64-LABEL: and_i8: 28; LA64: # %bb.0: # %entry 29; LA64-NEXT: and $a0, $a0, $a1 30; LA64-NEXT: jirl $zero, $ra, 0 31entry: 32 %r = and i8 %a, %b 33 ret i8 %r 34} 35 36define i16 @and_i16(i16 %a, i16 %b) { 37; LA32-LABEL: and_i16: 38; LA32: # %bb.0: # %entry 39; LA32-NEXT: and $a0, $a0, $a1 40; LA32-NEXT: jirl $zero, $ra, 0 41; 42; LA64-LABEL: and_i16: 43; LA64: # %bb.0: # %entry 44; LA64-NEXT: and $a0, $a0, $a1 45; LA64-NEXT: jirl $zero, $ra, 0 46entry: 47 %r = and i16 %a, %b 48 ret i16 %r 49} 50 51define i32 @and_i32(i32 %a, i32 %b) { 52; LA32-LABEL: and_i32: 53; LA32: # %bb.0: # %entry 54; LA32-NEXT: and $a0, $a0, $a1 55; LA32-NEXT: jirl $zero, $ra, 0 56; 57; LA64-LABEL: and_i32: 58; LA64: # %bb.0: # %entry 59; LA64-NEXT: and $a0, $a0, $a1 60; LA64-NEXT: jirl $zero, $ra, 0 61entry: 62 %r = and i32 %a, %b 63 ret i32 %r 64} 65 66define i64 @and_i64(i64 %a, i64 %b) { 67; LA32-LABEL: and_i64: 68; LA32: # %bb.0: # %entry 69; LA32-NEXT: and $a0, $a0, $a2 70; LA32-NEXT: and $a1, $a1, $a3 71; LA32-NEXT: jirl $zero, $ra, 0 72; 73; LA64-LABEL: and_i64: 74; LA64: # %bb.0: # %entry 75; LA64-NEXT: and $a0, $a0, $a1 76; LA64-NEXT: jirl $zero, $ra, 0 77entry: 78 %r = and i64 %a, %b 79 ret i64 %r 80} 81 82define i1 @and_i1_0(i1 %b) { 83; LA32-LABEL: and_i1_0: 84; LA32: # %bb.0: # %entry 85; LA32-NEXT: move $a0, $zero 86; LA32-NEXT: jirl $zero, $ra, 0 87; 88; LA64-LABEL: and_i1_0: 89; LA64: # %bb.0: # %entry 90; LA64-NEXT: move $a0, $zero 91; LA64-NEXT: jirl $zero, $ra, 0 92entry: 93 %r = and i1 4, %b 94 ret i1 %r 95} 96 97define i1 @and_i1_5(i1 %b) { 98; LA32-LABEL: and_i1_5: 99; LA32: # %bb.0: # %entry 100; LA32-NEXT: jirl $zero, $ra, 0 101; 102; LA64-LABEL: and_i1_5: 103; LA64: # %bb.0: # %entry 104; LA64-NEXT: jirl $zero, $ra, 0 105entry: 106 %r = and i1 5, %b 107 ret i1 %r 108} 109 110define i8 @and_i8_5(i8 %b) { 111; LA32-LABEL: and_i8_5: 112; LA32: # %bb.0: # %entry 113; LA32-NEXT: andi $a0, $a0, 5 114; LA32-NEXT: jirl $zero, $ra, 0 115; 116; LA64-LABEL: and_i8_5: 117; LA64: # %bb.0: # %entry 118; LA64-NEXT: andi $a0, $a0, 5 119; LA64-NEXT: jirl $zero, $ra, 0 120entry: 121 %r = and i8 5, %b 122 ret i8 %r 123} 124 125define i8 @and_i8_257(i8 %b) { 126; LA32-LABEL: and_i8_257: 127; LA32: # %bb.0: # %entry 128; LA32-NEXT: andi $a0, $a0, 1 129; LA32-NEXT: jirl $zero, $ra, 0 130; 131; LA64-LABEL: and_i8_257: 132; LA64: # %bb.0: # %entry 133; LA64-NEXT: andi $a0, $a0, 1 134; LA64-NEXT: jirl $zero, $ra, 0 135entry: 136 %r = and i8 257, %b 137 ret i8 %r 138} 139 140define i16 @and_i16_5(i16 %b) { 141; LA32-LABEL: and_i16_5: 142; LA32: # %bb.0: # %entry 143; LA32-NEXT: andi $a0, $a0, 5 144; LA32-NEXT: jirl $zero, $ra, 0 145; 146; LA64-LABEL: and_i16_5: 147; LA64: # %bb.0: # %entry 148; LA64-NEXT: andi $a0, $a0, 5 149; LA64-NEXT: jirl $zero, $ra, 0 150entry: 151 %r = and i16 5, %b 152 ret i16 %r 153} 154 155define i16 @and_i16_0x1000(i16 %b) { 156; LA32-LABEL: and_i16_0x1000: 157; LA32: # %bb.0: # %entry 158; LA32-NEXT: lu12i.w $a1, 1 159; LA32-NEXT: and $a0, $a0, $a1 160; LA32-NEXT: jirl $zero, $ra, 0 161; 162; LA64-LABEL: and_i16_0x1000: 163; LA64: # %bb.0: # %entry 164; LA64-NEXT: lu12i.w $a1, 1 165; LA64-NEXT: and $a0, $a0, $a1 166; LA64-NEXT: jirl $zero, $ra, 0 167entry: 168 %r = and i16 4096, %b 169 ret i16 %r 170} 171 172define i16 @and_i16_0x10001(i16 %b) { 173; LA32-LABEL: and_i16_0x10001: 174; LA32: # %bb.0: # %entry 175; LA32-NEXT: andi $a0, $a0, 1 176; LA32-NEXT: jirl $zero, $ra, 0 177; 178; LA64-LABEL: and_i16_0x10001: 179; LA64: # %bb.0: # %entry 180; LA64-NEXT: andi $a0, $a0, 1 181; LA64-NEXT: jirl $zero, $ra, 0 182entry: 183 %r = and i16 65537, %b 184 ret i16 %r 185} 186 187define i32 @and_i32_5(i32 %b) { 188; LA32-LABEL: and_i32_5: 189; LA32: # %bb.0: # %entry 190; LA32-NEXT: andi $a0, $a0, 5 191; LA32-NEXT: jirl $zero, $ra, 0 192; 193; LA64-LABEL: and_i32_5: 194; LA64: # %bb.0: # %entry 195; LA64-NEXT: andi $a0, $a0, 5 196; LA64-NEXT: jirl $zero, $ra, 0 197entry: 198 %r = and i32 5, %b 199 ret i32 %r 200} 201 202define i32 @and_i32_0x1000(i32 %b) { 203; LA32-LABEL: and_i32_0x1000: 204; LA32: # %bb.0: # %entry 205; LA32-NEXT: lu12i.w $a1, 1 206; LA32-NEXT: and $a0, $a0, $a1 207; LA32-NEXT: jirl $zero, $ra, 0 208; 209; LA64-LABEL: and_i32_0x1000: 210; LA64: # %bb.0: # %entry 211; LA64-NEXT: lu12i.w $a1, 1 212; LA64-NEXT: and $a0, $a0, $a1 213; LA64-NEXT: jirl $zero, $ra, 0 214entry: 215 %r = and i32 4096, %b 216 ret i32 %r 217} 218 219define i32 @and_i32_0x100000001(i32 %b) { 220; LA32-LABEL: and_i32_0x100000001: 221; LA32: # %bb.0: # %entry 222; LA32-NEXT: andi $a0, $a0, 1 223; LA32-NEXT: jirl $zero, $ra, 0 224; 225; LA64-LABEL: and_i32_0x100000001: 226; LA64: # %bb.0: # %entry 227; LA64-NEXT: andi $a0, $a0, 1 228; LA64-NEXT: jirl $zero, $ra, 0 229entry: 230 %r = and i32 4294967297, %b 231 ret i32 %r 232} 233 234define i64 @and_i64_5(i64 %b) { 235; LA32-LABEL: and_i64_5: 236; LA32: # %bb.0: # %entry 237; LA32-NEXT: andi $a0, $a0, 5 238; LA32-NEXT: move $a1, $zero 239; LA32-NEXT: jirl $zero, $ra, 0 240; 241; LA64-LABEL: and_i64_5: 242; LA64: # %bb.0: # %entry 243; LA64-NEXT: andi $a0, $a0, 5 244; LA64-NEXT: jirl $zero, $ra, 0 245entry: 246 %r = and i64 5, %b 247 ret i64 %r 248} 249 250define i64 @and_i64_0x1000(i64 %b) { 251; LA32-LABEL: and_i64_0x1000: 252; LA32: # %bb.0: # %entry 253; LA32-NEXT: lu12i.w $a1, 1 254; LA32-NEXT: and $a0, $a0, $a1 255; LA32-NEXT: move $a1, $zero 256; LA32-NEXT: jirl $zero, $ra, 0 257; 258; LA64-LABEL: and_i64_0x1000: 259; LA64: # %bb.0: # %entry 260; LA64-NEXT: lu12i.w $a1, 1 261; LA64-NEXT: and $a0, $a0, $a1 262; LA64-NEXT: jirl $zero, $ra, 0 263entry: 264 %r = and i64 4096, %b 265 ret i64 %r 266} 267