1; RUN: llc -march=hexagon -hexagon-hvx-widen=32 < %s | FileCheck %s
2
3; Test that the Hexagon Vector Combine pass computes the address
4; correctly when the loading objects that contain extra padding
5; between successive objects.
6
7; CHECK: [[REG:r[0-9]+]] = add(r{{[0-9]+}},#2432)
8; CHECK: = vmem([[REG]]+#0)
9
10define dllexport void @test(i8* %a0) local_unnamed_addr #0 {
11b0:
12  %v0 = add nuw nsw i32 0, 3040
13  %v1 = load i8, i8* undef, align 1
14  %v2 = insertelement <19 x i8> undef, i8 %v1, i32 0
15  %v3 = shufflevector <19 x i8> %v2, <19 x i8> undef, <19 x i32> zeroinitializer
16  %v4 = getelementptr inbounds i8, i8* %a0, i32 %v0
17  %v5 = bitcast i8* %v4 to <19 x i8>*
18  %v6 = load <19 x i8>, <19 x i8>* %v5, align 1
19  %v7 = mul <19 x i8> %v3, %v6
20  %v8 = add <19 x i8> %v7, zeroinitializer
21  %v9 = add <19 x i8> zeroinitializer, %v8
22  %v10 = add <19 x i8> zeroinitializer, %v9
23  %v11 = add <19 x i8> zeroinitializer, %v10
24  %v12 = add <19 x i8> zeroinitializer, %v11
25  %v13 = add <19 x i8> zeroinitializer, %v12
26  %v14 = add <19 x i8> zeroinitializer, %v13
27  %v15 = add <19 x i8> zeroinitializer, %v14
28  %v16 = add <19 x i8> zeroinitializer, %v15
29  %v17 = add <19 x i8> zeroinitializer, %v16
30  %v18 = add <19 x i8> zeroinitializer, %v17
31  %v19 = load i8, i8* undef, align 1
32  %v20 = insertelement <19 x i8> undef, i8 %v19, i32 0
33  %v21 = shufflevector <19 x i8> %v20, <19 x i8> undef, <19 x i32> zeroinitializer
34  %v22 = add nuw nsw i32 0, 5472
35  %v23 = getelementptr inbounds i8, i8* %a0, i32 %v22
36  %v24 = bitcast i8* %v23 to <19 x i8>*
37  %v25 = load <19 x i8>, <19 x i8>* %v24, align 1
38  %v26 = mul <19 x i8> %v21, %v25
39  %v27 = add <19 x i8> %v26, %v18
40  %v28 = add <19 x i8> zeroinitializer, %v27
41  %v29 = add <19 x i8> zeroinitializer, %v28
42  %v30 = add <19 x i8> zeroinitializer, %v29
43  %v31 = bitcast i8* %a0 to <19 x i8>*
44  store <19 x i8> %v30, <19 x i8>* %v31, align 1
45  ret void
46}
47
48attributes #0 = { "target-features"="+hvxv66,+hvx-length128b" }
49