1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; Make sure this doesn't crash.
4; CHECK: = mem
5
6target triple = "hexagon"
7
8; Function Attrs: nounwind readnone
9declare i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32, i32) #0
10
11; Function Attrs: nounwind readonly
12define dso_local signext i16 @f0(i16* nocapture readonly %a0) local_unnamed_addr #1 {
13b0:
14  %v0 = load <8 x i16>, <8 x i16>* undef, align 2, !tbaa !0
15  %v1 = shufflevector <8 x i16> %v0, <8 x i16> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
16  %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
17  %v3 = lshr <16 x i16> %v2, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
18  %v4 = and <16 x i16> %v3, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
19  %v5 = extractelement <16 x i16> %v4, i32 0
20  %v6 = sext i16 %v5 to i32
21  %v7 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v6, i32 16)
22  %v8 = trunc i32 %v7 to i16
23  %v9 = icmp sgt i16 %v8, -1
24  %v10 = select i1 %v9, i16 0, i16 1
25  ret i16 %v10
26}
27
28attributes #0 = { nounwind readnone }
29attributes #1 = { nounwind readonly "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
30
31!0 = !{!1, !1, i64 0}
32!1 = !{!"short", !2, i64 0}
33!2 = !{!"omnipotent char", !3, i64 0}
34!3 = !{!"Simple C/C++ TBAA"}
35