1; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
2
3; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
4; XFAIL: arm,aarch64
5
6; Hexagon runs passes that renumber the basic blocks, causing this test
7; to fail.
8; XFAIL: hexagon
9
10; Make sure we have the correct weight attached to each successor.
11define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
12; CHECK-LABEL: Machine code for function test2:
13entry:
14  %conv = sext i32 %x to i64
15  switch i64 %conv, label %return [
16    i64 0, label %sw.bb
17    i64 1, label %sw.bb
18    i64 4, label %sw.bb
19    i64 5, label %sw.bb1
20  ], !prof !0
21; CHECK: BB#0: derived from LLVM BB %entry
22; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}75.29%) BB#4({{[0-9a-fx/= ]+}}24.71%)
23; CHECK: BB#4: derived from LLVM BB %entry
24; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}47.62%) BB#5({{[0-9a-fx/= ]+}}52.38%)
25; CHECK: BB#5: derived from LLVM BB %entry
26; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%)
27
28sw.bb:
29  br label %return
30
31sw.bb1:
32  br label %return
33
34return:
35  %retval.0 = phi i32 [ 5, %sw.bb1 ], [ 1, %sw.bb ], [ 0, %entry ]
36  ret i32 %retval.0
37}
38
39!0 = !{!"branch_weights", i32 7, i32 6, i32 4, i32 4, i32 64}
40
41
42declare void @g(i32)
43define void @left_leaning_weight_balanced_tree(i32 %x) {
44entry:
45  switch i32 %x, label %return [
46    i32 0,  label %bb0
47    i32 100, label %bb1
48    i32 200, label %bb2
49    i32 300, label %bb3
50    i32 400, label %bb4
51    i32 500, label %bb5
52  ], !prof !1
53bb0: tail call void @g(i32 0) br label %return
54bb1: tail call void @g(i32 1) br label %return
55bb2: tail call void @g(i32 2) br label %return
56bb3: tail call void @g(i32 3) br label %return
57bb4: tail call void @g(i32 4) br label %return
58bb5: tail call void @g(i32 5) br label %return
59return: ret void
60
61; Check that we set branch weights on the pivot cmp instruction correctly.
62; Cases {0,10,20,30} go on the left with weight 13; cases {40,50} go on the
63; right with weight 20.
64;
65; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree:
66; CHECK: BB#0: derived from LLVM BB %entry
67; CHECK-NOT: Successors
68; CHECK: Successors according to CFG: BB#8({{[0-9a-fx/= ]+}}39.71%) BB#9({{[0-9a-fx/= ]+}}60.29%)
69}
70
71!1 = !{!"branch_weights",
72  ; Default:
73  i32 1,
74  ; Case 0, 100, 200:
75  i32 10, i32 1, i32 1,
76  ; Case 300, 400, 500:
77  i32 1, i32 10, i32 10}
78