1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1
3; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP
4; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP
5; RUN: llc < %s -mtriple=armv5t-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMNODPS
6; RUN: llc < %s -mtriple=armv5te-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP
7; RUN: llc < %s -mtriple=armv5te-none-eabi -mattr=+dsp | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMBASEDSP
8; RUN: llc < %s -mtriple=armv6-none-eabi | FileCheck %s --check-prefix=CHECK-ARM --check-prefix=CHECK-ARMDSP
9
10declare i4 @llvm.sadd.sat.i4(i4, i4)
11declare i8 @llvm.sadd.sat.i8(i8, i8)
12declare i16 @llvm.sadd.sat.i16(i16, i16)
13declare i32 @llvm.sadd.sat.i32(i32, i32)
14declare i64 @llvm.sadd.sat.i64(i64, i64)
15
16define i32 @func(i32 %x, i32 %y) nounwind {
17; CHECK-T1-LABEL: func:
18; CHECK-T1:       @ %bb.0:
19; CHECK-T1-NEXT:    adds r0, r0, r1
20; CHECK-T1-NEXT:    bvc .LBB0_2
21; CHECK-T1-NEXT:  @ %bb.1:
22; CHECK-T1-NEXT:    asrs r1, r0, #31
23; CHECK-T1-NEXT:    movs r0, #1
24; CHECK-T1-NEXT:    lsls r0, r0, #31
25; CHECK-T1-NEXT:    eors r0, r1
26; CHECK-T1-NEXT:  .LBB0_2:
27; CHECK-T1-NEXT:    bx lr
28;
29; CHECK-T2NODSP-LABEL: func:
30; CHECK-T2NODSP:       @ %bb.0:
31; CHECK-T2NODSP-NEXT:    adds r0, r0, r1
32; CHECK-T2NODSP-NEXT:    mov.w r1, #-2147483648
33; CHECK-T2NODSP-NEXT:    it vs
34; CHECK-T2NODSP-NEXT:    eorvs.w r0, r1, r0, asr #31
35; CHECK-T2NODSP-NEXT:    bx lr
36;
37; CHECK-T2DSP-LABEL: func:
38; CHECK-T2DSP:       @ %bb.0:
39; CHECK-T2DSP-NEXT:    qadd r0, r0, r1
40; CHECK-T2DSP-NEXT:    bx lr
41;
42; CHECK-ARMNODPS-LABEL: func:
43; CHECK-ARMNODPS:       @ %bb.0:
44; CHECK-ARMNODPS-NEXT:    adds r0, r0, r1
45; CHECK-ARMNODPS-NEXT:    mov r1, #-2147483648
46; CHECK-ARMNODPS-NEXT:    eorvs r0, r1, r0, asr #31
47; CHECK-ARMNODPS-NEXT:    bx lr
48;
49; CHECK-ARMBASEDSP-LABEL: func:
50; CHECK-ARMBASEDSP:       @ %bb.0:
51; CHECK-ARMBASEDSP-NEXT:    qadd r0, r0, r1
52; CHECK-ARMBASEDSP-NEXT:    bx lr
53;
54; CHECK-ARMDSP-LABEL: func:
55; CHECK-ARMDSP:       @ %bb.0:
56; CHECK-ARMDSP-NEXT:    qadd r0, r0, r1
57; CHECK-ARMDSP-NEXT:    bx lr
58  %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %y)
59  ret i32 %tmp
60}
61
62define i64 @func2(i64 %x, i64 %y) nounwind {
63; CHECK-T1-LABEL: func2:
64; CHECK-T1:       @ %bb.0:
65; CHECK-T1-NEXT:    .save {r4, lr}
66; CHECK-T1-NEXT:    push {r4, lr}
67; CHECK-T1-NEXT:    mov r4, r1
68; CHECK-T1-NEXT:    eors r1, r3
69; CHECK-T1-NEXT:    adds r2, r0, r2
70; CHECK-T1-NEXT:    adcs r3, r4
71; CHECK-T1-NEXT:    eors r4, r3
72; CHECK-T1-NEXT:    bics r4, r1
73; CHECK-T1-NEXT:    asrs r1, r3, #31
74; CHECK-T1-NEXT:    cmp r4, #0
75; CHECK-T1-NEXT:    mov r0, r1
76; CHECK-T1-NEXT:    bmi .LBB1_2
77; CHECK-T1-NEXT:  @ %bb.1:
78; CHECK-T1-NEXT:    mov r0, r2
79; CHECK-T1-NEXT:  .LBB1_2:
80; CHECK-T1-NEXT:    cmp r4, #0
81; CHECK-T1-NEXT:    bmi .LBB1_4
82; CHECK-T1-NEXT:  @ %bb.3:
83; CHECK-T1-NEXT:    mov r1, r3
84; CHECK-T1-NEXT:    pop {r4, pc}
85; CHECK-T1-NEXT:  .LBB1_4:
86; CHECK-T1-NEXT:    movs r2, #1
87; CHECK-T1-NEXT:    lsls r2, r2, #31
88; CHECK-T1-NEXT:    eors r1, r2
89; CHECK-T1-NEXT:    pop {r4, pc}
90;
91; CHECK-T2-LABEL: func2:
92; CHECK-T2:       @ %bb.0:
93; CHECK-T2-NEXT:    adds r0, r0, r2
94; CHECK-T2-NEXT:    eor.w r12, r1, r3
95; CHECK-T2-NEXT:    adc.w r2, r1, r3
96; CHECK-T2-NEXT:    eors r1, r2
97; CHECK-T2-NEXT:    bic.w r1, r1, r12
98; CHECK-T2-NEXT:    cmp r1, #0
99; CHECK-T2-NEXT:    mov.w r1, #-2147483648
100; CHECK-T2-NEXT:    it mi
101; CHECK-T2-NEXT:    asrmi r0, r2, #31
102; CHECK-T2-NEXT:    it mi
103; CHECK-T2-NEXT:    eormi.w r2, r1, r2, asr #31
104; CHECK-T2-NEXT:    mov r1, r2
105; CHECK-T2-NEXT:    bx lr
106;
107; CHECK-ARM-LABEL: func2:
108; CHECK-ARM:       @ %bb.0:
109; CHECK-ARM-NEXT:    adds r0, r0, r2
110; CHECK-ARM-NEXT:    eor r12, r1, r3
111; CHECK-ARM-NEXT:    adc r2, r1, r3
112; CHECK-ARM-NEXT:    eor r1, r1, r2
113; CHECK-ARM-NEXT:    bic r1, r1, r12
114; CHECK-ARM-NEXT:    cmp r1, #0
115; CHECK-ARM-NEXT:    mov r1, #-2147483648
116; CHECK-ARM-NEXT:    asrmi r0, r2, #31
117; CHECK-ARM-NEXT:    eormi r2, r1, r2, asr #31
118; CHECK-ARM-NEXT:    mov r1, r2
119; CHECK-ARM-NEXT:    bx lr
120  %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %y)
121  ret i64 %tmp
122}
123
124define signext i16 @func16(i16 signext %x, i16 signext %y) nounwind {
125; CHECK-T1-LABEL: func16:
126; CHECK-T1:       @ %bb.0:
127; CHECK-T1-NEXT:    adds r0, r0, r1
128; CHECK-T1-NEXT:    ldr r1, .LCPI2_0
129; CHECK-T1-NEXT:    cmp r0, r1
130; CHECK-T1-NEXT:    blt .LBB2_2
131; CHECK-T1-NEXT:  @ %bb.1:
132; CHECK-T1-NEXT:    mov r0, r1
133; CHECK-T1-NEXT:  .LBB2_2:
134; CHECK-T1-NEXT:    ldr r1, .LCPI2_1
135; CHECK-T1-NEXT:    cmp r0, r1
136; CHECK-T1-NEXT:    bgt .LBB2_4
137; CHECK-T1-NEXT:  @ %bb.3:
138; CHECK-T1-NEXT:    mov r0, r1
139; CHECK-T1-NEXT:  .LBB2_4:
140; CHECK-T1-NEXT:    bx lr
141; CHECK-T1-NEXT:    .p2align 2
142; CHECK-T1-NEXT:  @ %bb.5:
143; CHECK-T1-NEXT:  .LCPI2_0:
144; CHECK-T1-NEXT:    .long 32767 @ 0x7fff
145; CHECK-T1-NEXT:  .LCPI2_1:
146; CHECK-T1-NEXT:    .long 4294934528 @ 0xffff8000
147;
148; CHECK-T2NODSP-LABEL: func16:
149; CHECK-T2NODSP:       @ %bb.0:
150; CHECK-T2NODSP-NEXT:    add r0, r1
151; CHECK-T2NODSP-NEXT:    ssat r0, #16, r0
152; CHECK-T2NODSP-NEXT:    bx lr
153;
154; CHECK-T2DSP-LABEL: func16:
155; CHECK-T2DSP:       @ %bb.0:
156; CHECK-T2DSP-NEXT:    qadd16 r0, r0, r1
157; CHECK-T2DSP-NEXT:    sxth r0, r0
158; CHECK-T2DSP-NEXT:    bx lr
159;
160; CHECK-ARMNODPS-LABEL: func16:
161; CHECK-ARMNODPS:       @ %bb.0:
162; CHECK-ARMNODPS-NEXT:    add r0, r0, r1
163; CHECK-ARMNODPS-NEXT:    mov r1, #255
164; CHECK-ARMNODPS-NEXT:    orr r1, r1, #32512
165; CHECK-ARMNODPS-NEXT:    cmp r0, r1
166; CHECK-ARMNODPS-NEXT:    movlt r1, r0
167; CHECK-ARMNODPS-NEXT:    ldr r0, .LCPI2_0
168; CHECK-ARMNODPS-NEXT:    cmn r1, #32768
169; CHECK-ARMNODPS-NEXT:    movgt r0, r1
170; CHECK-ARMNODPS-NEXT:    bx lr
171; CHECK-ARMNODPS-NEXT:    .p2align 2
172; CHECK-ARMNODPS-NEXT:  @ %bb.1:
173; CHECK-ARMNODPS-NEXT:  .LCPI2_0:
174; CHECK-ARMNODPS-NEXT:    .long 4294934528 @ 0xffff8000
175;
176; CHECK-ARMBASEDSP-LABEL: func16:
177; CHECK-ARMBASEDSP:       @ %bb.0:
178; CHECK-ARMBASEDSP-NEXT:    lsl r0, r0, #16
179; CHECK-ARMBASEDSP-NEXT:    lsl r1, r1, #16
180; CHECK-ARMBASEDSP-NEXT:    qadd r0, r0, r1
181; CHECK-ARMBASEDSP-NEXT:    asr r0, r0, #16
182; CHECK-ARMBASEDSP-NEXT:    bx lr
183;
184; CHECK-ARMDSP-LABEL: func16:
185; CHECK-ARMDSP:       @ %bb.0:
186; CHECK-ARMDSP-NEXT:    qadd16 r0, r0, r1
187; CHECK-ARMDSP-NEXT:    sxth r0, r0
188; CHECK-ARMDSP-NEXT:    bx lr
189  %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y)
190  ret i16 %tmp
191}
192
193define signext i8 @func8(i8 signext %x, i8 signext %y) nounwind {
194; CHECK-T1-LABEL: func8:
195; CHECK-T1:       @ %bb.0:
196; CHECK-T1-NEXT:    adds r0, r0, r1
197; CHECK-T1-NEXT:    movs r1, #127
198; CHECK-T1-NEXT:    cmp r0, #127
199; CHECK-T1-NEXT:    blt .LBB3_2
200; CHECK-T1-NEXT:  @ %bb.1:
201; CHECK-T1-NEXT:    mov r0, r1
202; CHECK-T1-NEXT:  .LBB3_2:
203; CHECK-T1-NEXT:    mvns r1, r1
204; CHECK-T1-NEXT:    cmp r0, r1
205; CHECK-T1-NEXT:    bgt .LBB3_4
206; CHECK-T1-NEXT:  @ %bb.3:
207; CHECK-T1-NEXT:    mov r0, r1
208; CHECK-T1-NEXT:  .LBB3_4:
209; CHECK-T1-NEXT:    bx lr
210;
211; CHECK-T2NODSP-LABEL: func8:
212; CHECK-T2NODSP:       @ %bb.0:
213; CHECK-T2NODSP-NEXT:    add r0, r1
214; CHECK-T2NODSP-NEXT:    ssat r0, #8, r0
215; CHECK-T2NODSP-NEXT:    bx lr
216;
217; CHECK-T2DSP-LABEL: func8:
218; CHECK-T2DSP:       @ %bb.0:
219; CHECK-T2DSP-NEXT:    qadd8 r0, r0, r1
220; CHECK-T2DSP-NEXT:    sxtb r0, r0
221; CHECK-T2DSP-NEXT:    bx lr
222;
223; CHECK-ARMNODPS-LABEL: func8:
224; CHECK-ARMNODPS:       @ %bb.0:
225; CHECK-ARMNODPS-NEXT:    add r0, r0, r1
226; CHECK-ARMNODPS-NEXT:    cmp r0, #127
227; CHECK-ARMNODPS-NEXT:    movge r0, #127
228; CHECK-ARMNODPS-NEXT:    cmn r0, #128
229; CHECK-ARMNODPS-NEXT:    mvnle r0, #127
230; CHECK-ARMNODPS-NEXT:    bx lr
231;
232; CHECK-ARMBASEDSP-LABEL: func8:
233; CHECK-ARMBASEDSP:       @ %bb.0:
234; CHECK-ARMBASEDSP-NEXT:    lsl r0, r0, #24
235; CHECK-ARMBASEDSP-NEXT:    lsl r1, r1, #24
236; CHECK-ARMBASEDSP-NEXT:    qadd r0, r0, r1
237; CHECK-ARMBASEDSP-NEXT:    asr r0, r0, #24
238; CHECK-ARMBASEDSP-NEXT:    bx lr
239;
240; CHECK-ARMDSP-LABEL: func8:
241; CHECK-ARMDSP:       @ %bb.0:
242; CHECK-ARMDSP-NEXT:    qadd8 r0, r0, r1
243; CHECK-ARMDSP-NEXT:    sxtb r0, r0
244; CHECK-ARMDSP-NEXT:    bx lr
245  %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %y)
246  ret i8 %tmp
247}
248
249define signext i4 @func3(i4 signext %x, i4 signext %y) nounwind {
250; CHECK-T1-LABEL: func3:
251; CHECK-T1:       @ %bb.0:
252; CHECK-T1-NEXT:    adds r0, r0, r1
253; CHECK-T1-NEXT:    movs r1, #7
254; CHECK-T1-NEXT:    cmp r0, #7
255; CHECK-T1-NEXT:    blt .LBB4_2
256; CHECK-T1-NEXT:  @ %bb.1:
257; CHECK-T1-NEXT:    mov r0, r1
258; CHECK-T1-NEXT:  .LBB4_2:
259; CHECK-T1-NEXT:    mvns r1, r1
260; CHECK-T1-NEXT:    cmp r0, r1
261; CHECK-T1-NEXT:    bgt .LBB4_4
262; CHECK-T1-NEXT:  @ %bb.3:
263; CHECK-T1-NEXT:    mov r0, r1
264; CHECK-T1-NEXT:  .LBB4_4:
265; CHECK-T1-NEXT:    bx lr
266;
267; CHECK-T2NODSP-LABEL: func3:
268; CHECK-T2NODSP:       @ %bb.0:
269; CHECK-T2NODSP-NEXT:    add r0, r1
270; CHECK-T2NODSP-NEXT:    ssat r0, #4, r0
271; CHECK-T2NODSP-NEXT:    bx lr
272;
273; CHECK-T2DSP-LABEL: func3:
274; CHECK-T2DSP:       @ %bb.0:
275; CHECK-T2DSP-NEXT:    lsls r1, r1, #28
276; CHECK-T2DSP-NEXT:    lsls r0, r0, #28
277; CHECK-T2DSP-NEXT:    qadd r0, r0, r1
278; CHECK-T2DSP-NEXT:    asrs r0, r0, #28
279; CHECK-T2DSP-NEXT:    bx lr
280;
281; CHECK-ARMNODPS-LABEL: func3:
282; CHECK-ARMNODPS:       @ %bb.0:
283; CHECK-ARMNODPS-NEXT:    add r0, r0, r1
284; CHECK-ARMNODPS-NEXT:    cmp r0, #7
285; CHECK-ARMNODPS-NEXT:    movge r0, #7
286; CHECK-ARMNODPS-NEXT:    cmn r0, #8
287; CHECK-ARMNODPS-NEXT:    mvnle r0, #7
288; CHECK-ARMNODPS-NEXT:    bx lr
289;
290; CHECK-ARMBASEDSP-LABEL: func3:
291; CHECK-ARMBASEDSP:       @ %bb.0:
292; CHECK-ARMBASEDSP-NEXT:    lsl r0, r0, #28
293; CHECK-ARMBASEDSP-NEXT:    lsl r1, r1, #28
294; CHECK-ARMBASEDSP-NEXT:    qadd r0, r0, r1
295; CHECK-ARMBASEDSP-NEXT:    asr r0, r0, #28
296; CHECK-ARMBASEDSP-NEXT:    bx lr
297;
298; CHECK-ARMDSP-LABEL: func3:
299; CHECK-ARMDSP:       @ %bb.0:
300; CHECK-ARMDSP-NEXT:    lsl r0, r0, #28
301; CHECK-ARMDSP-NEXT:    lsl r1, r1, #28
302; CHECK-ARMDSP-NEXT:    qadd r0, r0, r1
303; CHECK-ARMDSP-NEXT:    asr r0, r0, #28
304; CHECK-ARMDSP-NEXT:    bx lr
305  %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %y)
306  ret i4 %tmp
307}
308