1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s 2; RUN: llc < %s -mtriple=thumbv6m-apple-ios -mcpu=cortex-m0 -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-T1 3%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 } 4 5@src = external global %struct.x 6@dst = external global %struct.x 7 8@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1 9@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1 10@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1 11@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR \00", align 1 12@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1 13@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1 14@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16 15 16define i32 @t0() { 17entry: 18; CHECK-LABEL: t0: 19; CHECK: vldr [[REG1:d[0-9]+]], 20; CHECK: vstr [[REG1]], 21; CHECK-T1-LABEL: t0: 22; CHECK-T1: ldrb [[TREG1:r[0-9]]], 23; CHECK-T1: strb [[TREG1]], 24; CHECK-T1: ldrh [[TREG2:r[0-9]]], 25; CHECK-T1: strh [[TREG2]] 26 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false) 27 ret i32 0 28} 29 30define void @t1(i8* nocapture %C) nounwind { 31entry: 32; CHECK-LABEL: t1: 33; CHECK: movs [[INC:r[0-9]+]], #15 34; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1], [[INC]] 35; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0], [[INC]] 36; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] 37; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0] 38; CHECK-T1-LABEL: t1: 39; CHECK-T1: bl _memcpy 40 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false) 41 ret void 42} 43 44define void @t2(i8* nocapture %C) nounwind { 45entry: 46; CHECK-LABEL: t2: 47; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]! 48; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]! 49; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1] 50; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]! 51; CHECK: movw [[REG2:r[0-9]+]], #16716 52; CHECK: movt [[REG2:r[0-9]+]], #72 53; CHECK: str [[REG2]], [r0] 54; CHECK-T1-LABEL: t2: 55; CHECK-T1: bl _memcpy 56 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false) 57 ret void 58} 59 60define void @t3(i8* nocapture %C) nounwind { 61entry: 62; CHECK-LABEL: t3: 63; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]! 64; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]! 65; CHECK: vldr d{{[0-9]+}}, [r1] 66; CHECK: vst1.8 {d{{[0-9]+}}}, [r0] 67; CHECK-T1-LABEL: t3: 68; CHECK-T1: bl _memcpy 69 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false) 70 ret void 71} 72 73define void @t4(i8* nocapture %C) nounwind { 74entry: 75; CHECK-LABEL: t4: 76; CHECK: vld1.64 {[[REG3:d[0-9]+]], [[REG4:d[0-9]+]]}, [r1] 77; CHECK: vst1.8 {[[REG3]], [[REG4]]}, [r0]! 78; CHECK: strh [[REG5:r[0-9]+]], [r0] 79; CHECK-T1-LABEL: t4: 80; CHECK-T1: bl _memcpy 81 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false) 82 ret void 83} 84 85define void @t5(i8* nocapture %C) nounwind { 86entry: 87; CHECK-LABEL: t5: 88; CHECK: movw [[REG5:r[0-9]+]], #21337 89; CHECK: movt [[REG5]], #84 90; CHECK: str.w [[REG5]], [r0, #3] 91; CHECK: movw [[REG7:r[0-9]+]], #18500 92; CHECK: movt [[REG7:r[0-9]+]], #22866 93; CHECK: str [[REG7]] 94; CHECK-T1-LABEL: t5: 95; CHECK-T1: bl _memcpy 96 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false) 97 ret void 98} 99 100define void @t6() nounwind { 101entry: 102; CHECK-LABEL: t6: 103; CHECK: vldr [[REG9:d[0-9]+]], [r0] 104; CHECK: vstr [[REG9]], [r1] 105; CHECK: adds r1, #6 106; CHECK: adds r0, #6 107; CHECK: vld1.16 108; CHECK: vst1.16 109; CHECK-T1-LABEL: t6: 110; CHECK-T1: movs [[TREG5:r[0-9]]], 111; CHECK-T1: strh [[TREG5]], 112; CHECK-T1: ldr [[TREG6:r[0-9]]], 113; CHECK-T1: str [[TREG6]] 114 call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false) 115 ret void 116} 117 118%struct.Foo = type { i32, i32, i32, i32 } 119 120define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind { 121entry: 122; CHECK-LABEL: t7: 123; CHECK: vld1.32 124; CHECK: vst1.32 125; CHECK-T1-LABEL: t7: 126; CHECK-T1: ldr 127; CHECK-T1: str 128 %0 = bitcast %struct.Foo* %a to i8* 129 %1 = bitcast %struct.Foo* %b to i8* 130 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false) 131 ret void 132} 133 134declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind 135declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind 136