1; RUN: llc < %s -mtriple=thumbv7m-none-eabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V7
2; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8
3; RUN: llc < %s -mtriple=thumbv8m.base-none-eabi | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V8
4
5; CHECK-LABEL: f0:
6; CHECK-NOT: ldrexd
7define i64 @f0(i64* %p) nounwind readonly {
8entry:
9  %0 = load atomic i64, i64* %p seq_cst, align 8
10  ret i64 %0
11}
12
13; CHECK-LABEL: f1:
14; CHECK-NOT: strexd
15define void @f1(i64* %p) nounwind readonly {
16entry:
17  store atomic i64 0, i64* %p seq_cst, align 8
18  ret void
19}
20
21; CHECK-LABEL: f2:
22; CHECK-NOT: ldrexd
23; CHECK-NOT: strexd
24define i64 @f2(i64* %p) nounwind readonly {
25entry:
26  %0 = atomicrmw add i64* %p, i64 1 seq_cst
27  ret i64 %0
28}
29
30; CHECK-LABEL: f3:
31; CHECK-V7: ldr
32; CHECK-V8: lda
33define i32 @f3(i32* %p) nounwind readonly {
34entry:
35  %0 = load atomic i32, i32* %p seq_cst, align 4
36  ret i32 %0
37}
38
39; CHECK-LABEL: f4:
40; CHECK-V7: ldrb
41; CHECK-V8: ldab
42define i8 @f4(i8* %p) nounwind readonly {
43entry:
44  %0 = load atomic i8, i8* %p seq_cst, align 4
45  ret i8 %0
46}
47
48; CHECK-LABEL: f5:
49; CHECK-V7: str
50; CHECK-V8: stl
51define void @f5(i32* %p) nounwind readonly {
52entry:
53  store atomic i32 0, i32* %p seq_cst, align 4
54  ret void
55}
56
57; CHECK-LABEL: f6:
58; CHECK-V7: ldrex
59; CHECK-V7: strex
60; CHECK-V8: ldaex
61; CHECK-V8: stlex
62define i32 @f6(i32* %p) nounwind readonly {
63entry:
64  %0 = atomicrmw add i32* %p, i32 1 seq_cst
65  ret i32 %0
66}
67