1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s
3# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s
4
5# Make sure spill/restore of 192 bit registers works. We have to
6# settle for a MIR test for now since inlineasm fails without 192-bit
7# MVT.
8
9---
10name: spill_restore_sgpr192
11tracksRegLiveness: true
12machineFunctionInfo:
13  scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
14  stackPtrOffsetReg: $sgpr32
15body: |
16  ; SPILLED-LABEL: name: spill_restore_sgpr192
17  ; SPILLED: bb.0:
18  ; SPILLED-NEXT:   successors: %bb.1(0x80000000)
19  ; SPILLED-NEXT: {{  $}}
20  ; SPILLED-NEXT:   S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
21  ; SPILLED-NEXT:   SI_SPILL_S192_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s192) into %stack.0, align 4, addrspace 5)
22  ; SPILLED-NEXT:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
23  ; SPILLED-NEXT: {{  $}}
24  ; SPILLED-NEXT: bb.1:
25  ; SPILLED-NEXT:   successors: %bb.2(0x80000000)
26  ; SPILLED-NEXT: {{  $}}
27  ; SPILLED-NEXT:   S_NOP 1
28  ; SPILLED-NEXT: {{  $}}
29  ; SPILLED-NEXT: bb.2:
30  ; SPILLED-NEXT:   $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9 = SI_SPILL_S192_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s192) from %stack.0, align 4, addrspace 5)
31  ; SPILLED-NEXT:   S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
32  ; EXPANDED-LABEL: name: spill_restore_sgpr192
33  ; EXPANDED: bb.0:
34  ; EXPANDED-NEXT:   successors: %bb.1(0x80000000)
35  ; EXPANDED-NEXT:   liveins: $vgpr0
36  ; EXPANDED-NEXT: {{  $}}
37  ; EXPANDED-NEXT:   S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
38  ; EXPANDED-NEXT:   $vgpr0 = V_WRITELANE_B32 $sgpr4, 0, $vgpr0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
39  ; EXPANDED-NEXT:   $vgpr0 = V_WRITELANE_B32 $sgpr5, 1, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
40  ; EXPANDED-NEXT:   $vgpr0 = V_WRITELANE_B32 $sgpr6, 2, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
41  ; EXPANDED-NEXT:   $vgpr0 = V_WRITELANE_B32 $sgpr7, 3, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
42  ; EXPANDED-NEXT:   $vgpr0 = V_WRITELANE_B32 $sgpr8, 4, $vgpr0, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
43  ; EXPANDED-NEXT:   $vgpr0 = V_WRITELANE_B32 killed $sgpr9, 5, $vgpr0, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
44  ; EXPANDED-NEXT:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
45  ; EXPANDED-NEXT: {{  $}}
46  ; EXPANDED-NEXT: bb.1:
47  ; EXPANDED-NEXT:   successors: %bb.2(0x80000000)
48  ; EXPANDED-NEXT:   liveins: $vgpr0
49  ; EXPANDED-NEXT: {{  $}}
50  ; EXPANDED-NEXT:   S_NOP 1
51  ; EXPANDED-NEXT: {{  $}}
52  ; EXPANDED-NEXT: bb.2:
53  ; EXPANDED-NEXT:   liveins: $vgpr0
54  ; EXPANDED-NEXT: {{  $}}
55  ; EXPANDED-NEXT:   $sgpr4 = V_READLANE_B32 $vgpr0, 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
56  ; EXPANDED-NEXT:   $sgpr5 = V_READLANE_B32 $vgpr0, 1
57  ; EXPANDED-NEXT:   $sgpr6 = V_READLANE_B32 $vgpr0, 2
58  ; EXPANDED-NEXT:   $sgpr7 = V_READLANE_B32 $vgpr0, 3
59  ; EXPANDED-NEXT:   $sgpr8 = V_READLANE_B32 $vgpr0, 4
60  ; EXPANDED-NEXT:   $sgpr9 = V_READLANE_B32 $vgpr0, 5
61  ; EXPANDED-NEXT:   S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9
62  bb.0:
63    S_NOP 0, implicit-def %0:sgpr_192
64    S_CBRANCH_SCC1 implicit undef $scc, %bb.1
65
66  bb.1:
67    S_NOP 1
68
69  bb.2:
70    S_NOP 0, implicit %0
71...
72
73---
74name: spill_restore_vgpr192
75tracksRegLiveness: true
76machineFunctionInfo:
77  scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
78  stackPtrOffsetReg: $sgpr32
79body: |
80  ; SPILLED-LABEL: name: spill_restore_vgpr192
81  ; SPILLED: bb.0:
82  ; SPILLED-NEXT:   successors: %bb.1(0x80000000)
83  ; SPILLED-NEXT: {{  $}}
84  ; SPILLED-NEXT:   S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
85  ; SPILLED-NEXT:   SI_SPILL_V192_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, %stack.0, $sgpr32, 0, implicit $exec :: (store (s192) into %stack.0, align 4, addrspace 5)
86  ; SPILLED-NEXT:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
87  ; SPILLED-NEXT: {{  $}}
88  ; SPILLED-NEXT: bb.1:
89  ; SPILLED-NEXT:   successors: %bb.2(0x80000000)
90  ; SPILLED-NEXT: {{  $}}
91  ; SPILLED-NEXT:   S_NOP 1
92  ; SPILLED-NEXT: {{  $}}
93  ; SPILLED-NEXT: bb.2:
94  ; SPILLED-NEXT:   $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = SI_SPILL_V192_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s192) from %stack.0, align 4, addrspace 5)
95  ; SPILLED-NEXT:   S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
96  ; EXPANDED-LABEL: name: spill_restore_vgpr192
97  ; EXPANDED: bb.0:
98  ; EXPANDED-NEXT:   successors: %bb.1(0x80000000)
99  ; EXPANDED-NEXT: {{  $}}
100  ; EXPANDED-NEXT:   S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
101  ; EXPANDED-NEXT:   SI_SPILL_V192_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, %stack.0, $sgpr32, 0, implicit $exec :: (store (s192) into %stack.0, align 4, addrspace 5)
102  ; EXPANDED-NEXT:   S_CBRANCH_SCC1 %bb.1, implicit undef $scc
103  ; EXPANDED-NEXT: {{  $}}
104  ; EXPANDED-NEXT: bb.1:
105  ; EXPANDED-NEXT:   successors: %bb.2(0x80000000)
106  ; EXPANDED-NEXT: {{  $}}
107  ; EXPANDED-NEXT:   S_NOP 1
108  ; EXPANDED-NEXT: {{  $}}
109  ; EXPANDED-NEXT: bb.2:
110  ; EXPANDED-NEXT:   $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = SI_SPILL_V192_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s192) from %stack.0, align 4, addrspace 5)
111  ; EXPANDED-NEXT:   S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
112  bb.0:
113    S_NOP 0, implicit-def %0:vreg_192
114    S_CBRANCH_SCC1 implicit undef $scc, %bb.1
115
116  bb.1:
117    S_NOP 1
118
119  bb.2:
120    S_NOP 0, implicit %0
121...
122