1; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN %s
2; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN %s
3
4; Test that image.sample instruction is sunk across the branch and not left in the first block. Since the kill may terminate the shader there might be no need for sampling the image.
5
6; GCN-LABEL: {{^}}sinking_img_sample:
7; GCN-NOT: image_sample
8; GCN: branch
9; GCN: image_sample
10; GCN: exp null
11
12define amdgpu_ps float @sinking_img_sample() {
13main_body:
14  %i = call <3 x float> @llvm.amdgcn.image.sample.2d.v3f32.f32(i32 7, float undef, float undef, <8 x i32> undef, <4 x i32> undef, i1 false, i32 0, i32 0)
15  br i1 undef, label %endif1, label %if1
16
17if1:                                              ; preds = %main_body
18  call void @llvm.amdgcn.kill(i1 false) #4
19  br label %exit
20
21endif1:                                           ; preds = %main_body
22  %i22 = extractelement <3 x float> %i, i32 2
23  %i23 = call nsz arcp contract float @llvm.fma.f32(float %i22, float 0.000000e+00, float 0.000000e+00) #1
24  br label %exit
25
26exit:                                             ; preds = %endif1, %if1
27  %i24 = phi float [ undef, %if1 ], [ %i23, %endif1 ]
28  ret float %i24
29}
30; Function Attrs: nounwind readonly willreturn
31declare <3 x float> @llvm.amdgcn.image.sample.2d.v3f32.f32(i32 immarg, float, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #3
32
33; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
34declare float @llvm.fma.f32(float, float, float) #2
35
36; Function Attrs: nounwind
37declare void @llvm.amdgcn.kill(i1) #4
38
39attributes #1 = { nounwind readnone }
40attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
41attributes #3 = { nounwind readonly willreturn }
42attributes #4 = { nounwind }
43