1; RUN: llc -march=amdgcn -verify-machineinstrs < %s| FileCheck -check-prefixes=GCN,SI %s
2; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
3
4; XXX: Merge this into setcc, once R600 supports 64-bit operations
5
6;;;==========================================================================;;;
7;; Double comparisons
8;;;==========================================================================;;;
9
10; GCN-LABEL: {{^}}f64_oeq:
11; GCN: v_cmp_eq_f64
12define amdgpu_kernel void @f64_oeq(i32 addrspace(1)* %out, double %a, double %b) #0 {
13entry:
14  %tmp0 = fcmp oeq double %a, %b
15  %tmp1 = sext i1 %tmp0 to i32
16  store i32 %tmp1, i32 addrspace(1)* %out
17  ret void
18}
19
20; GCN-LABEL: {{^}}f64_ogt:
21; GCN: v_cmp_gt_f64
22define amdgpu_kernel void @f64_ogt(i32 addrspace(1)* %out, double %a, double %b) #0 {
23entry:
24  %tmp0 = fcmp ogt double %a, %b
25  %tmp1 = sext i1 %tmp0 to i32
26  store i32 %tmp1, i32 addrspace(1)* %out
27  ret void
28}
29
30; GCN-LABEL: {{^}}f64_oge:
31; GCN: v_cmp_ge_f64
32define amdgpu_kernel void @f64_oge(i32 addrspace(1)* %out, double %a, double %b) #0 {
33entry:
34  %tmp0 = fcmp oge double %a, %b
35  %tmp1 = sext i1 %tmp0 to i32
36  store i32 %tmp1, i32 addrspace(1)* %out
37  ret void
38}
39
40; GCN-LABEL: {{^}}f64_olt:
41; GCN: v_cmp_lt_f64
42define amdgpu_kernel void @f64_olt(i32 addrspace(1)* %out, double %a, double %b) #0 {
43entry:
44  %tmp0 = fcmp olt double %a, %b
45  %tmp1 = sext i1 %tmp0 to i32
46  store i32 %tmp1, i32 addrspace(1)* %out
47  ret void
48}
49
50; GCN-LABEL: {{^}}f64_ole:
51; GCN: v_cmp_le_f64
52define amdgpu_kernel void @f64_ole(i32 addrspace(1)* %out, double %a, double %b) #0 {
53entry:
54  %tmp0 = fcmp ole double %a, %b
55  %tmp1 = sext i1 %tmp0 to i32
56  store i32 %tmp1, i32 addrspace(1)* %out
57  ret void
58}
59
60; GCN-LABEL: {{^}}f64_one:
61; GCN: v_cmp_lg_f64_e32 vcc
62; GCN: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
63define amdgpu_kernel void @f64_one(i32 addrspace(1)* %out, double %a, double %b) #0 {
64entry:
65  %tmp0 = fcmp one double %a, %b
66  %tmp1 = sext i1 %tmp0 to i32
67  store i32 %tmp1, i32 addrspace(1)* %out
68  ret void
69}
70
71; GCN-LABEL: {{^}}f64_ord:
72; GCN: v_cmp_o_f64
73define amdgpu_kernel void @f64_ord(i32 addrspace(1)* %out, double %a, double %b) #0 {
74entry:
75  %tmp0 = fcmp ord double %a, %b
76  %tmp1 = sext i1 %tmp0 to i32
77  store i32 %tmp1, i32 addrspace(1)* %out
78  ret void
79}
80
81; GCN-LABEL: {{^}}f64_ueq:
82; GCN: v_cmp_nlg_f64_e32 vcc
83; GCN: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
84define amdgpu_kernel void @f64_ueq(i32 addrspace(1)* %out, double %a, double %b) #0 {
85entry:
86  %tmp0 = fcmp ueq double %a, %b
87  %tmp1 = sext i1 %tmp0 to i32
88  store i32 %tmp1, i32 addrspace(1)* %out
89  ret void
90}
91
92; GCN-LABEL: {{^}}f64_ugt:
93
94; GCN: v_cmp_nle_f64_e32 vcc
95; GCN: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
96define amdgpu_kernel void @f64_ugt(i32 addrspace(1)* %out, double %a, double %b) #0 {
97entry:
98  %tmp0 = fcmp ugt double %a, %b
99  %tmp1 = sext i1 %tmp0 to i32
100  store i32 %tmp1, i32 addrspace(1)* %out
101  ret void
102}
103
104; GCN-LABEL: {{^}}f64_uge:
105; GCN: v_cmp_nlt_f64_e32 vcc
106; GCN: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
107define amdgpu_kernel void @f64_uge(i32 addrspace(1)* %out, double %a, double %b) #0 {
108entry:
109  %tmp0 = fcmp uge double %a, %b
110  %tmp1 = sext i1 %tmp0 to i32
111  store i32 %tmp1, i32 addrspace(1)* %out
112  ret void
113}
114
115; GCN-LABEL: {{^}}f64_ult:
116; GCN: v_cmp_nge_f64_e32 vcc
117; GCN: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
118define amdgpu_kernel void @f64_ult(i32 addrspace(1)* %out, double %a, double %b) #0 {
119entry:
120  %tmp0 = fcmp ult double %a, %b
121  %tmp1 = sext i1 %tmp0 to i32
122  store i32 %tmp1, i32 addrspace(1)* %out
123  ret void
124}
125
126; GCN-LABEL: {{^}}f64_ule:
127; GCN: v_cmp_ngt_f64_e32 vcc
128; GCN: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc
129define amdgpu_kernel void @f64_ule(i32 addrspace(1)* %out, double %a, double %b) #0 {
130entry:
131  %tmp0 = fcmp ule double %a, %b
132  %tmp1 = sext i1 %tmp0 to i32
133  store i32 %tmp1, i32 addrspace(1)* %out
134  ret void
135}
136
137; GCN-LABEL: {{^}}f64_une:
138; GCN: v_cmp_neq_f64
139define amdgpu_kernel void @f64_une(i32 addrspace(1)* %out, double %a, double %b) #0 {
140entry:
141  %tmp0 = fcmp une double %a, %b
142  %tmp1 = sext i1 %tmp0 to i32
143  store i32 %tmp1, i32 addrspace(1)* %out
144  ret void
145}
146
147; GCN-LABEL: {{^}}f64_uno:
148; GCN: v_cmp_u_f64
149define amdgpu_kernel void @f64_uno(i32 addrspace(1)* %out, double %a, double %b) #0 {
150entry:
151  %tmp0 = fcmp uno double %a, %b
152  %tmp1 = sext i1 %tmp0 to i32
153  store i32 %tmp1, i32 addrspace(1)* %out
154  ret void
155}
156
157;;;==========================================================================;;;
158;; 64-bit integer comparisons
159;;;==========================================================================;;;
160
161; GCN-LABEL: {{^}}i64_eq:
162; SI: v_cmp_eq_u64
163; VI: s_cmp_eq_u64
164define amdgpu_kernel void @i64_eq(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
165entry:
166  %tmp0 = icmp eq i64 %a, %b
167  %tmp1 = sext i1 %tmp0 to i32
168  store i32 %tmp1, i32 addrspace(1)* %out
169  ret void
170}
171
172; GCN-LABEL: {{^}}i64_ne:
173; SI: v_cmp_ne_u64
174; VI: s_cmp_lg_u64
175define amdgpu_kernel void @i64_ne(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
176entry:
177  %tmp0 = icmp ne i64 %a, %b
178  %tmp1 = sext i1 %tmp0 to i32
179  store i32 %tmp1, i32 addrspace(1)* %out
180  ret void
181}
182
183; GCN-LABEL: {{^}}i64_ugt:
184; GCN: v_cmp_gt_u64
185define amdgpu_kernel void @i64_ugt(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
186entry:
187  %tmp0 = icmp ugt i64 %a, %b
188  %tmp1 = sext i1 %tmp0 to i32
189  store i32 %tmp1, i32 addrspace(1)* %out
190  ret void
191}
192
193; GCN-LABEL: {{^}}i64_uge:
194; GCN: v_cmp_ge_u64
195define amdgpu_kernel void @i64_uge(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
196entry:
197  %tmp0 = icmp uge i64 %a, %b
198  %tmp1 = sext i1 %tmp0 to i32
199  store i32 %tmp1, i32 addrspace(1)* %out
200  ret void
201}
202
203; GCN-LABEL: {{^}}i64_ult:
204; GCN: v_cmp_lt_u64
205define amdgpu_kernel void @i64_ult(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
206entry:
207  %tmp0 = icmp ult i64 %a, %b
208  %tmp1 = sext i1 %tmp0 to i32
209  store i32 %tmp1, i32 addrspace(1)* %out
210  ret void
211}
212
213; GCN-LABEL: {{^}}i64_ule:
214; GCN: v_cmp_le_u64
215define amdgpu_kernel void @i64_ule(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
216entry:
217  %tmp0 = icmp ule i64 %a, %b
218  %tmp1 = sext i1 %tmp0 to i32
219  store i32 %tmp1, i32 addrspace(1)* %out
220  ret void
221}
222
223; GCN-LABEL: {{^}}i64_sgt:
224; GCN: v_cmp_gt_i64
225define amdgpu_kernel void @i64_sgt(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
226entry:
227  %tmp0 = icmp sgt i64 %a, %b
228  %tmp1 = sext i1 %tmp0 to i32
229  store i32 %tmp1, i32 addrspace(1)* %out
230  ret void
231}
232
233; GCN-LABEL: {{^}}i64_sge:
234; GCN: v_cmp_ge_i64
235define amdgpu_kernel void @i64_sge(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
236entry:
237  %tmp0 = icmp sge i64 %a, %b
238  %tmp1 = sext i1 %tmp0 to i32
239  store i32 %tmp1, i32 addrspace(1)* %out
240  ret void
241}
242
243; GCN-LABEL: {{^}}i64_slt:
244; GCN: v_cmp_lt_i64
245define amdgpu_kernel void @i64_slt(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
246entry:
247  %tmp0 = icmp slt i64 %a, %b
248  %tmp1 = sext i1 %tmp0 to i32
249  store i32 %tmp1, i32 addrspace(1)* %out
250  ret void
251}
252
253; GCN-LABEL: {{^}}i64_sle:
254; GCN: v_cmp_le_i64
255define amdgpu_kernel void @i64_sle(i32 addrspace(1)* %out, i64 %a, i64 %b) #0 {
256entry:
257  %tmp0 = icmp sle i64 %a, %b
258  %tmp1 = sext i1 %tmp0 to i32
259  store i32 %tmp1, i32 addrspace(1)* %out
260  ret void
261}
262
263; GCN-LABEL: {{^}}i128_sle:
264; GCN: v_cmp_le_u64
265; GCN: v_cmp_le_i64
266; SI: v_cmp_eq_u64
267; VI: s_cmp_eq_u64
268define amdgpu_kernel void @i128_sle(i32 addrspace(1)* %out, i128 %a, i128 %b) #0 {
269entry:
270  %tmp0 = icmp sle i128 %a, %b
271  %tmp1 = sext i1 %tmp0 to i32
272  store i32 %tmp1, i32 addrspace(1)* %out
273  ret void
274}
275
276; GCN-LABEL: {{^}}i128_eq_const:
277; SI: v_cmp_eq_u64
278; VI: s_cmp_eq_u64
279define amdgpu_kernel void @i128_eq_const(i32 addrspace(1)* %out, i128 %a) #0 {
280entry:
281  %tmp0 = icmp eq i128 %a, 85070591730234615865843651857942052992
282  %tmp1 = sext i1 %tmp0 to i32
283  store i32 %tmp1, i32 addrspace(1)* %out
284  ret void
285}
286
287attributes #0 = { nounwind }
288