1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx600 | FileCheck %s --check-prefix=GCN
3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck %s --check-prefix=TONGA
4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global | FileCheck %s --check-prefix=GFX9
5; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG
6
7; The code generated by sdiv is long and complex and may frequently change.
8; The goal of this test is to make sure the ISel doesn't fail.
9;
10; This program was previously failing to compile when one of the selectcc
11; opcodes generated by the sdiv lowering was being legalized and optimized to:
12; selectcc Remainder -1, 0, -1, SETGT
13; This was fixed by adding an additional pattern in R600Instructions.td to
14; match this pattern with a CNDGE_INT.
15
16define amdgpu_kernel void @sdiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
17; GCN-LABEL: sdiv_i32:
18; GCN:       ; %bb.0:
19; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
20; GCN-NEXT:    s_mov_b32 s7, 0xf000
21; GCN-NEXT:    s_mov_b32 s6, -1
22; GCN-NEXT:    s_mov_b32 s10, s6
23; GCN-NEXT:    s_mov_b32 s11, s7
24; GCN-NEXT:    s_waitcnt lgkmcnt(0)
25; GCN-NEXT:    s_mov_b32 s8, s2
26; GCN-NEXT:    s_mov_b32 s9, s3
27; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
28; GCN-NEXT:    s_mov_b32 s4, s0
29; GCN-NEXT:    s_mov_b32 s5, s1
30; GCN-NEXT:    s_waitcnt vmcnt(0)
31; GCN-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
32; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
33; GCN-NEXT:    v_xor_b32_e32 v1, v1, v2
34; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v1
35; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v1
36; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
37; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
38; GCN-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
39; GCN-NEXT:    v_xor_b32_e32 v0, v0, v5
40; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
41; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
42; GCN-NEXT:    v_xor_b32_e32 v2, v5, v2
43; GCN-NEXT:    v_mul_lo_u32 v4, v4, v3
44; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
45; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
46; GCN-NEXT:    v_mul_hi_u32 v3, v0, v3
47; GCN-NEXT:    v_mul_lo_u32 v4, v3, v1
48; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
49; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v4, v0
50; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v1
51; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
52; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v1, v0
53; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
54; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
55; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
56; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
57; GCN-NEXT:    v_xor_b32_e32 v0, v0, v2
58; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v2
59; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
60; GCN-NEXT:    s_endpgm
61;
62; TONGA-LABEL: sdiv_i32:
63; TONGA:       ; %bb.0:
64; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
65; TONGA-NEXT:    s_mov_b32 s7, 0xf000
66; TONGA-NEXT:    s_mov_b32 s6, -1
67; TONGA-NEXT:    s_mov_b32 s10, s6
68; TONGA-NEXT:    s_mov_b32 s11, s7
69; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
70; TONGA-NEXT:    s_mov_b32 s8, s2
71; TONGA-NEXT:    s_mov_b32 s9, s3
72; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
73; TONGA-NEXT:    s_mov_b32 s4, s0
74; TONGA-NEXT:    s_mov_b32 s5, s1
75; TONGA-NEXT:    s_waitcnt vmcnt(0)
76; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
77; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v2, v1
78; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v2
79; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v1
80; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v1
81; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
82; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
83; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v5, v0
84; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v5
85; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
86; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
87; TONGA-NEXT:    v_xor_b32_e32 v2, v5, v2
88; TONGA-NEXT:    v_mul_lo_u32 v4, v4, v3
89; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
90; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v4, v3
91; TONGA-NEXT:    v_mul_hi_u32 v3, v0, v3
92; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v1
93; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v3
94; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v4, v0
95; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v1
96; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
97; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v1, v0
98; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
99; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
100; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
101; TONGA-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
102; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v2
103; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v2
104; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
105; TONGA-NEXT:    s_endpgm
106;
107; GFX9-LABEL: sdiv_i32:
108; GFX9:       ; %bb.0:
109; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
110; GFX9-NEXT:    s_mov_b32 s7, 0xf000
111; GFX9-NEXT:    s_mov_b32 s6, -1
112; GFX9-NEXT:    s_mov_b32 s10, s6
113; GFX9-NEXT:    s_mov_b32 s11, s7
114; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
115; GFX9-NEXT:    s_mov_b32 s8, s2
116; GFX9-NEXT:    s_mov_b32 s9, s3
117; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
118; GFX9-NEXT:    s_mov_b32 s4, s0
119; GFX9-NEXT:    s_mov_b32 s5, s1
120; GFX9-NEXT:    s_waitcnt vmcnt(0)
121; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
122; GFX9-NEXT:    v_add_u32_e32 v1, v1, v2
123; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v2
124; GFX9-NEXT:    v_cvt_f32_u32_e32 v3, v1
125; GFX9-NEXT:    v_sub_u32_e32 v4, 0, v1
126; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
127; GFX9-NEXT:    v_add_u32_e32 v0, v0, v5
128; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3
129; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v5
130; GFX9-NEXT:    v_xor_b32_e32 v2, v5, v2
131; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
132; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3
133; GFX9-NEXT:    v_mul_lo_u32 v4, v4, v3
134; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4
135; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4
136; GFX9-NEXT:    v_mul_hi_u32 v3, v0, v3
137; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v1
138; GFX9-NEXT:    v_add_u32_e32 v5, 1, v3
139; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v4
140; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
141; GFX9-NEXT:    v_sub_u32_e32 v4, v0, v1
142; GFX9-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
143; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
144; GFX9-NEXT:    v_add_u32_e32 v4, 1, v3
145; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
146; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
147; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v2
148; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v2
149; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
150; GFX9-NEXT:    s_endpgm
151;
152; EG-LABEL: sdiv_i32:
153; EG:       ; %bb.0:
154; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
155; EG-NEXT:    TEX 0 @6
156; EG-NEXT:    ALU 26, @9, KC0[CB0:0-32], KC1[]
157; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
158; EG-NEXT:    CF_END
159; EG-NEXT:    PAD
160; EG-NEXT:    Fetch clause starting at 6:
161; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
162; EG-NEXT:    ALU clause starting at 8:
163; EG-NEXT:     MOV * T0.X, KC0[2].Z,
164; EG-NEXT:    ALU clause starting at 9:
165; EG-NEXT:     SETGT_INT * T0.W, 0.0, T0.Y,
166; EG-NEXT:     ADD_INT * T1.W, T0.Y, PV.W,
167; EG-NEXT:     XOR_INT * T1.W, PV.W, T0.W,
168; EG-NEXT:     SUB_INT T2.W, 0.0, PV.W,
169; EG-NEXT:     RECIP_UINT * T0.Y, PV.W,
170; EG-NEXT:     SETGT_INT T3.W, 0.0, T0.X,
171; EG-NEXT:     MULLO_INT * T0.Z, PV.W, PS,
172; EG-NEXT:     ADD_INT T2.W, T0.X, PV.W,
173; EG-NEXT:     MULHI * T0.X, T0.Y, PS,
174; EG-NEXT:     ADD_INT T4.W, T0.Y, PS,
175; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
176; EG-NEXT:     MULHI * T0.X, PS, PV.W,
177; EG-NEXT:     MULLO_INT * T0.Y, PS, T1.W,
178; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
179; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
180; EG-NEXT:     SETGE_UINT T4.W, PV.W, T1.W,
181; EG-NEXT:     SUB_INT * T5.W, PV.W, T1.W,
182; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
183; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
184; EG-NEXT:     ADD_INT T5.W, PS, 1,
185; EG-NEXT:     SETGE_UINT * T1.W, PV.W, T1.W,
186; EG-NEXT:     CNDE_INT T1.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
187; EG-NEXT:     XOR_INT * T0.W, T3.W, T0.W,
188; EG-NEXT:     XOR_INT * T1.W, PV.W, PS,
189; EG-NEXT:     SUB_INT T0.X, PV.W, T0.W,
190; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
191; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
192  %den_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
193  %num = load i32, i32 addrspace(1) * %in
194  %den = load i32, i32 addrspace(1) * %den_ptr
195  %result = sdiv i32 %num, %den
196  store i32 %result, i32 addrspace(1)* %out
197  ret void
198}
199
200define amdgpu_kernel void @sdiv_i32_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
201; GCN-LABEL: sdiv_i32_4:
202; GCN:       ; %bb.0:
203; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
204; GCN-NEXT:    s_mov_b32 s7, 0xf000
205; GCN-NEXT:    s_mov_b32 s6, -1
206; GCN-NEXT:    s_mov_b32 s10, s6
207; GCN-NEXT:    s_mov_b32 s11, s7
208; GCN-NEXT:    s_waitcnt lgkmcnt(0)
209; GCN-NEXT:    s_mov_b32 s8, s2
210; GCN-NEXT:    s_mov_b32 s9, s3
211; GCN-NEXT:    buffer_load_dword v0, off, s[8:11], 0
212; GCN-NEXT:    s_mov_b32 s4, s0
213; GCN-NEXT:    s_mov_b32 s5, s1
214; GCN-NEXT:    s_waitcnt vmcnt(0)
215; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
216; GCN-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
217; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
218; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
219; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
220; GCN-NEXT:    s_endpgm
221;
222; TONGA-LABEL: sdiv_i32_4:
223; TONGA:       ; %bb.0:
224; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
225; TONGA-NEXT:    s_mov_b32 s7, 0xf000
226; TONGA-NEXT:    s_mov_b32 s6, -1
227; TONGA-NEXT:    s_mov_b32 s10, s6
228; TONGA-NEXT:    s_mov_b32 s11, s7
229; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
230; TONGA-NEXT:    s_mov_b32 s8, s2
231; TONGA-NEXT:    s_mov_b32 s9, s3
232; TONGA-NEXT:    buffer_load_dword v0, off, s[8:11], 0
233; TONGA-NEXT:    s_mov_b32 s4, s0
234; TONGA-NEXT:    s_mov_b32 s5, s1
235; TONGA-NEXT:    s_waitcnt vmcnt(0)
236; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
237; TONGA-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
238; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
239; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
240; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
241; TONGA-NEXT:    s_endpgm
242;
243; GFX9-LABEL: sdiv_i32_4:
244; GFX9:       ; %bb.0:
245; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
246; GFX9-NEXT:    s_mov_b32 s7, 0xf000
247; GFX9-NEXT:    s_mov_b32 s6, -1
248; GFX9-NEXT:    s_mov_b32 s10, s6
249; GFX9-NEXT:    s_mov_b32 s11, s7
250; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
251; GFX9-NEXT:    s_mov_b32 s8, s2
252; GFX9-NEXT:    s_mov_b32 s9, s3
253; GFX9-NEXT:    buffer_load_dword v0, off, s[8:11], 0
254; GFX9-NEXT:    s_mov_b32 s4, s0
255; GFX9-NEXT:    s_mov_b32 s5, s1
256; GFX9-NEXT:    s_waitcnt vmcnt(0)
257; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
258; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
259; GFX9-NEXT:    v_add_u32_e32 v0, v0, v1
260; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
261; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
262; GFX9-NEXT:    s_endpgm
263;
264; EG-LABEL: sdiv_i32_4:
265; EG:       ; %bb.0:
266; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
267; EG-NEXT:    TEX 0 @6
268; EG-NEXT:    ALU 7, @9, KC0[CB0:0-32], KC1[]
269; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
270; EG-NEXT:    CF_END
271; EG-NEXT:    PAD
272; EG-NEXT:    Fetch clause starting at 6:
273; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
274; EG-NEXT:    ALU clause starting at 8:
275; EG-NEXT:     MOV * T0.X, KC0[2].Z,
276; EG-NEXT:    ALU clause starting at 9:
277; EG-NEXT:     ASHR * T0.W, T0.X, literal.x,
278; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
279; EG-NEXT:     LSHR * T0.W, PV.W, literal.x,
280; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
281; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
282; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
283; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
284; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
285  %num = load i32, i32 addrspace(1) * %in
286  %result = sdiv i32 %num, 4
287  store i32 %result, i32 addrspace(1)* %out
288  ret void
289}
290
291; Multiply by a weird constant to make sure setIntDivIsCheap is
292; working.
293
294define amdgpu_kernel void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
295; GCN-LABEL: slow_sdiv_i32_3435:
296; GCN:       ; %bb.0:
297; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
298; GCN-NEXT:    s_mov_b32 s7, 0xf000
299; GCN-NEXT:    s_mov_b32 s6, -1
300; GCN-NEXT:    s_mov_b32 s10, s6
301; GCN-NEXT:    s_mov_b32 s11, s7
302; GCN-NEXT:    s_waitcnt lgkmcnt(0)
303; GCN-NEXT:    s_mov_b32 s8, s2
304; GCN-NEXT:    s_mov_b32 s9, s3
305; GCN-NEXT:    buffer_load_dword v0, off, s[8:11], 0
306; GCN-NEXT:    s_mov_b32 s2, 0x98a1930b
307; GCN-NEXT:    s_mov_b32 s4, s0
308; GCN-NEXT:    s_mov_b32 s5, s1
309; GCN-NEXT:    s_waitcnt vmcnt(0)
310; GCN-NEXT:    v_mul_hi_i32 v1, v0, s2
311; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
312; GCN-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
313; GCN-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
314; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
315; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
316; GCN-NEXT:    s_endpgm
317;
318; TONGA-LABEL: slow_sdiv_i32_3435:
319; TONGA:       ; %bb.0:
320; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
321; TONGA-NEXT:    s_mov_b32 s7, 0xf000
322; TONGA-NEXT:    s_mov_b32 s6, -1
323; TONGA-NEXT:    s_mov_b32 s10, s6
324; TONGA-NEXT:    s_mov_b32 s11, s7
325; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
326; TONGA-NEXT:    s_mov_b32 s8, s2
327; TONGA-NEXT:    s_mov_b32 s9, s3
328; TONGA-NEXT:    buffer_load_dword v0, off, s[8:11], 0
329; TONGA-NEXT:    s_mov_b32 s2, 0x98a1930b
330; TONGA-NEXT:    s_mov_b32 s4, s0
331; TONGA-NEXT:    s_mov_b32 s5, s1
332; TONGA-NEXT:    s_waitcnt vmcnt(0)
333; TONGA-NEXT:    v_mul_hi_i32 v1, v0, s2
334; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
335; TONGA-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
336; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
337; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
338; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
339; TONGA-NEXT:    s_endpgm
340;
341; GFX9-LABEL: slow_sdiv_i32_3435:
342; GFX9:       ; %bb.0:
343; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
344; GFX9-NEXT:    s_mov_b32 s7, 0xf000
345; GFX9-NEXT:    s_mov_b32 s6, -1
346; GFX9-NEXT:    s_mov_b32 s10, s6
347; GFX9-NEXT:    s_mov_b32 s11, s7
348; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
349; GFX9-NEXT:    s_mov_b32 s8, s2
350; GFX9-NEXT:    s_mov_b32 s9, s3
351; GFX9-NEXT:    buffer_load_dword v0, off, s[8:11], 0
352; GFX9-NEXT:    s_mov_b32 s2, 0x98a1930b
353; GFX9-NEXT:    s_mov_b32 s4, s0
354; GFX9-NEXT:    s_mov_b32 s5, s1
355; GFX9-NEXT:    s_waitcnt vmcnt(0)
356; GFX9-NEXT:    v_mul_hi_i32 v1, v0, s2
357; GFX9-NEXT:    v_add_u32_e32 v0, v1, v0
358; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
359; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
360; GFX9-NEXT:    v_add_u32_e32 v0, v0, v1
361; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
362; GFX9-NEXT:    s_endpgm
363;
364; EG-LABEL: slow_sdiv_i32_3435:
365; EG:       ; %bb.0:
366; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
367; EG-NEXT:    TEX 0 @6
368; EG-NEXT:    ALU 8, @9, KC0[CB0:0-32], KC1[]
369; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
370; EG-NEXT:    CF_END
371; EG-NEXT:    PAD
372; EG-NEXT:    Fetch clause starting at 6:
373; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
374; EG-NEXT:    ALU clause starting at 8:
375; EG-NEXT:     MOV * T0.X, KC0[2].Z,
376; EG-NEXT:    ALU clause starting at 9:
377; EG-NEXT:     MULHI_INT * T0.Y, T0.X, literal.x,
378; EG-NEXT:    -1734241525(-4.176600e-24), 0(0.000000e+00)
379; EG-NEXT:     ADD_INT * T0.W, PS, T0.X,
380; EG-NEXT:     ASHR T1.W, PV.W, literal.x,
381; EG-NEXT:     LSHR * T0.W, PV.W, literal.y,
382; EG-NEXT:    11(1.541428e-44), 31(4.344025e-44)
383; EG-NEXT:     ADD_INT T0.X, PV.W, PS,
384; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
385; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
386  %num = load i32, i32 addrspace(1) * %in
387  %result = sdiv i32 %num, 3435
388  store i32 %result, i32 addrspace(1)* %out
389  ret void
390}
391
392define amdgpu_kernel void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
393; GCN-LABEL: sdiv_v2i32:
394; GCN:       ; %bb.0:
395; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
396; GCN-NEXT:    s_mov_b32 s7, 0xf000
397; GCN-NEXT:    s_mov_b32 s6, -1
398; GCN-NEXT:    s_mov_b32 s10, s6
399; GCN-NEXT:    s_mov_b32 s11, s7
400; GCN-NEXT:    s_waitcnt lgkmcnt(0)
401; GCN-NEXT:    s_mov_b32 s8, s2
402; GCN-NEXT:    s_mov_b32 s9, s3
403; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
404; GCN-NEXT:    s_mov_b32 s2, 0x4f7ffffe
405; GCN-NEXT:    s_mov_b32 s4, s0
406; GCN-NEXT:    s_mov_b32 s5, s1
407; GCN-NEXT:    s_waitcnt vmcnt(0)
408; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
409; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
410; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
411; GCN-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
412; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
413; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
414; GCN-NEXT:    v_xor_b32_e32 v2, v2, v5
415; GCN-NEXT:    v_xor_b32_e32 v3, v3, v7
416; GCN-NEXT:    v_xor_b32_e32 v8, v4, v5
417; GCN-NEXT:    v_xor_b32_e32 v9, v6, v7
418; GCN-NEXT:    v_cvt_f32_u32_e32 v5, v2
419; GCN-NEXT:    v_cvt_f32_u32_e32 v7, v3
420; GCN-NEXT:    v_sub_i32_e32 v10, vcc, 0, v2
421; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v5
422; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v7
423; GCN-NEXT:    v_sub_i32_e32 v11, vcc, 0, v3
424; GCN-NEXT:    v_mul_f32_e32 v5, s2, v5
425; GCN-NEXT:    v_mul_f32_e32 v7, s2, v7
426; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
427; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v7
428; GCN-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
429; GCN-NEXT:    v_mul_lo_u32 v10, v10, v5
430; GCN-NEXT:    v_mul_lo_u32 v11, v11, v7
431; GCN-NEXT:    v_add_i32_e32 v1, vcc, v6, v1
432; GCN-NEXT:    v_xor_b32_e32 v0, v0, v4
433; GCN-NEXT:    v_mul_hi_u32 v4, v5, v10
434; GCN-NEXT:    v_xor_b32_e32 v1, v1, v6
435; GCN-NEXT:    v_mul_hi_u32 v6, v7, v11
436; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
437; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v7
438; GCN-NEXT:    v_mul_hi_u32 v4, v0, v4
439; GCN-NEXT:    v_mul_hi_u32 v5, v1, v5
440; GCN-NEXT:    v_mul_lo_u32 v6, v4, v2
441; GCN-NEXT:    v_mul_lo_u32 v10, v5, v3
442; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v4
443; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v6
444; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v10
445; GCN-NEXT:    v_add_i32_e32 v11, vcc, 1, v5
446; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v2
447; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v1, v3
448; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
449; GCN-NEXT:    v_sub_i32_e32 v6, vcc, v0, v2
450; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v11, s[2:3]
451; GCN-NEXT:    v_sub_i32_e32 v7, vcc, v1, v3
452; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
453; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v4
454; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v7, s[2:3]
455; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v5
456; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
457; GCN-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc
458; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
459; GCN-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc
460; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
461; GCN-NEXT:    v_xor_b32_e32 v1, v1, v9
462; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v8
463; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v9
464; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
465; GCN-NEXT:    s_endpgm
466;
467; TONGA-LABEL: sdiv_v2i32:
468; TONGA:       ; %bb.0:
469; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
470; TONGA-NEXT:    s_mov_b32 s7, 0xf000
471; TONGA-NEXT:    s_mov_b32 s6, -1
472; TONGA-NEXT:    s_mov_b32 s10, s6
473; TONGA-NEXT:    s_mov_b32 s11, s7
474; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
475; TONGA-NEXT:    s_mov_b32 s8, s2
476; TONGA-NEXT:    s_mov_b32 s9, s3
477; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
478; TONGA-NEXT:    s_mov_b32 s2, 0x4f7ffffe
479; TONGA-NEXT:    s_mov_b32 s4, s0
480; TONGA-NEXT:    s_mov_b32 s5, s1
481; TONGA-NEXT:    s_waitcnt vmcnt(0)
482; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
483; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
484; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v5, v2
485; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
486; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
487; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
488; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v5
489; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v7
490; TONGA-NEXT:    v_xor_b32_e32 v8, v4, v5
491; TONGA-NEXT:    v_xor_b32_e32 v9, v6, v7
492; TONGA-NEXT:    v_cvt_f32_u32_e32 v5, v2
493; TONGA-NEXT:    v_cvt_f32_u32_e32 v7, v3
494; TONGA-NEXT:    v_sub_u32_e32 v10, vcc, 0, v2
495; TONGA-NEXT:    v_rcp_iflag_f32_e32 v5, v5
496; TONGA-NEXT:    v_rcp_iflag_f32_e32 v7, v7
497; TONGA-NEXT:    v_sub_u32_e32 v11, vcc, 0, v3
498; TONGA-NEXT:    v_mul_f32_e32 v5, s2, v5
499; TONGA-NEXT:    v_mul_f32_e32 v7, s2, v7
500; TONGA-NEXT:    v_cvt_u32_f32_e32 v5, v5
501; TONGA-NEXT:    v_cvt_u32_f32_e32 v7, v7
502; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
503; TONGA-NEXT:    v_mul_lo_u32 v10, v10, v5
504; TONGA-NEXT:    v_mul_lo_u32 v11, v11, v7
505; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v6, v1
506; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v4
507; TONGA-NEXT:    v_mul_hi_u32 v4, v5, v10
508; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v6
509; TONGA-NEXT:    v_mul_hi_u32 v6, v7, v11
510; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v4, v5
511; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v6, v7
512; TONGA-NEXT:    v_mul_hi_u32 v4, v0, v4
513; TONGA-NEXT:    v_mul_hi_u32 v5, v1, v5
514; TONGA-NEXT:    v_mul_lo_u32 v6, v4, v2
515; TONGA-NEXT:    v_mul_lo_u32 v10, v5, v3
516; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v4
517; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v6
518; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v10
519; TONGA-NEXT:    v_add_u32_e32 v11, vcc, 1, v5
520; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v2
521; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v1, v3
522; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
523; TONGA-NEXT:    v_sub_u32_e32 v6, vcc, v0, v2
524; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v11, s[2:3]
525; TONGA-NEXT:    v_sub_u32_e32 v7, vcc, v1, v3
526; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
527; TONGA-NEXT:    v_add_u32_e32 v6, vcc, 1, v4
528; TONGA-NEXT:    v_cndmask_b32_e64 v1, v1, v7, s[2:3]
529; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v5
530; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
531; TONGA-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc
532; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
533; TONGA-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc
534; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
535; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v9
536; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v8, v0
537; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v9, v1
538; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
539; TONGA-NEXT:    s_endpgm
540;
541; GFX9-LABEL: sdiv_v2i32:
542; GFX9:       ; %bb.0:
543; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
544; GFX9-NEXT:    s_mov_b32 s7, 0xf000
545; GFX9-NEXT:    s_mov_b32 s6, -1
546; GFX9-NEXT:    s_mov_b32 s10, s6
547; GFX9-NEXT:    s_mov_b32 s11, s7
548; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
549; GFX9-NEXT:    s_mov_b32 s8, s2
550; GFX9-NEXT:    s_mov_b32 s9, s3
551; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
552; GFX9-NEXT:    s_mov_b32 s2, 0x4f7ffffe
553; GFX9-NEXT:    s_mov_b32 s4, s0
554; GFX9-NEXT:    s_mov_b32 s5, s1
555; GFX9-NEXT:    s_waitcnt vmcnt(0)
556; GFX9-NEXT:    v_ashrrev_i32_e32 v4, 31, v2
557; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v3
558; GFX9-NEXT:    v_add_u32_e32 v2, v2, v4
559; GFX9-NEXT:    v_add_u32_e32 v3, v3, v5
560; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v4
561; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v5
562; GFX9-NEXT:    v_cvt_f32_u32_e32 v6, v2
563; GFX9-NEXT:    v_cvt_f32_u32_e32 v7, v3
564; GFX9-NEXT:    v_sub_u32_e32 v10, 0, v2
565; GFX9-NEXT:    v_sub_u32_e32 v11, 0, v3
566; GFX9-NEXT:    v_rcp_iflag_f32_e32 v6, v6
567; GFX9-NEXT:    v_rcp_iflag_f32_e32 v7, v7
568; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
569; GFX9-NEXT:    v_ashrrev_i32_e32 v9, 31, v1
570; GFX9-NEXT:    v_mul_f32_e32 v6, s2, v6
571; GFX9-NEXT:    v_mul_f32_e32 v7, s2, v7
572; GFX9-NEXT:    v_cvt_u32_f32_e32 v6, v6
573; GFX9-NEXT:    v_cvt_u32_f32_e32 v7, v7
574; GFX9-NEXT:    v_add_u32_e32 v0, v0, v8
575; GFX9-NEXT:    v_add_u32_e32 v1, v1, v9
576; GFX9-NEXT:    v_mul_lo_u32 v10, v10, v6
577; GFX9-NEXT:    v_mul_lo_u32 v11, v11, v7
578; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v8
579; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v9
580; GFX9-NEXT:    v_mul_hi_u32 v10, v6, v10
581; GFX9-NEXT:    v_mul_hi_u32 v11, v7, v11
582; GFX9-NEXT:    v_xor_b32_e32 v4, v8, v4
583; GFX9-NEXT:    v_xor_b32_e32 v5, v9, v5
584; GFX9-NEXT:    v_add_u32_e32 v6, v6, v10
585; GFX9-NEXT:    v_add_u32_e32 v7, v7, v11
586; GFX9-NEXT:    v_mul_hi_u32 v6, v0, v6
587; GFX9-NEXT:    v_mul_hi_u32 v7, v1, v7
588; GFX9-NEXT:    v_mul_lo_u32 v8, v6, v2
589; GFX9-NEXT:    v_mul_lo_u32 v9, v7, v3
590; GFX9-NEXT:    v_add_u32_e32 v10, 1, v6
591; GFX9-NEXT:    v_add_u32_e32 v11, 1, v7
592; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v8
593; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v9
594; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
595; GFX9-NEXT:    v_sub_u32_e32 v8, v0, v2
596; GFX9-NEXT:    v_cndmask_b32_e32 v6, v6, v10, vcc
597; GFX9-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v3
598; GFX9-NEXT:    v_sub_u32_e32 v9, v1, v3
599; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v8, vcc
600; GFX9-NEXT:    v_cndmask_b32_e64 v7, v7, v11, s[0:1]
601; GFX9-NEXT:    v_add_u32_e32 v8, 1, v6
602; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v9, s[0:1]
603; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
604; GFX9-NEXT:    v_add_u32_e32 v9, 1, v7
605; GFX9-NEXT:    v_cndmask_b32_e32 v0, v6, v8, vcc
606; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
607; GFX9-NEXT:    v_cndmask_b32_e32 v1, v7, v9, vcc
608; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v4
609; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v5
610; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v4
611; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v5
612; GFX9-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
613; GFX9-NEXT:    s_endpgm
614;
615; EG-LABEL: sdiv_v2i32:
616; EG:       ; %bb.0:
617; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
618; EG-NEXT:    TEX 0 @6
619; EG-NEXT:    ALU 51, @9, KC0[CB0:0-32], KC1[]
620; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
621; EG-NEXT:    CF_END
622; EG-NEXT:    PAD
623; EG-NEXT:    Fetch clause starting at 6:
624; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
625; EG-NEXT:    ALU clause starting at 8:
626; EG-NEXT:     MOV * T0.X, KC0[2].Z,
627; EG-NEXT:    ALU clause starting at 9:
628; EG-NEXT:     SETGT_INT * T1.W, 0.0, T0.W,
629; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
630; EG-NEXT:     SETGT_INT * T2.W, 0.0, T0.Z,
631; EG-NEXT:     XOR_INT * T0.W, PV.W, T1.W,
632; EG-NEXT:     SUB_INT T1.Z, 0.0, PV.W,
633; EG-NEXT:     ADD_INT T3.W, T0.Z, T2.W,
634; EG-NEXT:     RECIP_UINT * T0.Z, PV.W,
635; EG-NEXT:     XOR_INT T3.W, PV.W, T2.W,
636; EG-NEXT:     MULLO_INT * T1.X, PV.Z, PS,
637; EG-NEXT:     SUB_INT T4.W, 0.0, PV.W,
638; EG-NEXT:     RECIP_UINT * T1.Y, PV.W,
639; EG-NEXT:     SETGT_INT T5.W, 0.0, T0.X,
640; EG-NEXT:     MULLO_INT * T1.Z, PV.W, PS,
641; EG-NEXT:     SETGT_INT T2.Z, 0.0, T0.Y,
642; EG-NEXT:     ADD_INT T4.W, T0.X, PV.W,
643; EG-NEXT:     MULHI * T0.X, T1.Y, PS,
644; EG-NEXT:     ADD_INT T1.Y, T1.Y, PS,
645; EG-NEXT:     XOR_INT T1.Z, PV.W, T5.W,
646; EG-NEXT:     ADD_INT T4.W, T0.Y, PV.Z, BS:VEC_120/SCL_212
647; EG-NEXT:     MULHI * T0.X, T0.Z, T1.X,
648; EG-NEXT:     ADD_INT T0.Z, T0.Z, PS,
649; EG-NEXT:     XOR_INT T4.W, PV.W, T2.Z,
650; EG-NEXT:     MULHI * T0.X, PV.Z, PV.Y,
651; EG-NEXT:     MULHI * T0.Y, PV.W, PV.Z,
652; EG-NEXT:     MULLO_INT * T0.Z, PS, T0.W,
653; EG-NEXT:     SUB_INT T4.W, T4.W, PS,
654; EG-NEXT:     MULLO_INT * T0.Z, T0.X, T3.W,
655; EG-NEXT:     SUB_INT T1.Y, T1.Z, PS,
656; EG-NEXT:     ADD_INT T0.Z, T0.Y, 1,
657; EG-NEXT:     SETGE_UINT T6.W, PV.W, T0.W,
658; EG-NEXT:     SUB_INT * T7.W, PV.W, T0.W,
659; EG-NEXT:     CNDE_INT T1.X, PV.W, T4.W, PS, BS:VEC_021/SCL_122
660; EG-NEXT:     CNDE_INT T0.Y, PV.W, T0.Y, PV.Z,
661; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
662; EG-NEXT:     SETGE_UINT T4.W, PV.Y, T3.W,
663; EG-NEXT:     SUB_INT * T6.W, PV.Y, T3.W,
664; EG-NEXT:     CNDE_INT T1.Y, PV.W, T1.Y, PS,
665; EG-NEXT:     CNDE_INT T0.Z, PV.W, T0.X, PV.Z,
666; EG-NEXT:     ADD_INT T4.W, PV.Y, 1,
667; EG-NEXT:     SETGE_UINT * T0.W, PV.X, T0.W,
668; EG-NEXT:     CNDE_INT T0.Y, PS, T0.Y, PV.W,
669; EG-NEXT:     XOR_INT T1.Z, T2.Z, T1.W, BS:VEC_021/SCL_122
670; EG-NEXT:     ADD_INT T0.W, PV.Z, 1,
671; EG-NEXT:     SETGE_UINT * T1.W, PV.Y, T3.W,
672; EG-NEXT:     CNDE_INT T0.Z, PS, T0.Z, PV.W,
673; EG-NEXT:     XOR_INT T0.W, T5.W, T2.W,
674; EG-NEXT:     XOR_INT * T1.W, PV.Y, PV.Z,
675; EG-NEXT:     SUB_INT T0.Y, PS, T1.Z,
676; EG-NEXT:     XOR_INT * T1.W, PV.Z, PV.W,
677; EG-NEXT:     SUB_INT T0.X, PV.W, T0.W,
678; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
679; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
680  %den_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
681  %num = load <2 x i32>, <2 x i32> addrspace(1) * %in
682  %den = load <2 x i32>, <2 x i32> addrspace(1) * %den_ptr
683  %result = sdiv <2 x i32> %num, %den
684  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
685  ret void
686}
687
688define amdgpu_kernel void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
689; GCN-LABEL: sdiv_v2i32_4:
690; GCN:       ; %bb.0:
691; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
692; GCN-NEXT:    s_mov_b32 s7, 0xf000
693; GCN-NEXT:    s_mov_b32 s6, -1
694; GCN-NEXT:    s_mov_b32 s10, s6
695; GCN-NEXT:    s_mov_b32 s11, s7
696; GCN-NEXT:    s_waitcnt lgkmcnt(0)
697; GCN-NEXT:    s_mov_b32 s8, s2
698; GCN-NEXT:    s_mov_b32 s9, s3
699; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
700; GCN-NEXT:    s_mov_b32 s4, s0
701; GCN-NEXT:    s_mov_b32 s5, s1
702; GCN-NEXT:    s_waitcnt vmcnt(0)
703; GCN-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
704; GCN-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
705; GCN-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
706; GCN-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
707; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
708; GCN-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
709; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
710; GCN-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
711; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
712; GCN-NEXT:    s_endpgm
713;
714; TONGA-LABEL: sdiv_v2i32_4:
715; TONGA:       ; %bb.0:
716; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
717; TONGA-NEXT:    s_mov_b32 s7, 0xf000
718; TONGA-NEXT:    s_mov_b32 s6, -1
719; TONGA-NEXT:    s_mov_b32 s10, s6
720; TONGA-NEXT:    s_mov_b32 s11, s7
721; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
722; TONGA-NEXT:    s_mov_b32 s8, s2
723; TONGA-NEXT:    s_mov_b32 s9, s3
724; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
725; TONGA-NEXT:    s_mov_b32 s4, s0
726; TONGA-NEXT:    s_mov_b32 s5, s1
727; TONGA-NEXT:    s_waitcnt vmcnt(0)
728; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
729; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
730; TONGA-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
731; TONGA-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
732; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v2, v0
733; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v3, v1
734; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
735; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
736; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
737; TONGA-NEXT:    s_endpgm
738;
739; GFX9-LABEL: sdiv_v2i32_4:
740; GFX9:       ; %bb.0:
741; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
742; GFX9-NEXT:    s_mov_b32 s7, 0xf000
743; GFX9-NEXT:    s_mov_b32 s6, -1
744; GFX9-NEXT:    s_mov_b32 s10, s6
745; GFX9-NEXT:    s_mov_b32 s11, s7
746; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
747; GFX9-NEXT:    s_mov_b32 s8, s2
748; GFX9-NEXT:    s_mov_b32 s9, s3
749; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
750; GFX9-NEXT:    s_mov_b32 s4, s0
751; GFX9-NEXT:    s_mov_b32 s5, s1
752; GFX9-NEXT:    s_waitcnt vmcnt(0)
753; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
754; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
755; GFX9-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
756; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
757; GFX9-NEXT:    v_add_u32_e32 v0, v0, v2
758; GFX9-NEXT:    v_add_u32_e32 v1, v1, v3
759; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
760; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
761; GFX9-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
762; GFX9-NEXT:    s_endpgm
763;
764; EG-LABEL: sdiv_v2i32_4:
765; EG:       ; %bb.0:
766; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
767; EG-NEXT:    TEX 0 @6
768; EG-NEXT:    ALU 13, @9, KC0[CB0:0-32], KC1[]
769; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
770; EG-NEXT:    CF_END
771; EG-NEXT:    PAD
772; EG-NEXT:    Fetch clause starting at 6:
773; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
774; EG-NEXT:    ALU clause starting at 8:
775; EG-NEXT:     MOV * T0.X, KC0[2].Z,
776; EG-NEXT:    ALU clause starting at 9:
777; EG-NEXT:     ASHR * T0.W, T0.Y, literal.x,
778; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
779; EG-NEXT:     LSHR T0.W, PV.W, literal.x,
780; EG-NEXT:     ASHR * T1.W, T0.X, literal.y,
781; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
782; EG-NEXT:     LSHR T1.W, PS, literal.x,
783; EG-NEXT:     ADD_INT * T0.W, T0.Y, PV.W,
784; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
785; EG-NEXT:     ASHR T0.Y, PS, literal.x,
786; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
787; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
788; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
789; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
790; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
791  %num = load <2 x i32>, <2 x i32> addrspace(1) * %in
792  %result = sdiv <2 x i32> %num, <i32 4, i32 4>
793  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
794  ret void
795}
796
797define amdgpu_kernel void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
798; GCN-LABEL: sdiv_v4i32:
799; GCN:       ; %bb.0:
800; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
801; GCN-NEXT:    s_mov_b32 s11, 0xf000
802; GCN-NEXT:    s_mov_b32 s10, -1
803; GCN-NEXT:    s_mov_b32 s6, s10
804; GCN-NEXT:    s_mov_b32 s7, s11
805; GCN-NEXT:    s_waitcnt lgkmcnt(0)
806; GCN-NEXT:    s_mov_b32 s4, s2
807; GCN-NEXT:    s_mov_b32 s5, s3
808; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
809; GCN-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
810; GCN-NEXT:    s_mov_b32 s2, 0x4f7ffffe
811; GCN-NEXT:    s_mov_b32 s8, s0
812; GCN-NEXT:    s_mov_b32 s9, s1
813; GCN-NEXT:    s_waitcnt vmcnt(1)
814; GCN-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
815; GCN-NEXT:    s_waitcnt vmcnt(0)
816; GCN-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
817; GCN-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
818; GCN-NEXT:    v_add_i32_e32 v5, vcc, v11, v5
819; GCN-NEXT:    v_add_i32_e32 v4, vcc, v9, v4
820; GCN-NEXT:    v_xor_b32_e32 v5, v5, v11
821; GCN-NEXT:    v_xor_b32_e32 v15, v8, v9
822; GCN-NEXT:    v_xor_b32_e32 v4, v4, v9
823; GCN-NEXT:    v_cvt_f32_u32_e32 v9, v5
824; GCN-NEXT:    v_add_i32_e32 v0, vcc, v8, v0
825; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
826; GCN-NEXT:    v_cvt_f32_u32_e32 v8, v4
827; GCN-NEXT:    v_rcp_iflag_f32_e32 v9, v9
828; GCN-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
829; GCN-NEXT:    v_add_i32_e32 v6, vcc, v13, v6
830; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
831; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v8
832; GCN-NEXT:    v_xor_b32_e32 v6, v6, v13
833; GCN-NEXT:    v_mul_f32_e32 v9, s2, v9
834; GCN-NEXT:    v_xor_b32_e32 v16, v10, v11
835; GCN-NEXT:    v_cvt_f32_u32_e32 v11, v6
836; GCN-NEXT:    v_cvt_u32_f32_e32 v9, v9
837; GCN-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
838; GCN-NEXT:    v_add_i32_e32 v2, vcc, v12, v2
839; GCN-NEXT:    v_xor_b32_e32 v17, v12, v13
840; GCN-NEXT:    v_xor_b32_e32 v2, v2, v12
841; GCN-NEXT:    v_mul_f32_e32 v8, s2, v8
842; GCN-NEXT:    v_sub_i32_e32 v12, vcc, 0, v5
843; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v8
844; GCN-NEXT:    v_rcp_iflag_f32_e32 v11, v11
845; GCN-NEXT:    v_mul_lo_u32 v12, v12, v9
846; GCN-NEXT:    v_add_i32_e32 v1, vcc, v10, v1
847; GCN-NEXT:    v_xor_b32_e32 v1, v1, v10
848; GCN-NEXT:    v_sub_i32_e32 v10, vcc, 0, v4
849; GCN-NEXT:    v_mul_lo_u32 v10, v10, v8
850; GCN-NEXT:    v_mul_hi_u32 v12, v9, v12
851; GCN-NEXT:    v_mul_f32_e32 v11, s2, v11
852; GCN-NEXT:    v_cvt_u32_f32_e32 v11, v11
853; GCN-NEXT:    v_mul_hi_u32 v10, v8, v10
854; GCN-NEXT:    v_add_i32_e32 v9, vcc, v12, v9
855; GCN-NEXT:    v_sub_i32_e32 v12, vcc, 0, v6
856; GCN-NEXT:    v_mul_lo_u32 v12, v12, v11
857; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
858; GCN-NEXT:    v_mul_hi_u32 v8, v0, v8
859; GCN-NEXT:    v_mul_hi_u32 v12, v11, v12
860; GCN-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
861; GCN-NEXT:    v_add_i32_e32 v7, vcc, v14, v7
862; GCN-NEXT:    v_xor_b32_e32 v7, v7, v14
863; GCN-NEXT:    v_cvt_f32_u32_e32 v10, v7
864; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
865; GCN-NEXT:    v_mul_lo_u32 v12, v8, v4
866; GCN-NEXT:    v_rcp_iflag_f32_e32 v10, v10
867; GCN-NEXT:    v_mul_hi_u32 v9, v1, v9
868; GCN-NEXT:    v_mul_hi_u32 v11, v2, v11
869; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v12
870; GCN-NEXT:    v_add_i32_e32 v12, vcc, 1, v8
871; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
872; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v12, s[0:1]
873; GCN-NEXT:    v_sub_i32_e32 v12, vcc, v0, v4
874; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v12, s[0:1]
875; GCN-NEXT:    v_mul_f32_e32 v10, s2, v10
876; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
877; GCN-NEXT:    v_mul_lo_u32 v0, v9, v5
878; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v10
879; GCN-NEXT:    v_mul_lo_u32 v10, v11, v6
880; GCN-NEXT:    v_add_i32_e32 v12, vcc, 1, v8
881; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v0
882; GCN-NEXT:    v_add_i32_e32 v1, vcc, 1, v9
883; GCN-NEXT:    v_sub_i32_e32 v2, vcc, v2, v10
884; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v0, v5
885; GCN-NEXT:    v_add_i32_e32 v10, vcc, 1, v11
886; GCN-NEXT:    v_cndmask_b32_e64 v1, v9, v1, s[2:3]
887; GCN-NEXT:    v_sub_i32_e32 v9, vcc, v0, v5
888; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
889; GCN-NEXT:    v_cndmask_b32_e64 v10, v11, v10, s[4:5]
890; GCN-NEXT:    v_sub_i32_e32 v11, vcc, v2, v6
891; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v9, s[2:3]
892; GCN-NEXT:    v_add_i32_e32 v9, vcc, 1, v1
893; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v5
894; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v12, s[0:1]
895; GCN-NEXT:    v_cndmask_b32_e32 v0, v1, v9, vcc
896; GCN-NEXT:    v_xor_b32_e32 v1, v8, v15
897; GCN-NEXT:    v_xor_b32_e32 v5, v0, v16
898; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v15
899; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v5, v16
900; GCN-NEXT:    v_sub_i32_e32 v5, vcc, 0, v7
901; GCN-NEXT:    v_mul_lo_u32 v5, v5, v4
902; GCN-NEXT:    v_ashrrev_i32_e32 v9, 31, v3
903; GCN-NEXT:    v_add_i32_e32 v3, vcc, v9, v3
904; GCN-NEXT:    v_mul_hi_u32 v5, v4, v5
905; GCN-NEXT:    v_xor_b32_e32 v3, v3, v9
906; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v11, s[4:5]
907; GCN-NEXT:    v_add_i32_e32 v8, vcc, 1, v10
908; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
909; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
910; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
911; GCN-NEXT:    v_cndmask_b32_e32 v2, v10, v8, vcc
912; GCN-NEXT:    v_xor_b32_e32 v2, v2, v17
913; GCN-NEXT:    v_mul_lo_u32 v5, v4, v7
914; GCN-NEXT:    v_sub_i32_e32 v2, vcc, v2, v17
915; GCN-NEXT:    v_xor_b32_e32 v6, v9, v14
916; GCN-NEXT:    v_sub_i32_e32 v3, vcc, v3, v5
917; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v4
918; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v3, v7
919; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v5, s[0:1]
920; GCN-NEXT:    v_sub_i32_e32 v5, vcc, v3, v7
921; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
922; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v4
923; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
924; GCN-NEXT:    v_cndmask_b32_e32 v3, v4, v5, vcc
925; GCN-NEXT:    v_xor_b32_e32 v3, v3, v6
926; GCN-NEXT:    v_sub_i32_e32 v3, vcc, v3, v6
927; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
928; GCN-NEXT:    s_endpgm
929;
930; TONGA-LABEL: sdiv_v4i32:
931; TONGA:       ; %bb.0:
932; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
933; TONGA-NEXT:    s_mov_b32 s11, 0xf000
934; TONGA-NEXT:    s_mov_b32 s10, -1
935; TONGA-NEXT:    s_mov_b32 s6, s10
936; TONGA-NEXT:    s_mov_b32 s7, s11
937; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
938; TONGA-NEXT:    s_mov_b32 s4, s2
939; TONGA-NEXT:    s_mov_b32 s5, s3
940; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
941; TONGA-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
942; TONGA-NEXT:    s_mov_b32 s2, 0x4f7ffffe
943; TONGA-NEXT:    s_mov_b32 s8, s0
944; TONGA-NEXT:    s_mov_b32 s9, s1
945; TONGA-NEXT:    s_waitcnt vmcnt(1)
946; TONGA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
947; TONGA-NEXT:    s_waitcnt vmcnt(0)
948; TONGA-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
949; TONGA-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
950; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v11, v5
951; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v9, v4
952; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v11
953; TONGA-NEXT:    v_xor_b32_e32 v15, v8, v9
954; TONGA-NEXT:    v_xor_b32_e32 v4, v4, v9
955; TONGA-NEXT:    v_cvt_f32_u32_e32 v9, v5
956; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v8, v0
957; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
958; TONGA-NEXT:    v_cvt_f32_u32_e32 v8, v4
959; TONGA-NEXT:    v_rcp_iflag_f32_e32 v9, v9
960; TONGA-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
961; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v13, v6
962; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
963; TONGA-NEXT:    v_rcp_iflag_f32_e32 v8, v8
964; TONGA-NEXT:    v_xor_b32_e32 v6, v6, v13
965; TONGA-NEXT:    v_mul_f32_e32 v9, s2, v9
966; TONGA-NEXT:    v_xor_b32_e32 v16, v10, v11
967; TONGA-NEXT:    v_cvt_f32_u32_e32 v11, v6
968; TONGA-NEXT:    v_cvt_u32_f32_e32 v9, v9
969; TONGA-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
970; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v12, v2
971; TONGA-NEXT:    v_xor_b32_e32 v17, v12, v13
972; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v12
973; TONGA-NEXT:    v_mul_f32_e32 v8, s2, v8
974; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, 0, v5
975; TONGA-NEXT:    v_cvt_u32_f32_e32 v8, v8
976; TONGA-NEXT:    v_rcp_iflag_f32_e32 v11, v11
977; TONGA-NEXT:    v_mul_lo_u32 v12, v12, v9
978; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v10, v1
979; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v10
980; TONGA-NEXT:    v_sub_u32_e32 v10, vcc, 0, v4
981; TONGA-NEXT:    v_mul_lo_u32 v10, v10, v8
982; TONGA-NEXT:    v_mul_hi_u32 v12, v9, v12
983; TONGA-NEXT:    v_mul_f32_e32 v11, s2, v11
984; TONGA-NEXT:    v_cvt_u32_f32_e32 v11, v11
985; TONGA-NEXT:    v_mul_hi_u32 v10, v8, v10
986; TONGA-NEXT:    v_add_u32_e32 v9, vcc, v12, v9
987; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, 0, v6
988; TONGA-NEXT:    v_mul_lo_u32 v12, v12, v11
989; TONGA-NEXT:    v_add_u32_e32 v8, vcc, v10, v8
990; TONGA-NEXT:    v_mul_hi_u32 v8, v0, v8
991; TONGA-NEXT:    v_mul_hi_u32 v12, v11, v12
992; TONGA-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
993; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v14, v7
994; TONGA-NEXT:    v_xor_b32_e32 v7, v7, v14
995; TONGA-NEXT:    v_cvt_f32_u32_e32 v10, v7
996; TONGA-NEXT:    v_add_u32_e32 v11, vcc, v12, v11
997; TONGA-NEXT:    v_mul_lo_u32 v12, v8, v4
998; TONGA-NEXT:    v_rcp_iflag_f32_e32 v10, v10
999; TONGA-NEXT:    v_mul_hi_u32 v9, v1, v9
1000; TONGA-NEXT:    v_mul_hi_u32 v11, v2, v11
1001; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v12
1002; TONGA-NEXT:    v_add_u32_e32 v12, vcc, 1, v8
1003; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
1004; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v12, s[0:1]
1005; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, v0, v4
1006; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v12, s[0:1]
1007; TONGA-NEXT:    v_mul_f32_e32 v10, s2, v10
1008; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
1009; TONGA-NEXT:    v_mul_lo_u32 v0, v9, v5
1010; TONGA-NEXT:    v_cvt_u32_f32_e32 v4, v10
1011; TONGA-NEXT:    v_mul_lo_u32 v10, v11, v6
1012; TONGA-NEXT:    v_add_u32_e32 v12, vcc, 1, v8
1013; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v1, v0
1014; TONGA-NEXT:    v_add_u32_e32 v1, vcc, 1, v9
1015; TONGA-NEXT:    v_sub_u32_e32 v2, vcc, v2, v10
1016; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v0, v5
1017; TONGA-NEXT:    v_add_u32_e32 v10, vcc, 1, v11
1018; TONGA-NEXT:    v_cndmask_b32_e64 v1, v9, v1, s[2:3]
1019; TONGA-NEXT:    v_sub_u32_e32 v9, vcc, v0, v5
1020; TONGA-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
1021; TONGA-NEXT:    v_cndmask_b32_e64 v10, v11, v10, s[4:5]
1022; TONGA-NEXT:    v_sub_u32_e32 v11, vcc, v2, v6
1023; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v9, s[2:3]
1024; TONGA-NEXT:    v_add_u32_e32 v9, vcc, 1, v1
1025; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v5
1026; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v12, s[0:1]
1027; TONGA-NEXT:    v_cndmask_b32_e32 v0, v1, v9, vcc
1028; TONGA-NEXT:    v_xor_b32_e32 v1, v8, v15
1029; TONGA-NEXT:    v_xor_b32_e32 v5, v0, v16
1030; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v15, v1
1031; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v16, v5
1032; TONGA-NEXT:    v_sub_u32_e32 v5, vcc, 0, v7
1033; TONGA-NEXT:    v_mul_lo_u32 v5, v5, v4
1034; TONGA-NEXT:    v_ashrrev_i32_e32 v9, 31, v3
1035; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v9, v3
1036; TONGA-NEXT:    v_mul_hi_u32 v5, v4, v5
1037; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v9
1038; TONGA-NEXT:    v_cndmask_b32_e64 v2, v2, v11, s[4:5]
1039; TONGA-NEXT:    v_add_u32_e32 v8, vcc, 1, v10
1040; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v5, v4
1041; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
1042; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1043; TONGA-NEXT:    v_cndmask_b32_e32 v2, v10, v8, vcc
1044; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v17
1045; TONGA-NEXT:    v_mul_lo_u32 v5, v4, v7
1046; TONGA-NEXT:    v_subrev_u32_e32 v2, vcc, v17, v2
1047; TONGA-NEXT:    v_xor_b32_e32 v6, v9, v14
1048; TONGA-NEXT:    v_sub_u32_e32 v3, vcc, v3, v5
1049; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v4
1050; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v3, v7
1051; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v5, s[0:1]
1052; TONGA-NEXT:    v_sub_u32_e32 v5, vcc, v3, v7
1053; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
1054; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v4
1055; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
1056; TONGA-NEXT:    v_cndmask_b32_e32 v3, v4, v5, vcc
1057; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v6
1058; TONGA-NEXT:    v_subrev_u32_e32 v3, vcc, v6, v3
1059; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1060; TONGA-NEXT:    s_endpgm
1061;
1062; GFX9-LABEL: sdiv_v4i32:
1063; GFX9:       ; %bb.0:
1064; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1065; GFX9-NEXT:    s_mov_b32 s11, 0xf000
1066; GFX9-NEXT:    s_mov_b32 s10, -1
1067; GFX9-NEXT:    s_mov_b32 s6, s10
1068; GFX9-NEXT:    s_mov_b32 s7, s11
1069; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1070; GFX9-NEXT:    s_mov_b32 s4, s2
1071; GFX9-NEXT:    s_mov_b32 s5, s3
1072; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
1073; GFX9-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
1074; GFX9-NEXT:    s_mov_b32 s2, 0x4f7ffffe
1075; GFX9-NEXT:    s_mov_b32 s8, s0
1076; GFX9-NEXT:    s_mov_b32 s9, s1
1077; GFX9-NEXT:    s_waitcnt vmcnt(1)
1078; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
1079; GFX9-NEXT:    s_waitcnt vmcnt(0)
1080; GFX9-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
1081; GFX9-NEXT:    v_add_u32_e32 v4, v4, v9
1082; GFX9-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
1083; GFX9-NEXT:    v_add_u32_e32 v0, v0, v8
1084; GFX9-NEXT:    v_xor_b32_e32 v4, v4, v9
1085; GFX9-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
1086; GFX9-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
1087; GFX9-NEXT:    v_xor_b32_e32 v16, v8, v9
1088; GFX9-NEXT:    v_add_u32_e32 v5, v5, v11
1089; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v8
1090; GFX9-NEXT:    v_cvt_f32_u32_e32 v8, v4
1091; GFX9-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
1092; GFX9-NEXT:    v_ashrrev_i32_e32 v15, 31, v7
1093; GFX9-NEXT:    v_add_u32_e32 v1, v1, v10
1094; GFX9-NEXT:    v_add_u32_e32 v6, v6, v13
1095; GFX9-NEXT:    v_xor_b32_e32 v5, v5, v11
1096; GFX9-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
1097; GFX9-NEXT:    v_add_u32_e32 v2, v2, v12
1098; GFX9-NEXT:    v_add_u32_e32 v7, v7, v15
1099; GFX9-NEXT:    v_xor_b32_e32 v17, v10, v11
1100; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v10
1101; GFX9-NEXT:    v_xor_b32_e32 v6, v6, v13
1102; GFX9-NEXT:    v_cvt_f32_u32_e32 v10, v5
1103; GFX9-NEXT:    v_add_u32_e32 v3, v3, v14
1104; GFX9-NEXT:    v_xor_b32_e32 v18, v12, v13
1105; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v12
1106; GFX9-NEXT:    v_xor_b32_e32 v7, v7, v15
1107; GFX9-NEXT:    v_cvt_f32_u32_e32 v12, v6
1108; GFX9-NEXT:    v_xor_b32_e32 v19, v14, v15
1109; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v14
1110; GFX9-NEXT:    v_cvt_f32_u32_e32 v14, v7
1111; GFX9-NEXT:    v_rcp_iflag_f32_e32 v8, v8
1112; GFX9-NEXT:    v_rcp_iflag_f32_e32 v10, v10
1113; GFX9-NEXT:    v_rcp_iflag_f32_e32 v12, v12
1114; GFX9-NEXT:    v_rcp_iflag_f32_e32 v14, v14
1115; GFX9-NEXT:    v_mul_f32_e32 v8, s2, v8
1116; GFX9-NEXT:    v_cvt_u32_f32_e32 v8, v8
1117; GFX9-NEXT:    v_mul_f32_e32 v10, s2, v10
1118; GFX9-NEXT:    v_mul_f32_e32 v12, s2, v12
1119; GFX9-NEXT:    v_cvt_u32_f32_e32 v10, v10
1120; GFX9-NEXT:    v_sub_u32_e32 v9, 0, v4
1121; GFX9-NEXT:    v_mul_f32_e32 v14, s2, v14
1122; GFX9-NEXT:    v_cvt_u32_f32_e32 v12, v12
1123; GFX9-NEXT:    v_cvt_u32_f32_e32 v14, v14
1124; GFX9-NEXT:    v_mul_lo_u32 v9, v9, v8
1125; GFX9-NEXT:    v_sub_u32_e32 v11, 0, v5
1126; GFX9-NEXT:    v_sub_u32_e32 v13, 0, v6
1127; GFX9-NEXT:    v_mul_lo_u32 v11, v11, v10
1128; GFX9-NEXT:    v_sub_u32_e32 v15, 0, v7
1129; GFX9-NEXT:    v_mul_lo_u32 v13, v13, v12
1130; GFX9-NEXT:    v_mul_lo_u32 v15, v15, v14
1131; GFX9-NEXT:    v_mul_hi_u32 v9, v8, v9
1132; GFX9-NEXT:    v_mul_hi_u32 v11, v10, v11
1133; GFX9-NEXT:    v_mul_hi_u32 v13, v12, v13
1134; GFX9-NEXT:    v_mul_hi_u32 v15, v14, v15
1135; GFX9-NEXT:    v_add_u32_e32 v8, v8, v9
1136; GFX9-NEXT:    v_mul_hi_u32 v8, v0, v8
1137; GFX9-NEXT:    v_add_u32_e32 v9, v10, v11
1138; GFX9-NEXT:    v_add_u32_e32 v10, v12, v13
1139; GFX9-NEXT:    v_mul_hi_u32 v9, v1, v9
1140; GFX9-NEXT:    v_add_u32_e32 v11, v14, v15
1141; GFX9-NEXT:    v_mul_hi_u32 v10, v2, v10
1142; GFX9-NEXT:    v_mul_hi_u32 v11, v3, v11
1143; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v4
1144; GFX9-NEXT:    v_mul_lo_u32 v14, v9, v5
1145; GFX9-NEXT:    v_mul_lo_u32 v15, v10, v6
1146; GFX9-NEXT:    v_add_u32_e32 v13, 1, v8
1147; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v12
1148; GFX9-NEXT:    v_mul_lo_u32 v12, v11, v7
1149; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v14
1150; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
1151; GFX9-NEXT:    v_add_u32_e32 v14, 1, v9
1152; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v15
1153; GFX9-NEXT:    v_cndmask_b32_e32 v8, v8, v13, vcc
1154; GFX9-NEXT:    v_sub_u32_e32 v13, v0, v4
1155; GFX9-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v5
1156; GFX9-NEXT:    v_add_u32_e32 v15, 1, v10
1157; GFX9-NEXT:    v_sub_u32_e32 v3, v3, v12
1158; GFX9-NEXT:    v_cndmask_b32_e64 v9, v9, v14, s[0:1]
1159; GFX9-NEXT:    v_sub_u32_e32 v14, v1, v5
1160; GFX9-NEXT:    v_cmp_ge_u32_e64 s[2:3], v2, v6
1161; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v13, vcc
1162; GFX9-NEXT:    v_add_u32_e32 v12, 1, v11
1163; GFX9-NEXT:    v_cndmask_b32_e64 v10, v10, v15, s[2:3]
1164; GFX9-NEXT:    v_sub_u32_e32 v15, v2, v6
1165; GFX9-NEXT:    v_cmp_ge_u32_e64 s[4:5], v3, v7
1166; GFX9-NEXT:    v_add_u32_e32 v13, 1, v8
1167; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v14, s[0:1]
1168; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
1169; GFX9-NEXT:    v_cndmask_b32_e64 v11, v11, v12, s[4:5]
1170; GFX9-NEXT:    v_sub_u32_e32 v12, v3, v7
1171; GFX9-NEXT:    v_add_u32_e32 v14, 1, v9
1172; GFX9-NEXT:    v_cndmask_b32_e64 v2, v2, v15, s[2:3]
1173; GFX9-NEXT:    v_cndmask_b32_e32 v0, v8, v13, vcc
1174; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
1175; GFX9-NEXT:    v_add_u32_e32 v15, 1, v10
1176; GFX9-NEXT:    v_cndmask_b32_e64 v3, v3, v12, s[4:5]
1177; GFX9-NEXT:    v_cndmask_b32_e32 v1, v9, v14, vcc
1178; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1179; GFX9-NEXT:    v_add_u32_e32 v12, 1, v11
1180; GFX9-NEXT:    v_cndmask_b32_e32 v2, v10, v15, vcc
1181; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
1182; GFX9-NEXT:    v_cndmask_b32_e32 v3, v11, v12, vcc
1183; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v16
1184; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v17
1185; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v18
1186; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v19
1187; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v16
1188; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v17
1189; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v18
1190; GFX9-NEXT:    v_sub_u32_e32 v3, v3, v19
1191; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1192; GFX9-NEXT:    s_endpgm
1193;
1194; EG-LABEL: sdiv_v4i32:
1195; EG:       ; %bb.0:
1196; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
1197; EG-NEXT:    TEX 1 @6
1198; EG-NEXT:    ALU 101, @11, KC0[CB0:0-32], KC1[]
1199; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
1200; EG-NEXT:    CF_END
1201; EG-NEXT:    PAD
1202; EG-NEXT:    Fetch clause starting at 6:
1203; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 16, #1
1204; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
1205; EG-NEXT:    ALU clause starting at 10:
1206; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1207; EG-NEXT:    ALU clause starting at 11:
1208; EG-NEXT:     SETGT_INT * T2.W, 0.0, T1.W,
1209; EG-NEXT:     ADD_INT * T1.W, T1.W, PV.W,
1210; EG-NEXT:     XOR_INT * T1.W, PV.W, T2.W,
1211; EG-NEXT:     SUB_INT T3.W, 0.0, PV.W,
1212; EG-NEXT:     RECIP_UINT * T2.X, PV.W,
1213; EG-NEXT:     SETGT_INT T4.W, 0.0, T0.W,
1214; EG-NEXT:     MULLO_INT * T2.Y, PV.W, PS,
1215; EG-NEXT:     SETGT_INT T2.Z, 0.0, T1.Y,
1216; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
1217; EG-NEXT:     MULHI * T2.Y, T2.X, PS,
1218; EG-NEXT:     ADD_INT T3.Z, T2.X, PS,
1219; EG-NEXT:     XOR_INT T0.W, PV.W, T4.W,
1220; EG-NEXT:     ADD_INT * T3.W, T1.Y, PV.Z,
1221; EG-NEXT:     XOR_INT T3.W, PS, T2.Z,
1222; EG-NEXT:     MULHI * T1.Y, PV.W, PV.Z,
1223; EG-NEXT:     SUB_INT T5.W, 0.0, PV.W,
1224; EG-NEXT:     RECIP_UINT * T2.X, PV.W,
1225; EG-NEXT:     SETGT_INT T6.W, 0.0, T0.Y,
1226; EG-NEXT:     MULLO_INT * T2.Y, PV.W, PS,
1227; EG-NEXT:     ADD_INT T5.W, T0.Y, PV.W,
1228; EG-NEXT:     MULHI * T0.Y, T2.X, PS,
1229; EG-NEXT:     ADD_INT T0.Y, T2.X, PS,
1230; EG-NEXT:     XOR_INT T3.Z, PV.W, T6.W, BS:VEC_021/SCL_122
1231; EG-NEXT:     SETGT_INT T5.W, 0.0, T1.Z,
1232; EG-NEXT:     MULLO_INT * T2.X, T1.Y, T1.W,
1233; EG-NEXT:     ADD_INT T7.W, T1.Z, PV.W,
1234; EG-NEXT:     MULHI * T0.Y, PV.Z, PV.Y,
1235; EG-NEXT:     XOR_INT T7.W, PV.W, T5.W, BS:VEC_021/SCL_122
1236; EG-NEXT:     MULLO_INT * T1.Z, PS, T3.W,
1237; EG-NEXT:     SUB_INT T4.Z, 0.0, PV.W,
1238; EG-NEXT:     SETGT_INT T8.W, 0.0, T1.X,
1239; EG-NEXT:     RECIP_UINT * T2.Y, PV.W,
1240; EG-NEXT:     ADD_INT T9.W, T1.X, PV.W,
1241; EG-NEXT:     MULLO_INT * T1.X, PV.Z, PS,
1242; EG-NEXT:     SETGT_INT T4.Z, 0.0, T0.Z,
1243; EG-NEXT:     XOR_INT T9.W, PV.W, T8.W,
1244; EG-NEXT:     MULHI * T1.X, T2.Y, PS,
1245; EG-NEXT:     ADD_INT T1.X, T2.Y, PS,
1246; EG-NEXT:     SUB_INT T2.Y, 0.0, PV.W,
1247; EG-NEXT:     SUB_INT T1.Z, T3.Z, T1.Z,
1248; EG-NEXT:     ADD_INT T10.W, T0.Z, PV.Z, BS:VEC_201
1249; EG-NEXT:     RECIP_UINT * T0.Z, PV.W,
1250; EG-NEXT:     XOR_INT T3.X, PV.W, T4.Z,
1251; EG-NEXT:     ADD_INT T3.Y, T0.Y, 1,
1252; EG-NEXT:     SETGE_UINT T3.Z, PV.Z, T3.W,
1253; EG-NEXT:     SUB_INT T10.W, PV.Z, T3.W,
1254; EG-NEXT:     MULLO_INT * T2.Y, PV.Y, PS,
1255; EG-NEXT:     CNDE_INT T1.Z, PV.Z, T1.Z, PV.W,
1256; EG-NEXT:     CNDE_INT T10.W, PV.Z, T0.Y, PV.Y,
1257; EG-NEXT:     MULHI * T0.Y, PV.X, T1.X,
1258; EG-NEXT:     SETGT_INT T3.Y, 0.0, T0.X,
1259; EG-NEXT:     ADD_INT T3.Z, PV.W, 1,
1260; EG-NEXT:     SETGE_UINT T3.W, PV.Z, T3.W, BS:VEC_021/SCL_122
1261; EG-NEXT:     MULLO_INT * T1.X, PS, T7.W,
1262; EG-NEXT:     CNDE_INT T4.Y, PV.W, T10.W, PV.Z,
1263; EG-NEXT:     ADD_INT T1.Z, T0.X, PV.Y,
1264; EG-NEXT:     SUB_INT T3.W, T3.X, PS, BS:VEC_120/SCL_212
1265; EG-NEXT:     MULHI * T0.X, T0.Z, T2.Y,
1266; EG-NEXT:     ADD_INT T1.X, T0.Y, 1,
1267; EG-NEXT:     SETGE_UINT T2.Y, PV.W, T7.W,
1268; EG-NEXT:     ADD_INT T0.Z, T0.Z, PS,
1269; EG-NEXT:     XOR_INT T10.W, PV.Z, T3.Y,
1270; EG-NEXT:     SUB_INT * T0.W, T0.W, T2.X,
1271; EG-NEXT:     SUB_INT T0.X, T3.W, T7.W,
1272; EG-NEXT:     ADD_INT T5.Y, T1.Y, 1,
1273; EG-NEXT:     SETGE_UINT T1.Z, PS, T1.W, BS:VEC_021/SCL_122
1274; EG-NEXT:     SUB_INT T11.W, PS, T1.W, BS:VEC_021/SCL_122
1275; EG-NEXT:     MULHI * T0.Z, PV.W, PV.Z,
1276; EG-NEXT:     CNDE_INT T2.X, PV.Z, T0.W, PV.W, BS:VEC_021/SCL_122
1277; EG-NEXT:     CNDE_INT T1.Y, PV.Z, T1.Y, PV.Y,
1278; EG-NEXT:     CNDE_INT T1.Z, T2.Y, T3.W, PV.X, BS:VEC_201
1279; EG-NEXT:     CNDE_INT T0.W, T2.Y, T0.Y, T1.X, BS:VEC_201
1280; EG-NEXT:     MULLO_INT * T0.X, PS, T9.W,
1281; EG-NEXT:     ADD_INT T1.X, PV.W, 1,
1282; EG-NEXT:     SETGE_UINT T0.Y, PV.Z, T7.W,
1283; EG-NEXT:     ADD_INT T1.Z, PV.Y, 1,
1284; EG-NEXT:     SETGE_UINT T1.W, PV.X, T1.W, BS:VEC_102/SCL_221
1285; EG-NEXT:     SUB_INT * T3.W, T10.W, PS,
1286; EG-NEXT:     ADD_INT T0.X, T0.Z, 1,
1287; EG-NEXT:     SETGE_UINT T2.Y, PS, T9.W, BS:VEC_102/SCL_221
1288; EG-NEXT:     SUB_INT T3.Z, PS, T9.W, BS:VEC_102/SCL_221
1289; EG-NEXT:     CNDE_INT T1.W, PV.W, T1.Y, PV.Z,
1290; EG-NEXT:     XOR_INT * T2.W, T4.W, T2.W,
1291; EG-NEXT:     XOR_INT T2.X, PV.W, PS,
1292; EG-NEXT:     CNDE_INT T1.Y, PV.Y, T3.W, PV.Z, BS:VEC_021/SCL_122
1293; EG-NEXT:     CNDE_INT T0.Z, PV.Y, T0.Z, PV.X,
1294; EG-NEXT:     CNDE_INT T0.W, T0.Y, T0.W, T1.X, BS:VEC_102/SCL_221
1295; EG-NEXT:     XOR_INT * T1.W, T4.Z, T5.W,
1296; EG-NEXT:     XOR_INT T0.X, T6.W, T2.Z,
1297; EG-NEXT:     XOR_INT T0.Y, PV.W, PS,
1298; EG-NEXT:     ADD_INT T1.Z, PV.Z, 1,
1299; EG-NEXT:     SETGE_UINT T0.W, PV.Y, T9.W, BS:VEC_021/SCL_122
1300; EG-NEXT:     SUB_INT * T2.W, PV.X, T2.W,
1301; EG-NEXT:     CNDE_INT T1.Y, PV.W, T0.Z, PV.Z,
1302; EG-NEXT:     SUB_INT T2.Z, PV.Y, T1.W,
1303; EG-NEXT:     XOR_INT T0.W, T3.Y, T8.W, BS:VEC_021/SCL_122
1304; EG-NEXT:     XOR_INT * T1.W, T4.Y, PV.X,
1305; EG-NEXT:     SUB_INT T2.Y, PS, T0.X,
1306; EG-NEXT:     XOR_INT * T1.W, PV.Y, PV.W,
1307; EG-NEXT:     SUB_INT T2.X, PV.W, T0.W,
1308; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
1309; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1310  %den_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
1311  %num = load <4 x i32>, <4 x i32> addrspace(1) * %in
1312  %den = load <4 x i32>, <4 x i32> addrspace(1) * %den_ptr
1313  %result = sdiv <4 x i32> %num, %den
1314  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1315  ret void
1316}
1317
1318define amdgpu_kernel void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
1319; GCN-LABEL: sdiv_v4i32_4:
1320; GCN:       ; %bb.0:
1321; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1322; GCN-NEXT:    s_mov_b32 s7, 0xf000
1323; GCN-NEXT:    s_mov_b32 s6, -1
1324; GCN-NEXT:    s_mov_b32 s10, s6
1325; GCN-NEXT:    s_mov_b32 s11, s7
1326; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1327; GCN-NEXT:    s_mov_b32 s8, s2
1328; GCN-NEXT:    s_mov_b32 s9, s3
1329; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1330; GCN-NEXT:    s_mov_b32 s4, s0
1331; GCN-NEXT:    s_mov_b32 s5, s1
1332; GCN-NEXT:    s_waitcnt vmcnt(0)
1333; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1334; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1335; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1336; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1337; GCN-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1338; GCN-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1339; GCN-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1340; GCN-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1341; GCN-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
1342; GCN-NEXT:    v_add_i32_e32 v1, vcc, v5, v1
1343; GCN-NEXT:    v_add_i32_e32 v2, vcc, v6, v2
1344; GCN-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
1345; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1346; GCN-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1347; GCN-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1348; GCN-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1349; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1350; GCN-NEXT:    s_endpgm
1351;
1352; TONGA-LABEL: sdiv_v4i32_4:
1353; TONGA:       ; %bb.0:
1354; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1355; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1356; TONGA-NEXT:    s_mov_b32 s6, -1
1357; TONGA-NEXT:    s_mov_b32 s10, s6
1358; TONGA-NEXT:    s_mov_b32 s11, s7
1359; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1360; TONGA-NEXT:    s_mov_b32 s8, s2
1361; TONGA-NEXT:    s_mov_b32 s9, s3
1362; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1363; TONGA-NEXT:    s_mov_b32 s4, s0
1364; TONGA-NEXT:    s_mov_b32 s5, s1
1365; TONGA-NEXT:    s_waitcnt vmcnt(0)
1366; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1367; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1368; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1369; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1370; TONGA-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1371; TONGA-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1372; TONGA-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1373; TONGA-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1374; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
1375; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v5, v1
1376; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v6, v2
1377; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
1378; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1379; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1380; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1381; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1382; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1383; TONGA-NEXT:    s_endpgm
1384;
1385; GFX9-LABEL: sdiv_v4i32_4:
1386; GFX9:       ; %bb.0:
1387; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1388; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1389; GFX9-NEXT:    s_mov_b32 s6, -1
1390; GFX9-NEXT:    s_mov_b32 s10, s6
1391; GFX9-NEXT:    s_mov_b32 s11, s7
1392; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1393; GFX9-NEXT:    s_mov_b32 s8, s2
1394; GFX9-NEXT:    s_mov_b32 s9, s3
1395; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1396; GFX9-NEXT:    s_mov_b32 s4, s0
1397; GFX9-NEXT:    s_mov_b32 s5, s1
1398; GFX9-NEXT:    s_waitcnt vmcnt(0)
1399; GFX9-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1400; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1401; GFX9-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1402; GFX9-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1403; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1404; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1405; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1406; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1407; GFX9-NEXT:    v_add_u32_e32 v0, v0, v4
1408; GFX9-NEXT:    v_add_u32_e32 v1, v1, v5
1409; GFX9-NEXT:    v_add_u32_e32 v2, v2, v6
1410; GFX9-NEXT:    v_add_u32_e32 v3, v3, v7
1411; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1412; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1413; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1414; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1415; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1416; GFX9-NEXT:    s_endpgm
1417;
1418; EG-LABEL: sdiv_v4i32_4:
1419; EG:       ; %bb.0:
1420; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
1421; EG-NEXT:    TEX 0 @6
1422; EG-NEXT:    ALU 24, @9, KC0[CB0:0-32], KC1[]
1423; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1424; EG-NEXT:    CF_END
1425; EG-NEXT:    PAD
1426; EG-NEXT:    Fetch clause starting at 6:
1427; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
1428; EG-NEXT:    ALU clause starting at 8:
1429; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1430; EG-NEXT:    ALU clause starting at 9:
1431; EG-NEXT:     ASHR T1.W, T0.W, literal.x,
1432; EG-NEXT:     ASHR * T2.W, T0.Z, literal.x,
1433; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
1434; EG-NEXT:     LSHR * T1.W, PV.W, literal.x,
1435; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1436; EG-NEXT:     ADD_INT T1.Z, T0.W, PV.W,
1437; EG-NEXT:     LSHR T0.W, T2.W, literal.x, BS:VEC_120/SCL_212
1438; EG-NEXT:     ASHR * T1.W, T0.Y, literal.y,
1439; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
1440; EG-NEXT:     LSHR T1.Y, PS, literal.x,
1441; EG-NEXT:     ASHR T2.Z, T0.X, literal.y,
1442; EG-NEXT:     ADD_INT T0.W, T0.Z, PV.W,
1443; EG-NEXT:     ASHR * T1.W, PV.Z, literal.z,
1444; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
1445; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1446; EG-NEXT:     ASHR T1.Z, PV.W, literal.x,
1447; EG-NEXT:     LSHR T0.W, PV.Z, literal.y,
1448; EG-NEXT:     ADD_INT * T2.W, T0.Y, PV.Y,
1449; EG-NEXT:    2(2.802597e-45), 30(4.203895e-44)
1450; EG-NEXT:     ASHR T1.Y, PS, literal.x,
1451; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
1452; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1453; EG-NEXT:     ASHR T1.X, PV.W, literal.x,
1454; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
1455; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1456  %num = load <4 x i32>, <4 x i32> addrspace(1) * %in
1457  %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
1458  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1459  ret void
1460}
1461
1462define amdgpu_kernel void @v_sdiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
1463; GCN-LABEL: v_sdiv_i8:
1464; GCN:       ; %bb.0:
1465; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1466; GCN-NEXT:    s_mov_b32 s7, 0xf000
1467; GCN-NEXT:    s_mov_b32 s6, -1
1468; GCN-NEXT:    s_mov_b32 s10, s6
1469; GCN-NEXT:    s_mov_b32 s11, s7
1470; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1471; GCN-NEXT:    s_mov_b32 s8, s2
1472; GCN-NEXT:    s_mov_b32 s9, s3
1473; GCN-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1474; GCN-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0
1475; GCN-NEXT:    s_mov_b32 s4, s0
1476; GCN-NEXT:    s_mov_b32 s5, s1
1477; GCN-NEXT:    s_waitcnt vmcnt(1)
1478; GCN-NEXT:    v_cvt_f32_i32_e32 v2, v0
1479; GCN-NEXT:    s_waitcnt vmcnt(0)
1480; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v1
1481; GCN-NEXT:    v_xor_b32_e32 v0, v1, v0
1482; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1483; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1484; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1485; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
1486; GCN-NEXT:    v_trunc_f32_e32 v1, v1
1487; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
1488; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
1489; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1490; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1491; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
1492; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 8
1493; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1494; GCN-NEXT:    s_endpgm
1495;
1496; TONGA-LABEL: v_sdiv_i8:
1497; TONGA:       ; %bb.0:
1498; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1499; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1500; TONGA-NEXT:    s_mov_b32 s6, -1
1501; TONGA-NEXT:    s_mov_b32 s10, s6
1502; TONGA-NEXT:    s_mov_b32 s11, s7
1503; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1504; TONGA-NEXT:    s_mov_b32 s8, s2
1505; TONGA-NEXT:    s_mov_b32 s9, s3
1506; TONGA-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1507; TONGA-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0
1508; TONGA-NEXT:    s_mov_b32 s4, s0
1509; TONGA-NEXT:    s_mov_b32 s5, s1
1510; TONGA-NEXT:    s_waitcnt vmcnt(1)
1511; TONGA-NEXT:    v_cvt_f32_i32_e32 v2, v0
1512; TONGA-NEXT:    s_waitcnt vmcnt(0)
1513; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v1
1514; TONGA-NEXT:    v_xor_b32_e32 v0, v1, v0
1515; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1516; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1517; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1518; TONGA-NEXT:    v_mul_f32_e32 v1, v3, v4
1519; TONGA-NEXT:    v_trunc_f32_e32 v1, v1
1520; TONGA-NEXT:    v_mad_f32 v3, -v1, v2, v3
1521; TONGA-NEXT:    v_cvt_i32_f32_e32 v1, v1
1522; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1523; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1524; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
1525; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 8
1526; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1527; TONGA-NEXT:    s_endpgm
1528;
1529; GFX9-LABEL: v_sdiv_i8:
1530; GFX9:       ; %bb.0:
1531; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1532; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1533; GFX9-NEXT:    s_mov_b32 s6, -1
1534; GFX9-NEXT:    s_mov_b32 s10, s6
1535; GFX9-NEXT:    s_mov_b32 s11, s7
1536; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1537; GFX9-NEXT:    s_mov_b32 s8, s2
1538; GFX9-NEXT:    s_mov_b32 s9, s3
1539; GFX9-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1540; GFX9-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0
1541; GFX9-NEXT:    s_mov_b32 s4, s0
1542; GFX9-NEXT:    s_mov_b32 s5, s1
1543; GFX9-NEXT:    s_waitcnt vmcnt(1)
1544; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v0
1545; GFX9-NEXT:    s_waitcnt vmcnt(0)
1546; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v1
1547; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v0
1548; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1549; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1550; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1551; GFX9-NEXT:    v_mul_f32_e32 v1, v3, v4
1552; GFX9-NEXT:    v_trunc_f32_e32 v1, v1
1553; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v1
1554; GFX9-NEXT:    v_mad_f32 v1, -v1, v2, v3
1555; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1556; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1557; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1558; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 8
1559; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1560; GFX9-NEXT:    s_endpgm
1561;
1562; EG-LABEL: v_sdiv_i8:
1563; EG:       ; %bb.0:
1564; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
1565; EG-NEXT:    TEX 1 @6
1566; EG-NEXT:    ALU 21, @11, KC0[CB0:0-32], KC1[]
1567; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1568; EG-NEXT:    CF_END
1569; EG-NEXT:    PAD
1570; EG-NEXT:    Fetch clause starting at 6:
1571; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 1, #1
1572; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
1573; EG-NEXT:    ALU clause starting at 10:
1574; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1575; EG-NEXT:    ALU clause starting at 11:
1576; EG-NEXT:     BFE_INT * T0.W, T1.X, 0.0, literal.x,
1577; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1578; EG-NEXT:     INT_TO_FLT * T0.Y, PV.W,
1579; EG-NEXT:     BFE_INT T1.W, T0.X, 0.0, literal.x,
1580; EG-NEXT:     RECIP_IEEE * T0.X, PS,
1581; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1582; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1583; EG-NEXT:     MUL_IEEE * T2.W, PS, T0.X,
1584; EG-NEXT:     TRUNC T2.W, PV.W,
1585; EG-NEXT:     XOR_INT * T0.W, T1.W, T0.W,
1586; EG-NEXT:     ASHR T0.W, PS, literal.x,
1587; EG-NEXT:     MULADD_IEEE * T1.W, -PV.W, T0.Y, T0.Z,
1588; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1589; EG-NEXT:     TRUNC T0.Z, T2.W,
1590; EG-NEXT:     SETGE T1.W, |PS|, |T0.Y|,
1591; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1592; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1593; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1594; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1595; EG-NEXT:     BFE_INT T0.X, PV.W, 0.0, literal.x,
1596; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1597; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
1598  %den_ptr = getelementptr i8, i8 addrspace(1)* %in, i8 1
1599  %num = load i8, i8 addrspace(1) * %in
1600  %den = load i8, i8 addrspace(1) * %den_ptr
1601  %result = sdiv i8 %num, %den
1602  %result.ext = sext i8 %result to i32
1603  store i32 %result.ext, i32 addrspace(1)* %out
1604  ret void
1605}
1606
1607define amdgpu_kernel void @v_sdiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) {
1608; GCN-LABEL: v_sdiv_i23:
1609; GCN:       ; %bb.0:
1610; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1611; GCN-NEXT:    s_mov_b32 s7, 0xf000
1612; GCN-NEXT:    s_mov_b32 s6, -1
1613; GCN-NEXT:    s_mov_b32 s10, s6
1614; GCN-NEXT:    s_mov_b32 s11, s7
1615; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1616; GCN-NEXT:    s_mov_b32 s8, s2
1617; GCN-NEXT:    s_mov_b32 s9, s3
1618; GCN-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1619; GCN-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1620; GCN-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1621; GCN-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1622; GCN-NEXT:    s_mov_b32 s4, s0
1623; GCN-NEXT:    s_mov_b32 s5, s1
1624; GCN-NEXT:    s_waitcnt vmcnt(3)
1625; GCN-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
1626; GCN-NEXT:    s_waitcnt vmcnt(2)
1627; GCN-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1628; GCN-NEXT:    s_waitcnt vmcnt(1)
1629; GCN-NEXT:    v_or_b32_e32 v1, v2, v1
1630; GCN-NEXT:    v_bfe_i32 v1, v1, 0, 23
1631; GCN-NEXT:    v_cvt_f32_i32_e32 v2, v1
1632; GCN-NEXT:    s_waitcnt vmcnt(0)
1633; GCN-NEXT:    v_or_b32_e32 v0, v3, v0
1634; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
1635; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v0
1636; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1637; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
1638; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1639; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1640; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
1641; GCN-NEXT:    v_trunc_f32_e32 v1, v1
1642; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
1643; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
1644; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1645; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1646; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
1647; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
1648; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1649; GCN-NEXT:    s_endpgm
1650;
1651; TONGA-LABEL: v_sdiv_i23:
1652; TONGA:       ; %bb.0:
1653; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1654; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1655; TONGA-NEXT:    s_mov_b32 s6, -1
1656; TONGA-NEXT:    s_mov_b32 s10, s6
1657; TONGA-NEXT:    s_mov_b32 s11, s7
1658; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1659; TONGA-NEXT:    s_mov_b32 s8, s2
1660; TONGA-NEXT:    s_mov_b32 s9, s3
1661; TONGA-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1662; TONGA-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1663; TONGA-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1664; TONGA-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1665; TONGA-NEXT:    s_mov_b32 s4, s0
1666; TONGA-NEXT:    s_mov_b32 s5, s1
1667; TONGA-NEXT:    s_waitcnt vmcnt(3)
1668; TONGA-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
1669; TONGA-NEXT:    s_waitcnt vmcnt(2)
1670; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1671; TONGA-NEXT:    s_waitcnt vmcnt(1)
1672; TONGA-NEXT:    v_or_b32_e32 v1, v2, v1
1673; TONGA-NEXT:    v_bfe_i32 v1, v1, 0, 23
1674; TONGA-NEXT:    v_cvt_f32_i32_e32 v2, v1
1675; TONGA-NEXT:    s_waitcnt vmcnt(0)
1676; TONGA-NEXT:    v_or_b32_e32 v0, v3, v0
1677; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
1678; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v0
1679; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1680; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
1681; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1682; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1683; TONGA-NEXT:    v_mul_f32_e32 v1, v3, v4
1684; TONGA-NEXT:    v_trunc_f32_e32 v1, v1
1685; TONGA-NEXT:    v_mad_f32 v3, -v1, v2, v3
1686; TONGA-NEXT:    v_cvt_i32_f32_e32 v1, v1
1687; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1688; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1689; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
1690; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
1691; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1692; TONGA-NEXT:    s_endpgm
1693;
1694; GFX9-LABEL: v_sdiv_i23:
1695; GFX9:       ; %bb.0:
1696; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1697; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1698; GFX9-NEXT:    s_mov_b32 s6, -1
1699; GFX9-NEXT:    s_mov_b32 s10, s6
1700; GFX9-NEXT:    s_mov_b32 s11, s7
1701; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1702; GFX9-NEXT:    s_mov_b32 s8, s2
1703; GFX9-NEXT:    s_mov_b32 s9, s3
1704; GFX9-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1705; GFX9-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1706; GFX9-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1707; GFX9-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1708; GFX9-NEXT:    s_mov_b32 s4, s0
1709; GFX9-NEXT:    s_mov_b32 s5, s1
1710; GFX9-NEXT:    s_waitcnt vmcnt(3)
1711; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
1712; GFX9-NEXT:    s_waitcnt vmcnt(2)
1713; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1714; GFX9-NEXT:    s_waitcnt vmcnt(1)
1715; GFX9-NEXT:    v_or_b32_e32 v1, v2, v1
1716; GFX9-NEXT:    v_bfe_i32 v1, v1, 0, 23
1717; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v1
1718; GFX9-NEXT:    s_waitcnt vmcnt(0)
1719; GFX9-NEXT:    v_or_b32_e32 v0, v3, v0
1720; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 23
1721; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v0
1722; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1723; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v1
1724; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1725; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1726; GFX9-NEXT:    v_mul_f32_e32 v1, v3, v4
1727; GFX9-NEXT:    v_trunc_f32_e32 v1, v1
1728; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v1
1729; GFX9-NEXT:    v_mad_f32 v1, -v1, v2, v3
1730; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1731; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1732; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1733; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 23
1734; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1735; GFX9-NEXT:    s_endpgm
1736;
1737; EG-LABEL: v_sdiv_i23:
1738; EG:       ; %bb.0:
1739; EG-NEXT:    ALU 0, @14, KC0[CB0:0-32], KC1[]
1740; EG-NEXT:    TEX 3 @6
1741; EG-NEXT:    ALU 33, @15, KC0[CB0:0-32], KC1[]
1742; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1743; EG-NEXT:    CF_END
1744; EG-NEXT:    PAD
1745; EG-NEXT:    Fetch clause starting at 6:
1746; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 6, #1
1747; EG-NEXT:     VTX_READ_16 T2.X, T0.X, 0, #1
1748; EG-NEXT:     VTX_READ_8 T3.X, T0.X, 2, #1
1749; EG-NEXT:     VTX_READ_16 T0.X, T0.X, 4, #1
1750; EG-NEXT:    ALU clause starting at 14:
1751; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1752; EG-NEXT:    ALU clause starting at 15:
1753; EG-NEXT:     LSHL * T0.W, T1.X, literal.x,
1754; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1755; EG-NEXT:     OR_INT T0.W, T0.X, PV.W,
1756; EG-NEXT:     LSHL * T1.W, T3.X, literal.x,
1757; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1758; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1759; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1760; EG-NEXT:     ASHR T0.W, PV.W, literal.x,
1761; EG-NEXT:     OR_INT * T1.W, T2.X, T1.W,
1762; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1763; EG-NEXT:     LSHL T1.W, PS, literal.x,
1764; EG-NEXT:     INT_TO_FLT * T0.X, PV.W,
1765; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1766; EG-NEXT:     ASHR T1.W, PV.W, literal.x,
1767; EG-NEXT:     RECIP_IEEE * T0.Y, PS,
1768; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1769; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1770; EG-NEXT:     MUL_IEEE * T2.W, PS, T0.Y,
1771; EG-NEXT:     TRUNC T2.W, PV.W,
1772; EG-NEXT:     XOR_INT * T0.W, T1.W, T0.W,
1773; EG-NEXT:     ASHR T0.W, PS, literal.x,
1774; EG-NEXT:     MULADD_IEEE * T1.W, -PV.W, T0.X, T0.Z,
1775; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1776; EG-NEXT:     TRUNC T0.Z, T2.W,
1777; EG-NEXT:     SETGE T1.W, |PS|, |T0.X|,
1778; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1779; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1780; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1781; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1782; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1783; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1784; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
1785; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1786; EG-NEXT:    9(1.261169e-44), 2(2.802597e-45)
1787  %den_ptr = getelementptr i23, i23 addrspace(1)* %in, i23 1
1788  %num = load i23, i23 addrspace(1) * %in
1789  %den = load i23, i23 addrspace(1) * %den_ptr
1790  %result = sdiv i23 %num, %den
1791  %result.ext = sext i23 %result to i32
1792  store i32 %result.ext, i32 addrspace(1)* %out
1793  ret void
1794}
1795
1796define amdgpu_kernel void @v_sdiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) {
1797; GCN-LABEL: v_sdiv_i24:
1798; GCN:       ; %bb.0:
1799; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1800; GCN-NEXT:    s_mov_b32 s7, 0xf000
1801; GCN-NEXT:    s_mov_b32 s6, -1
1802; GCN-NEXT:    s_mov_b32 s10, s6
1803; GCN-NEXT:    s_mov_b32 s11, s7
1804; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1805; GCN-NEXT:    s_mov_b32 s8, s2
1806; GCN-NEXT:    s_mov_b32 s9, s3
1807; GCN-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1808; GCN-NEXT:    buffer_load_ushort v1, off, s[8:11], 0 offset:4
1809; GCN-NEXT:    buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1810; GCN-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1811; GCN-NEXT:    s_mov_b32 s4, s0
1812; GCN-NEXT:    s_mov_b32 s5, s1
1813; GCN-NEXT:    s_waitcnt vmcnt(3)
1814; GCN-NEXT:    v_lshlrev_b32_e32 v4, 16, v0
1815; GCN-NEXT:    s_waitcnt vmcnt(2)
1816; GCN-NEXT:    v_or_b32_e32 v1, v1, v4
1817; GCN-NEXT:    v_cvt_f32_i32_e32 v1, v1
1818; GCN-NEXT:    s_waitcnt vmcnt(1)
1819; GCN-NEXT:    v_lshlrev_b32_e32 v4, 16, v2
1820; GCN-NEXT:    s_waitcnt vmcnt(0)
1821; GCN-NEXT:    v_or_b32_e32 v3, v3, v4
1822; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v3
1823; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v1
1824; GCN-NEXT:    v_xor_b32_e32 v0, v2, v0
1825; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1826; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1827; GCN-NEXT:    v_mul_f32_e32 v2, v3, v4
1828; GCN-NEXT:    v_trunc_f32_e32 v2, v2
1829; GCN-NEXT:    v_mad_f32 v3, -v2, v1, v3
1830; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
1831; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1832; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1833; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
1834; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
1835; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1836; GCN-NEXT:    s_endpgm
1837;
1838; TONGA-LABEL: v_sdiv_i24:
1839; TONGA:       ; %bb.0:
1840; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1841; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1842; TONGA-NEXT:    s_mov_b32 s6, -1
1843; TONGA-NEXT:    s_mov_b32 s10, s6
1844; TONGA-NEXT:    s_mov_b32 s11, s7
1845; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1846; TONGA-NEXT:    s_mov_b32 s8, s2
1847; TONGA-NEXT:    s_mov_b32 s9, s3
1848; TONGA-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1849; TONGA-NEXT:    buffer_load_ushort v1, off, s[8:11], 0 offset:4
1850; TONGA-NEXT:    buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1851; TONGA-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1852; TONGA-NEXT:    s_mov_b32 s4, s0
1853; TONGA-NEXT:    s_mov_b32 s5, s1
1854; TONGA-NEXT:    s_waitcnt vmcnt(3)
1855; TONGA-NEXT:    v_lshlrev_b32_e32 v4, 16, v0
1856; TONGA-NEXT:    s_waitcnt vmcnt(2)
1857; TONGA-NEXT:    v_or_b32_e32 v1, v1, v4
1858; TONGA-NEXT:    v_cvt_f32_i32_e32 v1, v1
1859; TONGA-NEXT:    s_waitcnt vmcnt(1)
1860; TONGA-NEXT:    v_lshlrev_b32_e32 v4, 16, v2
1861; TONGA-NEXT:    s_waitcnt vmcnt(0)
1862; TONGA-NEXT:    v_or_b32_e32 v3, v3, v4
1863; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v3
1864; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v1
1865; TONGA-NEXT:    v_xor_b32_e32 v0, v2, v0
1866; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1867; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1868; TONGA-NEXT:    v_mul_f32_e32 v2, v3, v4
1869; TONGA-NEXT:    v_trunc_f32_e32 v2, v2
1870; TONGA-NEXT:    v_mad_f32 v3, -v2, v1, v3
1871; TONGA-NEXT:    v_cvt_i32_f32_e32 v2, v2
1872; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1873; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1874; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v2, v0
1875; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 24
1876; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1877; TONGA-NEXT:    s_endpgm
1878;
1879; GFX9-LABEL: v_sdiv_i24:
1880; GFX9:       ; %bb.0:
1881; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1882; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1883; GFX9-NEXT:    s_mov_b32 s6, -1
1884; GFX9-NEXT:    s_mov_b32 s10, s6
1885; GFX9-NEXT:    s_mov_b32 s11, s7
1886; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1887; GFX9-NEXT:    s_mov_b32 s8, s2
1888; GFX9-NEXT:    s_mov_b32 s9, s3
1889; GFX9-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1890; GFX9-NEXT:    buffer_load_ushort v1, off, s[8:11], 0 offset:4
1891; GFX9-NEXT:    buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1892; GFX9-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1893; GFX9-NEXT:    s_mov_b32 s4, s0
1894; GFX9-NEXT:    s_mov_b32 s5, s1
1895; GFX9-NEXT:    s_waitcnt vmcnt(3)
1896; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v0
1897; GFX9-NEXT:    s_waitcnt vmcnt(2)
1898; GFX9-NEXT:    v_or_b32_e32 v1, v1, v4
1899; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v1
1900; GFX9-NEXT:    s_waitcnt vmcnt(1)
1901; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v2
1902; GFX9-NEXT:    s_waitcnt vmcnt(0)
1903; GFX9-NEXT:    v_or_b32_e32 v3, v3, v4
1904; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v3
1905; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v1
1906; GFX9-NEXT:    v_xor_b32_e32 v0, v2, v0
1907; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1908; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1909; GFX9-NEXT:    v_mul_f32_e32 v2, v3, v4
1910; GFX9-NEXT:    v_trunc_f32_e32 v2, v2
1911; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v2
1912; GFX9-NEXT:    v_mad_f32 v2, -v2, v1, v3
1913; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
1914; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1915; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1916; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 24
1917; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1918; GFX9-NEXT:    s_endpgm
1919;
1920; EG-LABEL: v_sdiv_i24:
1921; EG:       ; %bb.0:
1922; EG-NEXT:    ALU 0, @14, KC0[CB0:0-32], KC1[]
1923; EG-NEXT:    TEX 3 @6
1924; EG-NEXT:    ALU 39, @15, KC0[CB0:0-32], KC1[]
1925; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1926; EG-NEXT:    CF_END
1927; EG-NEXT:    PAD
1928; EG-NEXT:    Fetch clause starting at 6:
1929; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 6, #1
1930; EG-NEXT:     VTX_READ_16 T2.X, T0.X, 0, #1
1931; EG-NEXT:     VTX_READ_8 T3.X, T0.X, 2, #1
1932; EG-NEXT:     VTX_READ_16 T0.X, T0.X, 4, #1
1933; EG-NEXT:    ALU clause starting at 14:
1934; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1935; EG-NEXT:    ALU clause starting at 15:
1936; EG-NEXT:     BFE_INT * T0.W, T1.X, 0.0, literal.x,
1937; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1938; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1939; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1940; EG-NEXT:     OR_INT * T0.W, T0.X, PV.W,
1941; EG-NEXT:     SETGT_INT * T1.W, 0.0, PV.W,
1942; EG-NEXT:     BFE_INT T2.W, T3.X, 0.0, literal.x,
1943; EG-NEXT:     ADD_INT * T0.W, T0.W, PV.W,
1944; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1945; EG-NEXT:     LSHL T2.W, PV.W, literal.x,
1946; EG-NEXT:     XOR_INT * T0.W, PS, T1.W,
1947; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1948; EG-NEXT:     SUB_INT T0.Z, 0.0, PS,
1949; EG-NEXT:     OR_INT T2.W, T2.X, PV.W,
1950; EG-NEXT:     RECIP_UINT * T0.X, PS,
1951; EG-NEXT:     SETGT_INT T3.W, 0.0, PV.W,
1952; EG-NEXT:     MULLO_INT * T0.Y, PV.Z, PS,
1953; EG-NEXT:     ADD_INT T2.W, T2.W, PV.W,
1954; EG-NEXT:     MULHI * T0.Y, T0.X, PS,
1955; EG-NEXT:     ADD_INT T4.W, T0.X, PS,
1956; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
1957; EG-NEXT:     MULHI * T0.X, PS, PV.W,
1958; EG-NEXT:     MULLO_INT * T0.Y, PS, T0.W,
1959; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
1960; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
1961; EG-NEXT:     SETGE_UINT T4.W, PV.W, T0.W,
1962; EG-NEXT:     SUB_INT * T5.W, PV.W, T0.W,
1963; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
1964; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
1965; EG-NEXT:     ADD_INT T5.W, PS, 1,
1966; EG-NEXT:     SETGE_UINT * T0.W, PV.W, T0.W,
1967; EG-NEXT:     CNDE_INT T0.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
1968; EG-NEXT:     XOR_INT * T1.W, T3.W, T1.W,
1969; EG-NEXT:     XOR_INT * T0.W, PV.W, PS,
1970; EG-NEXT:     SUB_INT * T0.W, PV.W, T1.W,
1971; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1972; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1973; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
1974; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1975; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
1976  %den_ptr = getelementptr i24, i24 addrspace(1)* %in, i24 1
1977  %num = load i24, i24 addrspace(1) * %in
1978  %den = load i24, i24 addrspace(1) * %den_ptr
1979  %result = sdiv i24 %num, %den
1980  %result.ext = sext i24 %result to i32
1981  store i32 %result.ext, i32 addrspace(1)* %out
1982  ret void
1983}
1984
1985define amdgpu_kernel void @v_sdiv_i25(i32 addrspace(1)* %out, i25 addrspace(1)* %in) {
1986; GCN-LABEL: v_sdiv_i25:
1987; GCN:       ; %bb.0:
1988; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1989; GCN-NEXT:    s_mov_b32 s7, 0xf000
1990; GCN-NEXT:    s_mov_b32 s6, -1
1991; GCN-NEXT:    s_mov_b32 s10, s6
1992; GCN-NEXT:    s_mov_b32 s11, s7
1993; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1994; GCN-NEXT:    s_mov_b32 s8, s2
1995; GCN-NEXT:    s_mov_b32 s9, s3
1996; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
1997; GCN-NEXT:    s_mov_b32 s4, s0
1998; GCN-NEXT:    s_mov_b32 s5, s1
1999; GCN-NEXT:    s_waitcnt vmcnt(0)
2000; GCN-NEXT:    v_bfe_i32 v2, v1, 0, 25
2001; GCN-NEXT:    v_bfe_i32 v1, v1, 24, 1
2002; GCN-NEXT:    v_add_i32_e32 v2, vcc, v1, v2
2003; GCN-NEXT:    v_xor_b32_e32 v2, v2, v1
2004; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v2
2005; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
2006; GCN-NEXT:    v_bfe_i32 v5, v0, 0, 25
2007; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2008; GCN-NEXT:    v_bfe_i32 v0, v0, 24, 1
2009; GCN-NEXT:    v_add_i32_e32 v5, vcc, v0, v5
2010; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2011; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
2012; GCN-NEXT:    v_xor_b32_e32 v5, v5, v0
2013; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
2014; GCN-NEXT:    v_mul_lo_u32 v4, v4, v3
2015; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
2016; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
2017; GCN-NEXT:    v_mul_hi_u32 v3, v5, v3
2018; GCN-NEXT:    v_mul_lo_u32 v1, v3, v2
2019; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
2020; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v1, v5
2021; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
2022; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v4, s[0:1]
2023; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v2, v1
2024; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
2025; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
2026; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
2027; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
2028; GCN-NEXT:    v_xor_b32_e32 v1, v1, v0
2029; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v0
2030; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 25
2031; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2032; GCN-NEXT:    s_endpgm
2033;
2034; TONGA-LABEL: v_sdiv_i25:
2035; TONGA:       ; %bb.0:
2036; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2037; TONGA-NEXT:    s_mov_b32 s7, 0xf000
2038; TONGA-NEXT:    s_mov_b32 s6, -1
2039; TONGA-NEXT:    s_mov_b32 s10, s6
2040; TONGA-NEXT:    s_mov_b32 s11, s7
2041; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
2042; TONGA-NEXT:    s_mov_b32 s8, s2
2043; TONGA-NEXT:    s_mov_b32 s9, s3
2044; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2045; TONGA-NEXT:    s_mov_b32 s4, s0
2046; TONGA-NEXT:    s_mov_b32 s5, s1
2047; TONGA-NEXT:    s_waitcnt vmcnt(0)
2048; TONGA-NEXT:    v_bfe_i32 v2, v1, 0, 25
2049; TONGA-NEXT:    v_bfe_i32 v1, v1, 24, 1
2050; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v1, v2
2051; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v1
2052; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v2
2053; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v2
2054; TONGA-NEXT:    v_bfe_i32 v5, v0, 0, 25
2055; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2056; TONGA-NEXT:    v_bfe_i32 v0, v0, 24, 1
2057; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v0, v5
2058; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2059; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
2060; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v0
2061; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
2062; TONGA-NEXT:    v_mul_lo_u32 v4, v4, v3
2063; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
2064; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v4, v3
2065; TONGA-NEXT:    v_mul_hi_u32 v3, v5, v3
2066; TONGA-NEXT:    v_mul_lo_u32 v1, v3, v2
2067; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
2068; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v1, v5
2069; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
2070; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v4, s[0:1]
2071; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v2, v1
2072; TONGA-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
2073; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
2074; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
2075; TONGA-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
2076; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v0
2077; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v0, v1
2078; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 25
2079; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2080; TONGA-NEXT:    s_endpgm
2081;
2082; GFX9-LABEL: v_sdiv_i25:
2083; GFX9:       ; %bb.0:
2084; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2085; GFX9-NEXT:    s_mov_b32 s7, 0xf000
2086; GFX9-NEXT:    s_mov_b32 s6, -1
2087; GFX9-NEXT:    s_mov_b32 s10, s6
2088; GFX9-NEXT:    s_mov_b32 s11, s7
2089; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2090; GFX9-NEXT:    s_mov_b32 s8, s2
2091; GFX9-NEXT:    s_mov_b32 s9, s3
2092; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2093; GFX9-NEXT:    s_mov_b32 s4, s0
2094; GFX9-NEXT:    s_mov_b32 s5, s1
2095; GFX9-NEXT:    s_waitcnt vmcnt(0)
2096; GFX9-NEXT:    v_bfe_i32 v2, v1, 0, 25
2097; GFX9-NEXT:    v_bfe_i32 v1, v1, 24, 1
2098; GFX9-NEXT:    v_add_u32_e32 v2, v2, v1
2099; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v1
2100; GFX9-NEXT:    v_cvt_f32_u32_e32 v3, v2
2101; GFX9-NEXT:    v_sub_u32_e32 v4, 0, v2
2102; GFX9-NEXT:    v_bfe_i32 v5, v0, 0, 25
2103; GFX9-NEXT:    v_bfe_i32 v0, v0, 24, 1
2104; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2105; GFX9-NEXT:    v_add_u32_e32 v5, v5, v0
2106; GFX9-NEXT:    v_xor_b32_e32 v5, v5, v0
2107; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v1
2108; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2109; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3
2110; GFX9-NEXT:    v_mul_lo_u32 v4, v4, v3
2111; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4
2112; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4
2113; GFX9-NEXT:    v_mul_hi_u32 v3, v5, v3
2114; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v2
2115; GFX9-NEXT:    v_add_u32_e32 v1, 1, v3
2116; GFX9-NEXT:    v_sub_u32_e32 v4, v5, v4
2117; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v2
2118; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
2119; GFX9-NEXT:    v_sub_u32_e32 v3, v4, v2
2120; GFX9-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
2121; GFX9-NEXT:    v_add_u32_e32 v4, 1, v1
2122; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v2
2123; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
2124; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v0
2125; GFX9-NEXT:    v_sub_u32_e32 v0, v1, v0
2126; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 25
2127; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2128; GFX9-NEXT:    s_endpgm
2129;
2130; EG-LABEL: v_sdiv_i25:
2131; EG:       ; %bb.0:
2132; EG-NEXT:    ALU 1, @10, KC0[CB0:0-32], KC1[]
2133; EG-NEXT:    TEX 1 @6
2134; EG-NEXT:    ALU 37, @12, KC0[CB0:0-32], KC1[]
2135; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
2136; EG-NEXT:    CF_END
2137; EG-NEXT:    PAD
2138; EG-NEXT:    Fetch clause starting at 6:
2139; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 4, #1
2140; EG-NEXT:     VTX_READ_32 T1.X, T1.X, 0, #1
2141; EG-NEXT:    ALU clause starting at 10:
2142; EG-NEXT:     MOV * T0.X, KC0[2].Z,
2143; EG-NEXT:     MOV * T1.X, PV.X,
2144; EG-NEXT:    ALU clause starting at 12:
2145; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
2146; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2147; EG-NEXT:     ASHR * T0.W, PV.W, literal.x,
2148; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2149; EG-NEXT:     SETGT_INT * T1.W, 0.0, PV.W,
2150; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
2151; EG-NEXT:     LSHL * T2.W, T1.X, literal.x,
2152; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2153; EG-NEXT:     XOR_INT * T0.W, PV.W, T1.W,
2154; EG-NEXT:     SUB_INT T0.Z, 0.0, PV.W,
2155; EG-NEXT:     ASHR T2.W, T2.W, literal.x,
2156; EG-NEXT:     RECIP_UINT * T0.X, PV.W,
2157; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2158; EG-NEXT:     SETGT_INT T3.W, 0.0, PV.W,
2159; EG-NEXT:     MULLO_INT * T0.Y, PV.Z, PS,
2160; EG-NEXT:     ADD_INT T2.W, T2.W, PV.W,
2161; EG-NEXT:     MULHI * T0.Y, T0.X, PS,
2162; EG-NEXT:     ADD_INT T4.W, T0.X, PS,
2163; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
2164; EG-NEXT:     MULHI * T0.X, PS, PV.W,
2165; EG-NEXT:     MULLO_INT * T0.Y, PS, T0.W,
2166; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
2167; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
2168; EG-NEXT:     SETGE_UINT T4.W, PV.W, T0.W,
2169; EG-NEXT:     SUB_INT * T5.W, PV.W, T0.W,
2170; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
2171; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
2172; EG-NEXT:     ADD_INT T5.W, PS, 1,
2173; EG-NEXT:     SETGE_UINT * T0.W, PV.W, T0.W,
2174; EG-NEXT:     CNDE_INT T0.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
2175; EG-NEXT:     XOR_INT * T1.W, T3.W, T1.W,
2176; EG-NEXT:     XOR_INT * T0.W, PV.W, PS,
2177; EG-NEXT:     SUB_INT * T0.W, PV.W, T1.W,
2178; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
2179; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2180; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
2181; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
2182; EG-NEXT:    7(9.809089e-45), 2(2.802597e-45)
2183  %den_ptr = getelementptr i25, i25 addrspace(1)* %in, i25 1
2184  %num = load i25, i25 addrspace(1) * %in
2185  %den = load i25, i25 addrspace(1) * %den_ptr
2186  %result = sdiv i25 %num, %den
2187  %result.ext = sext i25 %result to i32
2188  store i32 %result.ext, i32 addrspace(1)* %out
2189  ret void
2190}
2191
2192; Tests for 64-bit divide bypass.
2193; define amdgpu_kernel void @test_get_quotient(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2194;   %result = sdiv i64 %a, %b
2195;   store i64 %result, i64 addrspace(1)* %out, align 8
2196;   ret void
2197; }
2198
2199; define amdgpu_kernel void @test_get_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2200;   %result = srem i64 %a, %b
2201;   store i64 %result, i64 addrspace(1)* %out, align 8
2202;   ret void
2203; }
2204
2205; define amdgpu_kernel void @test_get_quotient_and_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2206;   %resultdiv = sdiv i64 %a, %b
2207;   %resultrem = srem i64 %a, %b
2208;   %result = add i64 %resultdiv, %resultrem
2209;   store i64 %result, i64 addrspace(1)* %out, align 8
2210;   ret void
2211; }
2212
2213define amdgpu_kernel void @scalarize_mulhs_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) {
2214; GCN-LABEL: scalarize_mulhs_4xi32:
2215; GCN:       ; %bb.0:
2216; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2217; GCN-NEXT:    s_mov_b32 s7, 0xf000
2218; GCN-NEXT:    s_mov_b32 s6, -1
2219; GCN-NEXT:    s_waitcnt lgkmcnt(0)
2220; GCN-NEXT:    s_mov_b32 s4, s0
2221; GCN-NEXT:    s_mov_b32 s5, s1
2222; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2223; GCN-NEXT:    s_mov_b32 s0, 0x1389c755
2224; GCN-NEXT:    s_mov_b32 s4, s2
2225; GCN-NEXT:    s_mov_b32 s5, s3
2226; GCN-NEXT:    s_waitcnt vmcnt(0)
2227; GCN-NEXT:    v_mul_hi_i32 v0, v0, s0
2228; GCN-NEXT:    v_mul_hi_i32 v1, v1, s0
2229; GCN-NEXT:    v_mul_hi_i32 v2, v2, s0
2230; GCN-NEXT:    v_mul_hi_i32 v3, v3, s0
2231; GCN-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2232; GCN-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2233; GCN-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2234; GCN-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2235; GCN-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2236; GCN-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2237; GCN-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2238; GCN-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2239; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
2240; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v5
2241; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
2242; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
2243; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2244; GCN-NEXT:    s_endpgm
2245;
2246; TONGA-LABEL: scalarize_mulhs_4xi32:
2247; TONGA:       ; %bb.0:
2248; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2249; TONGA-NEXT:    s_mov_b32 s7, 0xf000
2250; TONGA-NEXT:    s_mov_b32 s6, -1
2251; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
2252; TONGA-NEXT:    s_mov_b32 s4, s0
2253; TONGA-NEXT:    s_mov_b32 s5, s1
2254; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2255; TONGA-NEXT:    s_mov_b32 s0, 0x1389c755
2256; TONGA-NEXT:    s_mov_b32 s4, s2
2257; TONGA-NEXT:    s_mov_b32 s5, s3
2258; TONGA-NEXT:    s_waitcnt vmcnt(0)
2259; TONGA-NEXT:    v_mul_hi_i32 v0, v0, s0
2260; TONGA-NEXT:    v_mul_hi_i32 v1, v1, s0
2261; TONGA-NEXT:    v_mul_hi_i32 v2, v2, s0
2262; TONGA-NEXT:    v_mul_hi_i32 v3, v3, s0
2263; TONGA-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2264; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2265; TONGA-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2266; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2267; TONGA-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2268; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2269; TONGA-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2270; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2271; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v4
2272; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v1, v5
2273; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v2, v6
2274; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v3, v7
2275; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2276; TONGA-NEXT:    s_endpgm
2277;
2278; GFX9-LABEL: scalarize_mulhs_4xi32:
2279; GFX9:       ; %bb.0:
2280; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2281; GFX9-NEXT:    s_mov_b32 s7, 0xf000
2282; GFX9-NEXT:    s_mov_b32 s6, -1
2283; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2284; GFX9-NEXT:    s_mov_b32 s4, s0
2285; GFX9-NEXT:    s_mov_b32 s5, s1
2286; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2287; GFX9-NEXT:    s_mov_b32 s0, 0x1389c755
2288; GFX9-NEXT:    s_mov_b32 s4, s2
2289; GFX9-NEXT:    s_mov_b32 s5, s3
2290; GFX9-NEXT:    s_waitcnt vmcnt(0)
2291; GFX9-NEXT:    v_mul_hi_i32 v0, v0, s0
2292; GFX9-NEXT:    v_mul_hi_i32 v1, v1, s0
2293; GFX9-NEXT:    v_mul_hi_i32 v2, v2, s0
2294; GFX9-NEXT:    v_mul_hi_i32 v3, v3, s0
2295; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2296; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2297; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2298; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2299; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2300; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2301; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2302; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2303; GFX9-NEXT:    v_add_u32_e32 v0, v0, v4
2304; GFX9-NEXT:    v_add_u32_e32 v1, v1, v5
2305; GFX9-NEXT:    v_add_u32_e32 v2, v2, v6
2306; GFX9-NEXT:    v_add_u32_e32 v3, v3, v7
2307; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2308; GFX9-NEXT:    s_endpgm
2309;
2310; EG-LABEL: scalarize_mulhs_4xi32:
2311; EG:       ; %bb.0:
2312; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
2313; EG-NEXT:    TEX 0 @6
2314; EG-NEXT:    ALU 25, @9, KC0[CB0:0-32], KC1[]
2315; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
2316; EG-NEXT:    CF_END
2317; EG-NEXT:    PAD
2318; EG-NEXT:    Fetch clause starting at 6:
2319; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
2320; EG-NEXT:    ALU clause starting at 8:
2321; EG-NEXT:     MOV * T0.X, KC0[2].Y,
2322; EG-NEXT:    ALU clause starting at 9:
2323; EG-NEXT:     MULHI_INT * T0.W, T0.W, literal.x,
2324; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2325; EG-NEXT:     ASHR T1.Z, PS, literal.x,
2326; EG-NEXT:     LSHR T0.W, PS, literal.y,
2327; EG-NEXT:     MULHI_INT * T0.Z, T0.Z, literal.z,
2328; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2329; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2330; EG-NEXT:     ASHR T1.Y, PS, literal.x,
2331; EG-NEXT:     LSHR T0.Z, PS, literal.y,
2332; EG-NEXT:     ADD_INT T0.W, PV.Z, PV.W,
2333; EG-NEXT:     MULHI_INT * T0.Y, T0.Y, literal.z,
2334; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2335; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2336; EG-NEXT:     ASHR T2.Y, PS, literal.x,
2337; EG-NEXT:     ADD_INT T0.Z, PV.Y, PV.Z,
2338; EG-NEXT:     LSHR T1.W, PS, literal.y,
2339; EG-NEXT:     MULHI_INT * T0.X, T0.X, literal.z,
2340; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2341; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2342; EG-NEXT:     ADD_INT T0.Y, PV.Y, PV.W,
2343; EG-NEXT:     ASHR T1.W, PS, literal.x,
2344; EG-NEXT:     LSHR * T2.W, PS, literal.y,
2345; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2346; EG-NEXT:     ADD_INT T0.X, PV.W, PS,
2347; EG-NEXT:     LSHR * T1.X, KC0[2].Z, literal.x,
2348; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
2349  %1 = load <4 x i32>, <4 x i32> addrspace(1)* %in, align 16
2350  %2 = sdiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668>
2351  store <4 x i32> %2, <4 x i32> addrspace(1)* %out, align 16
2352  ret void
2353}
2354