1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx600 | FileCheck %s --check-prefix=GCN
3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck %s --check-prefix=TONGA
4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global | FileCheck %s --check-prefix=GFX9
5; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG
6
7; The code generated by sdiv is long and complex and may frequently change.
8; The goal of this test is to make sure the ISel doesn't fail.
9;
10; This program was previously failing to compile when one of the selectcc
11; opcodes generated by the sdiv lowering was being legalized and optimized to:
12; selectcc Remainder -1, 0, -1, SETGT
13; This was fixed by adding an additional pattern in R600Instructions.td to
14; match this pattern with a CNDGE_INT.
15
16define amdgpu_kernel void @sdiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
17; GCN-LABEL: sdiv_i32:
18; GCN:       ; %bb.0:
19; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
20; GCN-NEXT:    s_mov_b32 s7, 0xf000
21; GCN-NEXT:    s_mov_b32 s6, -1
22; GCN-NEXT:    s_mov_b32 s10, s6
23; GCN-NEXT:    s_mov_b32 s11, s7
24; GCN-NEXT:    s_waitcnt lgkmcnt(0)
25; GCN-NEXT:    s_mov_b32 s8, s2
26; GCN-NEXT:    s_mov_b32 s9, s3
27; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
28; GCN-NEXT:    s_mov_b32 s4, s0
29; GCN-NEXT:    s_mov_b32 s5, s1
30; GCN-NEXT:    s_waitcnt vmcnt(0)
31; GCN-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
32; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
33; GCN-NEXT:    v_xor_b32_e32 v1, v1, v2
34; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v1
35; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v1
36; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
37; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
38; GCN-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
39; GCN-NEXT:    v_xor_b32_e32 v0, v0, v5
40; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
41; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
42; GCN-NEXT:    v_xor_b32_e32 v2, v5, v2
43; GCN-NEXT:    v_mul_lo_u32 v4, v4, v3
44; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
45; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v4
46; GCN-NEXT:    v_mul_hi_u32 v3, v0, v3
47; GCN-NEXT:    v_mul_lo_u32 v4, v3, v1
48; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
49; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v4, v0
50; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v1
51; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
52; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v1, v0
53; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
54; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
55; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
56; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
57; GCN-NEXT:    v_xor_b32_e32 v0, v0, v2
58; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
59; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
60; GCN-NEXT:    s_endpgm
61;
62; TONGA-LABEL: sdiv_i32:
63; TONGA:       ; %bb.0:
64; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
65; TONGA-NEXT:    s_mov_b32 s7, 0xf000
66; TONGA-NEXT:    s_mov_b32 s6, -1
67; TONGA-NEXT:    s_mov_b32 s10, s6
68; TONGA-NEXT:    s_mov_b32 s11, s7
69; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
70; TONGA-NEXT:    s_mov_b32 s8, s2
71; TONGA-NEXT:    s_mov_b32 s9, s3
72; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
73; TONGA-NEXT:    s_mov_b32 s4, s0
74; TONGA-NEXT:    s_mov_b32 s5, s1
75; TONGA-NEXT:    s_waitcnt vmcnt(0)
76; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
77; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v2, v1
78; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v2
79; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v1
80; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v1
81; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
82; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
83; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v5, v0
84; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v5
85; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
86; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
87; TONGA-NEXT:    v_xor_b32_e32 v2, v5, v2
88; TONGA-NEXT:    v_mul_lo_u32 v4, v4, v3
89; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
90; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v3, v4
91; TONGA-NEXT:    v_mul_hi_u32 v3, v0, v3
92; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v1
93; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v3
94; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v4, v0
95; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v1
96; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
97; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v1, v0
98; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
99; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
100; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
101; TONGA-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
102; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v2
103; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v2, v0
104; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
105; TONGA-NEXT:    s_endpgm
106;
107; GFX9-LABEL: sdiv_i32:
108; GFX9:       ; %bb.0:
109; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
110; GFX9-NEXT:    s_mov_b32 s7, 0xf000
111; GFX9-NEXT:    s_mov_b32 s6, -1
112; GFX9-NEXT:    s_mov_b32 s10, s6
113; GFX9-NEXT:    s_mov_b32 s11, s7
114; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
115; GFX9-NEXT:    s_mov_b32 s8, s2
116; GFX9-NEXT:    s_mov_b32 s9, s3
117; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
118; GFX9-NEXT:    s_mov_b32 s4, s0
119; GFX9-NEXT:    s_mov_b32 s5, s1
120; GFX9-NEXT:    s_waitcnt vmcnt(0)
121; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
122; GFX9-NEXT:    v_add_u32_e32 v1, v1, v2
123; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v2
124; GFX9-NEXT:    v_cvt_f32_u32_e32 v3, v1
125; GFX9-NEXT:    v_sub_u32_e32 v4, 0, v1
126; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
127; GFX9-NEXT:    v_add_u32_e32 v0, v0, v5
128; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3
129; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v5
130; GFX9-NEXT:    v_xor_b32_e32 v2, v5, v2
131; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
132; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3
133; GFX9-NEXT:    v_mul_lo_u32 v4, v4, v3
134; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4
135; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4
136; GFX9-NEXT:    v_mul_hi_u32 v3, v0, v3
137; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v1
138; GFX9-NEXT:    v_add_u32_e32 v5, 1, v3
139; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v4
140; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
141; GFX9-NEXT:    v_sub_u32_e32 v4, v0, v1
142; GFX9-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
143; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
144; GFX9-NEXT:    v_add_u32_e32 v4, 1, v3
145; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
146; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
147; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v2
148; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v2
149; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
150; GFX9-NEXT:    s_endpgm
151;
152; EG-LABEL: sdiv_i32:
153; EG:       ; %bb.0:
154; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
155; EG-NEXT:    TEX 0 @6
156; EG-NEXT:    ALU 26, @9, KC0[CB0:0-32], KC1[]
157; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
158; EG-NEXT:    CF_END
159; EG-NEXT:    PAD
160; EG-NEXT:    Fetch clause starting at 6:
161; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
162; EG-NEXT:    ALU clause starting at 8:
163; EG-NEXT:     MOV * T0.X, KC0[2].Z,
164; EG-NEXT:    ALU clause starting at 9:
165; EG-NEXT:     SETGT_INT * T0.W, 0.0, T0.Y,
166; EG-NEXT:     ADD_INT * T1.W, T0.Y, PV.W,
167; EG-NEXT:     XOR_INT * T1.W, PV.W, T0.W,
168; EG-NEXT:     SUB_INT T2.W, 0.0, PV.W,
169; EG-NEXT:     RECIP_UINT * T0.Y, PV.W,
170; EG-NEXT:     SETGT_INT T3.W, 0.0, T0.X,
171; EG-NEXT:     MULLO_INT * T0.Z, PV.W, PS,
172; EG-NEXT:     ADD_INT T2.W, T0.X, PV.W,
173; EG-NEXT:     MULHI * T0.X, T0.Y, PS,
174; EG-NEXT:     ADD_INT T4.W, T0.Y, PS,
175; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
176; EG-NEXT:     MULHI * T0.X, PS, PV.W,
177; EG-NEXT:     MULLO_INT * T0.Y, PS, T1.W,
178; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
179; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
180; EG-NEXT:     SETGE_UINT T4.W, PV.W, T1.W,
181; EG-NEXT:     SUB_INT * T5.W, PV.W, T1.W,
182; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
183; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
184; EG-NEXT:     ADD_INT T5.W, PS, 1,
185; EG-NEXT:     SETGE_UINT * T1.W, PV.W, T1.W,
186; EG-NEXT:     CNDE_INT T1.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
187; EG-NEXT:     XOR_INT * T0.W, T3.W, T0.W,
188; EG-NEXT:     XOR_INT * T1.W, PV.W, PS,
189; EG-NEXT:     SUB_INT T0.X, PV.W, T0.W,
190; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
191; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
192  %den_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
193  %num = load i32, i32 addrspace(1) * %in
194  %den = load i32, i32 addrspace(1) * %den_ptr
195  %result = sdiv i32 %num, %den
196  store i32 %result, i32 addrspace(1)* %out
197  ret void
198}
199
200define amdgpu_kernel void @sdiv_i32_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
201; GCN-LABEL: sdiv_i32_4:
202; GCN:       ; %bb.0:
203; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
204; GCN-NEXT:    s_mov_b32 s7, 0xf000
205; GCN-NEXT:    s_mov_b32 s6, -1
206; GCN-NEXT:    s_mov_b32 s10, s6
207; GCN-NEXT:    s_mov_b32 s11, s7
208; GCN-NEXT:    s_waitcnt lgkmcnt(0)
209; GCN-NEXT:    s_mov_b32 s8, s2
210; GCN-NEXT:    s_mov_b32 s9, s3
211; GCN-NEXT:    buffer_load_dword v0, off, s[8:11], 0
212; GCN-NEXT:    s_mov_b32 s4, s0
213; GCN-NEXT:    s_mov_b32 s5, s1
214; GCN-NEXT:    s_waitcnt vmcnt(0)
215; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
216; GCN-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
217; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
218; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
219; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
220; GCN-NEXT:    s_endpgm
221;
222; TONGA-LABEL: sdiv_i32_4:
223; TONGA:       ; %bb.0:
224; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
225; TONGA-NEXT:    s_mov_b32 s7, 0xf000
226; TONGA-NEXT:    s_mov_b32 s6, -1
227; TONGA-NEXT:    s_mov_b32 s10, s6
228; TONGA-NEXT:    s_mov_b32 s11, s7
229; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
230; TONGA-NEXT:    s_mov_b32 s8, s2
231; TONGA-NEXT:    s_mov_b32 s9, s3
232; TONGA-NEXT:    buffer_load_dword v0, off, s[8:11], 0
233; TONGA-NEXT:    s_mov_b32 s4, s0
234; TONGA-NEXT:    s_mov_b32 s5, s1
235; TONGA-NEXT:    s_waitcnt vmcnt(0)
236; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
237; TONGA-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
238; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
239; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
240; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
241; TONGA-NEXT:    s_endpgm
242;
243; GFX9-LABEL: sdiv_i32_4:
244; GFX9:       ; %bb.0:
245; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
246; GFX9-NEXT:    s_mov_b32 s7, 0xf000
247; GFX9-NEXT:    s_mov_b32 s6, -1
248; GFX9-NEXT:    s_mov_b32 s10, s6
249; GFX9-NEXT:    s_mov_b32 s11, s7
250; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
251; GFX9-NEXT:    s_mov_b32 s8, s2
252; GFX9-NEXT:    s_mov_b32 s9, s3
253; GFX9-NEXT:    buffer_load_dword v0, off, s[8:11], 0
254; GFX9-NEXT:    s_mov_b32 s4, s0
255; GFX9-NEXT:    s_mov_b32 s5, s1
256; GFX9-NEXT:    s_waitcnt vmcnt(0)
257; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
258; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
259; GFX9-NEXT:    v_add_u32_e32 v0, v0, v1
260; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
261; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
262; GFX9-NEXT:    s_endpgm
263;
264; EG-LABEL: sdiv_i32_4:
265; EG:       ; %bb.0:
266; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
267; EG-NEXT:    TEX 0 @6
268; EG-NEXT:    ALU 7, @9, KC0[CB0:0-32], KC1[]
269; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
270; EG-NEXT:    CF_END
271; EG-NEXT:    PAD
272; EG-NEXT:    Fetch clause starting at 6:
273; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
274; EG-NEXT:    ALU clause starting at 8:
275; EG-NEXT:     MOV * T0.X, KC0[2].Z,
276; EG-NEXT:    ALU clause starting at 9:
277; EG-NEXT:     ASHR * T0.W, T0.X, literal.x,
278; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
279; EG-NEXT:     LSHR * T0.W, PV.W, literal.x,
280; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
281; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
282; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
283; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
284; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
285  %num = load i32, i32 addrspace(1) * %in
286  %result = sdiv i32 %num, 4
287  store i32 %result, i32 addrspace(1)* %out
288  ret void
289}
290
291; Multiply by a weird constant to make sure setIntDivIsCheap is
292; working.
293
294define amdgpu_kernel void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
295; GCN-LABEL: slow_sdiv_i32_3435:
296; GCN:       ; %bb.0:
297; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
298; GCN-NEXT:    s_mov_b32 s7, 0xf000
299; GCN-NEXT:    s_mov_b32 s6, -1
300; GCN-NEXT:    s_mov_b32 s10, s6
301; GCN-NEXT:    s_mov_b32 s11, s7
302; GCN-NEXT:    s_waitcnt lgkmcnt(0)
303; GCN-NEXT:    s_mov_b32 s8, s2
304; GCN-NEXT:    s_mov_b32 s9, s3
305; GCN-NEXT:    buffer_load_dword v0, off, s[8:11], 0
306; GCN-NEXT:    s_mov_b32 s2, 0x98a1930b
307; GCN-NEXT:    s_mov_b32 s4, s0
308; GCN-NEXT:    s_mov_b32 s5, s1
309; GCN-NEXT:    s_waitcnt vmcnt(0)
310; GCN-NEXT:    v_mul_hi_i32 v1, v0, s2
311; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
312; GCN-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
313; GCN-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
314; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
315; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
316; GCN-NEXT:    s_endpgm
317;
318; TONGA-LABEL: slow_sdiv_i32_3435:
319; TONGA:       ; %bb.0:
320; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
321; TONGA-NEXT:    s_mov_b32 s7, 0xf000
322; TONGA-NEXT:    s_mov_b32 s6, -1
323; TONGA-NEXT:    s_mov_b32 s10, s6
324; TONGA-NEXT:    s_mov_b32 s11, s7
325; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
326; TONGA-NEXT:    s_mov_b32 s8, s2
327; TONGA-NEXT:    s_mov_b32 s9, s3
328; TONGA-NEXT:    buffer_load_dword v0, off, s[8:11], 0
329; TONGA-NEXT:    s_mov_b32 s2, 0x98a1930b
330; TONGA-NEXT:    s_mov_b32 s4, s0
331; TONGA-NEXT:    s_mov_b32 s5, s1
332; TONGA-NEXT:    s_waitcnt vmcnt(0)
333; TONGA-NEXT:    v_mul_hi_i32 v1, v0, s2
334; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
335; TONGA-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
336; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
337; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
338; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
339; TONGA-NEXT:    s_endpgm
340;
341; GFX9-LABEL: slow_sdiv_i32_3435:
342; GFX9:       ; %bb.0:
343; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
344; GFX9-NEXT:    s_mov_b32 s7, 0xf000
345; GFX9-NEXT:    s_mov_b32 s6, -1
346; GFX9-NEXT:    s_mov_b32 s10, s6
347; GFX9-NEXT:    s_mov_b32 s11, s7
348; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
349; GFX9-NEXT:    s_mov_b32 s8, s2
350; GFX9-NEXT:    s_mov_b32 s9, s3
351; GFX9-NEXT:    buffer_load_dword v0, off, s[8:11], 0
352; GFX9-NEXT:    s_mov_b32 s2, 0x98a1930b
353; GFX9-NEXT:    s_mov_b32 s4, s0
354; GFX9-NEXT:    s_mov_b32 s5, s1
355; GFX9-NEXT:    s_waitcnt vmcnt(0)
356; GFX9-NEXT:    v_mul_hi_i32 v1, v0, s2
357; GFX9-NEXT:    v_add_u32_e32 v0, v1, v0
358; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
359; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
360; GFX9-NEXT:    v_add_u32_e32 v0, v0, v1
361; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
362; GFX9-NEXT:    s_endpgm
363;
364; EG-LABEL: slow_sdiv_i32_3435:
365; EG:       ; %bb.0:
366; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
367; EG-NEXT:    TEX 0 @6
368; EG-NEXT:    ALU 8, @9, KC0[CB0:0-32], KC1[]
369; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
370; EG-NEXT:    CF_END
371; EG-NEXT:    PAD
372; EG-NEXT:    Fetch clause starting at 6:
373; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
374; EG-NEXT:    ALU clause starting at 8:
375; EG-NEXT:     MOV * T0.X, KC0[2].Z,
376; EG-NEXT:    ALU clause starting at 9:
377; EG-NEXT:     MULHI_INT * T0.Y, T0.X, literal.x,
378; EG-NEXT:    -1734241525(-4.176600e-24), 0(0.000000e+00)
379; EG-NEXT:     ADD_INT * T0.W, PS, T0.X,
380; EG-NEXT:     ASHR T1.W, PV.W, literal.x,
381; EG-NEXT:     LSHR * T0.W, PV.W, literal.y,
382; EG-NEXT:    11(1.541428e-44), 31(4.344025e-44)
383; EG-NEXT:     ADD_INT T0.X, PV.W, PS,
384; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
385; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
386  %num = load i32, i32 addrspace(1) * %in
387  %result = sdiv i32 %num, 3435
388  store i32 %result, i32 addrspace(1)* %out
389  ret void
390}
391
392define amdgpu_kernel void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
393; GCN-LABEL: sdiv_v2i32:
394; GCN:       ; %bb.0:
395; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
396; GCN-NEXT:    s_mov_b32 s7, 0xf000
397; GCN-NEXT:    s_mov_b32 s6, -1
398; GCN-NEXT:    s_mov_b32 s10, s6
399; GCN-NEXT:    s_mov_b32 s11, s7
400; GCN-NEXT:    s_waitcnt lgkmcnt(0)
401; GCN-NEXT:    s_mov_b32 s8, s2
402; GCN-NEXT:    s_mov_b32 s9, s3
403; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
404; GCN-NEXT:    s_mov_b32 s4, s0
405; GCN-NEXT:    s_mov_b32 s5, s1
406; GCN-NEXT:    s_waitcnt vmcnt(0)
407; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
408; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
409; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
410; GCN-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
411; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
412; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
413; GCN-NEXT:    v_xor_b32_e32 v2, v2, v5
414; GCN-NEXT:    v_xor_b32_e32 v3, v3, v7
415; GCN-NEXT:    v_xor_b32_e32 v8, v4, v5
416; GCN-NEXT:    v_xor_b32_e32 v9, v6, v7
417; GCN-NEXT:    v_cvt_f32_u32_e32 v5, v2
418; GCN-NEXT:    v_cvt_f32_u32_e32 v7, v3
419; GCN-NEXT:    v_sub_i32_e32 v10, vcc, 0, v2
420; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v5
421; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v7
422; GCN-NEXT:    v_sub_i32_e32 v11, vcc, 0, v3
423; GCN-NEXT:    v_mul_f32_e32 v5, 0x4f7ffffe, v5
424; GCN-NEXT:    v_mul_f32_e32 v7, 0x4f7ffffe, v7
425; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
426; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v7
427; GCN-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
428; GCN-NEXT:    v_mul_lo_u32 v10, v10, v5
429; GCN-NEXT:    v_mul_lo_u32 v11, v11, v7
430; GCN-NEXT:    v_add_i32_e32 v1, vcc, v6, v1
431; GCN-NEXT:    v_xor_b32_e32 v0, v0, v4
432; GCN-NEXT:    v_mul_hi_u32 v4, v5, v10
433; GCN-NEXT:    v_xor_b32_e32 v1, v1, v6
434; GCN-NEXT:    v_mul_hi_u32 v6, v7, v11
435; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
436; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v6
437; GCN-NEXT:    v_mul_hi_u32 v4, v0, v4
438; GCN-NEXT:    v_mul_hi_u32 v5, v1, v5
439; GCN-NEXT:    v_mul_lo_u32 v6, v4, v2
440; GCN-NEXT:    v_mul_lo_u32 v10, v5, v3
441; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v4
442; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v6
443; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v10, v1
444; GCN-NEXT:    v_add_i32_e32 v11, vcc, 1, v5
445; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v2
446; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v1, v3
447; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
448; GCN-NEXT:    v_subrev_i32_e32 v6, vcc, v2, v0
449; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v11, s[2:3]
450; GCN-NEXT:    v_subrev_i32_e32 v7, vcc, v3, v1
451; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
452; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v4
453; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v7, s[2:3]
454; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v5
455; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
456; GCN-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc
457; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
458; GCN-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc
459; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
460; GCN-NEXT:    v_xor_b32_e32 v1, v1, v9
461; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v8
462; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v9, v1
463; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
464; GCN-NEXT:    s_endpgm
465;
466; TONGA-LABEL: sdiv_v2i32:
467; TONGA:       ; %bb.0:
468; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
469; TONGA-NEXT:    s_mov_b32 s7, 0xf000
470; TONGA-NEXT:    s_mov_b32 s6, -1
471; TONGA-NEXT:    s_mov_b32 s10, s6
472; TONGA-NEXT:    s_mov_b32 s11, s7
473; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
474; TONGA-NEXT:    s_mov_b32 s8, s2
475; TONGA-NEXT:    s_mov_b32 s9, s3
476; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
477; TONGA-NEXT:    s_mov_b32 s4, s0
478; TONGA-NEXT:    s_mov_b32 s5, s1
479; TONGA-NEXT:    s_waitcnt vmcnt(0)
480; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
481; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
482; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v5, v2
483; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
484; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
485; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
486; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v5
487; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v7
488; TONGA-NEXT:    v_xor_b32_e32 v8, v4, v5
489; TONGA-NEXT:    v_xor_b32_e32 v9, v6, v7
490; TONGA-NEXT:    v_cvt_f32_u32_e32 v5, v2
491; TONGA-NEXT:    v_cvt_f32_u32_e32 v7, v3
492; TONGA-NEXT:    v_sub_u32_e32 v10, vcc, 0, v2
493; TONGA-NEXT:    v_rcp_iflag_f32_e32 v5, v5
494; TONGA-NEXT:    v_rcp_iflag_f32_e32 v7, v7
495; TONGA-NEXT:    v_sub_u32_e32 v11, vcc, 0, v3
496; TONGA-NEXT:    v_mul_f32_e32 v5, 0x4f7ffffe, v5
497; TONGA-NEXT:    v_mul_f32_e32 v7, 0x4f7ffffe, v7
498; TONGA-NEXT:    v_cvt_u32_f32_e32 v5, v5
499; TONGA-NEXT:    v_cvt_u32_f32_e32 v7, v7
500; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
501; TONGA-NEXT:    v_mul_lo_u32 v10, v10, v5
502; TONGA-NEXT:    v_mul_lo_u32 v11, v11, v7
503; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v6, v1
504; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v4
505; TONGA-NEXT:    v_mul_hi_u32 v4, v5, v10
506; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v6
507; TONGA-NEXT:    v_mul_hi_u32 v6, v7, v11
508; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v4, v5
509; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v7, v6
510; TONGA-NEXT:    v_mul_hi_u32 v4, v0, v4
511; TONGA-NEXT:    v_mul_hi_u32 v5, v1, v5
512; TONGA-NEXT:    v_mul_lo_u32 v6, v4, v2
513; TONGA-NEXT:    v_mul_lo_u32 v10, v5, v3
514; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v4
515; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v6
516; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v10
517; TONGA-NEXT:    v_add_u32_e32 v11, vcc, 1, v5
518; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v2
519; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v1, v3
520; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
521; TONGA-NEXT:    v_subrev_u32_e32 v6, vcc, v2, v0
522; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v11, s[2:3]
523; TONGA-NEXT:    v_subrev_u32_e32 v7, vcc, v3, v1
524; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
525; TONGA-NEXT:    v_add_u32_e32 v6, vcc, 1, v4
526; TONGA-NEXT:    v_cndmask_b32_e64 v1, v1, v7, s[2:3]
527; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v5
528; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
529; TONGA-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc
530; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
531; TONGA-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc
532; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
533; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v9
534; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v8, v0
535; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v9, v1
536; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
537; TONGA-NEXT:    s_endpgm
538;
539; GFX9-LABEL: sdiv_v2i32:
540; GFX9:       ; %bb.0:
541; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
542; GFX9-NEXT:    s_mov_b32 s7, 0xf000
543; GFX9-NEXT:    s_mov_b32 s6, -1
544; GFX9-NEXT:    s_mov_b32 s10, s6
545; GFX9-NEXT:    s_mov_b32 s11, s7
546; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
547; GFX9-NEXT:    s_mov_b32 s8, s2
548; GFX9-NEXT:    s_mov_b32 s9, s3
549; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
550; GFX9-NEXT:    s_mov_b32 s4, s0
551; GFX9-NEXT:    s_mov_b32 s5, s1
552; GFX9-NEXT:    s_waitcnt vmcnt(0)
553; GFX9-NEXT:    v_ashrrev_i32_e32 v4, 31, v2
554; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v3
555; GFX9-NEXT:    v_add_u32_e32 v2, v2, v4
556; GFX9-NEXT:    v_add_u32_e32 v3, v3, v5
557; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v4
558; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v5
559; GFX9-NEXT:    v_cvt_f32_u32_e32 v6, v2
560; GFX9-NEXT:    v_cvt_f32_u32_e32 v7, v3
561; GFX9-NEXT:    v_sub_u32_e32 v10, 0, v2
562; GFX9-NEXT:    v_sub_u32_e32 v11, 0, v3
563; GFX9-NEXT:    v_rcp_iflag_f32_e32 v6, v6
564; GFX9-NEXT:    v_rcp_iflag_f32_e32 v7, v7
565; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
566; GFX9-NEXT:    v_ashrrev_i32_e32 v9, 31, v1
567; GFX9-NEXT:    v_mul_f32_e32 v6, 0x4f7ffffe, v6
568; GFX9-NEXT:    v_mul_f32_e32 v7, 0x4f7ffffe, v7
569; GFX9-NEXT:    v_cvt_u32_f32_e32 v6, v6
570; GFX9-NEXT:    v_cvt_u32_f32_e32 v7, v7
571; GFX9-NEXT:    v_add_u32_e32 v0, v0, v8
572; GFX9-NEXT:    v_add_u32_e32 v1, v1, v9
573; GFX9-NEXT:    v_mul_lo_u32 v10, v10, v6
574; GFX9-NEXT:    v_mul_lo_u32 v11, v11, v7
575; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v8
576; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v9
577; GFX9-NEXT:    v_mul_hi_u32 v10, v6, v10
578; GFX9-NEXT:    v_mul_hi_u32 v11, v7, v11
579; GFX9-NEXT:    v_xor_b32_e32 v4, v8, v4
580; GFX9-NEXT:    v_xor_b32_e32 v5, v9, v5
581; GFX9-NEXT:    v_add_u32_e32 v6, v6, v10
582; GFX9-NEXT:    v_add_u32_e32 v7, v7, v11
583; GFX9-NEXT:    v_mul_hi_u32 v6, v0, v6
584; GFX9-NEXT:    v_mul_hi_u32 v7, v1, v7
585; GFX9-NEXT:    v_mul_lo_u32 v8, v6, v2
586; GFX9-NEXT:    v_mul_lo_u32 v9, v7, v3
587; GFX9-NEXT:    v_add_u32_e32 v10, 1, v6
588; GFX9-NEXT:    v_add_u32_e32 v11, 1, v7
589; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v8
590; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v9
591; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
592; GFX9-NEXT:    v_sub_u32_e32 v8, v0, v2
593; GFX9-NEXT:    v_cndmask_b32_e32 v6, v6, v10, vcc
594; GFX9-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v3
595; GFX9-NEXT:    v_sub_u32_e32 v9, v1, v3
596; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v8, vcc
597; GFX9-NEXT:    v_cndmask_b32_e64 v7, v7, v11, s[0:1]
598; GFX9-NEXT:    v_add_u32_e32 v8, 1, v6
599; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v9, s[0:1]
600; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
601; GFX9-NEXT:    v_add_u32_e32 v9, 1, v7
602; GFX9-NEXT:    v_cndmask_b32_e32 v0, v6, v8, vcc
603; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
604; GFX9-NEXT:    v_cndmask_b32_e32 v1, v7, v9, vcc
605; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v4
606; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v5
607; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v4
608; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v5
609; GFX9-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
610; GFX9-NEXT:    s_endpgm
611;
612; EG-LABEL: sdiv_v2i32:
613; EG:       ; %bb.0:
614; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
615; EG-NEXT:    TEX 0 @6
616; EG-NEXT:    ALU 51, @9, KC0[CB0:0-32], KC1[]
617; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
618; EG-NEXT:    CF_END
619; EG-NEXT:    PAD
620; EG-NEXT:    Fetch clause starting at 6:
621; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
622; EG-NEXT:    ALU clause starting at 8:
623; EG-NEXT:     MOV * T0.X, KC0[2].Z,
624; EG-NEXT:    ALU clause starting at 9:
625; EG-NEXT:     SETGT_INT * T1.W, 0.0, T0.W,
626; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
627; EG-NEXT:     SETGT_INT * T2.W, 0.0, T0.Z,
628; EG-NEXT:     XOR_INT * T0.W, PV.W, T1.W,
629; EG-NEXT:     SUB_INT T1.Z, 0.0, PV.W,
630; EG-NEXT:     ADD_INT T3.W, T0.Z, T2.W,
631; EG-NEXT:     RECIP_UINT * T0.Z, PV.W,
632; EG-NEXT:     XOR_INT T3.W, PV.W, T2.W,
633; EG-NEXT:     MULLO_INT * T1.X, PV.Z, PS,
634; EG-NEXT:     SUB_INT T4.W, 0.0, PV.W,
635; EG-NEXT:     RECIP_UINT * T1.Y, PV.W,
636; EG-NEXT:     SETGT_INT T5.W, 0.0, T0.X,
637; EG-NEXT:     MULLO_INT * T1.Z, PV.W, PS,
638; EG-NEXT:     SETGT_INT T2.Z, 0.0, T0.Y,
639; EG-NEXT:     ADD_INT T4.W, T0.X, PV.W,
640; EG-NEXT:     MULHI * T0.X, T1.Y, PS,
641; EG-NEXT:     ADD_INT T1.Y, T1.Y, PS,
642; EG-NEXT:     XOR_INT T1.Z, PV.W, T5.W,
643; EG-NEXT:     ADD_INT T4.W, T0.Y, PV.Z, BS:VEC_120/SCL_212
644; EG-NEXT:     MULHI * T0.X, T0.Z, T1.X,
645; EG-NEXT:     ADD_INT T0.Z, T0.Z, PS,
646; EG-NEXT:     XOR_INT T4.W, PV.W, T2.Z,
647; EG-NEXT:     MULHI * T0.X, PV.Z, PV.Y,
648; EG-NEXT:     MULHI * T0.Y, PV.W, PV.Z,
649; EG-NEXT:     MULLO_INT * T0.Z, PS, T0.W,
650; EG-NEXT:     SUB_INT T4.W, T4.W, PS,
651; EG-NEXT:     MULLO_INT * T0.Z, T0.X, T3.W,
652; EG-NEXT:     SUB_INT T1.Y, T1.Z, PS,
653; EG-NEXT:     ADD_INT T0.Z, T0.Y, 1,
654; EG-NEXT:     SETGE_UINT T6.W, PV.W, T0.W,
655; EG-NEXT:     SUB_INT * T7.W, PV.W, T0.W,
656; EG-NEXT:     CNDE_INT T1.X, PV.W, T4.W, PS, BS:VEC_021/SCL_122
657; EG-NEXT:     CNDE_INT T0.Y, PV.W, T0.Y, PV.Z,
658; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
659; EG-NEXT:     SETGE_UINT T4.W, PV.Y, T3.W,
660; EG-NEXT:     SUB_INT * T6.W, PV.Y, T3.W,
661; EG-NEXT:     CNDE_INT T1.Y, PV.W, T1.Y, PS,
662; EG-NEXT:     CNDE_INT T0.Z, PV.W, T0.X, PV.Z,
663; EG-NEXT:     ADD_INT T4.W, PV.Y, 1,
664; EG-NEXT:     SETGE_UINT * T0.W, PV.X, T0.W,
665; EG-NEXT:     CNDE_INT T0.Y, PS, T0.Y, PV.W,
666; EG-NEXT:     XOR_INT T1.Z, T2.Z, T1.W, BS:VEC_021/SCL_122
667; EG-NEXT:     ADD_INT T0.W, PV.Z, 1,
668; EG-NEXT:     SETGE_UINT * T1.W, PV.Y, T3.W,
669; EG-NEXT:     CNDE_INT T0.Z, PS, T0.Z, PV.W,
670; EG-NEXT:     XOR_INT T0.W, T5.W, T2.W,
671; EG-NEXT:     XOR_INT * T1.W, PV.Y, PV.Z,
672; EG-NEXT:     SUB_INT T0.Y, PS, T1.Z,
673; EG-NEXT:     XOR_INT * T1.W, PV.Z, PV.W,
674; EG-NEXT:     SUB_INT T0.X, PV.W, T0.W,
675; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
676; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
677  %den_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
678  %num = load <2 x i32>, <2 x i32> addrspace(1) * %in
679  %den = load <2 x i32>, <2 x i32> addrspace(1) * %den_ptr
680  %result = sdiv <2 x i32> %num, %den
681  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
682  ret void
683}
684
685define amdgpu_kernel void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
686; GCN-LABEL: sdiv_v2i32_4:
687; GCN:       ; %bb.0:
688; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
689; GCN-NEXT:    s_mov_b32 s7, 0xf000
690; GCN-NEXT:    s_mov_b32 s6, -1
691; GCN-NEXT:    s_mov_b32 s10, s6
692; GCN-NEXT:    s_mov_b32 s11, s7
693; GCN-NEXT:    s_waitcnt lgkmcnt(0)
694; GCN-NEXT:    s_mov_b32 s8, s2
695; GCN-NEXT:    s_mov_b32 s9, s3
696; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
697; GCN-NEXT:    s_mov_b32 s4, s0
698; GCN-NEXT:    s_mov_b32 s5, s1
699; GCN-NEXT:    s_waitcnt vmcnt(0)
700; GCN-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
701; GCN-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
702; GCN-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
703; GCN-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
704; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
705; GCN-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
706; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
707; GCN-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
708; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
709; GCN-NEXT:    s_endpgm
710;
711; TONGA-LABEL: sdiv_v2i32_4:
712; TONGA:       ; %bb.0:
713; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
714; TONGA-NEXT:    s_mov_b32 s7, 0xf000
715; TONGA-NEXT:    s_mov_b32 s6, -1
716; TONGA-NEXT:    s_mov_b32 s10, s6
717; TONGA-NEXT:    s_mov_b32 s11, s7
718; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
719; TONGA-NEXT:    s_mov_b32 s8, s2
720; TONGA-NEXT:    s_mov_b32 s9, s3
721; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
722; TONGA-NEXT:    s_mov_b32 s4, s0
723; TONGA-NEXT:    s_mov_b32 s5, s1
724; TONGA-NEXT:    s_waitcnt vmcnt(0)
725; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
726; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
727; TONGA-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
728; TONGA-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
729; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v2, v0
730; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v3, v1
731; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
732; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
733; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
734; TONGA-NEXT:    s_endpgm
735;
736; GFX9-LABEL: sdiv_v2i32_4:
737; GFX9:       ; %bb.0:
738; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
739; GFX9-NEXT:    s_mov_b32 s7, 0xf000
740; GFX9-NEXT:    s_mov_b32 s6, -1
741; GFX9-NEXT:    s_mov_b32 s10, s6
742; GFX9-NEXT:    s_mov_b32 s11, s7
743; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
744; GFX9-NEXT:    s_mov_b32 s8, s2
745; GFX9-NEXT:    s_mov_b32 s9, s3
746; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
747; GFX9-NEXT:    s_mov_b32 s4, s0
748; GFX9-NEXT:    s_mov_b32 s5, s1
749; GFX9-NEXT:    s_waitcnt vmcnt(0)
750; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
751; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
752; GFX9-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
753; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
754; GFX9-NEXT:    v_add_u32_e32 v0, v0, v2
755; GFX9-NEXT:    v_add_u32_e32 v1, v1, v3
756; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
757; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
758; GFX9-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
759; GFX9-NEXT:    s_endpgm
760;
761; EG-LABEL: sdiv_v2i32_4:
762; EG:       ; %bb.0:
763; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
764; EG-NEXT:    TEX 0 @6
765; EG-NEXT:    ALU 13, @9, KC0[CB0:0-32], KC1[]
766; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
767; EG-NEXT:    CF_END
768; EG-NEXT:    PAD
769; EG-NEXT:    Fetch clause starting at 6:
770; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
771; EG-NEXT:    ALU clause starting at 8:
772; EG-NEXT:     MOV * T0.X, KC0[2].Z,
773; EG-NEXT:    ALU clause starting at 9:
774; EG-NEXT:     ASHR * T0.W, T0.Y, literal.x,
775; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
776; EG-NEXT:     LSHR T0.W, PV.W, literal.x,
777; EG-NEXT:     ASHR * T1.W, T0.X, literal.y,
778; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
779; EG-NEXT:     LSHR T1.W, PS, literal.x,
780; EG-NEXT:     ADD_INT * T0.W, T0.Y, PV.W,
781; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
782; EG-NEXT:     ASHR T0.Y, PS, literal.x,
783; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
784; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
785; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
786; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
787; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
788  %num = load <2 x i32>, <2 x i32> addrspace(1) * %in
789  %result = sdiv <2 x i32> %num, <i32 4, i32 4>
790  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
791  ret void
792}
793
794define amdgpu_kernel void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
795; GCN-LABEL: sdiv_v4i32:
796; GCN:       ; %bb.0:
797; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
798; GCN-NEXT:    s_mov_b32 s11, 0xf000
799; GCN-NEXT:    s_mov_b32 s10, -1
800; GCN-NEXT:    s_mov_b32 s6, s10
801; GCN-NEXT:    s_mov_b32 s7, s11
802; GCN-NEXT:    s_waitcnt lgkmcnt(0)
803; GCN-NEXT:    s_mov_b32 s4, s2
804; GCN-NEXT:    s_mov_b32 s5, s3
805; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
806; GCN-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
807; GCN-NEXT:    s_mov_b32 s8, s0
808; GCN-NEXT:    s_mov_b32 s9, s1
809; GCN-NEXT:    s_waitcnt vmcnt(1)
810; GCN-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
811; GCN-NEXT:    s_waitcnt vmcnt(0)
812; GCN-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
813; GCN-NEXT:    v_add_i32_e32 v4, vcc, v9, v4
814; GCN-NEXT:    v_add_i32_e32 v0, vcc, v8, v0
815; GCN-NEXT:    v_xor_b32_e32 v4, v4, v9
816; GCN-NEXT:    v_xor_b32_e32 v15, v8, v9
817; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
818; GCN-NEXT:    v_cvt_f32_u32_e32 v8, v4
819; GCN-NEXT:    v_sub_i32_e32 v9, vcc, 0, v4
820; GCN-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
821; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v8
822; GCN-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
823; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
824; GCN-NEXT:    v_add_i32_e32 v5, vcc, v11, v5
825; GCN-NEXT:    v_mul_f32_e32 v8, 0x4f7ffffe, v8
826; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v8
827; GCN-NEXT:    v_add_i32_e32 v6, vcc, v13, v6
828; GCN-NEXT:    v_add_i32_e32 v1, vcc, v10, v1
829; GCN-NEXT:    v_mul_lo_u32 v9, v9, v8
830; GCN-NEXT:    v_xor_b32_e32 v5, v5, v11
831; GCN-NEXT:    v_xor_b32_e32 v6, v6, v13
832; GCN-NEXT:    v_xor_b32_e32 v16, v10, v11
833; GCN-NEXT:    v_mul_hi_u32 v9, v8, v9
834; GCN-NEXT:    v_xor_b32_e32 v1, v1, v10
835; GCN-NEXT:    v_cvt_f32_u32_e32 v10, v5
836; GCN-NEXT:    v_cvt_f32_u32_e32 v11, v6
837; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
838; GCN-NEXT:    v_rcp_iflag_f32_e32 v10, v10
839; GCN-NEXT:    v_rcp_iflag_f32_e32 v11, v11
840; GCN-NEXT:    v_mul_hi_u32 v8, v0, v8
841; GCN-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
842; GCN-NEXT:    v_mul_f32_e32 v9, 0x4f7ffffe, v10
843; GCN-NEXT:    v_mul_f32_e32 v10, 0x4f7ffffe, v11
844; GCN-NEXT:    v_mul_lo_u32 v11, v8, v4
845; GCN-NEXT:    v_cvt_u32_f32_e32 v9, v9
846; GCN-NEXT:    v_add_i32_e32 v2, vcc, v12, v2
847; GCN-NEXT:    v_xor_b32_e32 v17, v12, v13
848; GCN-NEXT:    v_xor_b32_e32 v2, v2, v12
849; GCN-NEXT:    v_sub_i32_e32 v12, vcc, 0, v5
850; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
851; GCN-NEXT:    v_cvt_u32_f32_e32 v10, v10
852; GCN-NEXT:    v_mul_lo_u32 v12, v12, v9
853; GCN-NEXT:    v_add_i32_e32 v11, vcc, 1, v8
854; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
855; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v11, s[0:1]
856; GCN-NEXT:    v_subrev_i32_e32 v11, vcc, v4, v0
857; GCN-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
858; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v11, s[0:1]
859; GCN-NEXT:    v_add_i32_e32 v7, vcc, v14, v7
860; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
861; GCN-NEXT:    v_sub_i32_e32 v0, vcc, 0, v6
862; GCN-NEXT:    v_mul_lo_u32 v0, v0, v10
863; GCN-NEXT:    v_xor_b32_e32 v4, v7, v14
864; GCN-NEXT:    v_mul_hi_u32 v7, v9, v12
865; GCN-NEXT:    v_cvt_f32_u32_e32 v12, v4
866; GCN-NEXT:    v_mul_hi_u32 v0, v10, v0
867; GCN-NEXT:    v_add_i32_e32 v11, vcc, 1, v8
868; GCN-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
869; GCN-NEXT:    v_mul_hi_u32 v7, v1, v7
870; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v10
871; GCN-NEXT:    v_mul_hi_u32 v0, v2, v0
872; GCN-NEXT:    v_mul_lo_u32 v10, v7, v5
873; GCN-NEXT:    v_rcp_iflag_f32_e32 v12, v12
874; GCN-NEXT:    v_sub_i32_e32 v9, vcc, 0, v4
875; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v10, v1
876; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
877; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v1, v5
878; GCN-NEXT:    v_mul_f32_e32 v12, 0x4f7ffffe, v12
879; GCN-NEXT:    v_cvt_u32_f32_e32 v12, v12
880; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v10, v2
881; GCN-NEXT:    v_add_i32_e32 v10, vcc, 1, v7
882; GCN-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[2:3]
883; GCN-NEXT:    v_add_i32_e32 v10, vcc, 1, v0
884; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
885; GCN-NEXT:    v_cndmask_b32_e64 v10, v0, v10, s[4:5]
886; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v5, v1
887; GCN-NEXT:    v_cndmask_b32_e64 v0, v1, v0, s[2:3]
888; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v6, v2
889; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v1, s[4:5]
890; GCN-NEXT:    v_add_i32_e32 v1, vcc, 1, v7
891; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v5
892; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v11, s[0:1]
893; GCN-NEXT:    v_cndmask_b32_e32 v0, v7, v1, vcc
894; GCN-NEXT:    v_xor_b32_e32 v1, v8, v15
895; GCN-NEXT:    v_xor_b32_e32 v5, v0, v16
896; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v15
897; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v16, v5
898; GCN-NEXT:    v_mul_lo_u32 v5, v9, v12
899; GCN-NEXT:    v_ashrrev_i32_e32 v8, 31, v3
900; GCN-NEXT:    v_add_i32_e32 v3, vcc, v8, v3
901; GCN-NEXT:    v_mul_hi_u32 v5, v12, v5
902; GCN-NEXT:    v_xor_b32_e32 v3, v3, v8
903; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v10
904; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v12
905; GCN-NEXT:    v_mul_hi_u32 v5, v3, v5
906; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
907; GCN-NEXT:    v_cndmask_b32_e32 v2, v10, v7, vcc
908; GCN-NEXT:    v_xor_b32_e32 v2, v2, v17
909; GCN-NEXT:    v_mul_lo_u32 v6, v5, v4
910; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v17, v2
911; GCN-NEXT:    v_xor_b32_e32 v7, v8, v14
912; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v6, v3
913; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v5
914; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v3, v4
915; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v6, s[0:1]
916; GCN-NEXT:    v_subrev_i32_e32 v6, vcc, v4, v3
917; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
918; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v5
919; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v4
920; GCN-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc
921; GCN-NEXT:    v_xor_b32_e32 v3, v3, v7
922; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v7, v3
923; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
924; GCN-NEXT:    s_endpgm
925;
926; TONGA-LABEL: sdiv_v4i32:
927; TONGA:       ; %bb.0:
928; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
929; TONGA-NEXT:    s_mov_b32 s11, 0xf000
930; TONGA-NEXT:    s_mov_b32 s10, -1
931; TONGA-NEXT:    s_mov_b32 s6, s10
932; TONGA-NEXT:    s_mov_b32 s7, s11
933; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
934; TONGA-NEXT:    s_mov_b32 s4, s2
935; TONGA-NEXT:    s_mov_b32 s5, s3
936; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
937; TONGA-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
938; TONGA-NEXT:    s_mov_b32 s8, s0
939; TONGA-NEXT:    s_mov_b32 s9, s1
940; TONGA-NEXT:    s_waitcnt vmcnt(1)
941; TONGA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
942; TONGA-NEXT:    s_waitcnt vmcnt(0)
943; TONGA-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
944; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v9, v4
945; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v8, v0
946; TONGA-NEXT:    v_xor_b32_e32 v4, v4, v9
947; TONGA-NEXT:    v_xor_b32_e32 v15, v8, v9
948; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
949; TONGA-NEXT:    v_cvt_f32_u32_e32 v8, v4
950; TONGA-NEXT:    v_sub_u32_e32 v9, vcc, 0, v4
951; TONGA-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
952; TONGA-NEXT:    v_rcp_iflag_f32_e32 v8, v8
953; TONGA-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
954; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
955; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v11, v5
956; TONGA-NEXT:    v_mul_f32_e32 v8, 0x4f7ffffe, v8
957; TONGA-NEXT:    v_cvt_u32_f32_e32 v8, v8
958; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v13, v6
959; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v10, v1
960; TONGA-NEXT:    v_mul_lo_u32 v9, v9, v8
961; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v11
962; TONGA-NEXT:    v_xor_b32_e32 v6, v6, v13
963; TONGA-NEXT:    v_xor_b32_e32 v16, v10, v11
964; TONGA-NEXT:    v_mul_hi_u32 v9, v8, v9
965; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v10
966; TONGA-NEXT:    v_cvt_f32_u32_e32 v10, v5
967; TONGA-NEXT:    v_cvt_f32_u32_e32 v11, v6
968; TONGA-NEXT:    v_add_u32_e32 v8, vcc, v9, v8
969; TONGA-NEXT:    v_rcp_iflag_f32_e32 v10, v10
970; TONGA-NEXT:    v_rcp_iflag_f32_e32 v11, v11
971; TONGA-NEXT:    v_mul_hi_u32 v8, v0, v8
972; TONGA-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
973; TONGA-NEXT:    v_mul_f32_e32 v9, 0x4f7ffffe, v10
974; TONGA-NEXT:    v_mul_f32_e32 v10, 0x4f7ffffe, v11
975; TONGA-NEXT:    v_mul_lo_u32 v11, v8, v4
976; TONGA-NEXT:    v_cvt_u32_f32_e32 v9, v9
977; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v12, v2
978; TONGA-NEXT:    v_xor_b32_e32 v17, v12, v13
979; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v12
980; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, 0, v5
981; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v11
982; TONGA-NEXT:    v_cvt_u32_f32_e32 v10, v10
983; TONGA-NEXT:    v_mul_lo_u32 v12, v12, v9
984; TONGA-NEXT:    v_add_u32_e32 v11, vcc, 1, v8
985; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
986; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v11, s[0:1]
987; TONGA-NEXT:    v_subrev_u32_e32 v11, vcc, v4, v0
988; TONGA-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
989; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v11, s[0:1]
990; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v14, v7
991; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v4
992; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, 0, v6
993; TONGA-NEXT:    v_mul_lo_u32 v0, v0, v10
994; TONGA-NEXT:    v_xor_b32_e32 v4, v7, v14
995; TONGA-NEXT:    v_mul_hi_u32 v7, v9, v12
996; TONGA-NEXT:    v_cvt_f32_u32_e32 v12, v4
997; TONGA-NEXT:    v_mul_hi_u32 v0, v10, v0
998; TONGA-NEXT:    v_add_u32_e32 v11, vcc, 1, v8
999; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v9, v7
1000; TONGA-NEXT:    v_mul_hi_u32 v7, v1, v7
1001; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v10
1002; TONGA-NEXT:    v_mul_hi_u32 v0, v2, v0
1003; TONGA-NEXT:    v_mul_lo_u32 v10, v7, v5
1004; TONGA-NEXT:    v_rcp_iflag_f32_e32 v12, v12
1005; TONGA-NEXT:    v_sub_u32_e32 v9, vcc, 0, v4
1006; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v10
1007; TONGA-NEXT:    v_mul_lo_u32 v10, v0, v6
1008; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v1, v5
1009; TONGA-NEXT:    v_mul_f32_e32 v12, 0x4f7ffffe, v12
1010; TONGA-NEXT:    v_cvt_u32_f32_e32 v12, v12
1011; TONGA-NEXT:    v_subrev_u32_e32 v2, vcc, v10, v2
1012; TONGA-NEXT:    v_add_u32_e32 v10, vcc, 1, v7
1013; TONGA-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[2:3]
1014; TONGA-NEXT:    v_add_u32_e32 v10, vcc, 1, v0
1015; TONGA-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
1016; TONGA-NEXT:    v_cndmask_b32_e64 v10, v0, v10, s[4:5]
1017; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v5, v1
1018; TONGA-NEXT:    v_cndmask_b32_e64 v0, v1, v0, s[2:3]
1019; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v6, v2
1020; TONGA-NEXT:    v_cndmask_b32_e64 v2, v2, v1, s[4:5]
1021; TONGA-NEXT:    v_add_u32_e32 v1, vcc, 1, v7
1022; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v5
1023; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v11, s[0:1]
1024; TONGA-NEXT:    v_cndmask_b32_e32 v0, v7, v1, vcc
1025; TONGA-NEXT:    v_xor_b32_e32 v1, v8, v15
1026; TONGA-NEXT:    v_xor_b32_e32 v5, v0, v16
1027; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v15, v1
1028; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v16, v5
1029; TONGA-NEXT:    v_mul_lo_u32 v5, v9, v12
1030; TONGA-NEXT:    v_ashrrev_i32_e32 v8, 31, v3
1031; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v8, v3
1032; TONGA-NEXT:    v_mul_hi_u32 v5, v12, v5
1033; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v8
1034; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v10
1035; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v5, v12
1036; TONGA-NEXT:    v_mul_hi_u32 v5, v3, v5
1037; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1038; TONGA-NEXT:    v_cndmask_b32_e32 v2, v10, v7, vcc
1039; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v17
1040; TONGA-NEXT:    v_mul_lo_u32 v6, v5, v4
1041; TONGA-NEXT:    v_subrev_u32_e32 v2, vcc, v17, v2
1042; TONGA-NEXT:    v_xor_b32_e32 v7, v8, v14
1043; TONGA-NEXT:    v_subrev_u32_e32 v3, vcc, v6, v3
1044; TONGA-NEXT:    v_add_u32_e32 v6, vcc, 1, v5
1045; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v3, v4
1046; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v6, s[0:1]
1047; TONGA-NEXT:    v_subrev_u32_e32 v6, vcc, v4, v3
1048; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
1049; TONGA-NEXT:    v_add_u32_e32 v6, vcc, 1, v5
1050; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v4
1051; TONGA-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc
1052; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v7
1053; TONGA-NEXT:    v_sub_u32_e32 v3, vcc, v3, v7
1054; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1055; TONGA-NEXT:    s_endpgm
1056;
1057; GFX9-LABEL: sdiv_v4i32:
1058; GFX9:       ; %bb.0:
1059; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1060; GFX9-NEXT:    s_mov_b32 s11, 0xf000
1061; GFX9-NEXT:    s_mov_b32 s10, -1
1062; GFX9-NEXT:    s_mov_b32 s6, s10
1063; GFX9-NEXT:    s_mov_b32 s7, s11
1064; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1065; GFX9-NEXT:    s_mov_b32 s4, s2
1066; GFX9-NEXT:    s_mov_b32 s5, s3
1067; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
1068; GFX9-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
1069; GFX9-NEXT:    s_mov_b32 s8, s0
1070; GFX9-NEXT:    s_mov_b32 s9, s1
1071; GFX9-NEXT:    s_waitcnt vmcnt(1)
1072; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
1073; GFX9-NEXT:    s_waitcnt vmcnt(0)
1074; GFX9-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
1075; GFX9-NEXT:    v_add_u32_e32 v4, v4, v9
1076; GFX9-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
1077; GFX9-NEXT:    v_add_u32_e32 v0, v0, v8
1078; GFX9-NEXT:    v_xor_b32_e32 v4, v4, v9
1079; GFX9-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
1080; GFX9-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
1081; GFX9-NEXT:    v_xor_b32_e32 v16, v8, v9
1082; GFX9-NEXT:    v_add_u32_e32 v5, v5, v11
1083; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v8
1084; GFX9-NEXT:    v_cvt_f32_u32_e32 v8, v4
1085; GFX9-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
1086; GFX9-NEXT:    v_ashrrev_i32_e32 v15, 31, v7
1087; GFX9-NEXT:    v_add_u32_e32 v1, v1, v10
1088; GFX9-NEXT:    v_add_u32_e32 v6, v6, v13
1089; GFX9-NEXT:    v_xor_b32_e32 v5, v5, v11
1090; GFX9-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
1091; GFX9-NEXT:    v_add_u32_e32 v2, v2, v12
1092; GFX9-NEXT:    v_add_u32_e32 v7, v7, v15
1093; GFX9-NEXT:    v_xor_b32_e32 v17, v10, v11
1094; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v10
1095; GFX9-NEXT:    v_xor_b32_e32 v6, v6, v13
1096; GFX9-NEXT:    v_cvt_f32_u32_e32 v10, v5
1097; GFX9-NEXT:    v_add_u32_e32 v3, v3, v14
1098; GFX9-NEXT:    v_xor_b32_e32 v18, v12, v13
1099; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v12
1100; GFX9-NEXT:    v_xor_b32_e32 v7, v7, v15
1101; GFX9-NEXT:    v_cvt_f32_u32_e32 v12, v6
1102; GFX9-NEXT:    v_xor_b32_e32 v19, v14, v15
1103; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v14
1104; GFX9-NEXT:    v_cvt_f32_u32_e32 v14, v7
1105; GFX9-NEXT:    v_rcp_iflag_f32_e32 v8, v8
1106; GFX9-NEXT:    v_rcp_iflag_f32_e32 v10, v10
1107; GFX9-NEXT:    v_rcp_iflag_f32_e32 v12, v12
1108; GFX9-NEXT:    v_rcp_iflag_f32_e32 v14, v14
1109; GFX9-NEXT:    v_mul_f32_e32 v8, 0x4f7ffffe, v8
1110; GFX9-NEXT:    v_cvt_u32_f32_e32 v8, v8
1111; GFX9-NEXT:    v_mul_f32_e32 v10, 0x4f7ffffe, v10
1112; GFX9-NEXT:    v_mul_f32_e32 v12, 0x4f7ffffe, v12
1113; GFX9-NEXT:    v_cvt_u32_f32_e32 v10, v10
1114; GFX9-NEXT:    v_sub_u32_e32 v9, 0, v4
1115; GFX9-NEXT:    v_mul_f32_e32 v14, 0x4f7ffffe, v14
1116; GFX9-NEXT:    v_cvt_u32_f32_e32 v12, v12
1117; GFX9-NEXT:    v_cvt_u32_f32_e32 v14, v14
1118; GFX9-NEXT:    v_mul_lo_u32 v9, v9, v8
1119; GFX9-NEXT:    v_sub_u32_e32 v11, 0, v5
1120; GFX9-NEXT:    v_sub_u32_e32 v13, 0, v6
1121; GFX9-NEXT:    v_mul_lo_u32 v11, v11, v10
1122; GFX9-NEXT:    v_sub_u32_e32 v15, 0, v7
1123; GFX9-NEXT:    v_mul_lo_u32 v13, v13, v12
1124; GFX9-NEXT:    v_mul_lo_u32 v15, v15, v14
1125; GFX9-NEXT:    v_mul_hi_u32 v9, v8, v9
1126; GFX9-NEXT:    v_mul_hi_u32 v11, v10, v11
1127; GFX9-NEXT:    v_mul_hi_u32 v13, v12, v13
1128; GFX9-NEXT:    v_mul_hi_u32 v15, v14, v15
1129; GFX9-NEXT:    v_add_u32_e32 v8, v8, v9
1130; GFX9-NEXT:    v_mul_hi_u32 v8, v0, v8
1131; GFX9-NEXT:    v_add_u32_e32 v9, v10, v11
1132; GFX9-NEXT:    v_add_u32_e32 v10, v12, v13
1133; GFX9-NEXT:    v_mul_hi_u32 v9, v1, v9
1134; GFX9-NEXT:    v_add_u32_e32 v11, v14, v15
1135; GFX9-NEXT:    v_mul_hi_u32 v10, v2, v10
1136; GFX9-NEXT:    v_mul_hi_u32 v11, v3, v11
1137; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v4
1138; GFX9-NEXT:    v_mul_lo_u32 v14, v9, v5
1139; GFX9-NEXT:    v_mul_lo_u32 v15, v10, v6
1140; GFX9-NEXT:    v_add_u32_e32 v13, 1, v8
1141; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v12
1142; GFX9-NEXT:    v_mul_lo_u32 v12, v11, v7
1143; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v14
1144; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
1145; GFX9-NEXT:    v_add_u32_e32 v14, 1, v9
1146; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v15
1147; GFX9-NEXT:    v_cndmask_b32_e32 v8, v8, v13, vcc
1148; GFX9-NEXT:    v_sub_u32_e32 v13, v0, v4
1149; GFX9-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v5
1150; GFX9-NEXT:    v_add_u32_e32 v15, 1, v10
1151; GFX9-NEXT:    v_sub_u32_e32 v3, v3, v12
1152; GFX9-NEXT:    v_cndmask_b32_e64 v9, v9, v14, s[0:1]
1153; GFX9-NEXT:    v_sub_u32_e32 v14, v1, v5
1154; GFX9-NEXT:    v_cmp_ge_u32_e64 s[2:3], v2, v6
1155; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v13, vcc
1156; GFX9-NEXT:    v_add_u32_e32 v12, 1, v11
1157; GFX9-NEXT:    v_cndmask_b32_e64 v10, v10, v15, s[2:3]
1158; GFX9-NEXT:    v_sub_u32_e32 v15, v2, v6
1159; GFX9-NEXT:    v_cmp_ge_u32_e64 s[4:5], v3, v7
1160; GFX9-NEXT:    v_add_u32_e32 v13, 1, v8
1161; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v14, s[0:1]
1162; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
1163; GFX9-NEXT:    v_cndmask_b32_e64 v11, v11, v12, s[4:5]
1164; GFX9-NEXT:    v_sub_u32_e32 v12, v3, v7
1165; GFX9-NEXT:    v_add_u32_e32 v14, 1, v9
1166; GFX9-NEXT:    v_cndmask_b32_e64 v2, v2, v15, s[2:3]
1167; GFX9-NEXT:    v_cndmask_b32_e32 v0, v8, v13, vcc
1168; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
1169; GFX9-NEXT:    v_add_u32_e32 v15, 1, v10
1170; GFX9-NEXT:    v_cndmask_b32_e64 v3, v3, v12, s[4:5]
1171; GFX9-NEXT:    v_cndmask_b32_e32 v1, v9, v14, vcc
1172; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1173; GFX9-NEXT:    v_add_u32_e32 v12, 1, v11
1174; GFX9-NEXT:    v_cndmask_b32_e32 v2, v10, v15, vcc
1175; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
1176; GFX9-NEXT:    v_cndmask_b32_e32 v3, v11, v12, vcc
1177; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v16
1178; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v17
1179; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v18
1180; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v19
1181; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v16
1182; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v17
1183; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v18
1184; GFX9-NEXT:    v_sub_u32_e32 v3, v3, v19
1185; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1186; GFX9-NEXT:    s_endpgm
1187;
1188; EG-LABEL: sdiv_v4i32:
1189; EG:       ; %bb.0:
1190; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
1191; EG-NEXT:    TEX 1 @6
1192; EG-NEXT:    ALU 101, @11, KC0[CB0:0-32], KC1[]
1193; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
1194; EG-NEXT:    CF_END
1195; EG-NEXT:    PAD
1196; EG-NEXT:    Fetch clause starting at 6:
1197; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 16, #1
1198; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
1199; EG-NEXT:    ALU clause starting at 10:
1200; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1201; EG-NEXT:    ALU clause starting at 11:
1202; EG-NEXT:     SETGT_INT * T2.W, 0.0, T1.W,
1203; EG-NEXT:     ADD_INT * T1.W, T1.W, PV.W,
1204; EG-NEXT:     XOR_INT * T1.W, PV.W, T2.W,
1205; EG-NEXT:     SUB_INT T3.W, 0.0, PV.W,
1206; EG-NEXT:     RECIP_UINT * T2.X, PV.W,
1207; EG-NEXT:     SETGT_INT T4.W, 0.0, T0.W,
1208; EG-NEXT:     MULLO_INT * T2.Y, PV.W, PS,
1209; EG-NEXT:     SETGT_INT T2.Z, 0.0, T1.Y,
1210; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
1211; EG-NEXT:     MULHI * T2.Y, T2.X, PS,
1212; EG-NEXT:     ADD_INT T3.Z, T2.X, PS,
1213; EG-NEXT:     XOR_INT T0.W, PV.W, T4.W,
1214; EG-NEXT:     ADD_INT * T3.W, T1.Y, PV.Z,
1215; EG-NEXT:     XOR_INT T3.W, PS, T2.Z,
1216; EG-NEXT:     MULHI * T1.Y, PV.W, PV.Z,
1217; EG-NEXT:     SUB_INT T5.W, 0.0, PV.W,
1218; EG-NEXT:     RECIP_UINT * T2.X, PV.W,
1219; EG-NEXT:     SETGT_INT T6.W, 0.0, T0.Y,
1220; EG-NEXT:     MULLO_INT * T2.Y, PV.W, PS,
1221; EG-NEXT:     ADD_INT T5.W, T0.Y, PV.W,
1222; EG-NEXT:     MULHI * T0.Y, T2.X, PS,
1223; EG-NEXT:     ADD_INT T0.Y, T2.X, PS,
1224; EG-NEXT:     XOR_INT T3.Z, PV.W, T6.W, BS:VEC_021/SCL_122
1225; EG-NEXT:     SETGT_INT T5.W, 0.0, T1.Z,
1226; EG-NEXT:     MULLO_INT * T2.X, T1.Y, T1.W,
1227; EG-NEXT:     ADD_INT T7.W, T1.Z, PV.W,
1228; EG-NEXT:     MULHI * T0.Y, PV.Z, PV.Y,
1229; EG-NEXT:     XOR_INT T7.W, PV.W, T5.W, BS:VEC_021/SCL_122
1230; EG-NEXT:     MULLO_INT * T1.Z, PS, T3.W,
1231; EG-NEXT:     SUB_INT T4.Z, 0.0, PV.W,
1232; EG-NEXT:     SETGT_INT T8.W, 0.0, T1.X,
1233; EG-NEXT:     RECIP_UINT * T2.Y, PV.W,
1234; EG-NEXT:     ADD_INT T9.W, T1.X, PV.W,
1235; EG-NEXT:     MULLO_INT * T1.X, PV.Z, PS,
1236; EG-NEXT:     SETGT_INT T4.Z, 0.0, T0.Z,
1237; EG-NEXT:     XOR_INT T9.W, PV.W, T8.W,
1238; EG-NEXT:     MULHI * T1.X, T2.Y, PS,
1239; EG-NEXT:     ADD_INT T1.X, T2.Y, PS,
1240; EG-NEXT:     SUB_INT T2.Y, 0.0, PV.W,
1241; EG-NEXT:     SUB_INT T1.Z, T3.Z, T1.Z,
1242; EG-NEXT:     ADD_INT T10.W, T0.Z, PV.Z, BS:VEC_201
1243; EG-NEXT:     RECIP_UINT * T0.Z, PV.W,
1244; EG-NEXT:     XOR_INT T3.X, PV.W, T4.Z,
1245; EG-NEXT:     ADD_INT T3.Y, T0.Y, 1,
1246; EG-NEXT:     SETGE_UINT T3.Z, PV.Z, T3.W,
1247; EG-NEXT:     SUB_INT T10.W, PV.Z, T3.W,
1248; EG-NEXT:     MULLO_INT * T2.Y, PV.Y, PS,
1249; EG-NEXT:     CNDE_INT T1.Z, PV.Z, T1.Z, PV.W,
1250; EG-NEXT:     CNDE_INT T10.W, PV.Z, T0.Y, PV.Y,
1251; EG-NEXT:     MULHI * T0.Y, PV.X, T1.X,
1252; EG-NEXT:     SETGT_INT T3.Y, 0.0, T0.X,
1253; EG-NEXT:     ADD_INT T3.Z, PV.W, 1,
1254; EG-NEXT:     SETGE_UINT T3.W, PV.Z, T3.W, BS:VEC_021/SCL_122
1255; EG-NEXT:     MULLO_INT * T1.X, PS, T7.W,
1256; EG-NEXT:     CNDE_INT T4.Y, PV.W, T10.W, PV.Z,
1257; EG-NEXT:     ADD_INT T1.Z, T0.X, PV.Y,
1258; EG-NEXT:     SUB_INT T3.W, T3.X, PS, BS:VEC_120/SCL_212
1259; EG-NEXT:     MULHI * T0.X, T0.Z, T2.Y,
1260; EG-NEXT:     ADD_INT T1.X, T0.Y, 1,
1261; EG-NEXT:     SETGE_UINT T2.Y, PV.W, T7.W,
1262; EG-NEXT:     ADD_INT T0.Z, T0.Z, PS,
1263; EG-NEXT:     XOR_INT T10.W, PV.Z, T3.Y,
1264; EG-NEXT:     SUB_INT * T0.W, T0.W, T2.X,
1265; EG-NEXT:     SUB_INT T0.X, T3.W, T7.W,
1266; EG-NEXT:     ADD_INT T5.Y, T1.Y, 1,
1267; EG-NEXT:     SETGE_UINT T1.Z, PS, T1.W, BS:VEC_021/SCL_122
1268; EG-NEXT:     SUB_INT T11.W, PS, T1.W, BS:VEC_021/SCL_122
1269; EG-NEXT:     MULHI * T0.Z, PV.W, PV.Z,
1270; EG-NEXT:     CNDE_INT T2.X, PV.Z, T0.W, PV.W, BS:VEC_021/SCL_122
1271; EG-NEXT:     CNDE_INT T1.Y, PV.Z, T1.Y, PV.Y,
1272; EG-NEXT:     CNDE_INT T1.Z, T2.Y, T3.W, PV.X, BS:VEC_201
1273; EG-NEXT:     CNDE_INT T0.W, T2.Y, T0.Y, T1.X, BS:VEC_201
1274; EG-NEXT:     MULLO_INT * T0.X, PS, T9.W,
1275; EG-NEXT:     ADD_INT T1.X, PV.W, 1,
1276; EG-NEXT:     SETGE_UINT T0.Y, PV.Z, T7.W,
1277; EG-NEXT:     ADD_INT T1.Z, PV.Y, 1,
1278; EG-NEXT:     SETGE_UINT T1.W, PV.X, T1.W, BS:VEC_102/SCL_221
1279; EG-NEXT:     SUB_INT * T3.W, T10.W, PS,
1280; EG-NEXT:     ADD_INT T0.X, T0.Z, 1,
1281; EG-NEXT:     SETGE_UINT T2.Y, PS, T9.W, BS:VEC_102/SCL_221
1282; EG-NEXT:     SUB_INT T3.Z, PS, T9.W, BS:VEC_102/SCL_221
1283; EG-NEXT:     CNDE_INT T1.W, PV.W, T1.Y, PV.Z,
1284; EG-NEXT:     XOR_INT * T2.W, T4.W, T2.W,
1285; EG-NEXT:     XOR_INT T2.X, PV.W, PS,
1286; EG-NEXT:     CNDE_INT T1.Y, PV.Y, T3.W, PV.Z, BS:VEC_021/SCL_122
1287; EG-NEXT:     CNDE_INT T0.Z, PV.Y, T0.Z, PV.X,
1288; EG-NEXT:     CNDE_INT T0.W, T0.Y, T0.W, T1.X, BS:VEC_102/SCL_221
1289; EG-NEXT:     XOR_INT * T1.W, T4.Z, T5.W,
1290; EG-NEXT:     XOR_INT T0.X, T6.W, T2.Z,
1291; EG-NEXT:     XOR_INT T0.Y, PV.W, PS,
1292; EG-NEXT:     ADD_INT T1.Z, PV.Z, 1,
1293; EG-NEXT:     SETGE_UINT T0.W, PV.Y, T9.W, BS:VEC_021/SCL_122
1294; EG-NEXT:     SUB_INT * T2.W, PV.X, T2.W,
1295; EG-NEXT:     CNDE_INT T1.Y, PV.W, T0.Z, PV.Z,
1296; EG-NEXT:     SUB_INT T2.Z, PV.Y, T1.W,
1297; EG-NEXT:     XOR_INT T0.W, T3.Y, T8.W, BS:VEC_021/SCL_122
1298; EG-NEXT:     XOR_INT * T1.W, T4.Y, PV.X,
1299; EG-NEXT:     SUB_INT T2.Y, PS, T0.X,
1300; EG-NEXT:     XOR_INT * T1.W, PV.Y, PV.W,
1301; EG-NEXT:     SUB_INT T2.X, PV.W, T0.W,
1302; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
1303; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1304  %den_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
1305  %num = load <4 x i32>, <4 x i32> addrspace(1) * %in
1306  %den = load <4 x i32>, <4 x i32> addrspace(1) * %den_ptr
1307  %result = sdiv <4 x i32> %num, %den
1308  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1309  ret void
1310}
1311
1312define amdgpu_kernel void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
1313; GCN-LABEL: sdiv_v4i32_4:
1314; GCN:       ; %bb.0:
1315; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1316; GCN-NEXT:    s_mov_b32 s7, 0xf000
1317; GCN-NEXT:    s_mov_b32 s6, -1
1318; GCN-NEXT:    s_mov_b32 s10, s6
1319; GCN-NEXT:    s_mov_b32 s11, s7
1320; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1321; GCN-NEXT:    s_mov_b32 s8, s2
1322; GCN-NEXT:    s_mov_b32 s9, s3
1323; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1324; GCN-NEXT:    s_mov_b32 s4, s0
1325; GCN-NEXT:    s_mov_b32 s5, s1
1326; GCN-NEXT:    s_waitcnt vmcnt(0)
1327; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1328; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1329; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1330; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1331; GCN-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1332; GCN-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1333; GCN-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1334; GCN-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1335; GCN-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
1336; GCN-NEXT:    v_add_i32_e32 v1, vcc, v5, v1
1337; GCN-NEXT:    v_add_i32_e32 v2, vcc, v6, v2
1338; GCN-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
1339; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1340; GCN-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1341; GCN-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1342; GCN-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1343; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1344; GCN-NEXT:    s_endpgm
1345;
1346; TONGA-LABEL: sdiv_v4i32_4:
1347; TONGA:       ; %bb.0:
1348; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1349; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1350; TONGA-NEXT:    s_mov_b32 s6, -1
1351; TONGA-NEXT:    s_mov_b32 s10, s6
1352; TONGA-NEXT:    s_mov_b32 s11, s7
1353; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1354; TONGA-NEXT:    s_mov_b32 s8, s2
1355; TONGA-NEXT:    s_mov_b32 s9, s3
1356; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1357; TONGA-NEXT:    s_mov_b32 s4, s0
1358; TONGA-NEXT:    s_mov_b32 s5, s1
1359; TONGA-NEXT:    s_waitcnt vmcnt(0)
1360; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1361; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1362; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1363; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1364; TONGA-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1365; TONGA-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1366; TONGA-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1367; TONGA-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1368; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
1369; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v5, v1
1370; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v6, v2
1371; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
1372; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1373; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1374; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1375; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1376; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1377; TONGA-NEXT:    s_endpgm
1378;
1379; GFX9-LABEL: sdiv_v4i32_4:
1380; GFX9:       ; %bb.0:
1381; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1382; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1383; GFX9-NEXT:    s_mov_b32 s6, -1
1384; GFX9-NEXT:    s_mov_b32 s10, s6
1385; GFX9-NEXT:    s_mov_b32 s11, s7
1386; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1387; GFX9-NEXT:    s_mov_b32 s8, s2
1388; GFX9-NEXT:    s_mov_b32 s9, s3
1389; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1390; GFX9-NEXT:    s_mov_b32 s4, s0
1391; GFX9-NEXT:    s_mov_b32 s5, s1
1392; GFX9-NEXT:    s_waitcnt vmcnt(0)
1393; GFX9-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1394; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1395; GFX9-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1396; GFX9-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1397; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1398; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1399; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1400; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1401; GFX9-NEXT:    v_add_u32_e32 v0, v0, v4
1402; GFX9-NEXT:    v_add_u32_e32 v1, v1, v5
1403; GFX9-NEXT:    v_add_u32_e32 v2, v2, v6
1404; GFX9-NEXT:    v_add_u32_e32 v3, v3, v7
1405; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1406; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1407; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1408; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1409; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1410; GFX9-NEXT:    s_endpgm
1411;
1412; EG-LABEL: sdiv_v4i32_4:
1413; EG:       ; %bb.0:
1414; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
1415; EG-NEXT:    TEX 0 @6
1416; EG-NEXT:    ALU 24, @9, KC0[CB0:0-32], KC1[]
1417; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1418; EG-NEXT:    CF_END
1419; EG-NEXT:    PAD
1420; EG-NEXT:    Fetch clause starting at 6:
1421; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
1422; EG-NEXT:    ALU clause starting at 8:
1423; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1424; EG-NEXT:    ALU clause starting at 9:
1425; EG-NEXT:     ASHR T1.W, T0.W, literal.x,
1426; EG-NEXT:     ASHR * T2.W, T0.Z, literal.x,
1427; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
1428; EG-NEXT:     LSHR * T1.W, PV.W, literal.x,
1429; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1430; EG-NEXT:     ADD_INT T1.Z, T0.W, PV.W,
1431; EG-NEXT:     LSHR T0.W, T2.W, literal.x, BS:VEC_120/SCL_212
1432; EG-NEXT:     ASHR * T1.W, T0.Y, literal.y,
1433; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
1434; EG-NEXT:     LSHR T1.Y, PS, literal.x,
1435; EG-NEXT:     ASHR T2.Z, T0.X, literal.y,
1436; EG-NEXT:     ADD_INT T0.W, T0.Z, PV.W,
1437; EG-NEXT:     ASHR * T1.W, PV.Z, literal.z,
1438; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
1439; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1440; EG-NEXT:     ASHR T1.Z, PV.W, literal.x,
1441; EG-NEXT:     LSHR T0.W, PV.Z, literal.y,
1442; EG-NEXT:     ADD_INT * T2.W, T0.Y, PV.Y,
1443; EG-NEXT:    2(2.802597e-45), 30(4.203895e-44)
1444; EG-NEXT:     ASHR T1.Y, PS, literal.x,
1445; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
1446; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1447; EG-NEXT:     ASHR T1.X, PV.W, literal.x,
1448; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
1449; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1450  %num = load <4 x i32>, <4 x i32> addrspace(1) * %in
1451  %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
1452  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1453  ret void
1454}
1455
1456define amdgpu_kernel void @v_sdiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
1457; GCN-LABEL: v_sdiv_i8:
1458; GCN:       ; %bb.0:
1459; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1460; GCN-NEXT:    s_mov_b32 s7, 0xf000
1461; GCN-NEXT:    s_mov_b32 s6, -1
1462; GCN-NEXT:    s_mov_b32 s10, s6
1463; GCN-NEXT:    s_mov_b32 s11, s7
1464; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1465; GCN-NEXT:    s_mov_b32 s8, s2
1466; GCN-NEXT:    s_mov_b32 s9, s3
1467; GCN-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1468; GCN-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0
1469; GCN-NEXT:    s_mov_b32 s4, s0
1470; GCN-NEXT:    s_mov_b32 s5, s1
1471; GCN-NEXT:    s_waitcnt vmcnt(1)
1472; GCN-NEXT:    v_cvt_f32_i32_e32 v2, v0
1473; GCN-NEXT:    s_waitcnt vmcnt(0)
1474; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v1
1475; GCN-NEXT:    v_xor_b32_e32 v0, v1, v0
1476; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1477; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1478; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1479; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
1480; GCN-NEXT:    v_trunc_f32_e32 v1, v1
1481; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
1482; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
1483; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1484; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1485; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
1486; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 8
1487; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1488; GCN-NEXT:    s_endpgm
1489;
1490; TONGA-LABEL: v_sdiv_i8:
1491; TONGA:       ; %bb.0:
1492; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1493; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1494; TONGA-NEXT:    s_mov_b32 s6, -1
1495; TONGA-NEXT:    s_mov_b32 s10, s6
1496; TONGA-NEXT:    s_mov_b32 s11, s7
1497; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1498; TONGA-NEXT:    s_mov_b32 s8, s2
1499; TONGA-NEXT:    s_mov_b32 s9, s3
1500; TONGA-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1501; TONGA-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0
1502; TONGA-NEXT:    s_mov_b32 s4, s0
1503; TONGA-NEXT:    s_mov_b32 s5, s1
1504; TONGA-NEXT:    s_waitcnt vmcnt(1)
1505; TONGA-NEXT:    v_cvt_f32_i32_e32 v2, v0
1506; TONGA-NEXT:    s_waitcnt vmcnt(0)
1507; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v1
1508; TONGA-NEXT:    v_xor_b32_e32 v0, v1, v0
1509; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1510; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1511; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1512; TONGA-NEXT:    v_mul_f32_e32 v1, v3, v4
1513; TONGA-NEXT:    v_trunc_f32_e32 v1, v1
1514; TONGA-NEXT:    v_mad_f32 v3, -v1, v2, v3
1515; TONGA-NEXT:    v_cvt_i32_f32_e32 v1, v1
1516; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1517; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1518; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
1519; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 8
1520; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1521; TONGA-NEXT:    s_endpgm
1522;
1523; GFX9-LABEL: v_sdiv_i8:
1524; GFX9:       ; %bb.0:
1525; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1526; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1527; GFX9-NEXT:    s_mov_b32 s6, -1
1528; GFX9-NEXT:    s_mov_b32 s10, s6
1529; GFX9-NEXT:    s_mov_b32 s11, s7
1530; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1531; GFX9-NEXT:    s_mov_b32 s8, s2
1532; GFX9-NEXT:    s_mov_b32 s9, s3
1533; GFX9-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:1
1534; GFX9-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0
1535; GFX9-NEXT:    s_mov_b32 s4, s0
1536; GFX9-NEXT:    s_mov_b32 s5, s1
1537; GFX9-NEXT:    s_waitcnt vmcnt(1)
1538; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v0
1539; GFX9-NEXT:    s_waitcnt vmcnt(0)
1540; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v1
1541; GFX9-NEXT:    v_xor_b32_e32 v0, v1, v0
1542; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1543; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1544; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1545; GFX9-NEXT:    v_mul_f32_e32 v1, v3, v4
1546; GFX9-NEXT:    v_trunc_f32_e32 v1, v1
1547; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v1
1548; GFX9-NEXT:    v_mad_f32 v1, -v1, v2, v3
1549; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1550; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1551; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1552; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 8
1553; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1554; GFX9-NEXT:    s_endpgm
1555;
1556; EG-LABEL: v_sdiv_i8:
1557; EG:       ; %bb.0:
1558; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
1559; EG-NEXT:    TEX 1 @6
1560; EG-NEXT:    ALU 21, @11, KC0[CB0:0-32], KC1[]
1561; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1562; EG-NEXT:    CF_END
1563; EG-NEXT:    PAD
1564; EG-NEXT:    Fetch clause starting at 6:
1565; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 1, #1
1566; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
1567; EG-NEXT:    ALU clause starting at 10:
1568; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1569; EG-NEXT:    ALU clause starting at 11:
1570; EG-NEXT:     BFE_INT * T0.W, T1.X, 0.0, literal.x,
1571; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1572; EG-NEXT:     INT_TO_FLT * T0.Y, PV.W,
1573; EG-NEXT:     BFE_INT T1.W, T0.X, 0.0, literal.x,
1574; EG-NEXT:     RECIP_IEEE * T0.X, PS,
1575; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1576; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1577; EG-NEXT:     MUL_IEEE * T2.W, PS, T0.X,
1578; EG-NEXT:     TRUNC T2.W, PV.W,
1579; EG-NEXT:     XOR_INT * T0.W, T1.W, T0.W,
1580; EG-NEXT:     ASHR T0.W, PS, literal.x,
1581; EG-NEXT:     MULADD_IEEE * T1.W, -PV.W, T0.Y, T0.Z,
1582; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1583; EG-NEXT:     TRUNC T0.Z, T2.W,
1584; EG-NEXT:     SETGE T1.W, |PS|, |T0.Y|,
1585; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1586; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1587; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1588; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1589; EG-NEXT:     BFE_INT T0.X, PV.W, 0.0, literal.x,
1590; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1591; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
1592  %den_ptr = getelementptr i8, i8 addrspace(1)* %in, i8 1
1593  %num = load i8, i8 addrspace(1) * %in
1594  %den = load i8, i8 addrspace(1) * %den_ptr
1595  %result = sdiv i8 %num, %den
1596  %result.ext = sext i8 %result to i32
1597  store i32 %result.ext, i32 addrspace(1)* %out
1598  ret void
1599}
1600
1601define amdgpu_kernel void @v_sdiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) {
1602; GCN-LABEL: v_sdiv_i23:
1603; GCN:       ; %bb.0:
1604; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1605; GCN-NEXT:    s_mov_b32 s7, 0xf000
1606; GCN-NEXT:    s_mov_b32 s6, -1
1607; GCN-NEXT:    s_mov_b32 s10, s6
1608; GCN-NEXT:    s_mov_b32 s11, s7
1609; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1610; GCN-NEXT:    s_mov_b32 s8, s2
1611; GCN-NEXT:    s_mov_b32 s9, s3
1612; GCN-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1613; GCN-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1614; GCN-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1615; GCN-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1616; GCN-NEXT:    s_mov_b32 s4, s0
1617; GCN-NEXT:    s_mov_b32 s5, s1
1618; GCN-NEXT:    s_waitcnt vmcnt(3)
1619; GCN-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
1620; GCN-NEXT:    s_waitcnt vmcnt(2)
1621; GCN-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1622; GCN-NEXT:    s_waitcnt vmcnt(1)
1623; GCN-NEXT:    v_or_b32_e32 v1, v2, v1
1624; GCN-NEXT:    v_bfe_i32 v1, v1, 0, 23
1625; GCN-NEXT:    v_cvt_f32_i32_e32 v2, v1
1626; GCN-NEXT:    s_waitcnt vmcnt(0)
1627; GCN-NEXT:    v_or_b32_e32 v0, v3, v0
1628; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
1629; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v0
1630; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1631; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
1632; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1633; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1634; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
1635; GCN-NEXT:    v_trunc_f32_e32 v1, v1
1636; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
1637; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
1638; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1639; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1640; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
1641; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
1642; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1643; GCN-NEXT:    s_endpgm
1644;
1645; TONGA-LABEL: v_sdiv_i23:
1646; TONGA:       ; %bb.0:
1647; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1648; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1649; TONGA-NEXT:    s_mov_b32 s6, -1
1650; TONGA-NEXT:    s_mov_b32 s10, s6
1651; TONGA-NEXT:    s_mov_b32 s11, s7
1652; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1653; TONGA-NEXT:    s_mov_b32 s8, s2
1654; TONGA-NEXT:    s_mov_b32 s9, s3
1655; TONGA-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1656; TONGA-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1657; TONGA-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1658; TONGA-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1659; TONGA-NEXT:    s_mov_b32 s4, s0
1660; TONGA-NEXT:    s_mov_b32 s5, s1
1661; TONGA-NEXT:    s_waitcnt vmcnt(3)
1662; TONGA-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
1663; TONGA-NEXT:    s_waitcnt vmcnt(2)
1664; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1665; TONGA-NEXT:    s_waitcnt vmcnt(1)
1666; TONGA-NEXT:    v_or_b32_e32 v1, v2, v1
1667; TONGA-NEXT:    v_bfe_i32 v1, v1, 0, 23
1668; TONGA-NEXT:    v_cvt_f32_i32_e32 v2, v1
1669; TONGA-NEXT:    s_waitcnt vmcnt(0)
1670; TONGA-NEXT:    v_or_b32_e32 v0, v3, v0
1671; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
1672; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v0
1673; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1674; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
1675; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1676; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1677; TONGA-NEXT:    v_mul_f32_e32 v1, v3, v4
1678; TONGA-NEXT:    v_trunc_f32_e32 v1, v1
1679; TONGA-NEXT:    v_mad_f32 v3, -v1, v2, v3
1680; TONGA-NEXT:    v_cvt_i32_f32_e32 v1, v1
1681; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1682; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1683; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
1684; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
1685; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1686; TONGA-NEXT:    s_endpgm
1687;
1688; GFX9-LABEL: v_sdiv_i23:
1689; GFX9:       ; %bb.0:
1690; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1691; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1692; GFX9-NEXT:    s_mov_b32 s6, -1
1693; GFX9-NEXT:    s_mov_b32 s10, s6
1694; GFX9-NEXT:    s_mov_b32 s11, s7
1695; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1696; GFX9-NEXT:    s_mov_b32 s8, s2
1697; GFX9-NEXT:    s_mov_b32 s9, s3
1698; GFX9-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0 offset:2
1699; GFX9-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:6
1700; GFX9-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1701; GFX9-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1702; GFX9-NEXT:    s_mov_b32 s4, s0
1703; GFX9-NEXT:    s_mov_b32 s5, s1
1704; GFX9-NEXT:    s_waitcnt vmcnt(3)
1705; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
1706; GFX9-NEXT:    s_waitcnt vmcnt(2)
1707; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1708; GFX9-NEXT:    s_waitcnt vmcnt(1)
1709; GFX9-NEXT:    v_or_b32_e32 v1, v2, v1
1710; GFX9-NEXT:    v_bfe_i32 v1, v1, 0, 23
1711; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v1
1712; GFX9-NEXT:    s_waitcnt vmcnt(0)
1713; GFX9-NEXT:    v_or_b32_e32 v0, v3, v0
1714; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 23
1715; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v0
1716; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1717; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v1
1718; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1719; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1720; GFX9-NEXT:    v_mul_f32_e32 v1, v3, v4
1721; GFX9-NEXT:    v_trunc_f32_e32 v1, v1
1722; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v1
1723; GFX9-NEXT:    v_mad_f32 v1, -v1, v2, v3
1724; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1725; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1726; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1727; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 23
1728; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1729; GFX9-NEXT:    s_endpgm
1730;
1731; EG-LABEL: v_sdiv_i23:
1732; EG:       ; %bb.0:
1733; EG-NEXT:    ALU 0, @14, KC0[CB0:0-32], KC1[]
1734; EG-NEXT:    TEX 3 @6
1735; EG-NEXT:    ALU 33, @15, KC0[CB0:0-32], KC1[]
1736; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1737; EG-NEXT:    CF_END
1738; EG-NEXT:    PAD
1739; EG-NEXT:    Fetch clause starting at 6:
1740; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 6, #1
1741; EG-NEXT:     VTX_READ_16 T2.X, T0.X, 0, #1
1742; EG-NEXT:     VTX_READ_8 T3.X, T0.X, 2, #1
1743; EG-NEXT:     VTX_READ_16 T0.X, T0.X, 4, #1
1744; EG-NEXT:    ALU clause starting at 14:
1745; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1746; EG-NEXT:    ALU clause starting at 15:
1747; EG-NEXT:     LSHL * T0.W, T1.X, literal.x,
1748; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1749; EG-NEXT:     OR_INT T0.W, T0.X, PV.W,
1750; EG-NEXT:     LSHL * T1.W, T3.X, literal.x,
1751; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1752; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1753; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1754; EG-NEXT:     ASHR T0.W, PV.W, literal.x,
1755; EG-NEXT:     OR_INT * T1.W, T2.X, T1.W,
1756; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1757; EG-NEXT:     LSHL T1.W, PS, literal.x,
1758; EG-NEXT:     INT_TO_FLT * T0.X, PV.W,
1759; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1760; EG-NEXT:     ASHR T1.W, PV.W, literal.x,
1761; EG-NEXT:     RECIP_IEEE * T0.Y, PS,
1762; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1763; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1764; EG-NEXT:     MUL_IEEE * T2.W, PS, T0.Y,
1765; EG-NEXT:     TRUNC T2.W, PV.W,
1766; EG-NEXT:     XOR_INT * T0.W, T1.W, T0.W,
1767; EG-NEXT:     ASHR T0.W, PS, literal.x,
1768; EG-NEXT:     MULADD_IEEE * T1.W, -PV.W, T0.X, T0.Z,
1769; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1770; EG-NEXT:     TRUNC T0.Z, T2.W,
1771; EG-NEXT:     SETGE T1.W, |PS|, |T0.X|,
1772; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1773; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1774; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1775; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1776; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1777; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1778; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
1779; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1780; EG-NEXT:    9(1.261169e-44), 2(2.802597e-45)
1781  %den_ptr = getelementptr i23, i23 addrspace(1)* %in, i23 1
1782  %num = load i23, i23 addrspace(1) * %in
1783  %den = load i23, i23 addrspace(1) * %den_ptr
1784  %result = sdiv i23 %num, %den
1785  %result.ext = sext i23 %result to i32
1786  store i32 %result.ext, i32 addrspace(1)* %out
1787  ret void
1788}
1789
1790define amdgpu_kernel void @v_sdiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) {
1791; GCN-LABEL: v_sdiv_i24:
1792; GCN:       ; %bb.0:
1793; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1794; GCN-NEXT:    s_mov_b32 s7, 0xf000
1795; GCN-NEXT:    s_mov_b32 s6, -1
1796; GCN-NEXT:    s_mov_b32 s10, s6
1797; GCN-NEXT:    s_mov_b32 s11, s7
1798; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1799; GCN-NEXT:    s_mov_b32 s8, s2
1800; GCN-NEXT:    s_mov_b32 s9, s3
1801; GCN-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1802; GCN-NEXT:    buffer_load_ushort v1, off, s[8:11], 0 offset:4
1803; GCN-NEXT:    buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1804; GCN-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1805; GCN-NEXT:    s_mov_b32 s4, s0
1806; GCN-NEXT:    s_mov_b32 s5, s1
1807; GCN-NEXT:    s_waitcnt vmcnt(3)
1808; GCN-NEXT:    v_lshlrev_b32_e32 v4, 16, v0
1809; GCN-NEXT:    s_waitcnt vmcnt(2)
1810; GCN-NEXT:    v_or_b32_e32 v1, v1, v4
1811; GCN-NEXT:    v_cvt_f32_i32_e32 v1, v1
1812; GCN-NEXT:    s_waitcnt vmcnt(1)
1813; GCN-NEXT:    v_lshlrev_b32_e32 v4, 16, v2
1814; GCN-NEXT:    s_waitcnt vmcnt(0)
1815; GCN-NEXT:    v_or_b32_e32 v3, v3, v4
1816; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v3
1817; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v1
1818; GCN-NEXT:    v_xor_b32_e32 v0, v2, v0
1819; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1820; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1821; GCN-NEXT:    v_mul_f32_e32 v2, v3, v4
1822; GCN-NEXT:    v_trunc_f32_e32 v2, v2
1823; GCN-NEXT:    v_mad_f32 v3, -v2, v1, v3
1824; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
1825; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1826; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1827; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
1828; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
1829; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1830; GCN-NEXT:    s_endpgm
1831;
1832; TONGA-LABEL: v_sdiv_i24:
1833; TONGA:       ; %bb.0:
1834; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1835; TONGA-NEXT:    s_mov_b32 s7, 0xf000
1836; TONGA-NEXT:    s_mov_b32 s6, -1
1837; TONGA-NEXT:    s_mov_b32 s10, s6
1838; TONGA-NEXT:    s_mov_b32 s11, s7
1839; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1840; TONGA-NEXT:    s_mov_b32 s8, s2
1841; TONGA-NEXT:    s_mov_b32 s9, s3
1842; TONGA-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1843; TONGA-NEXT:    buffer_load_ushort v1, off, s[8:11], 0 offset:4
1844; TONGA-NEXT:    buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1845; TONGA-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1846; TONGA-NEXT:    s_mov_b32 s4, s0
1847; TONGA-NEXT:    s_mov_b32 s5, s1
1848; TONGA-NEXT:    s_waitcnt vmcnt(3)
1849; TONGA-NEXT:    v_lshlrev_b32_e32 v4, 16, v0
1850; TONGA-NEXT:    s_waitcnt vmcnt(2)
1851; TONGA-NEXT:    v_or_b32_e32 v1, v1, v4
1852; TONGA-NEXT:    v_cvt_f32_i32_e32 v1, v1
1853; TONGA-NEXT:    s_waitcnt vmcnt(1)
1854; TONGA-NEXT:    v_lshlrev_b32_e32 v4, 16, v2
1855; TONGA-NEXT:    s_waitcnt vmcnt(0)
1856; TONGA-NEXT:    v_or_b32_e32 v3, v3, v4
1857; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v3
1858; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v1
1859; TONGA-NEXT:    v_xor_b32_e32 v0, v2, v0
1860; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1861; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1862; TONGA-NEXT:    v_mul_f32_e32 v2, v3, v4
1863; TONGA-NEXT:    v_trunc_f32_e32 v2, v2
1864; TONGA-NEXT:    v_mad_f32 v3, -v2, v1, v3
1865; TONGA-NEXT:    v_cvt_i32_f32_e32 v2, v2
1866; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
1867; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1868; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v2
1869; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 24
1870; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1871; TONGA-NEXT:    s_endpgm
1872;
1873; GFX9-LABEL: v_sdiv_i24:
1874; GFX9:       ; %bb.0:
1875; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1876; GFX9-NEXT:    s_mov_b32 s7, 0xf000
1877; GFX9-NEXT:    s_mov_b32 s6, -1
1878; GFX9-NEXT:    s_mov_b32 s10, s6
1879; GFX9-NEXT:    s_mov_b32 s11, s7
1880; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1881; GFX9-NEXT:    s_mov_b32 s8, s2
1882; GFX9-NEXT:    s_mov_b32 s9, s3
1883; GFX9-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0 offset:6
1884; GFX9-NEXT:    buffer_load_ushort v1, off, s[8:11], 0 offset:4
1885; GFX9-NEXT:    buffer_load_sbyte v2, off, s[8:11], 0 offset:2
1886; GFX9-NEXT:    buffer_load_ushort v3, off, s[8:11], 0
1887; GFX9-NEXT:    s_mov_b32 s4, s0
1888; GFX9-NEXT:    s_mov_b32 s5, s1
1889; GFX9-NEXT:    s_waitcnt vmcnt(3)
1890; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v0
1891; GFX9-NEXT:    s_waitcnt vmcnt(2)
1892; GFX9-NEXT:    v_or_b32_e32 v1, v1, v4
1893; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v1
1894; GFX9-NEXT:    s_waitcnt vmcnt(1)
1895; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v2
1896; GFX9-NEXT:    s_waitcnt vmcnt(0)
1897; GFX9-NEXT:    v_or_b32_e32 v3, v3, v4
1898; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v3
1899; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v1
1900; GFX9-NEXT:    v_xor_b32_e32 v0, v2, v0
1901; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1902; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1903; GFX9-NEXT:    v_mul_f32_e32 v2, v3, v4
1904; GFX9-NEXT:    v_trunc_f32_e32 v2, v2
1905; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v2
1906; GFX9-NEXT:    v_mad_f32 v2, -v2, v1, v3
1907; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
1908; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1909; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1910; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 24
1911; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
1912; GFX9-NEXT:    s_endpgm
1913;
1914; EG-LABEL: v_sdiv_i24:
1915; EG:       ; %bb.0:
1916; EG-NEXT:    ALU 0, @14, KC0[CB0:0-32], KC1[]
1917; EG-NEXT:    TEX 3 @6
1918; EG-NEXT:    ALU 29, @15, KC0[CB0:0-32], KC1[]
1919; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1920; EG-NEXT:    CF_END
1921; EG-NEXT:    PAD
1922; EG-NEXT:    Fetch clause starting at 6:
1923; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 6, #1
1924; EG-NEXT:     VTX_READ_16 T2.X, T0.X, 0, #1
1925; EG-NEXT:     VTX_READ_16 T3.X, T0.X, 4, #1
1926; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 2, #1
1927; EG-NEXT:    ALU clause starting at 14:
1928; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1929; EG-NEXT:    ALU clause starting at 15:
1930; EG-NEXT:     BFE_INT * T0.W, T1.X, 0.0, literal.x,
1931; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1932; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
1933; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1934; EG-NEXT:     BFE_INT T2.W, T0.X, 0.0, literal.x,
1935; EG-NEXT:     OR_INT * T1.W, T3.X, PV.W,
1936; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1937; EG-NEXT:     LSHL T3.W, PV.W, literal.x,
1938; EG-NEXT:     INT_TO_FLT * T0.X, PS,
1939; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1940; EG-NEXT:     OR_INT T1.W, T2.X, PV.W,
1941; EG-NEXT:     RECIP_IEEE * T0.Y, PS,
1942; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1943; EG-NEXT:     MUL_IEEE * T1.W, PS, T0.Y,
1944; EG-NEXT:     TRUNC T1.W, PV.W,
1945; EG-NEXT:     XOR_INT * T0.W, T2.W, T0.W,
1946; EG-NEXT:     ASHR T0.W, PS, literal.x,
1947; EG-NEXT:     MULADD_IEEE * T2.W, -PV.W, T0.X, T0.Z,
1948; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1949; EG-NEXT:     TRUNC T0.Z, T1.W,
1950; EG-NEXT:     SETGE T1.W, |PS|, |T0.X|,
1951; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1952; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1953; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1954; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1955; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1956; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1957; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
1958; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1959; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
1960  %den_ptr = getelementptr i24, i24 addrspace(1)* %in, i24 1
1961  %num = load i24, i24 addrspace(1) * %in
1962  %den = load i24, i24 addrspace(1) * %den_ptr
1963  %result = sdiv i24 %num, %den
1964  %result.ext = sext i24 %result to i32
1965  store i32 %result.ext, i32 addrspace(1)* %out
1966  ret void
1967}
1968
1969define amdgpu_kernel void @v_sdiv_i25(i32 addrspace(1)* %out, i25 addrspace(1)* %in) {
1970; GCN-LABEL: v_sdiv_i25:
1971; GCN:       ; %bb.0:
1972; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1973; GCN-NEXT:    s_mov_b32 s7, 0xf000
1974; GCN-NEXT:    s_mov_b32 s6, -1
1975; GCN-NEXT:    s_mov_b32 s10, s6
1976; GCN-NEXT:    s_mov_b32 s11, s7
1977; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1978; GCN-NEXT:    s_mov_b32 s8, s2
1979; GCN-NEXT:    s_mov_b32 s9, s3
1980; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
1981; GCN-NEXT:    s_mov_b32 s4, s0
1982; GCN-NEXT:    s_mov_b32 s5, s1
1983; GCN-NEXT:    s_waitcnt vmcnt(0)
1984; GCN-NEXT:    v_bfe_i32 v2, v1, 0, 25
1985; GCN-NEXT:    v_bfe_i32 v1, v1, 24, 1
1986; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v1
1987; GCN-NEXT:    v_xor_b32_e32 v2, v2, v1
1988; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v2
1989; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
1990; GCN-NEXT:    v_bfe_i32 v5, v0, 0, 25
1991; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
1992; GCN-NEXT:    v_bfe_i32 v0, v0, 24, 1
1993; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v0
1994; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
1995; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
1996; GCN-NEXT:    v_xor_b32_e32 v5, v5, v0
1997; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
1998; GCN-NEXT:    v_mul_lo_u32 v4, v4, v3
1999; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
2000; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v4
2001; GCN-NEXT:    v_mul_hi_u32 v3, v5, v3
2002; GCN-NEXT:    v_mul_lo_u32 v1, v3, v2
2003; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
2004; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v1, v5
2005; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
2006; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v4, s[0:1]
2007; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v2, v1
2008; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
2009; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
2010; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
2011; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
2012; GCN-NEXT:    v_xor_b32_e32 v1, v1, v0
2013; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v0, v1
2014; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 25
2015; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2016; GCN-NEXT:    s_endpgm
2017;
2018; TONGA-LABEL: v_sdiv_i25:
2019; TONGA:       ; %bb.0:
2020; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2021; TONGA-NEXT:    s_mov_b32 s7, 0xf000
2022; TONGA-NEXT:    s_mov_b32 s6, -1
2023; TONGA-NEXT:    s_mov_b32 s10, s6
2024; TONGA-NEXT:    s_mov_b32 s11, s7
2025; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
2026; TONGA-NEXT:    s_mov_b32 s8, s2
2027; TONGA-NEXT:    s_mov_b32 s9, s3
2028; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2029; TONGA-NEXT:    s_mov_b32 s4, s0
2030; TONGA-NEXT:    s_mov_b32 s5, s1
2031; TONGA-NEXT:    s_waitcnt vmcnt(0)
2032; TONGA-NEXT:    v_bfe_i32 v2, v1, 0, 25
2033; TONGA-NEXT:    v_bfe_i32 v1, v1, 24, 1
2034; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v2, v1
2035; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v1
2036; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v2
2037; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v2
2038; TONGA-NEXT:    v_bfe_i32 v5, v0, 0, 25
2039; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2040; TONGA-NEXT:    v_bfe_i32 v0, v0, 24, 1
2041; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v5, v0
2042; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2043; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
2044; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v0
2045; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
2046; TONGA-NEXT:    v_mul_lo_u32 v4, v4, v3
2047; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
2048; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v3, v4
2049; TONGA-NEXT:    v_mul_hi_u32 v3, v5, v3
2050; TONGA-NEXT:    v_mul_lo_u32 v1, v3, v2
2051; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
2052; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v1, v5
2053; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
2054; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v4, s[0:1]
2055; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v2, v1
2056; TONGA-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
2057; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
2058; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
2059; TONGA-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
2060; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v0
2061; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v0, v1
2062; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 25
2063; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2064; TONGA-NEXT:    s_endpgm
2065;
2066; GFX9-LABEL: v_sdiv_i25:
2067; GFX9:       ; %bb.0:
2068; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2069; GFX9-NEXT:    s_mov_b32 s7, 0xf000
2070; GFX9-NEXT:    s_mov_b32 s6, -1
2071; GFX9-NEXT:    s_mov_b32 s10, s6
2072; GFX9-NEXT:    s_mov_b32 s11, s7
2073; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2074; GFX9-NEXT:    s_mov_b32 s8, s2
2075; GFX9-NEXT:    s_mov_b32 s9, s3
2076; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2077; GFX9-NEXT:    s_mov_b32 s4, s0
2078; GFX9-NEXT:    s_mov_b32 s5, s1
2079; GFX9-NEXT:    s_waitcnt vmcnt(0)
2080; GFX9-NEXT:    v_bfe_i32 v2, v1, 0, 25
2081; GFX9-NEXT:    v_bfe_i32 v1, v1, 24, 1
2082; GFX9-NEXT:    v_add_u32_e32 v2, v2, v1
2083; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v1
2084; GFX9-NEXT:    v_cvt_f32_u32_e32 v3, v2
2085; GFX9-NEXT:    v_sub_u32_e32 v4, 0, v2
2086; GFX9-NEXT:    v_bfe_i32 v5, v0, 0, 25
2087; GFX9-NEXT:    v_bfe_i32 v0, v0, 24, 1
2088; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2089; GFX9-NEXT:    v_add_u32_e32 v5, v5, v0
2090; GFX9-NEXT:    v_xor_b32_e32 v5, v5, v0
2091; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v1
2092; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2093; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3
2094; GFX9-NEXT:    v_mul_lo_u32 v4, v4, v3
2095; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4
2096; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4
2097; GFX9-NEXT:    v_mul_hi_u32 v3, v5, v3
2098; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v2
2099; GFX9-NEXT:    v_add_u32_e32 v1, 1, v3
2100; GFX9-NEXT:    v_sub_u32_e32 v4, v5, v4
2101; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v2
2102; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
2103; GFX9-NEXT:    v_sub_u32_e32 v3, v4, v2
2104; GFX9-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
2105; GFX9-NEXT:    v_add_u32_e32 v4, 1, v1
2106; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v2
2107; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
2108; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v0
2109; GFX9-NEXT:    v_sub_u32_e32 v0, v1, v0
2110; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 25
2111; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2112; GFX9-NEXT:    s_endpgm
2113;
2114; EG-LABEL: v_sdiv_i25:
2115; EG:       ; %bb.0:
2116; EG-NEXT:    ALU 1, @10, KC0[CB0:0-32], KC1[]
2117; EG-NEXT:    TEX 1 @6
2118; EG-NEXT:    ALU 37, @12, KC0[CB0:0-32], KC1[]
2119; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
2120; EG-NEXT:    CF_END
2121; EG-NEXT:    PAD
2122; EG-NEXT:    Fetch clause starting at 6:
2123; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 4, #1
2124; EG-NEXT:     VTX_READ_32 T1.X, T1.X, 0, #1
2125; EG-NEXT:    ALU clause starting at 10:
2126; EG-NEXT:     MOV * T0.X, KC0[2].Z,
2127; EG-NEXT:     MOV * T1.X, PV.X,
2128; EG-NEXT:    ALU clause starting at 12:
2129; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
2130; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2131; EG-NEXT:     ASHR * T0.W, PV.W, literal.x,
2132; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2133; EG-NEXT:     SETGT_INT * T1.W, 0.0, PV.W,
2134; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
2135; EG-NEXT:     LSHL * T2.W, T1.X, literal.x,
2136; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2137; EG-NEXT:     XOR_INT * T0.W, PV.W, T1.W,
2138; EG-NEXT:     SUB_INT T0.Z, 0.0, PV.W,
2139; EG-NEXT:     ASHR T2.W, T2.W, literal.x,
2140; EG-NEXT:     RECIP_UINT * T0.X, PV.W,
2141; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2142; EG-NEXT:     SETGT_INT T3.W, 0.0, PV.W,
2143; EG-NEXT:     MULLO_INT * T0.Y, PV.Z, PS,
2144; EG-NEXT:     ADD_INT T2.W, T2.W, PV.W,
2145; EG-NEXT:     MULHI * T0.Y, T0.X, PS,
2146; EG-NEXT:     ADD_INT T4.W, T0.X, PS,
2147; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
2148; EG-NEXT:     MULHI * T0.X, PS, PV.W,
2149; EG-NEXT:     MULLO_INT * T0.Y, PS, T0.W,
2150; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
2151; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
2152; EG-NEXT:     SETGE_UINT T4.W, PV.W, T0.W,
2153; EG-NEXT:     SUB_INT * T5.W, PV.W, T0.W,
2154; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
2155; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
2156; EG-NEXT:     ADD_INT T5.W, PS, 1,
2157; EG-NEXT:     SETGE_UINT * T0.W, PV.W, T0.W,
2158; EG-NEXT:     CNDE_INT T0.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
2159; EG-NEXT:     XOR_INT * T1.W, T3.W, T1.W,
2160; EG-NEXT:     XOR_INT * T0.W, PV.W, PS,
2161; EG-NEXT:     SUB_INT * T0.W, PV.W, T1.W,
2162; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
2163; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2164; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
2165; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
2166; EG-NEXT:    7(9.809089e-45), 2(2.802597e-45)
2167  %den_ptr = getelementptr i25, i25 addrspace(1)* %in, i25 1
2168  %num = load i25, i25 addrspace(1) * %in
2169  %den = load i25, i25 addrspace(1) * %den_ptr
2170  %result = sdiv i25 %num, %den
2171  %result.ext = sext i25 %result to i32
2172  store i32 %result.ext, i32 addrspace(1)* %out
2173  ret void
2174}
2175
2176; Tests for 64-bit divide bypass.
2177; define amdgpu_kernel void @test_get_quotient(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2178;   %result = sdiv i64 %a, %b
2179;   store i64 %result, i64 addrspace(1)* %out, align 8
2180;   ret void
2181; }
2182
2183; define amdgpu_kernel void @test_get_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2184;   %result = srem i64 %a, %b
2185;   store i64 %result, i64 addrspace(1)* %out, align 8
2186;   ret void
2187; }
2188
2189; define amdgpu_kernel void @test_get_quotient_and_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2190;   %resultdiv = sdiv i64 %a, %b
2191;   %resultrem = srem i64 %a, %b
2192;   %result = add i64 %resultdiv, %resultrem
2193;   store i64 %result, i64 addrspace(1)* %out, align 8
2194;   ret void
2195; }
2196
2197define amdgpu_kernel void @scalarize_mulhs_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) {
2198; GCN-LABEL: scalarize_mulhs_4xi32:
2199; GCN:       ; %bb.0:
2200; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
2201; GCN-NEXT:    s_mov_b32 s7, 0xf000
2202; GCN-NEXT:    s_mov_b32 s6, -1
2203; GCN-NEXT:    s_waitcnt lgkmcnt(0)
2204; GCN-NEXT:    s_mov_b32 s4, s0
2205; GCN-NEXT:    s_mov_b32 s5, s1
2206; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2207; GCN-NEXT:    s_mov_b32 s0, 0x1389c755
2208; GCN-NEXT:    s_mov_b32 s4, s2
2209; GCN-NEXT:    s_mov_b32 s5, s3
2210; GCN-NEXT:    s_waitcnt vmcnt(0)
2211; GCN-NEXT:    v_mul_hi_i32 v0, v0, s0
2212; GCN-NEXT:    v_mul_hi_i32 v1, v1, s0
2213; GCN-NEXT:    v_mul_hi_i32 v2, v2, s0
2214; GCN-NEXT:    v_mul_hi_i32 v3, v3, s0
2215; GCN-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2216; GCN-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2217; GCN-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2218; GCN-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2219; GCN-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2220; GCN-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2221; GCN-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2222; GCN-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2223; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
2224; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v5
2225; GCN-NEXT:    v_add_i32_e32 v2, vcc, v6, v2
2226; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
2227; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2228; GCN-NEXT:    s_endpgm
2229;
2230; TONGA-LABEL: scalarize_mulhs_4xi32:
2231; TONGA:       ; %bb.0:
2232; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2233; TONGA-NEXT:    s_mov_b32 s7, 0xf000
2234; TONGA-NEXT:    s_mov_b32 s6, -1
2235; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
2236; TONGA-NEXT:    s_mov_b32 s4, s0
2237; TONGA-NEXT:    s_mov_b32 s5, s1
2238; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2239; TONGA-NEXT:    s_mov_b32 s0, 0x1389c755
2240; TONGA-NEXT:    s_mov_b32 s4, s2
2241; TONGA-NEXT:    s_mov_b32 s5, s3
2242; TONGA-NEXT:    s_waitcnt vmcnt(0)
2243; TONGA-NEXT:    v_mul_hi_i32 v0, v0, s0
2244; TONGA-NEXT:    v_mul_hi_i32 v1, v1, s0
2245; TONGA-NEXT:    v_mul_hi_i32 v2, v2, s0
2246; TONGA-NEXT:    v_mul_hi_i32 v3, v3, s0
2247; TONGA-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2248; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2249; TONGA-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2250; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2251; TONGA-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2252; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2253; TONGA-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2254; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2255; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
2256; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v1, v5
2257; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v2, v6
2258; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
2259; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2260; TONGA-NEXT:    s_endpgm
2261;
2262; GFX9-LABEL: scalarize_mulhs_4xi32:
2263; GFX9:       ; %bb.0:
2264; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2265; GFX9-NEXT:    s_mov_b32 s7, 0xf000
2266; GFX9-NEXT:    s_mov_b32 s6, -1
2267; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2268; GFX9-NEXT:    s_mov_b32 s4, s0
2269; GFX9-NEXT:    s_mov_b32 s5, s1
2270; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
2271; GFX9-NEXT:    s_mov_b32 s0, 0x1389c755
2272; GFX9-NEXT:    s_mov_b32 s4, s2
2273; GFX9-NEXT:    s_mov_b32 s5, s3
2274; GFX9-NEXT:    s_waitcnt vmcnt(0)
2275; GFX9-NEXT:    v_mul_hi_i32 v0, v0, s0
2276; GFX9-NEXT:    v_mul_hi_i32 v1, v1, s0
2277; GFX9-NEXT:    v_mul_hi_i32 v2, v2, s0
2278; GFX9-NEXT:    v_mul_hi_i32 v3, v3, s0
2279; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2280; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2281; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2282; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2283; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2284; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2285; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2286; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2287; GFX9-NEXT:    v_add_u32_e32 v0, v0, v4
2288; GFX9-NEXT:    v_add_u32_e32 v1, v1, v5
2289; GFX9-NEXT:    v_add_u32_e32 v2, v2, v6
2290; GFX9-NEXT:    v_add_u32_e32 v3, v3, v7
2291; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
2292; GFX9-NEXT:    s_endpgm
2293;
2294; EG-LABEL: scalarize_mulhs_4xi32:
2295; EG:       ; %bb.0:
2296; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
2297; EG-NEXT:    TEX 0 @6
2298; EG-NEXT:    ALU 25, @9, KC0[CB0:0-32], KC1[]
2299; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
2300; EG-NEXT:    CF_END
2301; EG-NEXT:    PAD
2302; EG-NEXT:    Fetch clause starting at 6:
2303; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
2304; EG-NEXT:    ALU clause starting at 8:
2305; EG-NEXT:     MOV * T0.X, KC0[2].Y,
2306; EG-NEXT:    ALU clause starting at 9:
2307; EG-NEXT:     MULHI_INT * T0.W, T0.W, literal.x,
2308; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2309; EG-NEXT:     ASHR T1.Z, PS, literal.x,
2310; EG-NEXT:     LSHR T0.W, PS, literal.y,
2311; EG-NEXT:     MULHI_INT * T0.Z, T0.Z, literal.z,
2312; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2313; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2314; EG-NEXT:     ASHR T1.Y, PS, literal.x,
2315; EG-NEXT:     LSHR T0.Z, PS, literal.y,
2316; EG-NEXT:     ADD_INT T0.W, PV.Z, PV.W,
2317; EG-NEXT:     MULHI_INT * T0.Y, T0.Y, literal.z,
2318; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2319; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2320; EG-NEXT:     ASHR T2.Y, PS, literal.x,
2321; EG-NEXT:     ADD_INT T0.Z, PV.Y, PV.Z,
2322; EG-NEXT:     LSHR T1.W, PS, literal.y,
2323; EG-NEXT:     MULHI_INT * T0.X, T0.X, literal.z,
2324; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2325; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2326; EG-NEXT:     ADD_INT T0.Y, PV.Y, PV.W,
2327; EG-NEXT:     ASHR T1.W, PS, literal.x,
2328; EG-NEXT:     LSHR * T2.W, PS, literal.y,
2329; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2330; EG-NEXT:     ADD_INT T0.X, PV.W, PS,
2331; EG-NEXT:     LSHR * T1.X, KC0[2].Z, literal.x,
2332; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
2333  %1 = load <4 x i32>, <4 x i32> addrspace(1)* %in, align 16
2334  %2 = sdiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668>
2335  store <4 x i32> %2, <4 x i32> addrspace(1)* %out, align 16
2336  ret void
2337}
2338