1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx600 | FileCheck %s -check-prefixes=FUNC,SI,GCN
3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck %s -check-prefixes=FUNC,SI,TONGA
4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global | FileCheck %s -check-prefixes=FUNC,SI,GFX9
5; RUN: llc < %s -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood | FileCheck %s -check-prefixes=FUNC,EG
6
7; The code generated by sdiv is long and complex and may frequently change.
8; The goal of this test is to make sure the ISel doesn't fail.
9;
10; This program was previously failing to compile when one of the selectcc
11; opcodes generated by the sdiv lowering was being legalized and optimized to:
12; selectcc Remainder -1, 0, -1, SETGT
13; This was fixed by adding an additional pattern in R600Instructions.td to
14; match this pattern with a CNDGE_INT.
15
16define amdgpu_kernel void @sdiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
17; GCN-LABEL: sdiv_i32:
18; GCN:       ; %bb.0:
19; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
20; GCN-NEXT:    s_mov_b32 s7, 0xf000
21; GCN-NEXT:    s_mov_b32 s6, -1
22; GCN-NEXT:    s_mov_b32 s10, s6
23; GCN-NEXT:    s_mov_b32 s11, s7
24; GCN-NEXT:    s_waitcnt lgkmcnt(0)
25; GCN-NEXT:    s_mov_b32 s8, s2
26; GCN-NEXT:    s_mov_b32 s9, s3
27; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
28; GCN-NEXT:    s_mov_b32 s4, s0
29; GCN-NEXT:    s_mov_b32 s5, s1
30; GCN-NEXT:    s_waitcnt vmcnt(0)
31; GCN-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
32; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
33; GCN-NEXT:    v_xor_b32_e32 v1, v1, v2
34; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v1
35; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v1
36; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
37; GCN-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
38; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
39; GCN-NEXT:    v_xor_b32_e32 v0, v0, v5
40; GCN-NEXT:    v_xor_b32_e32 v2, v5, v2
41; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
42; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
43; GCN-NEXT:    v_mul_lo_u32 v4, v4, v3
44; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
45; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
46; GCN-NEXT:    v_mul_hi_u32 v3, v0, v3
47; GCN-NEXT:    v_mul_lo_u32 v4, v3, v1
48; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
49; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v4, v0
50; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v1
51; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v1, v0
52; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
53; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
54; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
55; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
56; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
57; GCN-NEXT:    v_xor_b32_e32 v0, v0, v2
58; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v2
59; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
60; GCN-NEXT:    s_endpgm
61;
62; TONGA-LABEL: sdiv_i32:
63; TONGA:       ; %bb.0:
64; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
65; TONGA-NEXT:    s_mov_b32 s7, 0xf000
66; TONGA-NEXT:    s_mov_b32 s6, -1
67; TONGA-NEXT:    s_mov_b32 s10, s6
68; TONGA-NEXT:    s_mov_b32 s11, s7
69; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
70; TONGA-NEXT:    s_mov_b32 s8, s2
71; TONGA-NEXT:    s_mov_b32 s9, s3
72; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
73; TONGA-NEXT:    s_mov_b32 s4, s0
74; TONGA-NEXT:    s_mov_b32 s5, s1
75; TONGA-NEXT:    s_waitcnt vmcnt(0)
76; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
77; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v2, v1
78; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v2
79; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v1
80; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v1
81; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
82; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v5, v0
83; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
84; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v5
85; TONGA-NEXT:    v_xor_b32_e32 v2, v5, v2
86; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
87; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
88; TONGA-NEXT:    v_mul_lo_u32 v4, v4, v3
89; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
90; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v4, v3
91; TONGA-NEXT:    v_mul_hi_u32 v3, v0, v3
92; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v1
93; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v3
94; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v4, v0
95; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v1
96; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v1, v0
97; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
98; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
99; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
100; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
101; TONGA-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
102; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v2
103; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v2
104; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
105; TONGA-NEXT:    s_endpgm
106;
107; GFX9-LABEL: sdiv_i32:
108; GFX9:       ; %bb.0:
109; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
110; GFX9-NEXT:    s_mov_b32 s3, 0xf000
111; GFX9-NEXT:    s_mov_b32 s2, -1
112; GFX9-NEXT:    s_mov_b32 s10, s2
113; GFX9-NEXT:    s_mov_b32 s11, s3
114; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
115; GFX9-NEXT:    s_mov_b32 s8, s6
116; GFX9-NEXT:    s_mov_b32 s9, s7
117; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
118; GFX9-NEXT:    s_mov_b32 s0, s4
119; GFX9-NEXT:    s_mov_b32 s1, s5
120; GFX9-NEXT:    s_waitcnt vmcnt(0)
121; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
122; GFX9-NEXT:    v_add_u32_e32 v1, v1, v2
123; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v2
124; GFX9-NEXT:    v_cvt_f32_u32_e32 v3, v1
125; GFX9-NEXT:    v_sub_u32_e32 v4, 0, v1
126; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
127; GFX9-NEXT:    v_add_u32_e32 v0, v0, v5
128; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3
129; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v5
130; GFX9-NEXT:    v_xor_b32_e32 v2, v5, v2
131; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
132; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3
133; GFX9-NEXT:    v_mul_lo_u32 v4, v4, v3
134; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4
135; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4
136; GFX9-NEXT:    v_mul_hi_u32 v3, v0, v3
137; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v1
138; GFX9-NEXT:    v_add_u32_e32 v5, 1, v3
139; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v4
140; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
141; GFX9-NEXT:    v_sub_u32_e32 v4, v0, v1
142; GFX9-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
143; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
144; GFX9-NEXT:    v_add_u32_e32 v4, 1, v3
145; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
146; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc
147; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v2
148; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v2
149; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
150; GFX9-NEXT:    s_endpgm
151;
152; EG-LABEL: sdiv_i32:
153; EG:       ; %bb.0:
154; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
155; EG-NEXT:    TEX 0 @6
156; EG-NEXT:    ALU 26, @9, KC0[CB0:0-32], KC1[]
157; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
158; EG-NEXT:    CF_END
159; EG-NEXT:    PAD
160; EG-NEXT:    Fetch clause starting at 6:
161; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
162; EG-NEXT:    ALU clause starting at 8:
163; EG-NEXT:     MOV * T0.X, KC0[2].Z,
164; EG-NEXT:    ALU clause starting at 9:
165; EG-NEXT:     SETGT_INT * T0.W, 0.0, T0.Y,
166; EG-NEXT:     ADD_INT * T1.W, T0.Y, PV.W,
167; EG-NEXT:     XOR_INT * T1.W, PV.W, T0.W,
168; EG-NEXT:     SUB_INT T2.W, 0.0, PV.W,
169; EG-NEXT:     RECIP_UINT * T0.Y, PV.W,
170; EG-NEXT:     SETGT_INT T3.W, 0.0, T0.X,
171; EG-NEXT:     MULLO_INT * T0.Z, PV.W, PS,
172; EG-NEXT:     ADD_INT T2.W, T0.X, PV.W,
173; EG-NEXT:     MULHI * T0.X, T0.Y, PS,
174; EG-NEXT:     ADD_INT T4.W, T0.Y, PS,
175; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
176; EG-NEXT:     MULHI * T0.X, PS, PV.W,
177; EG-NEXT:     MULLO_INT * T0.Y, PS, T1.W,
178; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
179; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
180; EG-NEXT:     SETGE_UINT T4.W, PV.W, T1.W,
181; EG-NEXT:     SUB_INT * T5.W, PV.W, T1.W,
182; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
183; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
184; EG-NEXT:     ADD_INT T5.W, PS, 1,
185; EG-NEXT:     SETGE_UINT * T1.W, PV.W, T1.W,
186; EG-NEXT:     CNDE_INT T1.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
187; EG-NEXT:     XOR_INT * T0.W, T3.W, T0.W,
188; EG-NEXT:     XOR_INT * T1.W, PV.W, PS,
189; EG-NEXT:     SUB_INT T0.X, PV.W, T0.W,
190; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
191; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
192  %den_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
193  %num = load i32, i32 addrspace(1) * %in
194  %den = load i32, i32 addrspace(1) * %den_ptr
195  %result = sdiv i32 %num, %den
196  store i32 %result, i32 addrspace(1)* %out
197  ret void
198}
199
200define amdgpu_kernel void @sdiv_i32_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
201; GCN-LABEL: sdiv_i32_4:
202; GCN:       ; %bb.0:
203; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
204; GCN-NEXT:    s_mov_b32 s3, 0xf000
205; GCN-NEXT:    s_mov_b32 s2, -1
206; GCN-NEXT:    s_mov_b32 s10, s2
207; GCN-NEXT:    s_mov_b32 s11, s3
208; GCN-NEXT:    s_waitcnt lgkmcnt(0)
209; GCN-NEXT:    s_mov_b32 s8, s6
210; GCN-NEXT:    s_mov_b32 s9, s7
211; GCN-NEXT:    buffer_load_dword v0, off, s[8:11], 0
212; GCN-NEXT:    s_mov_b32 s0, s4
213; GCN-NEXT:    s_mov_b32 s1, s5
214; GCN-NEXT:    s_waitcnt vmcnt(0)
215; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
216; GCN-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
217; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
218; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
219; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
220; GCN-NEXT:    s_endpgm
221;
222; TONGA-LABEL: sdiv_i32_4:
223; TONGA:       ; %bb.0:
224; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
225; TONGA-NEXT:    s_mov_b32 s3, 0xf000
226; TONGA-NEXT:    s_mov_b32 s2, -1
227; TONGA-NEXT:    s_mov_b32 s10, s2
228; TONGA-NEXT:    s_mov_b32 s11, s3
229; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
230; TONGA-NEXT:    s_mov_b32 s8, s6
231; TONGA-NEXT:    s_mov_b32 s9, s7
232; TONGA-NEXT:    buffer_load_dword v0, off, s[8:11], 0
233; TONGA-NEXT:    s_mov_b32 s0, s4
234; TONGA-NEXT:    s_mov_b32 s1, s5
235; TONGA-NEXT:    s_waitcnt vmcnt(0)
236; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
237; TONGA-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
238; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
239; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
240; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
241; TONGA-NEXT:    s_endpgm
242;
243; GFX9-LABEL: sdiv_i32_4:
244; GFX9:       ; %bb.0:
245; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
246; GFX9-NEXT:    s_mov_b32 s3, 0xf000
247; GFX9-NEXT:    s_mov_b32 s2, -1
248; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
249; GFX9-NEXT:    s_mov_b32 s0, s4
250; GFX9-NEXT:    s_mov_b32 s1, s5
251; GFX9-NEXT:    s_mov_b32 s4, s6
252; GFX9-NEXT:    s_mov_b32 s5, s7
253; GFX9-NEXT:    s_mov_b32 s6, s2
254; GFX9-NEXT:    s_mov_b32 s7, s3
255; GFX9-NEXT:    buffer_load_dword v0, off, s[4:7], 0
256; GFX9-NEXT:    s_waitcnt vmcnt(0)
257; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
258; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 30, v1
259; GFX9-NEXT:    v_add_u32_e32 v0, v0, v1
260; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
261; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
262; GFX9-NEXT:    s_endpgm
263;
264; EG-LABEL: sdiv_i32_4:
265; EG:       ; %bb.0:
266; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
267; EG-NEXT:    TEX 0 @6
268; EG-NEXT:    ALU 7, @9, KC0[CB0:0-32], KC1[]
269; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
270; EG-NEXT:    CF_END
271; EG-NEXT:    PAD
272; EG-NEXT:    Fetch clause starting at 6:
273; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
274; EG-NEXT:    ALU clause starting at 8:
275; EG-NEXT:     MOV * T0.X, KC0[2].Z,
276; EG-NEXT:    ALU clause starting at 9:
277; EG-NEXT:     ASHR * T0.W, T0.X, literal.x,
278; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
279; EG-NEXT:     LSHR * T0.W, PV.W, literal.x,
280; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
281; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
282; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
283; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
284; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
285  %num = load i32, i32 addrspace(1) * %in
286  %result = sdiv i32 %num, 4
287  store i32 %result, i32 addrspace(1)* %out
288  ret void
289}
290
291; Multiply by a weird constant to make sure setIntDivIsCheap is
292; working.
293
294define amdgpu_kernel void @slow_sdiv_i32_3435(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
295; GCN-LABEL: slow_sdiv_i32_3435:
296; GCN:       ; %bb.0:
297; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
298; GCN-NEXT:    s_mov_b32 s3, 0xf000
299; GCN-NEXT:    s_mov_b32 s2, -1
300; GCN-NEXT:    s_mov_b32 s10, s2
301; GCN-NEXT:    s_mov_b32 s11, s3
302; GCN-NEXT:    s_waitcnt lgkmcnt(0)
303; GCN-NEXT:    s_mov_b32 s8, s6
304; GCN-NEXT:    s_mov_b32 s9, s7
305; GCN-NEXT:    buffer_load_dword v0, off, s[8:11], 0
306; GCN-NEXT:    s_mov_b32 s0, 0x98a1930b
307; GCN-NEXT:    s_mov_b32 s1, s5
308; GCN-NEXT:    s_waitcnt vmcnt(0)
309; GCN-NEXT:    v_mul_hi_i32 v1, v0, s0
310; GCN-NEXT:    s_mov_b32 s0, s4
311; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
312; GCN-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
313; GCN-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
314; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
315; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
316; GCN-NEXT:    s_endpgm
317;
318; TONGA-LABEL: slow_sdiv_i32_3435:
319; TONGA:       ; %bb.0:
320; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
321; TONGA-NEXT:    s_mov_b32 s3, 0xf000
322; TONGA-NEXT:    s_mov_b32 s2, -1
323; TONGA-NEXT:    s_mov_b32 s10, s2
324; TONGA-NEXT:    s_mov_b32 s11, s3
325; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
326; TONGA-NEXT:    s_mov_b32 s8, s6
327; TONGA-NEXT:    s_mov_b32 s9, s7
328; TONGA-NEXT:    buffer_load_dword v0, off, s[8:11], 0
329; TONGA-NEXT:    s_mov_b32 s0, 0x98a1930b
330; TONGA-NEXT:    s_mov_b32 s1, s5
331; TONGA-NEXT:    s_waitcnt vmcnt(0)
332; TONGA-NEXT:    v_mul_hi_i32 v1, v0, s0
333; TONGA-NEXT:    s_mov_b32 s0, s4
334; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
335; TONGA-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
336; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
337; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
338; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
339; TONGA-NEXT:    s_endpgm
340;
341; GFX9-LABEL: slow_sdiv_i32_3435:
342; GFX9:       ; %bb.0:
343; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
344; GFX9-NEXT:    s_mov_b32 s3, 0xf000
345; GFX9-NEXT:    s_mov_b32 s2, -1
346; GFX9-NEXT:    s_mov_b32 s10, s2
347; GFX9-NEXT:    s_mov_b32 s11, s3
348; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
349; GFX9-NEXT:    s_mov_b32 s8, s6
350; GFX9-NEXT:    s_mov_b32 s9, s7
351; GFX9-NEXT:    buffer_load_dword v0, off, s[8:11], 0
352; GFX9-NEXT:    s_mov_b32 s0, 0x98a1930b
353; GFX9-NEXT:    s_mov_b32 s1, s5
354; GFX9-NEXT:    s_waitcnt vmcnt(0)
355; GFX9-NEXT:    v_mul_hi_i32 v1, v0, s0
356; GFX9-NEXT:    s_mov_b32 s0, s4
357; GFX9-NEXT:    v_add_u32_e32 v0, v1, v0
358; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
359; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 11, v0
360; GFX9-NEXT:    v_add_u32_e32 v0, v0, v1
361; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
362; GFX9-NEXT:    s_endpgm
363;
364; EG-LABEL: slow_sdiv_i32_3435:
365; EG:       ; %bb.0:
366; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
367; EG-NEXT:    TEX 0 @6
368; EG-NEXT:    ALU 8, @9, KC0[CB0:0-32], KC1[]
369; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
370; EG-NEXT:    CF_END
371; EG-NEXT:    PAD
372; EG-NEXT:    Fetch clause starting at 6:
373; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
374; EG-NEXT:    ALU clause starting at 8:
375; EG-NEXT:     MOV * T0.X, KC0[2].Z,
376; EG-NEXT:    ALU clause starting at 9:
377; EG-NEXT:     MULHI_INT * T0.Y, T0.X, literal.x,
378; EG-NEXT:    -1734241525(-4.176600e-24), 0(0.000000e+00)
379; EG-NEXT:     ADD_INT * T0.W, PS, T0.X,
380; EG-NEXT:     ASHR T1.W, PV.W, literal.x,
381; EG-NEXT:     LSHR * T0.W, PV.W, literal.y,
382; EG-NEXT:    11(1.541428e-44), 31(4.344025e-44)
383; EG-NEXT:     ADD_INT T0.X, PV.W, PS,
384; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
385; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
386  %num = load i32, i32 addrspace(1) * %in
387  %result = sdiv i32 %num, 3435
388  store i32 %result, i32 addrspace(1)* %out
389  ret void
390}
391
392define amdgpu_kernel void @sdiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
393; GCN-LABEL: sdiv_v2i32:
394; GCN:       ; %bb.0:
395; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
396; GCN-NEXT:    s_mov_b32 s7, 0xf000
397; GCN-NEXT:    s_mov_b32 s6, -1
398; GCN-NEXT:    s_mov_b32 s2, s6
399; GCN-NEXT:    s_mov_b32 s3, s7
400; GCN-NEXT:    s_waitcnt lgkmcnt(0)
401; GCN-NEXT:    s_mov_b32 s0, s10
402; GCN-NEXT:    s_mov_b32 s1, s11
403; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
404; GCN-NEXT:    s_mov_b32 s2, 0x4f7ffffe
405; GCN-NEXT:    s_mov_b32 s4, s8
406; GCN-NEXT:    s_mov_b32 s5, s9
407; GCN-NEXT:    s_waitcnt vmcnt(0)
408; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v2
409; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
410; GCN-NEXT:    v_xor_b32_e32 v2, v2, v4
411; GCN-NEXT:    v_cvt_f32_u32_e32 v5, v2
412; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v2
413; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v0
414; GCN-NEXT:    v_add_i32_e32 v0, vcc, v7, v0
415; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v5
416; GCN-NEXT:    v_xor_b32_e32 v0, v0, v7
417; GCN-NEXT:    v_xor_b32_e32 v4, v7, v4
418; GCN-NEXT:    v_mul_f32_e32 v5, s2, v5
419; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
420; GCN-NEXT:    v_mul_lo_u32 v6, v6, v5
421; GCN-NEXT:    v_mul_hi_u32 v6, v5, v6
422; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
423; GCN-NEXT:    v_mul_hi_u32 v5, v0, v5
424; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
425; GCN-NEXT:    v_mul_lo_u32 v8, v5, v2
426; GCN-NEXT:    v_add_i32_e32 v9, vcc, 1, v5
427; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v8, v0
428; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v2
429; GCN-NEXT:    v_subrev_i32_e32 v8, vcc, v2, v0
430; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v9, s[0:1]
431; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v8, s[0:1]
432; GCN-NEXT:    v_add_i32_e32 v8, vcc, 1, v5
433; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
434; GCN-NEXT:    s_mov_b64 s[0:1], vcc
435; GCN-NEXT:    v_add_i32_e32 v0, vcc, v6, v3
436; GCN-NEXT:    v_xor_b32_e32 v2, v0, v6
437; GCN-NEXT:    v_cvt_f32_u32_e32 v0, v2
438; GCN-NEXT:    v_sub_i32_e32 v9, vcc, 0, v2
439; GCN-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
440; GCN-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
441; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
442; GCN-NEXT:    v_xor_b32_e32 v1, v1, v3
443; GCN-NEXT:    v_xor_b32_e32 v6, v3, v6
444; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v8, s[0:1]
445; GCN-NEXT:    v_mul_f32_e32 v0, s2, v0
446; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
447; GCN-NEXT:    v_mul_lo_u32 v9, v9, v0
448; GCN-NEXT:    v_mul_hi_u32 v7, v0, v9
449; GCN-NEXT:    v_add_i32_e32 v0, vcc, v7, v0
450; GCN-NEXT:    v_mul_hi_u32 v3, v1, v0
451; GCN-NEXT:    v_xor_b32_e32 v0, v5, v4
452; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
453; GCN-NEXT:    v_mul_lo_u32 v4, v3, v2
454; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
455; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
456; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
457; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v2, v1
458; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
459; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
460; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
461; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
462; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
463; GCN-NEXT:    v_xor_b32_e32 v1, v1, v6
464; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v6
465; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
466; GCN-NEXT:    s_endpgm
467;
468; TONGA-LABEL: sdiv_v2i32:
469; TONGA:       ; %bb.0:
470; TONGA-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x24
471; TONGA-NEXT:    s_mov_b32 s7, 0xf000
472; TONGA-NEXT:    s_mov_b32 s6, -1
473; TONGA-NEXT:    s_mov_b32 s2, s6
474; TONGA-NEXT:    s_mov_b32 s3, s7
475; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
476; TONGA-NEXT:    s_mov_b32 s0, s10
477; TONGA-NEXT:    s_mov_b32 s1, s11
478; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
479; TONGA-NEXT:    s_mov_b32 s2, 0x4f7ffffe
480; TONGA-NEXT:    s_mov_b32 s4, s8
481; TONGA-NEXT:    s_mov_b32 s5, s9
482; TONGA-NEXT:    s_waitcnt vmcnt(0)
483; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v2
484; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v4, v2
485; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v4
486; TONGA-NEXT:    v_cvt_f32_u32_e32 v5, v2
487; TONGA-NEXT:    v_sub_u32_e32 v6, vcc, 0, v2
488; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v0
489; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v7, v0
490; TONGA-NEXT:    v_rcp_iflag_f32_e32 v5, v5
491; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v7
492; TONGA-NEXT:    v_xor_b32_e32 v4, v7, v4
493; TONGA-NEXT:    v_mul_f32_e32 v5, s2, v5
494; TONGA-NEXT:    v_cvt_u32_f32_e32 v5, v5
495; TONGA-NEXT:    v_mul_lo_u32 v6, v6, v5
496; TONGA-NEXT:    v_mul_hi_u32 v6, v5, v6
497; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v6, v5
498; TONGA-NEXT:    v_mul_hi_u32 v5, v0, v5
499; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
500; TONGA-NEXT:    v_mul_lo_u32 v8, v5, v2
501; TONGA-NEXT:    v_add_u32_e32 v9, vcc, 1, v5
502; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v8, v0
503; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v2
504; TONGA-NEXT:    v_subrev_u32_e32 v8, vcc, v2, v0
505; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v9, s[0:1]
506; TONGA-NEXT:    v_cndmask_b32_e64 v0, v0, v8, s[0:1]
507; TONGA-NEXT:    v_add_u32_e32 v8, vcc, 1, v5
508; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
509; TONGA-NEXT:    s_mov_b64 s[0:1], vcc
510; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v6, v3
511; TONGA-NEXT:    v_xor_b32_e32 v2, v0, v6
512; TONGA-NEXT:    v_cvt_f32_u32_e32 v0, v2
513; TONGA-NEXT:    v_sub_u32_e32 v9, vcc, 0, v2
514; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
515; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v3, v1
516; TONGA-NEXT:    v_rcp_iflag_f32_e32 v0, v0
517; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v3
518; TONGA-NEXT:    v_xor_b32_e32 v6, v3, v6
519; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v8, s[0:1]
520; TONGA-NEXT:    v_mul_f32_e32 v0, s2, v0
521; TONGA-NEXT:    v_cvt_u32_f32_e32 v0, v0
522; TONGA-NEXT:    v_mul_lo_u32 v9, v9, v0
523; TONGA-NEXT:    v_mul_hi_u32 v7, v0, v9
524; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v7, v0
525; TONGA-NEXT:    v_mul_hi_u32 v3, v1, v0
526; TONGA-NEXT:    v_xor_b32_e32 v0, v5, v4
527; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v4
528; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v2
529; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v3
530; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v4, v1
531; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
532; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v2, v1
533; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
534; TONGA-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
535; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
536; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
537; TONGA-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
538; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v6
539; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v6
540; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
541; TONGA-NEXT:    s_endpgm
542;
543; GFX9-LABEL: sdiv_v2i32:
544; GFX9:       ; %bb.0:
545; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
546; GFX9-NEXT:    s_mov_b32 s7, 0xf000
547; GFX9-NEXT:    s_mov_b32 s6, -1
548; GFX9-NEXT:    s_mov_b32 s10, s6
549; GFX9-NEXT:    s_mov_b32 s11, s7
550; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
551; GFX9-NEXT:    s_mov_b32 s8, s2
552; GFX9-NEXT:    s_mov_b32 s9, s3
553; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
554; GFX9-NEXT:    s_mov_b32 s2, 0x4f7ffffe
555; GFX9-NEXT:    s_mov_b32 s4, s0
556; GFX9-NEXT:    s_mov_b32 s5, s1
557; GFX9-NEXT:    s_waitcnt vmcnt(0)
558; GFX9-NEXT:    v_ashrrev_i32_e32 v4, 31, v2
559; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v3
560; GFX9-NEXT:    v_add_u32_e32 v2, v2, v4
561; GFX9-NEXT:    v_add_u32_e32 v3, v3, v5
562; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v4
563; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v5
564; GFX9-NEXT:    v_cvt_f32_u32_e32 v6, v2
565; GFX9-NEXT:    v_cvt_f32_u32_e32 v7, v3
566; GFX9-NEXT:    v_sub_u32_e32 v10, 0, v2
567; GFX9-NEXT:    v_sub_u32_e32 v11, 0, v3
568; GFX9-NEXT:    v_rcp_iflag_f32_e32 v6, v6
569; GFX9-NEXT:    v_rcp_iflag_f32_e32 v7, v7
570; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
571; GFX9-NEXT:    v_ashrrev_i32_e32 v9, 31, v1
572; GFX9-NEXT:    v_mul_f32_e32 v6, s2, v6
573; GFX9-NEXT:    v_mul_f32_e32 v7, s2, v7
574; GFX9-NEXT:    v_cvt_u32_f32_e32 v6, v6
575; GFX9-NEXT:    v_cvt_u32_f32_e32 v7, v7
576; GFX9-NEXT:    v_add_u32_e32 v0, v0, v8
577; GFX9-NEXT:    v_add_u32_e32 v1, v1, v9
578; GFX9-NEXT:    v_mul_lo_u32 v10, v10, v6
579; GFX9-NEXT:    v_mul_lo_u32 v11, v11, v7
580; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v8
581; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v9
582; GFX9-NEXT:    v_mul_hi_u32 v10, v6, v10
583; GFX9-NEXT:    v_mul_hi_u32 v11, v7, v11
584; GFX9-NEXT:    v_xor_b32_e32 v4, v8, v4
585; GFX9-NEXT:    v_xor_b32_e32 v5, v9, v5
586; GFX9-NEXT:    v_add_u32_e32 v6, v6, v10
587; GFX9-NEXT:    v_add_u32_e32 v7, v7, v11
588; GFX9-NEXT:    v_mul_hi_u32 v6, v0, v6
589; GFX9-NEXT:    v_mul_hi_u32 v7, v1, v7
590; GFX9-NEXT:    v_mul_lo_u32 v8, v6, v2
591; GFX9-NEXT:    v_mul_lo_u32 v9, v7, v3
592; GFX9-NEXT:    v_add_u32_e32 v10, 1, v6
593; GFX9-NEXT:    v_add_u32_e32 v11, 1, v7
594; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v8
595; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v9
596; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
597; GFX9-NEXT:    v_sub_u32_e32 v8, v0, v2
598; GFX9-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v3
599; GFX9-NEXT:    v_sub_u32_e32 v9, v1, v3
600; GFX9-NEXT:    v_cndmask_b32_e32 v6, v6, v10, vcc
601; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v8, vcc
602; GFX9-NEXT:    v_cndmask_b32_e64 v7, v7, v11, s[0:1]
603; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v9, s[0:1]
604; GFX9-NEXT:    v_add_u32_e32 v8, 1, v6
605; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
606; GFX9-NEXT:    v_cndmask_b32_e32 v0, v6, v8, vcc
607; GFX9-NEXT:    v_add_u32_e32 v9, 1, v7
608; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
609; GFX9-NEXT:    v_cndmask_b32_e32 v1, v7, v9, vcc
610; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v4
611; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v5
612; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v4
613; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v5
614; GFX9-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
615; GFX9-NEXT:    s_endpgm
616;
617; EG-LABEL: sdiv_v2i32:
618; EG:       ; %bb.0:
619; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
620; EG-NEXT:    TEX 1 @6
621; EG-NEXT:    ALU 51, @11, KC0[CB0:0-32], KC1[]
622; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
623; EG-NEXT:    CF_END
624; EG-NEXT:    PAD
625; EG-NEXT:    Fetch clause starting at 6:
626; EG-NEXT:     VTX_READ_64 T1.XY, T0.X, 8, #1
627; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
628; EG-NEXT:    ALU clause starting at 10:
629; EG-NEXT:     MOV * T0.X, KC0[2].Z,
630; EG-NEXT:    ALU clause starting at 11:
631; EG-NEXT:     SETGT_INT * T0.W, 0.0, T1.Y,
632; EG-NEXT:     ADD_INT T1.W, T1.Y, PV.W,
633; EG-NEXT:     SETGT_INT * T2.W, 0.0, T1.X,
634; EG-NEXT:     XOR_INT * T1.W, PV.W, T0.W,
635; EG-NEXT:     SUB_INT T0.Z, 0.0, PV.W,
636; EG-NEXT:     ADD_INT T3.W, T1.X, T2.W,
637; EG-NEXT:     RECIP_UINT * T1.X, PV.W,
638; EG-NEXT:     XOR_INT T3.W, PV.W, T2.W,
639; EG-NEXT:     MULLO_INT * T0.Z, PV.Z, PS,
640; EG-NEXT:     SUB_INT T4.W, 0.0, PV.W,
641; EG-NEXT:     RECIP_UINT * T1.Y, PV.W,
642; EG-NEXT:     SETGT_INT T5.W, 0.0, T0.X,
643; EG-NEXT:     MULLO_INT * T1.Z, PV.W, PS,
644; EG-NEXT:     SETGT_INT T2.Z, 0.0, T0.Y,
645; EG-NEXT:     ADD_INT T4.W, T0.X, PV.W,
646; EG-NEXT:     MULHI * T0.X, T1.Y, PS,
647; EG-NEXT:     ADD_INT T1.Y, T1.Y, PS,
648; EG-NEXT:     XOR_INT T1.Z, PV.W, T5.W,
649; EG-NEXT:     ADD_INT T4.W, T0.Y, PV.Z, BS:VEC_120/SCL_212
650; EG-NEXT:     MULHI * T0.X, T1.X, T0.Z,
651; EG-NEXT:     ADD_INT T0.Z, T1.X, PS,
652; EG-NEXT:     XOR_INT T4.W, PV.W, T2.Z,
653; EG-NEXT:     MULHI * T0.X, PV.Z, PV.Y,
654; EG-NEXT:     MULHI * T0.Y, PV.W, PV.Z,
655; EG-NEXT:     MULLO_INT * T0.Z, PS, T1.W,
656; EG-NEXT:     SUB_INT T4.W, T4.W, PS,
657; EG-NEXT:     MULLO_INT * T0.Z, T0.X, T3.W,
658; EG-NEXT:     SUB_INT T1.Y, T1.Z, PS,
659; EG-NEXT:     ADD_INT T0.Z, T0.Y, 1,
660; EG-NEXT:     SETGE_UINT T6.W, PV.W, T1.W,
661; EG-NEXT:     SUB_INT * T7.W, PV.W, T1.W,
662; EG-NEXT:     CNDE_INT T1.X, PV.W, T4.W, PS, BS:VEC_021/SCL_122
663; EG-NEXT:     CNDE_INT T0.Y, PV.W, T0.Y, PV.Z,
664; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
665; EG-NEXT:     SETGE_UINT T4.W, PV.Y, T3.W,
666; EG-NEXT:     SUB_INT * T6.W, PV.Y, T3.W,
667; EG-NEXT:     CNDE_INT T1.Y, PV.W, T1.Y, PS,
668; EG-NEXT:     CNDE_INT T0.Z, PV.W, T0.X, PV.Z,
669; EG-NEXT:     ADD_INT T4.W, PV.Y, 1,
670; EG-NEXT:     SETGE_UINT * T1.W, PV.X, T1.W,
671; EG-NEXT:     CNDE_INT T0.Y, PS, T0.Y, PV.W,
672; EG-NEXT:     XOR_INT T1.Z, T2.Z, T0.W, BS:VEC_021/SCL_122
673; EG-NEXT:     ADD_INT T0.W, PV.Z, 1,
674; EG-NEXT:     SETGE_UINT * T1.W, PV.Y, T3.W,
675; EG-NEXT:     CNDE_INT T0.Z, PS, T0.Z, PV.W,
676; EG-NEXT:     XOR_INT T0.W, T5.W, T2.W,
677; EG-NEXT:     XOR_INT * T1.W, PV.Y, PV.Z,
678; EG-NEXT:     SUB_INT T0.Y, PS, T1.Z,
679; EG-NEXT:     XOR_INT * T1.W, PV.Z, PV.W,
680; EG-NEXT:     SUB_INT T0.X, PV.W, T0.W,
681; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
682; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
683  %den_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
684  %num = load <2 x i32>, <2 x i32> addrspace(1) * %in
685  %den = load <2 x i32>, <2 x i32> addrspace(1) * %den_ptr
686  %result = sdiv <2 x i32> %num, %den
687  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
688  ret void
689}
690
691define amdgpu_kernel void @sdiv_v2i32_4(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
692; GCN-LABEL: sdiv_v2i32_4:
693; GCN:       ; %bb.0:
694; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
695; GCN-NEXT:    s_mov_b32 s3, 0xf000
696; GCN-NEXT:    s_mov_b32 s2, -1
697; GCN-NEXT:    s_mov_b32 s10, s2
698; GCN-NEXT:    s_mov_b32 s11, s3
699; GCN-NEXT:    s_waitcnt lgkmcnt(0)
700; GCN-NEXT:    s_mov_b32 s8, s6
701; GCN-NEXT:    s_mov_b32 s9, s7
702; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
703; GCN-NEXT:    s_mov_b32 s0, s4
704; GCN-NEXT:    s_mov_b32 s1, s5
705; GCN-NEXT:    s_waitcnt vmcnt(0)
706; GCN-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
707; GCN-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
708; GCN-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
709; GCN-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
710; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
711; GCN-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
712; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
713; GCN-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
714; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
715; GCN-NEXT:    s_endpgm
716;
717; TONGA-LABEL: sdiv_v2i32_4:
718; TONGA:       ; %bb.0:
719; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
720; TONGA-NEXT:    s_mov_b32 s3, 0xf000
721; TONGA-NEXT:    s_mov_b32 s2, -1
722; TONGA-NEXT:    s_mov_b32 s10, s2
723; TONGA-NEXT:    s_mov_b32 s11, s3
724; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
725; TONGA-NEXT:    s_mov_b32 s8, s6
726; TONGA-NEXT:    s_mov_b32 s9, s7
727; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
728; TONGA-NEXT:    s_mov_b32 s0, s4
729; TONGA-NEXT:    s_mov_b32 s1, s5
730; TONGA-NEXT:    s_waitcnt vmcnt(0)
731; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
732; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
733; TONGA-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
734; TONGA-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
735; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v2, v0
736; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v3, v1
737; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
738; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
739; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
740; TONGA-NEXT:    s_endpgm
741;
742; GFX9-LABEL: sdiv_v2i32_4:
743; GFX9:       ; %bb.0:
744; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
745; GFX9-NEXT:    s_mov_b32 s3, 0xf000
746; GFX9-NEXT:    s_mov_b32 s2, -1
747; GFX9-NEXT:    s_mov_b32 s10, s2
748; GFX9-NEXT:    s_mov_b32 s11, s3
749; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
750; GFX9-NEXT:    s_mov_b32 s8, s6
751; GFX9-NEXT:    s_mov_b32 s9, s7
752; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
753; GFX9-NEXT:    s_mov_b32 s0, s4
754; GFX9-NEXT:    s_mov_b32 s1, s5
755; GFX9-NEXT:    s_waitcnt vmcnt(0)
756; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 31, v0
757; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
758; GFX9-NEXT:    v_lshrrev_b32_e32 v2, 30, v2
759; GFX9-NEXT:    v_lshrrev_b32_e32 v3, 30, v3
760; GFX9-NEXT:    v_add_u32_e32 v0, v0, v2
761; GFX9-NEXT:    v_add_u32_e32 v1, v1, v3
762; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
763; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
764; GFX9-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
765; GFX9-NEXT:    s_endpgm
766;
767; EG-LABEL: sdiv_v2i32_4:
768; EG:       ; %bb.0:
769; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
770; EG-NEXT:    TEX 0 @6
771; EG-NEXT:    ALU 13, @9, KC0[CB0:0-32], KC1[]
772; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
773; EG-NEXT:    CF_END
774; EG-NEXT:    PAD
775; EG-NEXT:    Fetch clause starting at 6:
776; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
777; EG-NEXT:    ALU clause starting at 8:
778; EG-NEXT:     MOV * T0.X, KC0[2].Z,
779; EG-NEXT:    ALU clause starting at 9:
780; EG-NEXT:     ASHR * T0.W, T0.Y, literal.x,
781; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
782; EG-NEXT:     LSHR T0.W, PV.W, literal.x,
783; EG-NEXT:     ASHR * T1.W, T0.X, literal.y,
784; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
785; EG-NEXT:     LSHR T1.W, PS, literal.x,
786; EG-NEXT:     ADD_INT * T0.W, T0.Y, PV.W,
787; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
788; EG-NEXT:     ASHR T0.Y, PS, literal.x,
789; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
790; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
791; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
792; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
793; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
794  %num = load <2 x i32>, <2 x i32> addrspace(1) * %in
795  %result = sdiv <2 x i32> %num, <i32 4, i32 4>
796  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
797  ret void
798}
799
800define amdgpu_kernel void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
801; GCN-LABEL: sdiv_v4i32:
802; GCN:       ; %bb.0:
803; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
804; GCN-NEXT:    s_mov_b32 s7, 0xf000
805; GCN-NEXT:    s_mov_b32 s6, -1
806; GCN-NEXT:    s_mov_b32 s2, s6
807; GCN-NEXT:    s_mov_b32 s3, s7
808; GCN-NEXT:    s_waitcnt lgkmcnt(0)
809; GCN-NEXT:    s_mov_b32 s0, s10
810; GCN-NEXT:    s_mov_b32 s1, s11
811; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0 offset:16
812; GCN-NEXT:    s_mov_b32 s10, 0x4f7ffffe
813; GCN-NEXT:    s_mov_b32 s4, s8
814; GCN-NEXT:    s_mov_b32 s5, s9
815; GCN-NEXT:    s_waitcnt vmcnt(0)
816; GCN-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
817; GCN-NEXT:    v_add_i32_e32 v0, vcc, v8, v0
818; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
819; GCN-NEXT:    v_cvt_f32_u32_e32 v4, v0
820; GCN-NEXT:    v_ashrrev_i32_e32 v14, 31, v2
821; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v4
822; GCN-NEXT:    v_mul_f32_e32 v4, s10, v4
823; GCN-NEXT:    v_cvt_u32_f32_e32 v9, v4
824; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v0
825; GCN-NEXT:    v_mul_lo_u32 v10, v4, v9
826; GCN-NEXT:    buffer_load_dwordx4 v[4:7], off, s[0:3], 0
827; GCN-NEXT:    v_mul_hi_u32 v10, v9, v10
828; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
829; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
830; GCN-NEXT:    s_waitcnt vmcnt(0)
831; GCN-NEXT:    v_ashrrev_i32_e32 v11, 31, v4
832; GCN-NEXT:    v_add_i32_e32 v4, vcc, v11, v4
833; GCN-NEXT:    v_xor_b32_e32 v4, v4, v11
834; GCN-NEXT:    v_mul_hi_u32 v9, v4, v9
835; GCN-NEXT:    v_xor_b32_e32 v8, v11, v8
836; GCN-NEXT:    v_mul_lo_u32 v12, v9, v0
837; GCN-NEXT:    v_add_i32_e32 v13, vcc, 1, v9
838; GCN-NEXT:    v_sub_i32_e32 v4, vcc, v4, v12
839; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v4, v0
840; GCN-NEXT:    v_sub_i32_e32 v12, vcc, v4, v0
841; GCN-NEXT:    v_cndmask_b32_e64 v9, v9, v13, s[0:1]
842; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v12, s[0:1]
843; GCN-NEXT:    v_add_i32_e32 v12, vcc, 1, v9
844; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v0
845; GCN-NEXT:    s_mov_b64 s[0:1], vcc
846; GCN-NEXT:    v_add_i32_e32 v0, vcc, v10, v1
847; GCN-NEXT:    v_xor_b32_e32 v1, v0, v10
848; GCN-NEXT:    v_cvt_f32_u32_e32 v0, v1
849; GCN-NEXT:    v_sub_i32_e32 v13, vcc, 0, v1
850; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v5
851; GCN-NEXT:    v_add_i32_e32 v5, vcc, v4, v5
852; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
853; GCN-NEXT:    v_xor_b32_e32 v5, v5, v4
854; GCN-NEXT:    v_cndmask_b32_e64 v9, v9, v12, s[0:1]
855; GCN-NEXT:    v_xor_b32_e32 v4, v4, v10
856; GCN-NEXT:    v_mul_f32_e32 v0, s10, v0
857; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
858; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v6
859; GCN-NEXT:    v_mul_lo_u32 v13, v13, v0
860; GCN-NEXT:    v_mul_hi_u32 v11, v0, v13
861; GCN-NEXT:    v_add_i32_e32 v0, vcc, v11, v0
862; GCN-NEXT:    v_mul_hi_u32 v11, v5, v0
863; GCN-NEXT:    v_xor_b32_e32 v0, v9, v8
864; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v8, v0
865; GCN-NEXT:    v_mul_lo_u32 v8, v11, v1
866; GCN-NEXT:    v_add_i32_e32 v9, vcc, 1, v11
867; GCN-NEXT:    v_sub_i32_e32 v5, vcc, v5, v8
868; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v5, v1
869; GCN-NEXT:    v_cndmask_b32_e64 v8, v11, v9, s[0:1]
870; GCN-NEXT:    v_sub_i32_e32 v9, vcc, v5, v1
871; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v9, s[0:1]
872; GCN-NEXT:    v_add_i32_e32 v9, vcc, 1, v8
873; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v1
874; GCN-NEXT:    s_mov_b64 s[0:1], vcc
875; GCN-NEXT:    v_add_i32_e32 v1, vcc, v14, v2
876; GCN-NEXT:    v_xor_b32_e32 v2, v1, v14
877; GCN-NEXT:    v_cvt_f32_u32_e32 v1, v2
878; GCN-NEXT:    v_sub_i32_e32 v5, vcc, 0, v2
879; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v9, s[0:1]
880; GCN-NEXT:    v_ashrrev_i32_e32 v9, 31, v3
881; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
882; GCN-NEXT:    v_mul_f32_e32 v1, s10, v1
883; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
884; GCN-NEXT:    v_mul_lo_u32 v5, v5, v1
885; GCN-NEXT:    v_mul_hi_u32 v5, v1, v5
886; GCN-NEXT:    v_add_i32_e32 v1, vcc, v5, v1
887; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v6
888; GCN-NEXT:    v_xor_b32_e32 v5, v5, v10
889; GCN-NEXT:    v_mul_hi_u32 v6, v5, v1
890; GCN-NEXT:    v_xor_b32_e32 v1, v8, v4
891; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
892; GCN-NEXT:    v_xor_b32_e32 v10, v10, v14
893; GCN-NEXT:    v_mul_lo_u32 v4, v6, v2
894; GCN-NEXT:    v_add_i32_e32 v8, vcc, 1, v6
895; GCN-NEXT:    v_sub_i32_e32 v4, vcc, v5, v4
896; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v4, v2
897; GCN-NEXT:    v_cndmask_b32_e64 v5, v6, v8, s[0:1]
898; GCN-NEXT:    v_sub_i32_e32 v6, vcc, v4, v2
899; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[0:1]
900; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v5
901; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v2
902; GCN-NEXT:    s_mov_b64 s[0:1], vcc
903; GCN-NEXT:    v_add_i32_e32 v2, vcc, v9, v3
904; GCN-NEXT:    v_xor_b32_e32 v3, v2, v9
905; GCN-NEXT:    v_cvt_f32_u32_e32 v2, v3
906; GCN-NEXT:    v_sub_i32_e32 v8, vcc, 0, v3
907; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v6, s[0:1]
908; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v7
909; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
910; GCN-NEXT:    v_add_i32_e32 v7, vcc, v4, v7
911; GCN-NEXT:    v_xor_b32_e32 v9, v4, v9
912; GCN-NEXT:    v_xor_b32_e32 v4, v7, v4
913; GCN-NEXT:    v_mul_f32_e32 v2, s10, v2
914; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
915; GCN-NEXT:    v_mul_lo_u32 v8, v8, v2
916; GCN-NEXT:    v_mul_hi_u32 v6, v2, v8
917; GCN-NEXT:    v_add_i32_e32 v2, vcc, v6, v2
918; GCN-NEXT:    v_mul_hi_u32 v6, v4, v2
919; GCN-NEXT:    v_xor_b32_e32 v2, v5, v10
920; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v10, v2
921; GCN-NEXT:    v_mul_lo_u32 v5, v6, v3
922; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v6
923; GCN-NEXT:    v_sub_i32_e32 v4, vcc, v4, v5
924; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v4, v3
925; GCN-NEXT:    v_cndmask_b32_e64 v5, v6, v7, s[0:1]
926; GCN-NEXT:    v_sub_i32_e32 v6, vcc, v4, v3
927; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[0:1]
928; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v5
929; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v3
930; GCN-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc
931; GCN-NEXT:    v_xor_b32_e32 v3, v3, v9
932; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v9, v3
933; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
934; GCN-NEXT:    s_endpgm
935;
936; TONGA-LABEL: sdiv_v4i32:
937; TONGA:       ; %bb.0:
938; TONGA-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x24
939; TONGA-NEXT:    s_mov_b32 s7, 0xf000
940; TONGA-NEXT:    s_mov_b32 s6, -1
941; TONGA-NEXT:    s_mov_b32 s2, s6
942; TONGA-NEXT:    s_mov_b32 s3, s7
943; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
944; TONGA-NEXT:    s_mov_b32 s0, s10
945; TONGA-NEXT:    s_mov_b32 s1, s11
946; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0 offset:16
947; TONGA-NEXT:    s_mov_b32 s10, 0x4f7ffffe
948; TONGA-NEXT:    s_mov_b32 s4, s8
949; TONGA-NEXT:    s_mov_b32 s5, s9
950; TONGA-NEXT:    s_waitcnt vmcnt(0)
951; TONGA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
952; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v8, v0
953; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
954; TONGA-NEXT:    v_cvt_f32_u32_e32 v4, v0
955; TONGA-NEXT:    v_ashrrev_i32_e32 v14, 31, v2
956; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v4
957; TONGA-NEXT:    v_mul_f32_e32 v4, s10, v4
958; TONGA-NEXT:    v_cvt_u32_f32_e32 v9, v4
959; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v0
960; TONGA-NEXT:    v_mul_lo_u32 v10, v4, v9
961; TONGA-NEXT:    buffer_load_dwordx4 v[4:7], off, s[0:3], 0
962; TONGA-NEXT:    v_mul_hi_u32 v10, v9, v10
963; TONGA-NEXT:    v_add_u32_e32 v9, vcc, v10, v9
964; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
965; TONGA-NEXT:    s_waitcnt vmcnt(0)
966; TONGA-NEXT:    v_ashrrev_i32_e32 v11, 31, v4
967; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v11, v4
968; TONGA-NEXT:    v_xor_b32_e32 v4, v4, v11
969; TONGA-NEXT:    v_mul_hi_u32 v9, v4, v9
970; TONGA-NEXT:    v_xor_b32_e32 v8, v11, v8
971; TONGA-NEXT:    v_mul_lo_u32 v12, v9, v0
972; TONGA-NEXT:    v_add_u32_e32 v13, vcc, 1, v9
973; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, v4, v12
974; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v4, v0
975; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, v4, v0
976; TONGA-NEXT:    v_cndmask_b32_e64 v9, v9, v13, s[0:1]
977; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v12, s[0:1]
978; TONGA-NEXT:    v_add_u32_e32 v12, vcc, 1, v9
979; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v0
980; TONGA-NEXT:    s_mov_b64 s[0:1], vcc
981; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v10, v1
982; TONGA-NEXT:    v_xor_b32_e32 v1, v0, v10
983; TONGA-NEXT:    v_cvt_f32_u32_e32 v0, v1
984; TONGA-NEXT:    v_sub_u32_e32 v13, vcc, 0, v1
985; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v5
986; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v4, v5
987; TONGA-NEXT:    v_rcp_iflag_f32_e32 v0, v0
988; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v4
989; TONGA-NEXT:    v_cndmask_b32_e64 v9, v9, v12, s[0:1]
990; TONGA-NEXT:    v_xor_b32_e32 v4, v4, v10
991; TONGA-NEXT:    v_mul_f32_e32 v0, s10, v0
992; TONGA-NEXT:    v_cvt_u32_f32_e32 v0, v0
993; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v6
994; TONGA-NEXT:    v_mul_lo_u32 v13, v13, v0
995; TONGA-NEXT:    v_mul_hi_u32 v11, v0, v13
996; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v11, v0
997; TONGA-NEXT:    v_mul_hi_u32 v11, v5, v0
998; TONGA-NEXT:    v_xor_b32_e32 v0, v9, v8
999; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v8, v0
1000; TONGA-NEXT:    v_mul_lo_u32 v8, v11, v1
1001; TONGA-NEXT:    v_add_u32_e32 v9, vcc, 1, v11
1002; TONGA-NEXT:    v_sub_u32_e32 v5, vcc, v5, v8
1003; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v5, v1
1004; TONGA-NEXT:    v_cndmask_b32_e64 v8, v11, v9, s[0:1]
1005; TONGA-NEXT:    v_sub_u32_e32 v9, vcc, v5, v1
1006; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v9, s[0:1]
1007; TONGA-NEXT:    v_add_u32_e32 v9, vcc, 1, v8
1008; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v1
1009; TONGA-NEXT:    s_mov_b64 s[0:1], vcc
1010; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v14, v2
1011; TONGA-NEXT:    v_xor_b32_e32 v2, v1, v14
1012; TONGA-NEXT:    v_cvt_f32_u32_e32 v1, v2
1013; TONGA-NEXT:    v_sub_u32_e32 v5, vcc, 0, v2
1014; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v9, s[0:1]
1015; TONGA-NEXT:    v_ashrrev_i32_e32 v9, 31, v3
1016; TONGA-NEXT:    v_rcp_iflag_f32_e32 v1, v1
1017; TONGA-NEXT:    v_mul_f32_e32 v1, s10, v1
1018; TONGA-NEXT:    v_cvt_u32_f32_e32 v1, v1
1019; TONGA-NEXT:    v_mul_lo_u32 v5, v5, v1
1020; TONGA-NEXT:    v_mul_hi_u32 v5, v1, v5
1021; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v5, v1
1022; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v10, v6
1023; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v10
1024; TONGA-NEXT:    v_mul_hi_u32 v6, v5, v1
1025; TONGA-NEXT:    v_xor_b32_e32 v1, v8, v4
1026; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v4, v1
1027; TONGA-NEXT:    v_xor_b32_e32 v10, v10, v14
1028; TONGA-NEXT:    v_mul_lo_u32 v4, v6, v2
1029; TONGA-NEXT:    v_add_u32_e32 v8, vcc, 1, v6
1030; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, v5, v4
1031; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v4, v2
1032; TONGA-NEXT:    v_cndmask_b32_e64 v5, v6, v8, s[0:1]
1033; TONGA-NEXT:    v_sub_u32_e32 v6, vcc, v4, v2
1034; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[0:1]
1035; TONGA-NEXT:    v_add_u32_e32 v6, vcc, 1, v5
1036; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v2
1037; TONGA-NEXT:    s_mov_b64 s[0:1], vcc
1038; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v9, v3
1039; TONGA-NEXT:    v_xor_b32_e32 v3, v2, v9
1040; TONGA-NEXT:    v_cvt_f32_u32_e32 v2, v3
1041; TONGA-NEXT:    v_sub_u32_e32 v8, vcc, 0, v3
1042; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v6, s[0:1]
1043; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v7
1044; TONGA-NEXT:    v_rcp_iflag_f32_e32 v2, v2
1045; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v4, v7
1046; TONGA-NEXT:    v_xor_b32_e32 v9, v4, v9
1047; TONGA-NEXT:    v_xor_b32_e32 v4, v7, v4
1048; TONGA-NEXT:    v_mul_f32_e32 v2, s10, v2
1049; TONGA-NEXT:    v_cvt_u32_f32_e32 v2, v2
1050; TONGA-NEXT:    v_mul_lo_u32 v8, v8, v2
1051; TONGA-NEXT:    v_mul_hi_u32 v6, v2, v8
1052; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v6, v2
1053; TONGA-NEXT:    v_mul_hi_u32 v6, v4, v2
1054; TONGA-NEXT:    v_xor_b32_e32 v2, v5, v10
1055; TONGA-NEXT:    v_subrev_u32_e32 v2, vcc, v10, v2
1056; TONGA-NEXT:    v_mul_lo_u32 v5, v6, v3
1057; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v6
1058; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, v4, v5
1059; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v4, v3
1060; TONGA-NEXT:    v_cndmask_b32_e64 v5, v6, v7, s[0:1]
1061; TONGA-NEXT:    v_sub_u32_e32 v6, vcc, v4, v3
1062; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[0:1]
1063; TONGA-NEXT:    v_add_u32_e32 v6, vcc, 1, v5
1064; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v3
1065; TONGA-NEXT:    v_cndmask_b32_e32 v3, v5, v6, vcc
1066; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v9
1067; TONGA-NEXT:    v_subrev_u32_e32 v3, vcc, v9, v3
1068; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1069; TONGA-NEXT:    s_endpgm
1070;
1071; GFX9-LABEL: sdiv_v4i32:
1072; GFX9:       ; %bb.0:
1073; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
1074; GFX9-NEXT:    s_mov_b32 s11, 0xf000
1075; GFX9-NEXT:    s_mov_b32 s10, -1
1076; GFX9-NEXT:    s_mov_b32 s6, s10
1077; GFX9-NEXT:    s_mov_b32 s7, s11
1078; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1079; GFX9-NEXT:    s_mov_b32 s4, s2
1080; GFX9-NEXT:    s_mov_b32 s5, s3
1081; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[4:7], 0
1082; GFX9-NEXT:    buffer_load_dwordx4 v[4:7], off, s[4:7], 0 offset:16
1083; GFX9-NEXT:    s_mov_b32 s2, 0x4f7ffffe
1084; GFX9-NEXT:    s_mov_b32 s8, s0
1085; GFX9-NEXT:    s_mov_b32 s9, s1
1086; GFX9-NEXT:    s_waitcnt vmcnt(1)
1087; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
1088; GFX9-NEXT:    s_waitcnt vmcnt(0)
1089; GFX9-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
1090; GFX9-NEXT:    v_add_u32_e32 v4, v4, v9
1091; GFX9-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
1092; GFX9-NEXT:    v_add_u32_e32 v0, v0, v8
1093; GFX9-NEXT:    v_xor_b32_e32 v4, v4, v9
1094; GFX9-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
1095; GFX9-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
1096; GFX9-NEXT:    v_add_u32_e32 v5, v5, v11
1097; GFX9-NEXT:    v_xor_b32_e32 v16, v8, v9
1098; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v8
1099; GFX9-NEXT:    v_cvt_f32_u32_e32 v8, v4
1100; GFX9-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
1101; GFX9-NEXT:    v_ashrrev_i32_e32 v15, 31, v7
1102; GFX9-NEXT:    v_add_u32_e32 v1, v1, v10
1103; GFX9-NEXT:    v_add_u32_e32 v6, v6, v13
1104; GFX9-NEXT:    v_xor_b32_e32 v5, v5, v11
1105; GFX9-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
1106; GFX9-NEXT:    v_add_u32_e32 v2, v2, v12
1107; GFX9-NEXT:    v_add_u32_e32 v7, v7, v15
1108; GFX9-NEXT:    v_xor_b32_e32 v17, v10, v11
1109; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v10
1110; GFX9-NEXT:    v_cvt_f32_u32_e32 v10, v5
1111; GFX9-NEXT:    v_xor_b32_e32 v6, v6, v13
1112; GFX9-NEXT:    v_add_u32_e32 v3, v3, v14
1113; GFX9-NEXT:    v_xor_b32_e32 v18, v12, v13
1114; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v12
1115; GFX9-NEXT:    v_cvt_f32_u32_e32 v12, v6
1116; GFX9-NEXT:    v_xor_b32_e32 v7, v7, v15
1117; GFX9-NEXT:    v_rcp_iflag_f32_e32 v8, v8
1118; GFX9-NEXT:    v_xor_b32_e32 v19, v14, v15
1119; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v14
1120; GFX9-NEXT:    v_cvt_f32_u32_e32 v14, v7
1121; GFX9-NEXT:    v_rcp_iflag_f32_e32 v10, v10
1122; GFX9-NEXT:    v_rcp_iflag_f32_e32 v12, v12
1123; GFX9-NEXT:    v_mul_f32_e32 v8, s2, v8
1124; GFX9-NEXT:    v_rcp_iflag_f32_e32 v14, v14
1125; GFX9-NEXT:    v_cvt_u32_f32_e32 v8, v8
1126; GFX9-NEXT:    v_mul_f32_e32 v10, s2, v10
1127; GFX9-NEXT:    v_mul_f32_e32 v12, s2, v12
1128; GFX9-NEXT:    v_cvt_u32_f32_e32 v10, v10
1129; GFX9-NEXT:    v_sub_u32_e32 v9, 0, v4
1130; GFX9-NEXT:    v_mul_f32_e32 v14, s2, v14
1131; GFX9-NEXT:    v_cvt_u32_f32_e32 v12, v12
1132; GFX9-NEXT:    v_mul_lo_u32 v9, v9, v8
1133; GFX9-NEXT:    v_cvt_u32_f32_e32 v14, v14
1134; GFX9-NEXT:    v_sub_u32_e32 v11, 0, v5
1135; GFX9-NEXT:    v_sub_u32_e32 v13, 0, v6
1136; GFX9-NEXT:    v_mul_lo_u32 v11, v11, v10
1137; GFX9-NEXT:    v_sub_u32_e32 v15, 0, v7
1138; GFX9-NEXT:    v_mul_lo_u32 v13, v13, v12
1139; GFX9-NEXT:    v_mul_lo_u32 v15, v15, v14
1140; GFX9-NEXT:    v_mul_hi_u32 v9, v8, v9
1141; GFX9-NEXT:    v_mul_hi_u32 v11, v10, v11
1142; GFX9-NEXT:    v_mul_hi_u32 v13, v12, v13
1143; GFX9-NEXT:    v_mul_hi_u32 v15, v14, v15
1144; GFX9-NEXT:    v_add_u32_e32 v8, v8, v9
1145; GFX9-NEXT:    v_mul_hi_u32 v8, v0, v8
1146; GFX9-NEXT:    v_add_u32_e32 v9, v10, v11
1147; GFX9-NEXT:    v_add_u32_e32 v10, v12, v13
1148; GFX9-NEXT:    v_mul_hi_u32 v9, v1, v9
1149; GFX9-NEXT:    v_add_u32_e32 v11, v14, v15
1150; GFX9-NEXT:    v_mul_hi_u32 v10, v2, v10
1151; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v4
1152; GFX9-NEXT:    v_mul_hi_u32 v11, v3, v11
1153; GFX9-NEXT:    v_mul_lo_u32 v14, v9, v5
1154; GFX9-NEXT:    v_mul_lo_u32 v15, v10, v6
1155; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v12
1156; GFX9-NEXT:    v_mul_lo_u32 v12, v11, v7
1157; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v14
1158; GFX9-NEXT:    v_add_u32_e32 v13, 1, v8
1159; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
1160; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v15
1161; GFX9-NEXT:    v_cndmask_b32_e32 v8, v8, v13, vcc
1162; GFX9-NEXT:    v_sub_u32_e32 v13, v0, v4
1163; GFX9-NEXT:    v_add_u32_e32 v14, 1, v9
1164; GFX9-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v5
1165; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v13, vcc
1166; GFX9-NEXT:    v_sub_u32_e32 v3, v3, v12
1167; GFX9-NEXT:    v_cndmask_b32_e64 v9, v9, v14, s[0:1]
1168; GFX9-NEXT:    v_sub_u32_e32 v14, v1, v5
1169; GFX9-NEXT:    v_add_u32_e32 v15, 1, v10
1170; GFX9-NEXT:    v_cmp_ge_u32_e64 s[2:3], v2, v6
1171; GFX9-NEXT:    v_cndmask_b32_e64 v10, v10, v15, s[2:3]
1172; GFX9-NEXT:    v_sub_u32_e32 v15, v2, v6
1173; GFX9-NEXT:    v_cndmask_b32_e64 v1, v1, v14, s[0:1]
1174; GFX9-NEXT:    v_add_u32_e32 v12, 1, v11
1175; GFX9-NEXT:    v_cmp_ge_u32_e64 s[4:5], v3, v7
1176; GFX9-NEXT:    v_add_u32_e32 v13, 1, v8
1177; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
1178; GFX9-NEXT:    v_cndmask_b32_e32 v0, v8, v13, vcc
1179; GFX9-NEXT:    v_cndmask_b32_e64 v11, v11, v12, s[4:5]
1180; GFX9-NEXT:    v_sub_u32_e32 v12, v3, v7
1181; GFX9-NEXT:    v_cndmask_b32_e64 v2, v2, v15, s[2:3]
1182; GFX9-NEXT:    v_add_u32_e32 v14, 1, v9
1183; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
1184; GFX9-NEXT:    v_cndmask_b32_e32 v1, v9, v14, vcc
1185; GFX9-NEXT:    v_cndmask_b32_e64 v3, v3, v12, s[4:5]
1186; GFX9-NEXT:    v_add_u32_e32 v15, 1, v10
1187; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1188; GFX9-NEXT:    v_cndmask_b32_e32 v2, v10, v15, vcc
1189; GFX9-NEXT:    v_add_u32_e32 v12, 1, v11
1190; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
1191; GFX9-NEXT:    v_cndmask_b32_e32 v3, v11, v12, vcc
1192; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v16
1193; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v17
1194; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v18
1195; GFX9-NEXT:    v_xor_b32_e32 v3, v3, v19
1196; GFX9-NEXT:    v_sub_u32_e32 v0, v0, v16
1197; GFX9-NEXT:    v_sub_u32_e32 v1, v1, v17
1198; GFX9-NEXT:    v_sub_u32_e32 v2, v2, v18
1199; GFX9-NEXT:    v_sub_u32_e32 v3, v3, v19
1200; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1201; GFX9-NEXT:    s_endpgm
1202;
1203; EG-LABEL: sdiv_v4i32:
1204; EG:       ; %bb.0:
1205; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
1206; EG-NEXT:    TEX 1 @6
1207; EG-NEXT:    ALU 101, @11, KC0[CB0:0-32], KC1[]
1208; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
1209; EG-NEXT:    CF_END
1210; EG-NEXT:    PAD
1211; EG-NEXT:    Fetch clause starting at 6:
1212; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 16, #1
1213; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
1214; EG-NEXT:    ALU clause starting at 10:
1215; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1216; EG-NEXT:    ALU clause starting at 11:
1217; EG-NEXT:     SETGT_INT * T2.W, 0.0, T1.W,
1218; EG-NEXT:     ADD_INT * T1.W, T1.W, PV.W,
1219; EG-NEXT:     XOR_INT * T1.W, PV.W, T2.W,
1220; EG-NEXT:     SUB_INT T3.W, 0.0, PV.W,
1221; EG-NEXT:     RECIP_UINT * T2.X, PV.W,
1222; EG-NEXT:     SETGT_INT T4.W, 0.0, T0.W,
1223; EG-NEXT:     MULLO_INT * T2.Y, PV.W, PS,
1224; EG-NEXT:     SETGT_INT T2.Z, 0.0, T1.Y,
1225; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
1226; EG-NEXT:     MULHI * T2.Y, T2.X, PS,
1227; EG-NEXT:     ADD_INT T3.Z, T2.X, PS,
1228; EG-NEXT:     XOR_INT T0.W, PV.W, T4.W,
1229; EG-NEXT:     ADD_INT * T3.W, T1.Y, PV.Z,
1230; EG-NEXT:     XOR_INT T3.W, PS, T2.Z,
1231; EG-NEXT:     MULHI * T1.Y, PV.W, PV.Z,
1232; EG-NEXT:     SUB_INT T5.W, 0.0, PV.W,
1233; EG-NEXT:     RECIP_UINT * T2.X, PV.W,
1234; EG-NEXT:     SETGT_INT T6.W, 0.0, T0.Y,
1235; EG-NEXT:     MULLO_INT * T2.Y, PV.W, PS,
1236; EG-NEXT:     ADD_INT T5.W, T0.Y, PV.W,
1237; EG-NEXT:     MULHI * T0.Y, T2.X, PS,
1238; EG-NEXT:     ADD_INT T0.Y, T2.X, PS,
1239; EG-NEXT:     XOR_INT T3.Z, PV.W, T6.W, BS:VEC_021/SCL_122
1240; EG-NEXT:     SETGT_INT T5.W, 0.0, T1.Z,
1241; EG-NEXT:     MULLO_INT * T2.X, T1.Y, T1.W,
1242; EG-NEXT:     ADD_INT T7.W, T1.Z, PV.W,
1243; EG-NEXT:     MULHI * T0.Y, PV.Z, PV.Y,
1244; EG-NEXT:     XOR_INT T7.W, PV.W, T5.W, BS:VEC_021/SCL_122
1245; EG-NEXT:     MULLO_INT * T1.Z, PS, T3.W,
1246; EG-NEXT:     SUB_INT T4.Z, 0.0, PV.W,
1247; EG-NEXT:     SETGT_INT T8.W, 0.0, T1.X,
1248; EG-NEXT:     RECIP_UINT * T2.Y, PV.W,
1249; EG-NEXT:     ADD_INT T9.W, T1.X, PV.W,
1250; EG-NEXT:     MULLO_INT * T1.X, PV.Z, PS,
1251; EG-NEXT:     SETGT_INT T4.Z, 0.0, T0.Z,
1252; EG-NEXT:     XOR_INT T9.W, PV.W, T8.W,
1253; EG-NEXT:     MULHI * T1.X, T2.Y, PS,
1254; EG-NEXT:     ADD_INT T1.X, T2.Y, PS,
1255; EG-NEXT:     SUB_INT T2.Y, 0.0, PV.W,
1256; EG-NEXT:     SUB_INT T1.Z, T3.Z, T1.Z,
1257; EG-NEXT:     ADD_INT T10.W, T0.Z, PV.Z, BS:VEC_201
1258; EG-NEXT:     RECIP_UINT * T0.Z, PV.W,
1259; EG-NEXT:     XOR_INT T3.X, PV.W, T4.Z,
1260; EG-NEXT:     ADD_INT T3.Y, T0.Y, 1,
1261; EG-NEXT:     SETGE_UINT T3.Z, PV.Z, T3.W,
1262; EG-NEXT:     SUB_INT T10.W, PV.Z, T3.W,
1263; EG-NEXT:     MULLO_INT * T2.Y, PV.Y, PS,
1264; EG-NEXT:     CNDE_INT T1.Z, PV.Z, T1.Z, PV.W,
1265; EG-NEXT:     CNDE_INT T10.W, PV.Z, T0.Y, PV.Y,
1266; EG-NEXT:     MULHI * T0.Y, PV.X, T1.X,
1267; EG-NEXT:     SETGT_INT T3.Y, 0.0, T0.X,
1268; EG-NEXT:     ADD_INT T3.Z, PV.W, 1,
1269; EG-NEXT:     SETGE_UINT T3.W, PV.Z, T3.W, BS:VEC_021/SCL_122
1270; EG-NEXT:     MULLO_INT * T1.X, PS, T7.W,
1271; EG-NEXT:     CNDE_INT T4.Y, PV.W, T10.W, PV.Z,
1272; EG-NEXT:     ADD_INT T1.Z, T0.X, PV.Y,
1273; EG-NEXT:     SUB_INT T3.W, T3.X, PS, BS:VEC_120/SCL_212
1274; EG-NEXT:     MULHI * T0.X, T0.Z, T2.Y,
1275; EG-NEXT:     ADD_INT T1.X, T0.Y, 1,
1276; EG-NEXT:     SETGE_UINT T2.Y, PV.W, T7.W,
1277; EG-NEXT:     ADD_INT T0.Z, T0.Z, PS,
1278; EG-NEXT:     XOR_INT T10.W, PV.Z, T3.Y,
1279; EG-NEXT:     SUB_INT * T0.W, T0.W, T2.X,
1280; EG-NEXT:     SUB_INT T0.X, T3.W, T7.W,
1281; EG-NEXT:     ADD_INT T5.Y, T1.Y, 1,
1282; EG-NEXT:     SETGE_UINT T1.Z, PS, T1.W, BS:VEC_021/SCL_122
1283; EG-NEXT:     SUB_INT T11.W, PS, T1.W, BS:VEC_021/SCL_122
1284; EG-NEXT:     MULHI * T0.Z, PV.W, PV.Z,
1285; EG-NEXT:     CNDE_INT T2.X, PV.Z, T0.W, PV.W, BS:VEC_021/SCL_122
1286; EG-NEXT:     CNDE_INT T1.Y, PV.Z, T1.Y, PV.Y,
1287; EG-NEXT:     CNDE_INT T1.Z, T2.Y, T3.W, PV.X, BS:VEC_201
1288; EG-NEXT:     CNDE_INT T0.W, T2.Y, T0.Y, T1.X, BS:VEC_201
1289; EG-NEXT:     MULLO_INT * T0.X, PS, T9.W,
1290; EG-NEXT:     ADD_INT T1.X, PV.W, 1,
1291; EG-NEXT:     SETGE_UINT T0.Y, PV.Z, T7.W,
1292; EG-NEXT:     ADD_INT T1.Z, PV.Y, 1,
1293; EG-NEXT:     SETGE_UINT T1.W, PV.X, T1.W, BS:VEC_102/SCL_221
1294; EG-NEXT:     SUB_INT * T3.W, T10.W, PS,
1295; EG-NEXT:     ADD_INT T0.X, T0.Z, 1,
1296; EG-NEXT:     SETGE_UINT T2.Y, PS, T9.W, BS:VEC_102/SCL_221
1297; EG-NEXT:     SUB_INT T3.Z, PS, T9.W, BS:VEC_102/SCL_221
1298; EG-NEXT:     CNDE_INT T1.W, PV.W, T1.Y, PV.Z,
1299; EG-NEXT:     XOR_INT * T2.W, T4.W, T2.W,
1300; EG-NEXT:     XOR_INT T2.X, PV.W, PS,
1301; EG-NEXT:     CNDE_INT T1.Y, PV.Y, T3.W, PV.Z, BS:VEC_021/SCL_122
1302; EG-NEXT:     CNDE_INT T0.Z, PV.Y, T0.Z, PV.X,
1303; EG-NEXT:     CNDE_INT T0.W, T0.Y, T0.W, T1.X, BS:VEC_102/SCL_221
1304; EG-NEXT:     XOR_INT * T1.W, T4.Z, T5.W,
1305; EG-NEXT:     XOR_INT T0.X, T6.W, T2.Z,
1306; EG-NEXT:     XOR_INT T0.Y, PV.W, PS,
1307; EG-NEXT:     ADD_INT T1.Z, PV.Z, 1,
1308; EG-NEXT:     SETGE_UINT T0.W, PV.Y, T9.W, BS:VEC_021/SCL_122
1309; EG-NEXT:     SUB_INT * T2.W, PV.X, T2.W,
1310; EG-NEXT:     CNDE_INT T1.Y, PV.W, T0.Z, PV.Z,
1311; EG-NEXT:     SUB_INT T2.Z, PV.Y, T1.W,
1312; EG-NEXT:     XOR_INT T0.W, T3.Y, T8.W, BS:VEC_021/SCL_122
1313; EG-NEXT:     XOR_INT * T1.W, T4.Y, PV.X,
1314; EG-NEXT:     SUB_INT T2.Y, PS, T0.X,
1315; EG-NEXT:     XOR_INT * T1.W, PV.Y, PV.W,
1316; EG-NEXT:     SUB_INT T2.X, PV.W, T0.W,
1317; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
1318; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1319  %den_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
1320  %num = load <4 x i32>, <4 x i32> addrspace(1) * %in
1321  %den = load <4 x i32>, <4 x i32> addrspace(1) * %den_ptr
1322  %result = sdiv <4 x i32> %num, %den
1323  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1324  ret void
1325}
1326
1327define amdgpu_kernel void @sdiv_v4i32_4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
1328; GCN-LABEL: sdiv_v4i32_4:
1329; GCN:       ; %bb.0:
1330; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
1331; GCN-NEXT:    s_mov_b32 s3, 0xf000
1332; GCN-NEXT:    s_mov_b32 s2, -1
1333; GCN-NEXT:    s_mov_b32 s10, s2
1334; GCN-NEXT:    s_mov_b32 s11, s3
1335; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1336; GCN-NEXT:    s_mov_b32 s8, s6
1337; GCN-NEXT:    s_mov_b32 s9, s7
1338; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1339; GCN-NEXT:    s_mov_b32 s0, s4
1340; GCN-NEXT:    s_mov_b32 s1, s5
1341; GCN-NEXT:    s_waitcnt vmcnt(0)
1342; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1343; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1344; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1345; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1346; GCN-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1347; GCN-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1348; GCN-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1349; GCN-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1350; GCN-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
1351; GCN-NEXT:    v_add_i32_e32 v1, vcc, v5, v1
1352; GCN-NEXT:    v_add_i32_e32 v2, vcc, v6, v2
1353; GCN-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
1354; GCN-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1355; GCN-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1356; GCN-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1357; GCN-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1358; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1359; GCN-NEXT:    s_endpgm
1360;
1361; TONGA-LABEL: sdiv_v4i32_4:
1362; TONGA:       ; %bb.0:
1363; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1364; TONGA-NEXT:    s_mov_b32 s3, 0xf000
1365; TONGA-NEXT:    s_mov_b32 s2, -1
1366; TONGA-NEXT:    s_mov_b32 s10, s2
1367; TONGA-NEXT:    s_mov_b32 s11, s3
1368; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1369; TONGA-NEXT:    s_mov_b32 s8, s6
1370; TONGA-NEXT:    s_mov_b32 s9, s7
1371; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1372; TONGA-NEXT:    s_mov_b32 s0, s4
1373; TONGA-NEXT:    s_mov_b32 s1, s5
1374; TONGA-NEXT:    s_waitcnt vmcnt(0)
1375; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1376; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1377; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1378; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1379; TONGA-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1380; TONGA-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1381; TONGA-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1382; TONGA-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1383; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
1384; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v5, v1
1385; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v6, v2
1386; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
1387; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1388; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1389; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1390; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1391; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1392; TONGA-NEXT:    s_endpgm
1393;
1394; GFX9-LABEL: sdiv_v4i32_4:
1395; GFX9:       ; %bb.0:
1396; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1397; GFX9-NEXT:    s_mov_b32 s3, 0xf000
1398; GFX9-NEXT:    s_mov_b32 s2, -1
1399; GFX9-NEXT:    s_mov_b32 s10, s2
1400; GFX9-NEXT:    s_mov_b32 s11, s3
1401; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1402; GFX9-NEXT:    s_mov_b32 s8, s6
1403; GFX9-NEXT:    s_mov_b32 s9, s7
1404; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[8:11], 0
1405; GFX9-NEXT:    s_mov_b32 s0, s4
1406; GFX9-NEXT:    s_mov_b32 s1, s5
1407; GFX9-NEXT:    s_waitcnt vmcnt(0)
1408; GFX9-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
1409; GFX9-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1410; GFX9-NEXT:    v_ashrrev_i32_e32 v6, 31, v2
1411; GFX9-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
1412; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 30, v4
1413; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 30, v5
1414; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 30, v6
1415; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 30, v7
1416; GFX9-NEXT:    v_add_u32_e32 v0, v0, v4
1417; GFX9-NEXT:    v_add_u32_e32 v1, v1, v5
1418; GFX9-NEXT:    v_add_u32_e32 v2, v2, v6
1419; GFX9-NEXT:    v_add_u32_e32 v3, v3, v7
1420; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 2, v0
1421; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 2, v1
1422; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 2, v2
1423; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 2, v3
1424; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1425; GFX9-NEXT:    s_endpgm
1426;
1427; EG-LABEL: sdiv_v4i32_4:
1428; EG:       ; %bb.0:
1429; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
1430; EG-NEXT:    TEX 0 @6
1431; EG-NEXT:    ALU 24, @9, KC0[CB0:0-32], KC1[]
1432; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1433; EG-NEXT:    CF_END
1434; EG-NEXT:    PAD
1435; EG-NEXT:    Fetch clause starting at 6:
1436; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
1437; EG-NEXT:    ALU clause starting at 8:
1438; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1439; EG-NEXT:    ALU clause starting at 9:
1440; EG-NEXT:     ASHR T1.W, T0.W, literal.x,
1441; EG-NEXT:     ASHR * T2.W, T0.Z, literal.x,
1442; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
1443; EG-NEXT:     LSHR * T1.W, PV.W, literal.x,
1444; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1445; EG-NEXT:     ADD_INT T1.Z, T0.W, PV.W,
1446; EG-NEXT:     LSHR T0.W, T2.W, literal.x, BS:VEC_120/SCL_212
1447; EG-NEXT:     ASHR * T1.W, T0.Y, literal.y,
1448; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
1449; EG-NEXT:     LSHR T1.Y, PS, literal.x,
1450; EG-NEXT:     ASHR T2.Z, T0.X, literal.y,
1451; EG-NEXT:     ADD_INT T0.W, T0.Z, PV.W,
1452; EG-NEXT:     ASHR * T1.W, PV.Z, literal.z,
1453; EG-NEXT:    30(4.203895e-44), 31(4.344025e-44)
1454; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1455; EG-NEXT:     ASHR T1.Z, PV.W, literal.x,
1456; EG-NEXT:     LSHR T0.W, PV.Z, literal.y,
1457; EG-NEXT:     ADD_INT * T2.W, T0.Y, PV.Y,
1458; EG-NEXT:    2(2.802597e-45), 30(4.203895e-44)
1459; EG-NEXT:     ASHR T1.Y, PS, literal.x,
1460; EG-NEXT:     ADD_INT * T0.W, T0.X, PV.W,
1461; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1462; EG-NEXT:     ASHR T1.X, PV.W, literal.x,
1463; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
1464; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1465  %num = load <4 x i32>, <4 x i32> addrspace(1) * %in
1466  %result = sdiv <4 x i32> %num, <i32 4, i32 4, i32 4, i32 4>
1467  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
1468  ret void
1469}
1470
1471define amdgpu_kernel void @v_sdiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
1472; GCN-LABEL: v_sdiv_i8:
1473; GCN:       ; %bb.0:
1474; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
1475; GCN-NEXT:    s_mov_b32 s3, 0xf000
1476; GCN-NEXT:    s_mov_b32 s2, -1
1477; GCN-NEXT:    s_mov_b32 s10, s2
1478; GCN-NEXT:    s_mov_b32 s11, s3
1479; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1480; GCN-NEXT:    s_mov_b32 s8, s6
1481; GCN-NEXT:    s_mov_b32 s9, s7
1482; GCN-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
1483; GCN-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0 offset:1
1484; GCN-NEXT:    s_mov_b32 s0, s4
1485; GCN-NEXT:    s_mov_b32 s1, s5
1486; GCN-NEXT:    s_waitcnt vmcnt(1)
1487; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v0
1488; GCN-NEXT:    s_waitcnt vmcnt(0)
1489; GCN-NEXT:    v_cvt_f32_i32_e32 v2, v1
1490; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
1491; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1492; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1493; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1494; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
1495; GCN-NEXT:    v_trunc_f32_e32 v1, v1
1496; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
1497; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
1498; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1499; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1500; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
1501; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 8
1502; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1503; GCN-NEXT:    s_endpgm
1504;
1505; TONGA-LABEL: v_sdiv_i8:
1506; TONGA:       ; %bb.0:
1507; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1508; TONGA-NEXT:    s_mov_b32 s3, 0xf000
1509; TONGA-NEXT:    s_mov_b32 s2, -1
1510; TONGA-NEXT:    s_mov_b32 s10, s2
1511; TONGA-NEXT:    s_mov_b32 s11, s3
1512; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1513; TONGA-NEXT:    s_mov_b32 s8, s6
1514; TONGA-NEXT:    s_mov_b32 s9, s7
1515; TONGA-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
1516; TONGA-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0 offset:1
1517; TONGA-NEXT:    s_mov_b32 s0, s4
1518; TONGA-NEXT:    s_mov_b32 s1, s5
1519; TONGA-NEXT:    s_waitcnt vmcnt(1)
1520; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v0
1521; TONGA-NEXT:    s_waitcnt vmcnt(0)
1522; TONGA-NEXT:    v_cvt_f32_i32_e32 v2, v1
1523; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
1524; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1525; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1526; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1527; TONGA-NEXT:    v_mul_f32_e32 v1, v3, v4
1528; TONGA-NEXT:    v_trunc_f32_e32 v1, v1
1529; TONGA-NEXT:    v_mad_f32 v3, -v1, v2, v3
1530; TONGA-NEXT:    v_cvt_i32_f32_e32 v1, v1
1531; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
1532; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1533; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v1, v0
1534; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 8
1535; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1536; TONGA-NEXT:    s_endpgm
1537;
1538; GFX9-LABEL: v_sdiv_i8:
1539; GFX9:       ; %bb.0:
1540; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1541; GFX9-NEXT:    s_mov_b32 s3, 0xf000
1542; GFX9-NEXT:    s_mov_b32 s2, -1
1543; GFX9-NEXT:    s_mov_b32 s10, s2
1544; GFX9-NEXT:    s_mov_b32 s11, s3
1545; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1546; GFX9-NEXT:    s_mov_b32 s8, s6
1547; GFX9-NEXT:    s_mov_b32 s9, s7
1548; GFX9-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
1549; GFX9-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0 offset:1
1550; GFX9-NEXT:    s_mov_b32 s0, s4
1551; GFX9-NEXT:    s_mov_b32 s1, s5
1552; GFX9-NEXT:    s_waitcnt vmcnt(1)
1553; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v0
1554; GFX9-NEXT:    s_waitcnt vmcnt(0)
1555; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v1
1556; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v1
1557; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1558; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1559; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1560; GFX9-NEXT:    v_mul_f32_e32 v1, v3, v4
1561; GFX9-NEXT:    v_trunc_f32_e32 v1, v1
1562; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v1
1563; GFX9-NEXT:    v_mad_f32 v1, -v1, v2, v3
1564; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
1565; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1566; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1567; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 8
1568; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1569; GFX9-NEXT:    s_endpgm
1570;
1571; EG-LABEL: v_sdiv_i8:
1572; EG:       ; %bb.0:
1573; EG-NEXT:    ALU 0, @10, KC0[CB0:0-32], KC1[]
1574; EG-NEXT:    TEX 1 @6
1575; EG-NEXT:    ALU 21, @11, KC0[CB0:0-32], KC1[]
1576; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1577; EG-NEXT:    CF_END
1578; EG-NEXT:    PAD
1579; EG-NEXT:    Fetch clause starting at 6:
1580; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 1, #1
1581; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
1582; EG-NEXT:    ALU clause starting at 10:
1583; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1584; EG-NEXT:    ALU clause starting at 11:
1585; EG-NEXT:     BFE_INT * T0.W, T1.X, 0.0, literal.x,
1586; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1587; EG-NEXT:     INT_TO_FLT * T0.Y, PV.W,
1588; EG-NEXT:     BFE_INT T1.W, T0.X, 0.0, literal.x,
1589; EG-NEXT:     RECIP_IEEE * T0.X, PS,
1590; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1591; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1592; EG-NEXT:     MUL_IEEE * T2.W, PS, T0.X,
1593; EG-NEXT:     TRUNC T2.W, PV.W,
1594; EG-NEXT:     XOR_INT * T0.W, T1.W, T0.W,
1595; EG-NEXT:     ASHR T0.W, PS, literal.x,
1596; EG-NEXT:     MULADD_IEEE * T1.W, -PV.W, T0.Y, T0.Z,
1597; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1598; EG-NEXT:     TRUNC T0.Z, T2.W,
1599; EG-NEXT:     SETGE T1.W, |PS|, |T0.Y|,
1600; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1601; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1602; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1603; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1604; EG-NEXT:     BFE_INT T0.X, PV.W, 0.0, literal.x,
1605; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1606; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
1607  %den_ptr = getelementptr i8, i8 addrspace(1)* %in, i8 1
1608  %num = load i8, i8 addrspace(1) * %in
1609  %den = load i8, i8 addrspace(1) * %den_ptr
1610  %result = sdiv i8 %num, %den
1611  %result.ext = sext i8 %result to i32
1612  store i32 %result.ext, i32 addrspace(1)* %out
1613  ret void
1614}
1615
1616define amdgpu_kernel void @v_sdiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) {
1617; GCN-LABEL: v_sdiv_i23:
1618; GCN:       ; %bb.0:
1619; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
1620; GCN-NEXT:    s_mov_b32 s3, 0xf000
1621; GCN-NEXT:    s_mov_b32 s2, -1
1622; GCN-NEXT:    s_mov_b32 s10, s2
1623; GCN-NEXT:    s_mov_b32 s11, s3
1624; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1625; GCN-NEXT:    s_mov_b32 s8, s6
1626; GCN-NEXT:    s_mov_b32 s9, s7
1627; GCN-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
1628; GCN-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:2
1629; GCN-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1630; GCN-NEXT:    buffer_load_ubyte v3, off, s[8:11], 0 offset:6
1631; GCN-NEXT:    s_mov_b32 s0, s4
1632; GCN-NEXT:    s_mov_b32 s1, s5
1633; GCN-NEXT:    s_waitcnt vmcnt(2)
1634; GCN-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1635; GCN-NEXT:    v_or_b32_e32 v0, v0, v1
1636; GCN-NEXT:    s_waitcnt vmcnt(0)
1637; GCN-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
1638; GCN-NEXT:    v_or_b32_e32 v2, v2, v3
1639; GCN-NEXT:    v_bfe_i32 v2, v2, 0, 23
1640; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v2
1641; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
1642; GCN-NEXT:    v_cvt_f32_i32_e32 v1, v0
1643; GCN-NEXT:    v_xor_b32_e32 v0, v0, v2
1644; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v3
1645; GCN-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1646; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
1647; GCN-NEXT:    v_mul_f32_e32 v2, v1, v4
1648; GCN-NEXT:    v_trunc_f32_e32 v2, v2
1649; GCN-NEXT:    v_mad_f32 v1, -v2, v3, v1
1650; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
1651; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
1652; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1653; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
1654; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
1655; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1656; GCN-NEXT:    s_endpgm
1657;
1658; TONGA-LABEL: v_sdiv_i23:
1659; TONGA:       ; %bb.0:
1660; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1661; TONGA-NEXT:    s_mov_b32 s3, 0xf000
1662; TONGA-NEXT:    s_mov_b32 s2, -1
1663; TONGA-NEXT:    s_mov_b32 s10, s2
1664; TONGA-NEXT:    s_mov_b32 s11, s3
1665; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1666; TONGA-NEXT:    s_mov_b32 s8, s6
1667; TONGA-NEXT:    s_mov_b32 s9, s7
1668; TONGA-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
1669; TONGA-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:2
1670; TONGA-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1671; TONGA-NEXT:    buffer_load_ubyte v3, off, s[8:11], 0 offset:6
1672; TONGA-NEXT:    s_mov_b32 s0, s4
1673; TONGA-NEXT:    s_mov_b32 s1, s5
1674; TONGA-NEXT:    s_waitcnt vmcnt(2)
1675; TONGA-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1676; TONGA-NEXT:    v_or_b32_e32 v0, v0, v1
1677; TONGA-NEXT:    s_waitcnt vmcnt(0)
1678; TONGA-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
1679; TONGA-NEXT:    v_or_b32_e32 v2, v2, v3
1680; TONGA-NEXT:    v_bfe_i32 v2, v2, 0, 23
1681; TONGA-NEXT:    v_cvt_f32_i32_e32 v3, v2
1682; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
1683; TONGA-NEXT:    v_cvt_f32_i32_e32 v1, v0
1684; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v2
1685; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v3
1686; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1687; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
1688; TONGA-NEXT:    v_mul_f32_e32 v2, v1, v4
1689; TONGA-NEXT:    v_trunc_f32_e32 v2, v2
1690; TONGA-NEXT:    v_mad_f32 v1, -v2, v3, v1
1691; TONGA-NEXT:    v_cvt_i32_f32_e32 v2, v2
1692; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
1693; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1694; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v2, v0
1695; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
1696; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1697; TONGA-NEXT:    s_endpgm
1698;
1699; GFX9-LABEL: v_sdiv_i23:
1700; GFX9:       ; %bb.0:
1701; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1702; GFX9-NEXT:    s_mov_b32 s3, 0xf000
1703; GFX9-NEXT:    s_mov_b32 s2, -1
1704; GFX9-NEXT:    s_mov_b32 s10, s2
1705; GFX9-NEXT:    s_mov_b32 s11, s3
1706; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1707; GFX9-NEXT:    s_mov_b32 s8, s6
1708; GFX9-NEXT:    s_mov_b32 s9, s7
1709; GFX9-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
1710; GFX9-NEXT:    buffer_load_ubyte v1, off, s[8:11], 0 offset:2
1711; GFX9-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1712; GFX9-NEXT:    buffer_load_ubyte v3, off, s[8:11], 0 offset:6
1713; GFX9-NEXT:    s_mov_b32 s0, s4
1714; GFX9-NEXT:    s_mov_b32 s1, s5
1715; GFX9-NEXT:    s_waitcnt vmcnt(2)
1716; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
1717; GFX9-NEXT:    v_or_b32_e32 v0, v0, v1
1718; GFX9-NEXT:    s_waitcnt vmcnt(0)
1719; GFX9-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
1720; GFX9-NEXT:    v_or_b32_e32 v2, v2, v3
1721; GFX9-NEXT:    v_bfe_i32 v2, v2, 0, 23
1722; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v2
1723; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 23
1724; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v0
1725; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v2
1726; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v3
1727; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 30, v0
1728; GFX9-NEXT:    v_or_b32_e32 v0, 1, v0
1729; GFX9-NEXT:    v_mul_f32_e32 v2, v1, v4
1730; GFX9-NEXT:    v_trunc_f32_e32 v2, v2
1731; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v2
1732; GFX9-NEXT:    v_mad_f32 v1, -v2, v3, v1
1733; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
1734; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
1735; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1736; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 23
1737; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1738; GFX9-NEXT:    s_endpgm
1739;
1740; EG-LABEL: v_sdiv_i23:
1741; EG:       ; %bb.0:
1742; EG-NEXT:    ALU 0, @14, KC0[CB0:0-32], KC1[]
1743; EG-NEXT:    TEX 3 @6
1744; EG-NEXT:    ALU 33, @15, KC0[CB0:0-32], KC1[]
1745; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1746; EG-NEXT:    CF_END
1747; EG-NEXT:    PAD
1748; EG-NEXT:    Fetch clause starting at 6:
1749; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 6, #1
1750; EG-NEXT:     VTX_READ_16 T2.X, T0.X, 0, #1
1751; EG-NEXT:     VTX_READ_8 T3.X, T0.X, 2, #1
1752; EG-NEXT:     VTX_READ_16 T0.X, T0.X, 4, #1
1753; EG-NEXT:    ALU clause starting at 14:
1754; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1755; EG-NEXT:    ALU clause starting at 15:
1756; EG-NEXT:     LSHL * T0.W, T1.X, literal.x,
1757; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1758; EG-NEXT:     OR_INT T0.W, T0.X, PV.W,
1759; EG-NEXT:     LSHL * T1.W, T3.X, literal.x,
1760; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1761; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1762; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1763; EG-NEXT:     ASHR T0.W, PV.W, literal.x,
1764; EG-NEXT:     OR_INT * T1.W, T2.X, T1.W,
1765; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1766; EG-NEXT:     LSHL T1.W, PS, literal.x,
1767; EG-NEXT:     INT_TO_FLT * T0.X, PV.W,
1768; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1769; EG-NEXT:     ASHR T1.W, PV.W, literal.x,
1770; EG-NEXT:     RECIP_IEEE * T0.Y, PS,
1771; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1772; EG-NEXT:     INT_TO_FLT * T0.Z, PV.W,
1773; EG-NEXT:     MUL_IEEE * T2.W, PS, T0.Y,
1774; EG-NEXT:     TRUNC T2.W, PV.W,
1775; EG-NEXT:     XOR_INT * T0.W, T1.W, T0.W,
1776; EG-NEXT:     ASHR T0.W, PS, literal.x,
1777; EG-NEXT:     MULADD_IEEE * T1.W, -PV.W, T0.X, T0.Z,
1778; EG-NEXT:    30(4.203895e-44), 0(0.000000e+00)
1779; EG-NEXT:     TRUNC T0.Z, T2.W,
1780; EG-NEXT:     SETGE T1.W, |PS|, |T0.X|,
1781; EG-NEXT:     OR_INT * T0.W, PV.W, 1,
1782; EG-NEXT:     CNDE T0.W, PV.W, 0.0, PS,
1783; EG-NEXT:     FLT_TO_INT * T1.W, PV.Z,
1784; EG-NEXT:     ADD_INT * T0.W, PS, PV.W,
1785; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1786; EG-NEXT:    9(1.261169e-44), 0(0.000000e+00)
1787; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
1788; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1789; EG-NEXT:    9(1.261169e-44), 2(2.802597e-45)
1790  %den_ptr = getelementptr i23, i23 addrspace(1)* %in, i23 1
1791  %num = load i23, i23 addrspace(1) * %in
1792  %den = load i23, i23 addrspace(1) * %den_ptr
1793  %result = sdiv i23 %num, %den
1794  %result.ext = sext i23 %result to i32
1795  store i32 %result.ext, i32 addrspace(1)* %out
1796  ret void
1797}
1798
1799define amdgpu_kernel void @v_sdiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) {
1800; GCN-LABEL: v_sdiv_i24:
1801; GCN:       ; %bb.0:
1802; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
1803; GCN-NEXT:    s_mov_b32 s3, 0xf000
1804; GCN-NEXT:    s_mov_b32 s2, -1
1805; GCN-NEXT:    s_mov_b32 s10, s2
1806; GCN-NEXT:    s_mov_b32 s11, s3
1807; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1808; GCN-NEXT:    s_mov_b32 s8, s6
1809; GCN-NEXT:    s_mov_b32 s9, s7
1810; GCN-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
1811; GCN-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0 offset:2
1812; GCN-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1813; GCN-NEXT:    buffer_load_sbyte v3, off, s[8:11], 0 offset:6
1814; GCN-NEXT:    s_mov_b32 s0, s4
1815; GCN-NEXT:    s_mov_b32 s1, s5
1816; GCN-NEXT:    s_waitcnt vmcnt(0)
1817; GCN-NEXT:    v_lshlrev_b32_e32 v4, 16, v3
1818; GCN-NEXT:    v_or_b32_e32 v2, v2, v4
1819; GCN-NEXT:    v_cvt_f32_i32_e32 v2, v2
1820; GCN-NEXT:    v_lshlrev_b32_e32 v4, 16, v1
1821; GCN-NEXT:    v_or_b32_e32 v0, v0, v4
1822; GCN-NEXT:    v_cvt_f32_i32_e32 v0, v0
1823; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1824; GCN-NEXT:    v_xor_b32_e32 v1, v1, v3
1825; GCN-NEXT:    v_ashrrev_i32_e32 v1, 30, v1
1826; GCN-NEXT:    v_or_b32_e32 v1, 1, v1
1827; GCN-NEXT:    v_mul_f32_e32 v3, v0, v4
1828; GCN-NEXT:    v_trunc_f32_e32 v3, v3
1829; GCN-NEXT:    v_mad_f32 v0, -v3, v2, v0
1830; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v3
1831; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, |v2|
1832; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
1833; GCN-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
1834; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
1835; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1836; GCN-NEXT:    s_endpgm
1837;
1838; TONGA-LABEL: v_sdiv_i24:
1839; TONGA:       ; %bb.0:
1840; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1841; TONGA-NEXT:    s_mov_b32 s3, 0xf000
1842; TONGA-NEXT:    s_mov_b32 s2, -1
1843; TONGA-NEXT:    s_mov_b32 s10, s2
1844; TONGA-NEXT:    s_mov_b32 s11, s3
1845; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
1846; TONGA-NEXT:    s_mov_b32 s8, s6
1847; TONGA-NEXT:    s_mov_b32 s9, s7
1848; TONGA-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
1849; TONGA-NEXT:    buffer_load_sbyte v1, off, s[8:11], 0 offset:2
1850; TONGA-NEXT:    buffer_load_ushort v2, off, s[8:11], 0 offset:4
1851; TONGA-NEXT:    buffer_load_sbyte v3, off, s[8:11], 0 offset:6
1852; TONGA-NEXT:    s_mov_b32 s0, s4
1853; TONGA-NEXT:    s_mov_b32 s1, s5
1854; TONGA-NEXT:    s_waitcnt vmcnt(0)
1855; TONGA-NEXT:    v_lshlrev_b32_e32 v4, 16, v3
1856; TONGA-NEXT:    v_or_b32_e32 v2, v2, v4
1857; TONGA-NEXT:    v_cvt_f32_i32_e32 v2, v2
1858; TONGA-NEXT:    v_lshlrev_b32_e32 v4, 16, v1
1859; TONGA-NEXT:    v_or_b32_e32 v0, v0, v4
1860; TONGA-NEXT:    v_cvt_f32_i32_e32 v0, v0
1861; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1862; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v3
1863; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 30, v1
1864; TONGA-NEXT:    v_or_b32_e32 v1, 1, v1
1865; TONGA-NEXT:    v_mul_f32_e32 v3, v0, v4
1866; TONGA-NEXT:    v_trunc_f32_e32 v3, v3
1867; TONGA-NEXT:    v_mad_f32 v0, -v3, v2, v0
1868; TONGA-NEXT:    v_cvt_i32_f32_e32 v3, v3
1869; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, |v2|
1870; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
1871; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v3, v0
1872; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 24
1873; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1874; TONGA-NEXT:    s_endpgm
1875;
1876; GFX9-LABEL: v_sdiv_i24:
1877; GFX9:       ; %bb.0:
1878; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
1879; GFX9-NEXT:    s_mov_b32 s3, 0xf000
1880; GFX9-NEXT:    s_mov_b32 s2, -1
1881; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
1882; GFX9-NEXT:    s_mov_b32 s0, s4
1883; GFX9-NEXT:    s_mov_b32 s1, s5
1884; GFX9-NEXT:    s_mov_b32 s4, s6
1885; GFX9-NEXT:    s_mov_b32 s5, s7
1886; GFX9-NEXT:    s_mov_b32 s6, s2
1887; GFX9-NEXT:    s_mov_b32 s7, s3
1888; GFX9-NEXT:    buffer_load_ushort v0, off, s[4:7], 0
1889; GFX9-NEXT:    buffer_load_sbyte v1, off, s[4:7], 0 offset:2
1890; GFX9-NEXT:    buffer_load_ushort v2, off, s[4:7], 0 offset:4
1891; GFX9-NEXT:    buffer_load_sbyte v3, off, s[4:7], 0 offset:6
1892; GFX9-NEXT:    s_waitcnt vmcnt(0)
1893; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v3
1894; GFX9-NEXT:    v_or_b32_e32 v2, v2, v4
1895; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v2
1896; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 16, v1
1897; GFX9-NEXT:    v_or_b32_e32 v0, v0, v4
1898; GFX9-NEXT:    v_cvt_f32_i32_e32 v0, v0
1899; GFX9-NEXT:    v_rcp_iflag_f32_e32 v4, v2
1900; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v3
1901; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 30, v1
1902; GFX9-NEXT:    v_or_b32_e32 v1, 1, v1
1903; GFX9-NEXT:    v_mul_f32_e32 v3, v0, v4
1904; GFX9-NEXT:    v_trunc_f32_e32 v3, v3
1905; GFX9-NEXT:    v_cvt_i32_f32_e32 v4, v3
1906; GFX9-NEXT:    v_mad_f32 v0, -v3, v2, v0
1907; GFX9-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, |v2|
1908; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
1909; GFX9-NEXT:    v_add_u32_e32 v0, v4, v0
1910; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 24
1911; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
1912; GFX9-NEXT:    s_endpgm
1913;
1914; EG-LABEL: v_sdiv_i24:
1915; EG:       ; %bb.0:
1916; EG-NEXT:    ALU 0, @14, KC0[CB0:0-32], KC1[]
1917; EG-NEXT:    TEX 3 @6
1918; EG-NEXT:    ALU 39, @15, KC0[CB0:0-32], KC1[]
1919; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
1920; EG-NEXT:    CF_END
1921; EG-NEXT:    PAD
1922; EG-NEXT:    Fetch clause starting at 6:
1923; EG-NEXT:     VTX_READ_8 T1.X, T0.X, 6, #1
1924; EG-NEXT:     VTX_READ_16 T2.X, T0.X, 0, #1
1925; EG-NEXT:     VTX_READ_8 T3.X, T0.X, 2, #1
1926; EG-NEXT:     VTX_READ_16 T0.X, T0.X, 4, #1
1927; EG-NEXT:    ALU clause starting at 14:
1928; EG-NEXT:     MOV * T0.X, KC0[2].Z,
1929; EG-NEXT:    ALU clause starting at 15:
1930; EG-NEXT:     BFE_INT * T0.W, T1.X, 0.0, literal.x,
1931; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1932; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1933; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1934; EG-NEXT:     OR_INT * T0.W, T0.X, PV.W,
1935; EG-NEXT:     SETGT_INT * T1.W, 0.0, PV.W,
1936; EG-NEXT:     BFE_INT T2.W, T3.X, 0.0, literal.x,
1937; EG-NEXT:     ADD_INT * T0.W, T0.W, PV.W,
1938; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1939; EG-NEXT:     LSHL T2.W, PV.W, literal.x,
1940; EG-NEXT:     XOR_INT * T0.W, PS, T1.W,
1941; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
1942; EG-NEXT:     SUB_INT T0.Z, 0.0, PS,
1943; EG-NEXT:     OR_INT T2.W, T2.X, PV.W,
1944; EG-NEXT:     RECIP_UINT * T0.X, PS,
1945; EG-NEXT:     SETGT_INT T3.W, 0.0, PV.W,
1946; EG-NEXT:     MULLO_INT * T0.Y, PV.Z, PS,
1947; EG-NEXT:     ADD_INT T2.W, T2.W, PV.W,
1948; EG-NEXT:     MULHI * T0.Y, T0.X, PS,
1949; EG-NEXT:     ADD_INT T4.W, T0.X, PS,
1950; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
1951; EG-NEXT:     MULHI * T0.X, PS, PV.W,
1952; EG-NEXT:     MULLO_INT * T0.Y, PS, T0.W,
1953; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
1954; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
1955; EG-NEXT:     SETGE_UINT T4.W, PV.W, T0.W,
1956; EG-NEXT:     SUB_INT * T5.W, PV.W, T0.W,
1957; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
1958; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
1959; EG-NEXT:     ADD_INT T5.W, PS, 1,
1960; EG-NEXT:     SETGE_UINT * T0.W, PV.W, T0.W,
1961; EG-NEXT:     CNDE_INT T0.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
1962; EG-NEXT:     XOR_INT * T1.W, T3.W, T1.W,
1963; EG-NEXT:     XOR_INT * T0.W, PV.W, PS,
1964; EG-NEXT:     SUB_INT * T0.W, PV.W, T1.W,
1965; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
1966; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1967; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
1968; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
1969; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
1970  %den_ptr = getelementptr i24, i24 addrspace(1)* %in, i24 1
1971  %num = load i24, i24 addrspace(1) * %in
1972  %den = load i24, i24 addrspace(1) * %den_ptr
1973  %result = sdiv i24 %num, %den
1974  %result.ext = sext i24 %result to i32
1975  store i32 %result.ext, i32 addrspace(1)* %out
1976  ret void
1977}
1978
1979define amdgpu_kernel void @v_sdiv_i25(i32 addrspace(1)* %out, i25 addrspace(1)* %in) {
1980; GCN-LABEL: v_sdiv_i25:
1981; GCN:       ; %bb.0:
1982; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
1983; GCN-NEXT:    s_mov_b32 s7, 0xf000
1984; GCN-NEXT:    s_mov_b32 s6, -1
1985; GCN-NEXT:    s_mov_b32 s10, s6
1986; GCN-NEXT:    s_mov_b32 s11, s7
1987; GCN-NEXT:    s_waitcnt lgkmcnt(0)
1988; GCN-NEXT:    s_mov_b32 s8, s2
1989; GCN-NEXT:    s_mov_b32 s9, s3
1990; GCN-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
1991; GCN-NEXT:    s_mov_b32 s4, s0
1992; GCN-NEXT:    s_mov_b32 s5, s1
1993; GCN-NEXT:    s_waitcnt vmcnt(0)
1994; GCN-NEXT:    v_bfe_i32 v2, v1, 0, 25
1995; GCN-NEXT:    v_bfe_i32 v1, v1, 24, 1
1996; GCN-NEXT:    v_add_i32_e32 v2, vcc, v1, v2
1997; GCN-NEXT:    v_xor_b32_e32 v2, v2, v1
1998; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v2
1999; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
2000; GCN-NEXT:    v_bfe_i32 v5, v0, 0, 25
2001; GCN-NEXT:    v_bfe_i32 v0, v0, 24, 1
2002; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2003; GCN-NEXT:    v_add_i32_e32 v5, vcc, v0, v5
2004; GCN-NEXT:    v_xor_b32_e32 v5, v5, v0
2005; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
2006; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2007; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
2008; GCN-NEXT:    v_mul_lo_u32 v4, v4, v3
2009; GCN-NEXT:    v_mul_hi_u32 v4, v3, v4
2010; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
2011; GCN-NEXT:    v_mul_hi_u32 v3, v5, v3
2012; GCN-NEXT:    v_mul_lo_u32 v1, v3, v2
2013; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
2014; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v1, v5
2015; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
2016; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v4, s[0:1]
2017; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v2, v1
2018; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
2019; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
2020; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
2021; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
2022; GCN-NEXT:    v_xor_b32_e32 v1, v1, v0
2023; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v0, v1
2024; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 25
2025; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2026; GCN-NEXT:    s_endpgm
2027;
2028; TONGA-LABEL: v_sdiv_i25:
2029; TONGA:       ; %bb.0:
2030; TONGA-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
2031; TONGA-NEXT:    s_mov_b32 s7, 0xf000
2032; TONGA-NEXT:    s_mov_b32 s6, -1
2033; TONGA-NEXT:    s_mov_b32 s10, s6
2034; TONGA-NEXT:    s_mov_b32 s11, s7
2035; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
2036; TONGA-NEXT:    s_mov_b32 s8, s2
2037; TONGA-NEXT:    s_mov_b32 s9, s3
2038; TONGA-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2039; TONGA-NEXT:    s_mov_b32 s4, s0
2040; TONGA-NEXT:    s_mov_b32 s5, s1
2041; TONGA-NEXT:    s_waitcnt vmcnt(0)
2042; TONGA-NEXT:    v_bfe_i32 v2, v1, 0, 25
2043; TONGA-NEXT:    v_bfe_i32 v1, v1, 24, 1
2044; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v1, v2
2045; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v1
2046; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v2
2047; TONGA-NEXT:    v_sub_u32_e32 v4, vcc, 0, v2
2048; TONGA-NEXT:    v_bfe_i32 v5, v0, 0, 25
2049; TONGA-NEXT:    v_bfe_i32 v0, v0, 24, 1
2050; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2051; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v0, v5
2052; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v0
2053; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
2054; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2055; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
2056; TONGA-NEXT:    v_mul_lo_u32 v4, v4, v3
2057; TONGA-NEXT:    v_mul_hi_u32 v4, v3, v4
2058; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v4, v3
2059; TONGA-NEXT:    v_mul_hi_u32 v3, v5, v3
2060; TONGA-NEXT:    v_mul_lo_u32 v1, v3, v2
2061; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
2062; TONGA-NEXT:    v_subrev_u32_e32 v1, vcc, v1, v5
2063; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v1, v2
2064; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v4, s[0:1]
2065; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v2, v1
2066; TONGA-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
2067; TONGA-NEXT:    v_add_u32_e32 v4, vcc, 1, v3
2068; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
2069; TONGA-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc
2070; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v0
2071; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v0, v1
2072; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 25
2073; TONGA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
2074; TONGA-NEXT:    s_endpgm
2075;
2076; GFX9-LABEL: v_sdiv_i25:
2077; GFX9:       ; %bb.0:
2078; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
2079; GFX9-NEXT:    s_mov_b32 s3, 0xf000
2080; GFX9-NEXT:    s_mov_b32 s2, -1
2081; GFX9-NEXT:    s_mov_b32 s10, s2
2082; GFX9-NEXT:    s_mov_b32 s11, s3
2083; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2084; GFX9-NEXT:    s_mov_b32 s8, s6
2085; GFX9-NEXT:    s_mov_b32 s9, s7
2086; GFX9-NEXT:    buffer_load_dwordx2 v[0:1], off, s[8:11], 0
2087; GFX9-NEXT:    s_mov_b32 s0, s4
2088; GFX9-NEXT:    s_mov_b32 s1, s5
2089; GFX9-NEXT:    s_waitcnt vmcnt(0)
2090; GFX9-NEXT:    v_bfe_i32 v2, v1, 0, 25
2091; GFX9-NEXT:    v_bfe_i32 v1, v1, 24, 1
2092; GFX9-NEXT:    v_add_u32_e32 v2, v2, v1
2093; GFX9-NEXT:    v_xor_b32_e32 v2, v2, v1
2094; GFX9-NEXT:    v_cvt_f32_u32_e32 v3, v2
2095; GFX9-NEXT:    v_sub_u32_e32 v4, 0, v2
2096; GFX9-NEXT:    v_bfe_i32 v5, v0, 0, 25
2097; GFX9-NEXT:    v_bfe_i32 v0, v0, 24, 1
2098; GFX9-NEXT:    v_rcp_iflag_f32_e32 v3, v3
2099; GFX9-NEXT:    v_add_u32_e32 v5, v5, v0
2100; GFX9-NEXT:    v_xor_b32_e32 v5, v5, v0
2101; GFX9-NEXT:    v_xor_b32_e32 v0, v0, v1
2102; GFX9-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
2103; GFX9-NEXT:    v_cvt_u32_f32_e32 v3, v3
2104; GFX9-NEXT:    v_mul_lo_u32 v4, v4, v3
2105; GFX9-NEXT:    v_mul_hi_u32 v4, v3, v4
2106; GFX9-NEXT:    v_add_u32_e32 v3, v3, v4
2107; GFX9-NEXT:    v_mul_hi_u32 v3, v5, v3
2108; GFX9-NEXT:    v_mul_lo_u32 v4, v3, v2
2109; GFX9-NEXT:    v_add_u32_e32 v1, 1, v3
2110; GFX9-NEXT:    v_sub_u32_e32 v4, v5, v4
2111; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v2
2112; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
2113; GFX9-NEXT:    v_sub_u32_e32 v3, v4, v2
2114; GFX9-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
2115; GFX9-NEXT:    v_add_u32_e32 v4, 1, v1
2116; GFX9-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v2
2117; GFX9-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
2118; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v0
2119; GFX9-NEXT:    v_sub_u32_e32 v0, v1, v0
2120; GFX9-NEXT:    v_bfe_i32 v0, v0, 0, 25
2121; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], 0
2122; GFX9-NEXT:    s_endpgm
2123;
2124; EG-LABEL: v_sdiv_i25:
2125; EG:       ; %bb.0:
2126; EG-NEXT:    ALU 1, @10, KC0[CB0:0-32], KC1[]
2127; EG-NEXT:    TEX 1 @6
2128; EG-NEXT:    ALU 37, @12, KC0[CB0:0-32], KC1[]
2129; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
2130; EG-NEXT:    CF_END
2131; EG-NEXT:    PAD
2132; EG-NEXT:    Fetch clause starting at 6:
2133; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 4, #1
2134; EG-NEXT:     VTX_READ_32 T1.X, T1.X, 0, #1
2135; EG-NEXT:    ALU clause starting at 10:
2136; EG-NEXT:     MOV * T0.X, KC0[2].Z,
2137; EG-NEXT:     MOV * T1.X, PV.X,
2138; EG-NEXT:    ALU clause starting at 12:
2139; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
2140; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2141; EG-NEXT:     ASHR * T0.W, PV.W, literal.x,
2142; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2143; EG-NEXT:     SETGT_INT * T1.W, 0.0, PV.W,
2144; EG-NEXT:     ADD_INT T0.W, T0.W, PV.W,
2145; EG-NEXT:     LSHL * T2.W, T1.X, literal.x,
2146; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2147; EG-NEXT:     XOR_INT * T0.W, PV.W, T1.W,
2148; EG-NEXT:     SUB_INT T0.Z, 0.0, PV.W,
2149; EG-NEXT:     ASHR T2.W, T2.W, literal.x,
2150; EG-NEXT:     RECIP_UINT * T0.X, PV.W,
2151; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2152; EG-NEXT:     SETGT_INT T3.W, 0.0, PV.W,
2153; EG-NEXT:     MULLO_INT * T0.Y, PV.Z, PS,
2154; EG-NEXT:     ADD_INT T2.W, T2.W, PV.W,
2155; EG-NEXT:     MULHI * T0.Y, T0.X, PS,
2156; EG-NEXT:     ADD_INT T4.W, T0.X, PS,
2157; EG-NEXT:     XOR_INT * T2.W, PV.W, T3.W,
2158; EG-NEXT:     MULHI * T0.X, PS, PV.W,
2159; EG-NEXT:     MULLO_INT * T0.Y, PS, T0.W,
2160; EG-NEXT:     SUB_INT * T2.W, T2.W, PS,
2161; EG-NEXT:     ADD_INT T0.Z, T0.X, 1,
2162; EG-NEXT:     SETGE_UINT T4.W, PV.W, T0.W,
2163; EG-NEXT:     SUB_INT * T5.W, PV.W, T0.W,
2164; EG-NEXT:     CNDE_INT T2.W, PV.W, T2.W, PS,
2165; EG-NEXT:     CNDE_INT * T4.W, PV.W, T0.X, PV.Z,
2166; EG-NEXT:     ADD_INT T5.W, PS, 1,
2167; EG-NEXT:     SETGE_UINT * T0.W, PV.W, T0.W,
2168; EG-NEXT:     CNDE_INT T0.W, PS, T4.W, PV.W, BS:VEC_102/SCL_221
2169; EG-NEXT:     XOR_INT * T1.W, T3.W, T1.W,
2170; EG-NEXT:     XOR_INT * T0.W, PV.W, PS,
2171; EG-NEXT:     SUB_INT * T0.W, PV.W, T1.W,
2172; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
2173; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
2174; EG-NEXT:     ASHR T0.X, PV.W, literal.x,
2175; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
2176; EG-NEXT:    7(9.809089e-45), 2(2.802597e-45)
2177  %den_ptr = getelementptr i25, i25 addrspace(1)* %in, i25 1
2178  %num = load i25, i25 addrspace(1) * %in
2179  %den = load i25, i25 addrspace(1) * %den_ptr
2180  %result = sdiv i25 %num, %den
2181  %result.ext = sext i25 %result to i32
2182  store i32 %result.ext, i32 addrspace(1)* %out
2183  ret void
2184}
2185
2186; Tests for 64-bit divide bypass.
2187; define amdgpu_kernel void @test_get_quotient(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2188;   %result = sdiv i64 %a, %b
2189;   store i64 %result, i64 addrspace(1)* %out, align 8
2190;   ret void
2191; }
2192
2193; define amdgpu_kernel void @test_get_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2194;   %result = srem i64 %a, %b
2195;   store i64 %result, i64 addrspace(1)* %out, align 8
2196;   ret void
2197; }
2198
2199; define amdgpu_kernel void @test_get_quotient_and_remainder(i64 addrspace(1)* %out, i64 %a, i64 %b) nounwind {
2200;   %resultdiv = sdiv i64 %a, %b
2201;   %resultrem = srem i64 %a, %b
2202;   %result = add i64 %resultdiv, %resultrem
2203;   store i64 %result, i64 addrspace(1)* %out, align 8
2204;   ret void
2205; }
2206
2207define amdgpu_kernel void @scalarize_mulhs_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) {
2208; GCN-LABEL: scalarize_mulhs_4xi32:
2209; GCN:       ; %bb.0:
2210; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
2211; GCN-NEXT:    s_mov_b32 s3, 0xf000
2212; GCN-NEXT:    s_mov_b32 s2, -1
2213; GCN-NEXT:    s_waitcnt lgkmcnt(0)
2214; GCN-NEXT:    s_mov_b32 s0, s4
2215; GCN-NEXT:    s_mov_b32 s1, s5
2216; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
2217; GCN-NEXT:    s_mov_b32 s4, 0x1389c755
2218; GCN-NEXT:    s_mov_b32 s0, s6
2219; GCN-NEXT:    s_mov_b32 s1, s7
2220; GCN-NEXT:    s_waitcnt vmcnt(0)
2221; GCN-NEXT:    v_mul_hi_i32 v0, v0, s4
2222; GCN-NEXT:    v_mul_hi_i32 v1, v1, s4
2223; GCN-NEXT:    v_mul_hi_i32 v2, v2, s4
2224; GCN-NEXT:    v_mul_hi_i32 v3, v3, s4
2225; GCN-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2226; GCN-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2227; GCN-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2228; GCN-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2229; GCN-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2230; GCN-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2231; GCN-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2232; GCN-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2233; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
2234; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v5
2235; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
2236; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
2237; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
2238; GCN-NEXT:    s_endpgm
2239;
2240; TONGA-LABEL: scalarize_mulhs_4xi32:
2241; TONGA:       ; %bb.0:
2242; TONGA-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
2243; TONGA-NEXT:    s_mov_b32 s3, 0xf000
2244; TONGA-NEXT:    s_mov_b32 s2, -1
2245; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
2246; TONGA-NEXT:    s_mov_b32 s0, s4
2247; TONGA-NEXT:    s_mov_b32 s1, s5
2248; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
2249; TONGA-NEXT:    s_mov_b32 s4, 0x1389c755
2250; TONGA-NEXT:    s_mov_b32 s0, s6
2251; TONGA-NEXT:    s_mov_b32 s1, s7
2252; TONGA-NEXT:    s_waitcnt vmcnt(0)
2253; TONGA-NEXT:    v_mul_hi_i32 v0, v0, s4
2254; TONGA-NEXT:    v_mul_hi_i32 v1, v1, s4
2255; TONGA-NEXT:    v_mul_hi_i32 v2, v2, s4
2256; TONGA-NEXT:    v_mul_hi_i32 v3, v3, s4
2257; TONGA-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2258; TONGA-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2259; TONGA-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2260; TONGA-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2261; TONGA-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2262; TONGA-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2263; TONGA-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2264; TONGA-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2265; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v4
2266; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v1, v5
2267; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v2, v6
2268; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v3, v7
2269; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
2270; TONGA-NEXT:    s_endpgm
2271;
2272; GFX9-LABEL: scalarize_mulhs_4xi32:
2273; GFX9:       ; %bb.0:
2274; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
2275; GFX9-NEXT:    s_mov_b32 s3, 0xf000
2276; GFX9-NEXT:    s_mov_b32 s2, -1
2277; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
2278; GFX9-NEXT:    s_mov_b32 s0, s4
2279; GFX9-NEXT:    s_mov_b32 s1, s5
2280; GFX9-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
2281; GFX9-NEXT:    s_mov_b32 s4, 0x1389c755
2282; GFX9-NEXT:    s_mov_b32 s0, s6
2283; GFX9-NEXT:    s_mov_b32 s1, s7
2284; GFX9-NEXT:    s_waitcnt vmcnt(0)
2285; GFX9-NEXT:    v_mul_hi_i32 v0, v0, s4
2286; GFX9-NEXT:    v_mul_hi_i32 v1, v1, s4
2287; GFX9-NEXT:    v_mul_hi_i32 v2, v2, s4
2288; GFX9-NEXT:    v_mul_hi_i32 v3, v3, s4
2289; GFX9-NEXT:    v_lshrrev_b32_e32 v4, 31, v0
2290; GFX9-NEXT:    v_ashrrev_i32_e32 v0, 12, v0
2291; GFX9-NEXT:    v_lshrrev_b32_e32 v5, 31, v1
2292; GFX9-NEXT:    v_ashrrev_i32_e32 v1, 12, v1
2293; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 31, v2
2294; GFX9-NEXT:    v_ashrrev_i32_e32 v2, 12, v2
2295; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 31, v3
2296; GFX9-NEXT:    v_ashrrev_i32_e32 v3, 12, v3
2297; GFX9-NEXT:    v_add_u32_e32 v0, v0, v4
2298; GFX9-NEXT:    v_add_u32_e32 v1, v1, v5
2299; GFX9-NEXT:    v_add_u32_e32 v2, v2, v6
2300; GFX9-NEXT:    v_add_u32_e32 v3, v3, v7
2301; GFX9-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
2302; GFX9-NEXT:    s_endpgm
2303;
2304; EG-LABEL: scalarize_mulhs_4xi32:
2305; EG:       ; %bb.0:
2306; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
2307; EG-NEXT:    TEX 0 @6
2308; EG-NEXT:    ALU 25, @9, KC0[CB0:0-32], KC1[]
2309; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
2310; EG-NEXT:    CF_END
2311; EG-NEXT:    PAD
2312; EG-NEXT:    Fetch clause starting at 6:
2313; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
2314; EG-NEXT:    ALU clause starting at 8:
2315; EG-NEXT:     MOV * T0.X, KC0[2].Y,
2316; EG-NEXT:    ALU clause starting at 9:
2317; EG-NEXT:     MULHI_INT * T0.W, T0.W, literal.x,
2318; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2319; EG-NEXT:     ASHR T1.Z, PS, literal.x,
2320; EG-NEXT:     LSHR T0.W, PS, literal.y,
2321; EG-NEXT:     MULHI_INT * T0.Z, T0.Z, literal.z,
2322; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2323; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2324; EG-NEXT:     ASHR T1.Y, PS, literal.x,
2325; EG-NEXT:     LSHR T0.Z, PS, literal.y,
2326; EG-NEXT:     ADD_INT T0.W, PV.Z, PV.W,
2327; EG-NEXT:     MULHI_INT * T0.Y, T0.Y, literal.z,
2328; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2329; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2330; EG-NEXT:     ASHR T2.Y, PS, literal.x,
2331; EG-NEXT:     ADD_INT T0.Z, PV.Y, PV.Z,
2332; EG-NEXT:     LSHR T1.W, PS, literal.y,
2333; EG-NEXT:     MULHI_INT * T0.X, T0.X, literal.z,
2334; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2335; EG-NEXT:    327796565(3.478022e-27), 0(0.000000e+00)
2336; EG-NEXT:     ADD_INT T0.Y, PV.Y, PV.W,
2337; EG-NEXT:     ASHR T1.W, PS, literal.x,
2338; EG-NEXT:     LSHR * T2.W, PS, literal.y,
2339; EG-NEXT:    12(1.681558e-44), 31(4.344025e-44)
2340; EG-NEXT:     ADD_INT T0.X, PV.W, PS,
2341; EG-NEXT:     LSHR * T1.X, KC0[2].Z, literal.x,
2342; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
2343  %1 = load <4 x i32>, <4 x i32> addrspace(1)* %in, align 16
2344  %2 = sdiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668>
2345  store <4 x i32> %2, <4 x i32> addrspace(1)* %out, align 16
2346  ret void
2347}
2348