1; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MEMTIME -check-prefix=SIVI -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MEMTIME -check-prefix=SIVI -check-prefix=GCN %s 3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MEMTIME -check-prefix=GCN %s 4; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GETREG,GETREG-SDAG -check-prefix=GCN %s 5; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -amdgpu-enable-vopd=0 < %s | FileCheck -enable-var-scope -check-prefixes=GETREG,GETREG-SDAG -check-prefix=GCN %s 6 7declare i64 @llvm.readcyclecounter() #0 8 9; GCN-LABEL: {{^}}test_readcyclecounter: 10; MEMTIME-DAG: s_memtime s{{\[[0-9]+:[0-9]+\]}} 11; GCN-DAG: s_load_{{dwordx2|b64}} 12; GCN-DAG: lgkmcnt 13; MEMTIME: store_dwordx2 14; SIVI-NOT: lgkmcnt 15; MEMTIME: s_memtime s{{\[[0-9]+:[0-9]+\]}} 16; MEMTIME: store_dwordx2 17 18; GETREG-GISEL-DAG: s_mov_b32 s[[SZERO:[0-9]+]], 0 19; GETREG-GISEL-DAG: v_mov_b32_e32 v[[ZERO:[0-9]+]], s[[SZERO]] 20; GETREG-SDAG-DAG: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0 21; GETREG-DAG: s_getreg_b32 [[CNT1:s[0-9]+]], hwreg(HW_REG_SHADER_CYCLES, 0, 20) 22; GETREG-DAG: v_mov_b32_e32 v[[VCNT1:[0-9]+]], [[CNT1]] 23; GETREG: global_store_{{dwordx2|b64}} v{{.+}}, v[[[VCNT1]]:[[ZERO]]] 24; GETREG: s_getreg_b32 [[CNT2:s[0-9]+]], hwreg(HW_REG_SHADER_CYCLES, 0, 20) 25; GETREG: v_mov_b32_e32 v[[VCNT2:[0-9]+]], [[CNT2]] 26; GETREG: global_store_{{dwordx2|b64}} v{{.+}}, v[[[VCNT2]]:[[ZERO]]] 27 28define amdgpu_kernel void @test_readcyclecounter(i64 addrspace(1)* %out) #0 { 29 %cycle0 = call i64 @llvm.readcyclecounter() 30 store volatile i64 %cycle0, i64 addrspace(1)* %out 31 32 %cycle1 = call i64 @llvm.readcyclecounter() 33 store volatile i64 %cycle1, i64 addrspace(1)* %out 34 ret void 35} 36 37; This test used to crash in ScheduleDAG. 38; 39; GCN-LABEL: {{^}}test_readcyclecounter_smem: 40; MEMTIME-DAG: s_memtime 41; GCN-DAG: s_load_{{dword|b32|b64}} 42; GETREG-DAG: s_getreg_b32 s1, hwreg(HW_REG_SHADER_CYCLES, 0, 20) 43define amdgpu_cs i32 @test_readcyclecounter_smem(i64 addrspace(4)* inreg %in) #0 { 44 %cycle0 = call i64 @llvm.readcyclecounter() 45 %in.v = load i64, i64 addrspace(4)* %in 46 %r.64 = add i64 %cycle0, %in.v 47 %r.32 = trunc i64 %r.64 to i32 48 ret i32 %r.32 49} 50 51attributes #0 = { nounwind } 52