1; RUN: llc -march=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX8 %s
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX10 %s
4; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX10 %s
5
6; FIXME: GFX9 should be producing v_mad_u16 instead of v_mad_legacy_u16.
7
8; GCN-LABEL: {{^}}mad_u16
9; GCN: {{flat|global}}_load_{{ushort|u16}} v[[A:[0-9]+]]
10; GCN: {{flat|global}}_load_{{ushort|u16}} v[[B:[0-9]+]]
11; GCN: {{flat|global}}_load_{{ushort|u16}} v[[C:[0-9]+]]
12; GFX8: v_mad_u16 v[[R:[0-9]+]], v[[A]], v[[B]], v[[C]]
13; GFX9: v_mad_legacy_u16 v[[R:[0-9]+]], v[[A]], v[[B]], v[[C]]
14; GFX10: v_mad_u16 v[[R:[0-9]+]], v[[A]], v[[B]], v[[C]]
15; GCN: {{flat|global}}_store_{{short|b16}} v{{.+}}, v[[R]]
16; GCN: s_endpgm
17define amdgpu_kernel void @mad_u16(
18    i16 addrspace(1)* %r,
19    i16 addrspace(1)* %a,
20    i16 addrspace(1)* %b,
21    i16 addrspace(1)* %c) {
22entry:
23  %tid = call i32 @llvm.amdgcn.workitem.id.x()
24  %a.gep = getelementptr inbounds i16, i16 addrspace(1)* %a, i32 %tid
25  %b.gep = getelementptr inbounds i16, i16 addrspace(1)* %b, i32 %tid
26  %c.gep = getelementptr inbounds i16, i16 addrspace(1)* %c, i32 %tid
27
28  %a.val = load volatile i16, i16 addrspace(1)* %a.gep
29  %b.val = load volatile i16, i16 addrspace(1)* %b.gep
30  %c.val = load volatile i16, i16 addrspace(1)* %c.gep
31
32  %m.val = mul i16 %a.val, %b.val
33  %r.val = add i16 %m.val, %c.val
34
35  store i16 %r.val, i16 addrspace(1)* %r
36  ret void
37}
38
39declare i32 @llvm.amdgcn.workitem.id.x()
40