1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN
3; RUN: llc -global-isel -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=GCN
4
5declare void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* nocapture, i32 %size, i32 %voffset, i32 %soffset, i32 %offset, i32 %aux)
6
7define amdgpu_ps float @buffer_load_lds_dword(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds) {
8; GCN-LABEL: buffer_load_lds_dword:
9; GCN:       ; %bb.0: ; %main_body
10; GCN-NEXT:    s_mov_b32 m0, s4
11; GCN-NEXT:    s_nop 0
12; GCN-NEXT:    buffer_load_dword off, s[0:3], 0 lds
13; GCN-NEXT:    buffer_load_dword off, s[0:3], 0 offset:4 glc lds
14; GCN-NEXT:    buffer_load_dword off, s[0:3], 0 offset:8 slc lds
15; GCN-NEXT:    v_mov_b32_e32 v0, s4
16; GCN-NEXT:    s_waitcnt vmcnt(0)
17; GCN-NEXT:    ds_read_b32 v0, v0
18; GCN-NEXT:    s_waitcnt lgkmcnt(0)
19; GCN-NEXT:    ; return to shader part epilog
20main_body:
21  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 0, i32 0, i32 0, i32 0)
22  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 0, i32 0, i32 4, i32 1)
23  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 0, i32 0, i32 8, i32 2)
24  %ptr = bitcast i8 addrspace(3)* %lds to float addrspace(3)*
25  %res = load float, float addrspace(3)* %ptr
26  ret float %res
27}
28
29define amdgpu_ps void @buffer_load_lds_dword_imm_voffset(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds) {
30; GCN-LABEL: buffer_load_lds_dword_imm_voffset:
31; GCN:       ; %bb.0: ; %main_body
32; GCN-NEXT:    v_mov_b32_e32 v0, 0x800
33; GCN-NEXT:    s_mov_b32 m0, s4
34; GCN-NEXT:    s_nop 0
35; GCN-NEXT:    buffer_load_dword v0, s[0:3], 0 offen lds
36; GCN-NEXT:    s_endpgm
37main_body:
38  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 2048, i32 0, i32 0, i32 0)
39  ret void
40}
41
42define amdgpu_ps void @buffer_load_lds_dword_v_offset(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds, i32 %voffset) {
43; GCN-LABEL: buffer_load_lds_dword_v_offset:
44; GCN:       ; %bb.0: ; %main_body
45; GCN-NEXT:    s_mov_b32 m0, s4
46; GCN-NEXT:    s_nop 0
47; GCN-NEXT:    buffer_load_dword v0, s[0:3], 0 offen lds
48; GCN-NEXT:    s_endpgm
49main_body:
50  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 %voffset, i32 0, i32 0, i32 0)
51  ret void
52}
53
54define amdgpu_ps void @buffer_load_lds_dword_s_offset(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds, i32 inreg %soffset) {
55; GCN-LABEL: buffer_load_lds_dword_s_offset:
56; GCN:       ; %bb.0: ; %main_body
57; GCN-NEXT:    s_mov_b32 m0, s4
58; GCN-NEXT:    s_nop 0
59; GCN-NEXT:    buffer_load_dword off, s[0:3], s5 lds
60; GCN-NEXT:    s_endpgm
61main_body:
62  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 0, i32 %soffset, i32 0, i32 0)
63  ret void
64}
65
66define amdgpu_ps void @buffer_load_lds_dword_vs_offset(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds, i32 %voffset, i32 inreg %soffset) {
67; GCN-LABEL: buffer_load_lds_dword_vs_offset:
68; GCN:       ; %bb.0: ; %main_body
69; GCN-NEXT:    s_mov_b32 m0, s4
70; GCN-NEXT:    s_nop 0
71; GCN-NEXT:    buffer_load_dword v0, s[0:3], s5 offen lds
72; GCN-NEXT:    s_endpgm
73main_body:
74  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 %voffset, i32 %soffset, i32 0, i32 0)
75  ret void
76}
77
78define amdgpu_ps void @buffer_load_lds_dword_vs_imm_offset(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds, i32 %voffset, i32 inreg %soffset) {
79; GCN-LABEL: buffer_load_lds_dword_vs_imm_offset:
80; GCN:       ; %bb.0: ; %main_body
81; GCN-NEXT:    s_mov_b32 m0, s4
82; GCN-NEXT:    s_nop 0
83; GCN-NEXT:    buffer_load_dword v0, s[0:3], s5 offen offset:2048 lds
84; GCN-NEXT:    s_endpgm
85main_body:
86  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 4, i32 %voffset, i32 %soffset, i32 2048, i32 0)
87  ret void
88}
89
90define amdgpu_ps void @buffer_load_lds_ushort(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds) {
91; GCN-LABEL: buffer_load_lds_ushort:
92; GCN:       ; %bb.0: ; %main_body
93; GCN-NEXT:    v_mov_b32_e32 v0, 0x800
94; GCN-NEXT:    s_mov_b32 m0, s4
95; GCN-NEXT:    s_nop 0
96; GCN-NEXT:    buffer_load_ushort v0, s[0:3], 0 offen lds
97; GCN-NEXT:    s_endpgm
98main_body:
99  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 2, i32 2048, i32 0, i32 0, i32 0)
100  ret void
101}
102
103define amdgpu_ps void @buffer_load_lds_ubyte(<4 x i32> inreg %rsrc, i8 addrspace(3)* inreg %lds) {
104; GCN-LABEL: buffer_load_lds_ubyte:
105; GCN:       ; %bb.0: ; %main_body
106; GCN-NEXT:    s_mov_b32 m0, s4
107; GCN-NEXT:    s_nop 0
108; GCN-NEXT:    buffer_load_ubyte off, s[0:3], 0 offset:2048 lds
109; GCN-NEXT:    s_endpgm
110main_body:
111  call void @llvm.amdgcn.raw.buffer.load.lds(<4 x i32> %rsrc, i8 addrspace(3)* %lds, i32 1, i32 0, i32 0, i32 2048, i32 0)
112  ret void
113}
114