1; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX11 %s
2; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX11 %s
3
4; GFX11-LABEL: {{^}}lds_param_load:
5; GFX11: s_mov_b32 m0
6; GFX11-DAG: lds_param_load v{{[0-9]+}}, attr0.x
7; GFX11-DAG: lds_param_load v{{[0-9]+}}, attr0.y
8; GFX11-DAG: lds_param_load v{{[0-9]+}}, attr0.z
9; GFX11-DAG: lds_param_load v{{[0-9]+}}, attr0.w
10; GFX11-DAG: lds_param_load v{{[0-9]+}}, attr1.x
11; GFX11: s_waitcnt expcnt(4)
12; GFX11: v_add_f32
13; GFX11: buffer_store_b32
14; GFX11: s_waitcnt expcnt(3)
15; GFX11: buffer_store_b32
16; GFX11: s_waitcnt expcnt(2)
17; GFX11: buffer_store_b32
18; GFX11: s_waitcnt expcnt(1)
19; GFX11: buffer_store_b32
20; GFX11: s_waitcnt expcnt(0)
21; GFX11: buffer_store_b32
22; GFX11: buffer_store_b32
23define amdgpu_ps void @lds_param_load(<4 x i32> inreg %buf, i32 inreg %arg) #0 {
24main_body:
25  %p0 = call float @llvm.amdgcn.lds.param.load(i32 0, i32 0, i32 %arg)
26  ; Ensure memory clustering is occuring for lds_param_load
27  %p5 = fadd float %p0, 1.0
28  %p1 = call float @llvm.amdgcn.lds.param.load(i32 1, i32 0, i32 %arg)
29  %p2 = call float @llvm.amdgcn.lds.param.load(i32 2, i32 0, i32 %arg)
30  %p3 = call float @llvm.amdgcn.lds.param.load(i32 3, i32 0, i32 %arg)
31  %p4 = call float @llvm.amdgcn.lds.param.load(i32 0, i32 1, i32 %arg)
32  call void @llvm.amdgcn.raw.buffer.store.f32(float %p5, <4 x i32> %buf, i32 4, i32 0, i32 0)
33  call void @llvm.amdgcn.raw.buffer.store.f32(float %p1, <4 x i32> %buf, i32 4, i32 1, i32 0)
34  call void @llvm.amdgcn.raw.buffer.store.f32(float %p2, <4 x i32> %buf, i32 4, i32 2, i32 0)
35  call void @llvm.amdgcn.raw.buffer.store.f32(float %p3, <4 x i32> %buf, i32 4, i32 3, i32 0)
36  call void @llvm.amdgcn.raw.buffer.store.f32(float %p4, <4 x i32> %buf, i32 4, i32 4, i32 0)
37  call void @llvm.amdgcn.raw.buffer.store.f32(float %p0, <4 x i32> %buf, i32 4, i32 5, i32 0)
38  ret void
39}
40
41declare float @llvm.amdgcn.lds.param.load(i32, i32, i32) #1
42declare void @llvm.amdgcn.raw.buffer.store.f32(float, <4 x i32>, i32, i32, i32)
43
44attributes #0 = { nounwind }
45attributes #1 = { nounwind readnone }
46