1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefixes=TONGA %s 3; RUN: llc < %s -march=amdgcn -mcpu=gfx810 -verify-machineinstrs | FileCheck -check-prefixes=GFX81 %s 4; RUN: llc < %s -march=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck -check-prefixes=GFX9 %s 5; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s 6; RUN: llc < %s -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s 7 8define amdgpu_ps half @image_sample_2d_f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t) { 9; TONGA-LABEL: image_sample_2d_f16: 10; TONGA: ; %bb.0: ; %main_body 11; TONGA-NEXT: s_mov_b64 s[12:13], exec 12; TONGA-NEXT: s_wqm_b64 exec, exec 13; TONGA-NEXT: s_and_b64 exec, exec, s[12:13] 14; TONGA-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16 15; TONGA-NEXT: s_waitcnt vmcnt(0) 16; TONGA-NEXT: ; return to shader part epilog 17; 18; GFX81-LABEL: image_sample_2d_f16: 19; GFX81: ; %bb.0: ; %main_body 20; GFX81-NEXT: s_mov_b64 s[12:13], exec 21; GFX81-NEXT: s_wqm_b64 exec, exec 22; GFX81-NEXT: s_and_b64 exec, exec, s[12:13] 23; GFX81-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16 24; GFX81-NEXT: s_waitcnt vmcnt(0) 25; GFX81-NEXT: ; return to shader part epilog 26; 27; GFX9-LABEL: image_sample_2d_f16: 28; GFX9: ; %bb.0: ; %main_body 29; GFX9-NEXT: s_mov_b64 s[12:13], exec 30; GFX9-NEXT: s_wqm_b64 exec, exec 31; GFX9-NEXT: s_and_b64 exec, exec, s[12:13] 32; GFX9-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 d16 33; GFX9-NEXT: s_waitcnt vmcnt(0) 34; GFX9-NEXT: ; return to shader part epilog 35; 36; GFX10PLUS-LABEL: image_sample_2d_f16: 37; GFX10PLUS: ; %bb.0: ; %main_body 38; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo 39; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo 40; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12 41; GFX10PLUS-NEXT: image_sample v0, v[0:1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D d16 42; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 43; GFX10PLUS-NEXT: ; return to shader part epilog 44main_body: 45 %tex = call half @llvm.amdgcn.image.sample.2d.f16.f32(i32 1, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0) 46 ret half %tex 47} 48 49define amdgpu_ps half @image_sample_2d_f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %s, float %t, i32 addrspace(1)* inreg %out) { 50; TONGA-LABEL: image_sample_2d_f16_tfe: 51; TONGA: ; %bb.0: ; %main_body 52; TONGA-NEXT: s_mov_b64 s[14:15], exec 53; TONGA-NEXT: s_wqm_b64 exec, exec 54; TONGA-NEXT: v_mov_b32_e32 v2, 0 55; TONGA-NEXT: v_mov_b32_e32 v3, v2 56; TONGA-NEXT: s_and_b64 exec, exec, s[14:15] 57; TONGA-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16 58; TONGA-NEXT: v_mov_b32_e32 v0, s12 59; TONGA-NEXT: v_mov_b32_e32 v1, s13 60; TONGA-NEXT: s_waitcnt vmcnt(0) 61; TONGA-NEXT: flat_store_dword v[0:1], v3 62; TONGA-NEXT: v_mov_b32_e32 v0, v2 63; TONGA-NEXT: s_waitcnt vmcnt(0) 64; TONGA-NEXT: ; return to shader part epilog 65; 66; GFX81-LABEL: image_sample_2d_f16_tfe: 67; GFX81: ; %bb.0: ; %main_body 68; GFX81-NEXT: s_mov_b64 s[14:15], exec 69; GFX81-NEXT: s_wqm_b64 exec, exec 70; GFX81-NEXT: v_mov_b32_e32 v2, 0 71; GFX81-NEXT: v_mov_b32_e32 v3, v2 72; GFX81-NEXT: s_and_b64 exec, exec, s[14:15] 73; GFX81-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16 74; GFX81-NEXT: v_mov_b32_e32 v0, s12 75; GFX81-NEXT: v_mov_b32_e32 v1, s13 76; GFX81-NEXT: s_waitcnt vmcnt(0) 77; GFX81-NEXT: flat_store_dword v[0:1], v3 78; GFX81-NEXT: v_mov_b32_e32 v0, v2 79; GFX81-NEXT: s_waitcnt vmcnt(0) 80; GFX81-NEXT: ; return to shader part epilog 81; 82; GFX9-LABEL: image_sample_2d_f16_tfe: 83; GFX9: ; %bb.0: ; %main_body 84; GFX9-NEXT: s_mov_b64 s[14:15], exec 85; GFX9-NEXT: s_wqm_b64 exec, exec 86; GFX9-NEXT: v_mov_b32_e32 v4, 0 87; GFX9-NEXT: v_mov_b32_e32 v5, v4 88; GFX9-NEXT: v_mov_b32_e32 v2, v4 89; GFX9-NEXT: v_mov_b32_e32 v3, v5 90; GFX9-NEXT: s_and_b64 exec, exec, s[14:15] 91; GFX9-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 tfe d16 92; GFX9-NEXT: s_waitcnt vmcnt(0) 93; GFX9-NEXT: v_mov_b32_e32 v0, v2 94; GFX9-NEXT: global_store_dword v4, v3, s[12:13] 95; GFX9-NEXT: s_waitcnt vmcnt(0) 96; GFX9-NEXT: ; return to shader part epilog 97; 98; GFX10-LABEL: image_sample_2d_f16_tfe: 99; GFX10: ; %bb.0: ; %main_body 100; GFX10-NEXT: s_mov_b32 s14, exec_lo 101; GFX10-NEXT: s_wqm_b32 exec_lo, exec_lo 102; GFX10-NEXT: v_mov_b32_e32 v4, 0 103; GFX10-NEXT: v_mov_b32_e32 v5, v4 104; GFX10-NEXT: v_mov_b32_e32 v2, v4 105; GFX10-NEXT: v_mov_b32_e32 v3, v5 106; GFX10-NEXT: s_and_b32 exec_lo, exec_lo, s14 107; GFX10-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D tfe d16 108; GFX10-NEXT: s_waitcnt vmcnt(0) 109; GFX10-NEXT: v_mov_b32_e32 v0, v2 110; GFX10-NEXT: global_store_dword v4, v3, s[12:13] 111; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 112; GFX10-NEXT: ; return to shader part epilog 113; 114; GFX11-LABEL: image_sample_2d_f16_tfe: 115; GFX11: ; %bb.0: ; %main_body 116; GFX11-NEXT: s_mov_b32 s14, exec_lo 117; GFX11-NEXT: s_wqm_b32 exec_lo, exec_lo 118; GFX11-NEXT: v_mov_b32_e32 v4, 0 119; GFX11-NEXT: v_mov_b32_e32 v5, v4 120; GFX11-NEXT: v_mov_b32_e32 v2, v4 121; GFX11-NEXT: v_mov_b32_e32 v3, v5 122; GFX11-NEXT: s_and_b32 exec_lo, exec_lo, s14 123; GFX11-NEXT: image_sample v[2:3], v[0:1], s[0:7], s[8:11] dmask:0x1 dim:SQ_RSRC_IMG_2D tfe d16 124; GFX11-NEXT: s_waitcnt vmcnt(0) 125; GFX11-NEXT: v_mov_b32_e32 v0, v2 126; GFX11-NEXT: global_store_b32 v4, v3, s[12:13] 127; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 128; GFX11-NEXT: ; return to shader part epilog 129main_body: 130 %tex = call {half,i32} @llvm.amdgcn.image.sample.2d.f16i32.f32(i32 1, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0) 131 %tex.vec = extractvalue {half, i32} %tex, 0 132 %tex.err = extractvalue {half, i32} %tex, 1 133 store i32 %tex.err, i32 addrspace(1)* %out, align 4 134 ret half %tex.vec 135} 136 137define amdgpu_ps float @image_sample_c_d_1d_v2f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, float %dsdh, float %dsdv, float %s) { 138; TONGA-LABEL: image_sample_c_d_1d_v2f16: 139; TONGA: ; %bb.0: ; %main_body 140; TONGA-NEXT: image_sample_c_d v[0:1], v[0:3], s[0:7], s[8:11] dmask:0x3 d16 141; TONGA-NEXT: s_waitcnt vmcnt(0) 142; TONGA-NEXT: v_lshlrev_b32_e32 v1, 16, v1 143; TONGA-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 144; TONGA-NEXT: ; return to shader part epilog 145; 146; GFX81-LABEL: image_sample_c_d_1d_v2f16: 147; GFX81: ; %bb.0: ; %main_body 148; GFX81-NEXT: image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 d16 149; GFX81-NEXT: s_waitcnt vmcnt(0) 150; GFX81-NEXT: ; return to shader part epilog 151; 152; GFX9-LABEL: image_sample_c_d_1d_v2f16: 153; GFX9: ; %bb.0: ; %main_body 154; GFX9-NEXT: image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 d16 155; GFX9-NEXT: s_waitcnt vmcnt(0) 156; GFX9-NEXT: ; return to shader part epilog 157; 158; GFX10PLUS-LABEL: image_sample_c_d_1d_v2f16: 159; GFX10PLUS: ; %bb.0: ; %main_body 160; GFX10PLUS-NEXT: image_sample_c_d v0, v[0:3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D d16 161; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 162; GFX10PLUS-NEXT: ; return to shader part epilog 163main_body: 164 %tex = call <2 x half> @llvm.amdgcn.image.sample.c.d.1d.v2f16.f32.f32(i32 3, float %zcompare, float %dsdh, float %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0) 165 %r = bitcast <2 x half> %tex to float 166 ret float %r 167} 168 169define amdgpu_ps <2 x float> @image_sample_c_d_1d_v2f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %zcompare, float %dsdh, float %dsdv, float %s) { 170; TONGA-LABEL: image_sample_c_d_1d_v2f16_tfe: 171; TONGA: ; %bb.0: ; %main_body 172; TONGA-NEXT: v_mov_b32_e32 v4, 0 173; TONGA-NEXT: v_mov_b32_e32 v5, v4 174; TONGA-NEXT: v_mov_b32_e32 v6, v4 175; TONGA-NEXT: image_sample_c_d v[4:6], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16 176; TONGA-NEXT: s_waitcnt vmcnt(0) 177; TONGA-NEXT: v_lshlrev_b32_e32 v0, 16, v5 178; TONGA-NEXT: v_or_b32_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 179; TONGA-NEXT: v_mov_b32_e32 v1, v6 180; TONGA-NEXT: ; return to shader part epilog 181; 182; GFX81-LABEL: image_sample_c_d_1d_v2f16_tfe: 183; GFX81: ; %bb.0: ; %main_body 184; GFX81-NEXT: v_mov_b32_e32 v4, 0 185; GFX81-NEXT: v_mov_b32_e32 v5, v4 186; GFX81-NEXT: image_sample_c_d v[4:5], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16 187; GFX81-NEXT: s_waitcnt vmcnt(0) 188; GFX81-NEXT: v_mov_b32_e32 v0, v4 189; GFX81-NEXT: v_mov_b32_e32 v1, v5 190; GFX81-NEXT: ; return to shader part epilog 191; 192; GFX9-LABEL: image_sample_c_d_1d_v2f16_tfe: 193; GFX9: ; %bb.0: ; %main_body 194; GFX9-NEXT: v_mov_b32_e32 v4, 0 195; GFX9-NEXT: v_mov_b32_e32 v5, v4 196; GFX9-NEXT: image_sample_c_d v[4:5], v[0:3], s[0:7], s[8:11] dmask:0x3 tfe d16 197; GFX9-NEXT: s_waitcnt vmcnt(0) 198; GFX9-NEXT: v_mov_b32_e32 v0, v4 199; GFX9-NEXT: v_mov_b32_e32 v1, v5 200; GFX9-NEXT: ; return to shader part epilog 201; 202; GFX10PLUS-LABEL: image_sample_c_d_1d_v2f16_tfe: 203; GFX10PLUS: ; %bb.0: ; %main_body 204; GFX10PLUS-NEXT: v_mov_b32_e32 v5, v0 205; GFX10PLUS-NEXT: v_mov_b32_e32 v0, 0 206; GFX10PLUS-NEXT: v_mov_b32_e32 v4, v1 207; GFX10PLUS-NEXT: v_mov_b32_e32 v1, v0 208; GFX10PLUS-NEXT: image_sample_c_d v[0:1], [v5, v4, v2, v3], s[0:7], s[8:11] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe d16 209; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 210; GFX10PLUS-NEXT: ; return to shader part epilog 211main_body: 212 %tex = call {<2 x half>,i32} @llvm.amdgcn.image.sample.c.d.1d.v2f16i32.f32.f32(i32 3, float %zcompare, float %dsdh, float %dsdv, float %s, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0) 213 %tex.vec = extractvalue {<2 x half>, i32} %tex, 0 214 %tex.err = extractvalue {<2 x half>, i32} %tex, 1 215 %tex.vecf = bitcast <2 x half> %tex.vec to float 216 %r.0 = insertelement <2 x float> undef, float %tex.vecf, i32 0 217 %tex.errf = bitcast i32 %tex.err to float 218 %r = insertelement <2 x float> %r.0, float %tex.errf, i32 1 219 ret <2 x float> %r 220} 221 222define amdgpu_ps <2 x float> @image_sample_b_2d_v3f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) { 223; TONGA-LABEL: image_sample_b_2d_v3f16: 224; TONGA: ; %bb.0: ; %main_body 225; TONGA-NEXT: s_mov_b64 s[12:13], exec 226; TONGA-NEXT: s_wqm_b64 exec, exec 227; TONGA-NEXT: s_and_b64 exec, exec, s[12:13] 228; TONGA-NEXT: image_sample_b v[0:2], v[0:2], s[0:7], s[8:11] dmask:0x7 d16 229; TONGA-NEXT: s_waitcnt vmcnt(0) 230; TONGA-NEXT: v_lshlrev_b32_e32 v1, 16, v1 231; TONGA-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 232; TONGA-NEXT: v_mov_b32_e32 v1, v2 233; TONGA-NEXT: ; return to shader part epilog 234; 235; GFX81-LABEL: image_sample_b_2d_v3f16: 236; GFX81: ; %bb.0: ; %main_body 237; GFX81-NEXT: s_mov_b64 s[12:13], exec 238; GFX81-NEXT: s_wqm_b64 exec, exec 239; GFX81-NEXT: s_and_b64 exec, exec, s[12:13] 240; GFX81-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 d16 241; GFX81-NEXT: s_waitcnt vmcnt(0) 242; GFX81-NEXT: ; return to shader part epilog 243; 244; GFX9-LABEL: image_sample_b_2d_v3f16: 245; GFX9: ; %bb.0: ; %main_body 246; GFX9-NEXT: s_mov_b64 s[12:13], exec 247; GFX9-NEXT: s_wqm_b64 exec, exec 248; GFX9-NEXT: s_and_b64 exec, exec, s[12:13] 249; GFX9-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 d16 250; GFX9-NEXT: s_waitcnt vmcnt(0) 251; GFX9-NEXT: ; return to shader part epilog 252; 253; GFX10PLUS-LABEL: image_sample_b_2d_v3f16: 254; GFX10PLUS: ; %bb.0: ; %main_body 255; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo 256; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo 257; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12 258; GFX10PLUS-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D d16 259; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 260; GFX10PLUS-NEXT: ; return to shader part epilog 261main_body: 262 %tex = call <3 x half> @llvm.amdgcn.image.sample.b.2d.v3f16.f32.f32(i32 7, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0) 263 %tex_wide = shufflevector <3 x half> %tex, <3 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 264 %r = bitcast <4 x half> %tex_wide to <2 x float> 265 ret <2 x float> %r 266} 267 268define amdgpu_ps <4 x float> @image_sample_b_2d_v3f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) { 269; TONGA-LABEL: image_sample_b_2d_v3f16_tfe: 270; TONGA: ; %bb.0: ; %main_body 271; TONGA-NEXT: s_mov_b64 s[12:13], exec 272; TONGA-NEXT: s_wqm_b64 exec, exec 273; TONGA-NEXT: v_mov_b32_e32 v3, 0 274; TONGA-NEXT: v_mov_b32_e32 v4, v3 275; TONGA-NEXT: v_mov_b32_e32 v5, v3 276; TONGA-NEXT: v_mov_b32_e32 v6, v3 277; TONGA-NEXT: s_and_b64 exec, exec, s[12:13] 278; TONGA-NEXT: image_sample_b v[3:6], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16 279; TONGA-NEXT: s_waitcnt vmcnt(0) 280; TONGA-NEXT: v_lshlrev_b32_e32 v0, 16, v4 281; TONGA-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 282; TONGA-NEXT: v_mov_b32_e32 v1, v5 283; TONGA-NEXT: v_mov_b32_e32 v2, v6 284; TONGA-NEXT: ; return to shader part epilog 285; 286; GFX81-LABEL: image_sample_b_2d_v3f16_tfe: 287; GFX81: ; %bb.0: ; %main_body 288; GFX81-NEXT: s_mov_b64 s[12:13], exec 289; GFX81-NEXT: s_wqm_b64 exec, exec 290; GFX81-NEXT: v_mov_b32_e32 v3, 0 291; GFX81-NEXT: v_mov_b32_e32 v4, v3 292; GFX81-NEXT: v_mov_b32_e32 v5, v3 293; GFX81-NEXT: s_and_b64 exec, exec, s[12:13] 294; GFX81-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16 295; GFX81-NEXT: s_waitcnt vmcnt(0) 296; GFX81-NEXT: v_mov_b32_e32 v0, v3 297; GFX81-NEXT: v_mov_b32_e32 v1, v4 298; GFX81-NEXT: v_mov_b32_e32 v2, v5 299; GFX81-NEXT: ; return to shader part epilog 300; 301; GFX9-LABEL: image_sample_b_2d_v3f16_tfe: 302; GFX9: ; %bb.0: ; %main_body 303; GFX9-NEXT: s_mov_b64 s[12:13], exec 304; GFX9-NEXT: s_wqm_b64 exec, exec 305; GFX9-NEXT: v_mov_b32_e32 v3, 0 306; GFX9-NEXT: v_mov_b32_e32 v4, v3 307; GFX9-NEXT: v_mov_b32_e32 v5, v3 308; GFX9-NEXT: s_and_b64 exec, exec, s[12:13] 309; GFX9-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0x7 tfe d16 310; GFX9-NEXT: s_waitcnt vmcnt(0) 311; GFX9-NEXT: v_mov_b32_e32 v0, v3 312; GFX9-NEXT: v_mov_b32_e32 v1, v4 313; GFX9-NEXT: v_mov_b32_e32 v2, v5 314; GFX9-NEXT: ; return to shader part epilog 315; 316; GFX10PLUS-LABEL: image_sample_b_2d_v3f16_tfe: 317; GFX10PLUS: ; %bb.0: ; %main_body 318; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo 319; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo 320; GFX10PLUS-NEXT: v_mov_b32_e32 v3, v0 321; GFX10PLUS-NEXT: v_mov_b32_e32 v0, 0 322; GFX10PLUS-NEXT: v_mov_b32_e32 v5, v2 323; GFX10PLUS-NEXT: v_mov_b32_e32 v4, v1 324; GFX10PLUS-NEXT: v_mov_b32_e32 v1, v0 325; GFX10PLUS-NEXT: v_mov_b32_e32 v2, v0 326; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12 327; GFX10PLUS-NEXT: image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0x7 dim:SQ_RSRC_IMG_2D tfe d16 328; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 329; GFX10PLUS-NEXT: ; return to shader part epilog 330main_body: 331 %tex = call {<3 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v3f16i32.f32.f32(i32 7, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0) 332 %tex.vec = extractvalue {<3 x half>, i32} %tex, 0 333 %tex.vec_wide = shufflevector <3 x half> %tex.vec, <3 x half> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 334 %tex.err = extractvalue {<3 x half>, i32} %tex, 1 335 %tex.vecf = bitcast <4 x half> %tex.vec_wide to <2 x float> 336 %tex.vecf.0 = extractelement <2 x float> %tex.vecf, i32 0 337 %tex.vecf.1 = extractelement <2 x float> %tex.vecf, i32 1 338 %r.0 = insertelement <4 x float> undef, float %tex.vecf.0, i32 0 339 %r.1 = insertelement <4 x float> %r.0, float %tex.vecf.1, i32 1 340 %tex.errf = bitcast i32 %tex.err to float 341 %r = insertelement <4 x float> %r.1, float %tex.errf, i32 2 342 ret <4 x float> %r 343} 344 345define amdgpu_ps <2 x float> @image_sample_b_2d_v4f16(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) { 346; TONGA-LABEL: image_sample_b_2d_v4f16: 347; TONGA: ; %bb.0: ; %main_body 348; TONGA-NEXT: s_mov_b64 s[12:13], exec 349; TONGA-NEXT: s_wqm_b64 exec, exec 350; TONGA-NEXT: s_and_b64 exec, exec, s[12:13] 351; TONGA-NEXT: image_sample_b v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf d16 352; TONGA-NEXT: s_waitcnt vmcnt(0) 353; TONGA-NEXT: v_lshlrev_b32_e32 v1, 16, v1 354; TONGA-NEXT: v_lshlrev_b32_e32 v3, 16, v3 355; TONGA-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 356; TONGA-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 357; TONGA-NEXT: ; return to shader part epilog 358; 359; GFX81-LABEL: image_sample_b_2d_v4f16: 360; GFX81: ; %bb.0: ; %main_body 361; GFX81-NEXT: s_mov_b64 s[12:13], exec 362; GFX81-NEXT: s_wqm_b64 exec, exec 363; GFX81-NEXT: s_and_b64 exec, exec, s[12:13] 364; GFX81-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf d16 365; GFX81-NEXT: s_waitcnt vmcnt(0) 366; GFX81-NEXT: ; return to shader part epilog 367; 368; GFX9-LABEL: image_sample_b_2d_v4f16: 369; GFX9: ; %bb.0: ; %main_body 370; GFX9-NEXT: s_mov_b64 s[12:13], exec 371; GFX9-NEXT: s_wqm_b64 exec, exec 372; GFX9-NEXT: s_and_b64 exec, exec, s[12:13] 373; GFX9-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf d16 374; GFX9-NEXT: s_waitcnt vmcnt(0) 375; GFX9-NEXT: ; return to shader part epilog 376; 377; GFX10PLUS-LABEL: image_sample_b_2d_v4f16: 378; GFX10PLUS: ; %bb.0: ; %main_body 379; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo 380; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo 381; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12 382; GFX10PLUS-NEXT: image_sample_b v[0:1], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D d16 383; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 384; GFX10PLUS-NEXT: ; return to shader part epilog 385main_body: 386 %tex = call <4 x half> @llvm.amdgcn.image.sample.b.2d.v4f16.f32.f32(i32 15, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 0, i32 0) 387 %r = bitcast <4 x half> %tex to <2 x float> 388 ret <2 x float> %r 389} 390 391define amdgpu_ps <4 x float> @image_sample_b_2d_v4f16_tfe(<8 x i32> inreg %rsrc, <4 x i32> inreg %samp, float %bias, float %s, float %t) { 392; TONGA-LABEL: image_sample_b_2d_v4f16_tfe: 393; TONGA: ; %bb.0: ; %main_body 394; TONGA-NEXT: s_mov_b64 s[12:13], exec 395; TONGA-NEXT: s_wqm_b64 exec, exec 396; TONGA-NEXT: v_mov_b32_e32 v3, 0 397; TONGA-NEXT: v_mov_b32_e32 v4, v3 398; TONGA-NEXT: v_mov_b32_e32 v5, v3 399; TONGA-NEXT: v_mov_b32_e32 v6, v3 400; TONGA-NEXT: v_mov_b32_e32 v7, v3 401; TONGA-NEXT: s_and_b64 exec, exec, s[12:13] 402; TONGA-NEXT: image_sample_b v[3:7], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16 403; TONGA-NEXT: s_waitcnt vmcnt(0) 404; TONGA-NEXT: v_lshlrev_b32_e32 v0, 16, v4 405; TONGA-NEXT: v_lshlrev_b32_e32 v1, 16, v6 406; TONGA-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 407; TONGA-NEXT: v_or_b32_sdwa v1, v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD 408; TONGA-NEXT: v_mov_b32_e32 v2, v7 409; TONGA-NEXT: ; return to shader part epilog 410; 411; GFX81-LABEL: image_sample_b_2d_v4f16_tfe: 412; GFX81: ; %bb.0: ; %main_body 413; GFX81-NEXT: s_mov_b64 s[12:13], exec 414; GFX81-NEXT: s_wqm_b64 exec, exec 415; GFX81-NEXT: v_mov_b32_e32 v3, 0 416; GFX81-NEXT: v_mov_b32_e32 v4, v3 417; GFX81-NEXT: v_mov_b32_e32 v5, v3 418; GFX81-NEXT: s_and_b64 exec, exec, s[12:13] 419; GFX81-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16 420; GFX81-NEXT: s_waitcnt vmcnt(0) 421; GFX81-NEXT: v_mov_b32_e32 v0, v3 422; GFX81-NEXT: v_mov_b32_e32 v1, v4 423; GFX81-NEXT: v_mov_b32_e32 v2, v5 424; GFX81-NEXT: ; return to shader part epilog 425; 426; GFX9-LABEL: image_sample_b_2d_v4f16_tfe: 427; GFX9: ; %bb.0: ; %main_body 428; GFX9-NEXT: s_mov_b64 s[12:13], exec 429; GFX9-NEXT: s_wqm_b64 exec, exec 430; GFX9-NEXT: v_mov_b32_e32 v3, 0 431; GFX9-NEXT: v_mov_b32_e32 v4, v3 432; GFX9-NEXT: v_mov_b32_e32 v5, v3 433; GFX9-NEXT: s_and_b64 exec, exec, s[12:13] 434; GFX9-NEXT: image_sample_b v[3:5], v[0:2], s[0:7], s[8:11] dmask:0xf tfe d16 435; GFX9-NEXT: s_waitcnt vmcnt(0) 436; GFX9-NEXT: v_mov_b32_e32 v0, v3 437; GFX9-NEXT: v_mov_b32_e32 v1, v4 438; GFX9-NEXT: v_mov_b32_e32 v2, v5 439; GFX9-NEXT: ; return to shader part epilog 440; 441; GFX10PLUS-LABEL: image_sample_b_2d_v4f16_tfe: 442; GFX10PLUS: ; %bb.0: ; %main_body 443; GFX10PLUS-NEXT: s_mov_b32 s12, exec_lo 444; GFX10PLUS-NEXT: s_wqm_b32 exec_lo, exec_lo 445; GFX10PLUS-NEXT: v_mov_b32_e32 v3, v0 446; GFX10PLUS-NEXT: v_mov_b32_e32 v0, 0 447; GFX10PLUS-NEXT: v_mov_b32_e32 v5, v2 448; GFX10PLUS-NEXT: v_mov_b32_e32 v4, v1 449; GFX10PLUS-NEXT: v_mov_b32_e32 v1, v0 450; GFX10PLUS-NEXT: v_mov_b32_e32 v2, v0 451; GFX10PLUS-NEXT: s_and_b32 exec_lo, exec_lo, s12 452; GFX10PLUS-NEXT: image_sample_b v[0:2], v[3:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D tfe d16 453; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) 454; GFX10PLUS-NEXT: ; return to shader part epilog 455main_body: 456 %tex = call {<4 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v4f16i32.f32.f32(i32 15, float %bias, float %s, float %t, <8 x i32> %rsrc, <4 x i32> %samp, i1 false, i32 1, i32 0) 457 %tex.vec = extractvalue {<4 x half>, i32} %tex, 0 458 %tex.err = extractvalue {<4 x half>, i32} %tex, 1 459 %tex.vecf = bitcast <4 x half> %tex.vec to <2 x float> 460 %tex.vecf.0 = extractelement <2 x float> %tex.vecf, i32 0 461 %tex.vecf.1 = extractelement <2 x float> %tex.vecf, i32 1 462 %r.0 = insertelement <4 x float> undef, float %tex.vecf.0, i32 0 463 %r.1 = insertelement <4 x float> %r.0, float %tex.vecf.1, i32 1 464 %tex.errf = bitcast i32 %tex.err to float 465 %r = insertelement <4 x float> %r.1, float %tex.errf, i32 2 466 ret <4 x float> %r 467} 468 469declare half @llvm.amdgcn.image.sample.2d.f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 470declare {half,i32} @llvm.amdgcn.image.sample.2d.f16i32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 471declare <3 x half> @llvm.amdgcn.image.sample.2d.v3f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 472declare <4 x half> @llvm.amdgcn.image.sample.2d.v4f16.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 473declare {<2 x half>,i32} @llvm.amdgcn.image.sample.2d.v2f16i32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 474declare <2 x half> @llvm.amdgcn.image.sample.c.d.1d.v2f16.f32.f32(i32, float, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 475declare {<2 x half>,i32} @llvm.amdgcn.image.sample.c.d.1d.v2f16i32.f32.f32(i32, float, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 476declare <3 x half> @llvm.amdgcn.image.sample.b.2d.v3f16.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 477declare {<3 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v3f16i32.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 478declare <4 x half> @llvm.amdgcn.image.sample.b.2d.v4f16.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 479declare {<4 x half>,i32} @llvm.amdgcn.image.sample.b.2d.v4f16i32.f32.f32(i32, float, float, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1 480 481attributes #0 = { nounwind } 482attributes #1 = { nounwind readonly } 483attributes #2 = { nounwind readnone } 484